From nobody Fri Dec 19 03:46:23 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2019C77B6E for ; Thu, 13 Apr 2023 13:30:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229794AbjDMNaS (ORCPT ); Thu, 13 Apr 2023 09:30:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229732AbjDMNaO (ORCPT ); Thu, 13 Apr 2023 09:30:14 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 481C1A5E4 for ; Thu, 13 Apr 2023 06:30:13 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id j203-20020a2523d4000000b00b8f21897f2fso9419116ybj.22 for ; Thu, 13 Apr 2023 06:30:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392612; x=1683984612; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=2NV87BbBsjD8I09UkOzwW/FhFYoJi/jz0pyNLoJ2JRk=; b=mDJ1vo7bott1im8+u3BWVKftu6jtIbcYDo3dmhS9FHOfSnGjisDDGwJm00lchVkoSt qBnHsbsDN0usNIJLqzN1GaalJzQExEXES6zW7O+E4rDieMblhrTkn+n3cACYU7jRbG2j h0QJfxq4WqqgqyqfiB67BBxTQnjXSiY7z1uI5Bh7W96tV7PDcaK6HlCncbJaoQbrr2oN kSgcS2XZAMjgBhYYNTmaEqNRndwfU1PUqaryjxEb0Yfa1eIGxaWfgIV5UCAz0dQlq+aX 8Tdq8FYV6XOhFgElZHsmV/f9mT9ke+4zauj/XxAPb8BoSkrUMteH6zWUJM43Fkk2uxQL Pp9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392612; x=1683984612; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=2NV87BbBsjD8I09UkOzwW/FhFYoJi/jz0pyNLoJ2JRk=; b=D7c2fooy3e60TN0PzzCc7BWWGpJA8iSKH/TO73K5+OhsiDk0vJe8DTqKkx47hhqJlM P9fyH4jlEDn/j1bg1UQeysrVcIRHeJDfU9tQlBoqhrZnb24r9LP4I9IoHM/6oKHnbgIg H4Z9OBB/haZAODQHzW5dctby8uyP94Xckxyp/ZdRCqr3NxLzSciYM1fpExBiyxijeDsK /FpAPl0T0IkSqQfBoDihxSilHuESvSc8wO9gOH8GZu2qdtV986WJQ9fwY4caMnUJ9QQO BR+eWT8rdmWSh2szc7X32bvrEM1OLHYKom0H4kaksOgPhWPggsCmZoQYqluPO0E+cc4H gwBg== X-Gm-Message-State: AAQBX9dAm/oc5zYPR63Us2167HNnBpEOmwnSx0exKE94ro94cqGBfMlM GL78qc1YwO1wb5u9VwLot3jQYh4Di67M X-Google-Smtp-Source: AKy350bdjHtUetg+bstCwHtHfCBOlqEUO3bWNd3UE56gq3tSb9rufxZexJpJ9iFkAZ9Yn/c4Ci5OW2Gt4Kau X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a05:690c:706:b0:545:5f92:f7ee with SMTP id bs6-20020a05690c070600b005455f92f7eemr1432421ywb.2.1681392612323; Thu, 13 Apr 2023 06:30:12 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:29 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-2-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 01/21] perf vendor events intel: Update sapphirerapids to v1.12 From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Summary from https://github.com/intel/perfmon/pull/68 - Numerous uncore event additions and changes. - Description updates for core events XQ.FULL_CYCLES and MISC2_RETIRED.LFE= NCE. - Update ARITH.IDIV_ACTIVE counter mask. This change also gets rid of uncore-other as a topic, derived from the file name, breaking it apart in to more specific topics. Signed-off-by: Ian Rogers --- tools/perf/pmu-events/arch/x86/mapfile.csv | 2 +- .../arch/x86/sapphirerapids/other.json | 3 +- .../arch/x86/sapphirerapids/pipeline.json | 4 +- .../arch/x86/sapphirerapids/uncore-cache.json | 5644 +++++++++++++++ .../arch/x86/sapphirerapids/uncore-cxl.json | 450 ++ .../sapphirerapids/uncore-interconnect.json | 6199 +++++++++++++++++ .../arch/x86/sapphirerapids/uncore-io.json | 3651 ++++++++++ .../x86/sapphirerapids/uncore-memory.json | 3283 ++++++++- .../arch/x86/sapphirerapids/uncore-other.json | 4525 ------------ .../arch/x86/sapphirerapids/uncore-power.json | 107 + 10 files changed, 19122 insertions(+), 4746 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-ca= che.json create mode 100644 tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cx= l.json create mode 100644 tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-in= terconnect.json create mode 100644 tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io= .json delete mode 100644 tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-ot= her.json diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-ev= ents/arch/x86/mapfile.csv index 58faf18474b5..437eeecfaf64 100644 --- a/tools/perf/pmu-events/arch/x86/mapfile.csv +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv @@ -22,7 +22,7 @@ GenuineIntel-6-A[AC],v1.01,meteorlake,core GenuineIntel-6-1[AEF],v3,nehalemep,core GenuineIntel-6-2E,v3,nehalemex,core GenuineIntel-6-2A,v19,sandybridge,core -GenuineIntel-6-(8F|CF),v1.11,sapphirerapids,core +GenuineIntel-6-(8F|CF),v1.12,sapphirerapids,core GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v55,skylake,core GenuineIntel-6-55-[01234],v1.29,skylakex,core diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json b/too= ls/perf/pmu-events/arch/x86/sapphirerapids/other.json index 5d4c15dbf4d3..31b6be9fb8c7 100644 --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json @@ -331,10 +331,11 @@ "UMask": "0x7" }, { - "BriefDescription": "XQ.FULL_CYCLES", + "BriefDescription": "Cycles the uncore cannot take further request= s", "CounterMask": "1", "EventCode": "0x2d", "EventName": "XQ.FULL_CYCLES", + "PublicDescription": "number of cycles when the thread is active a= nd the uncore cannot take any further requests (for example prefetches, loa= ds or stores initiated by the Core that miss the L2 cache).", "SampleAfterValue": "1000003", "UMask": "0x1" } diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json b/= tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json index 40e52357ade1..72e9bdfa9f80 100644 --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json @@ -44,6 +44,7 @@ }, { "BriefDescription": "This event counts the cycles the integer divi= der is busy.", + "CounterMask": "1", "EventCode": "0xb0", "EventName": "ARITH.IDIV_ACTIVE", "SampleAfterValue": "1000003", @@ -655,9 +656,10 @@ "UMask": "0x4" }, { - "BriefDescription": "MISC2_RETIRED.LFENCE", + "BriefDescription": "LFENCE instructions retired", "EventCode": "0xe0", "EventName": "MISC2_RETIRED.LFENCE", + "PublicDescription": "number of LFENCE retired instructions", "SampleAfterValue": "400009", "UMask": "0x20" }, diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.jso= n b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json new file mode 100644 index 000000000000..b91cebf81f50 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json @@ -0,0 +1,5644 @@ +[ + { + "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken= ", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Intermediate bypass Take= n : Counts the number of times when the CHA was able to bypass HA pipe on t= he way to iMC. This is a latency optimization for situations when there is= light loadings on the memory subsystem. This can be filtered by when the = bypass was taken and when it was not. : Filter for transactions that succee= ded in taking the intermediate bypass.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Not Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Not Taken : Counts the n= umber of times when the CHA was able to bypass HA pipe on the way to iMC. = This is a latency optimization for situations when there is light loadings = on the memory subsystem. This can be filtered by when the bypass was taken= and when it was not. : Filter for transactions that could not take the byp= ass, and issues a read to memory. Note that transactions that did not take = the bypass but did not issue read to memory will not be counted.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Taken : Counts the numbe= r of times when the CHA was able to bypass HA pipe on the way to iMC. This= is a latency optimization for situations when there is light loadings on t= he memory subsystem. This can be filtered by when the bypass was taken and= when it was not. : Filter for transactions that succeeded in taking the fu= ll bypass.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA Clockticks", + "EventCode": "0x01", + "EventName": "UNC_CHA_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of CHA clock cycles while the event i= s enabled", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_CHA_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Mul= tiple Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Mu= ltiple Snoops : Counts the number of transactions that trigger a configurab= le number of cross snoops. Cores are snooped if the transaction looks up t= he cache and determines that it is necessary based on the operation type an= d what CoreValid bits are set. For example, if 2 CV bits are set on a data= read, the cores must have the data in S state so it is not necessary to sn= oop them. However, if only 1 CV bit is set the core my have modified the d= ata. If the transaction was an RFO, it would need to invalidate the lines.= This event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop = : Counts the number of transactions that trigger a configurable number of c= ross snoops. Cores are snooped if the transaction looks up the cache and d= etermines that it is necessary based on the operation type and what CoreVal= id bits are set. For example, if 2 CV bits are set on a data read, the cor= es must have the data in S state so it is not necessary to snoop them. How= ever, if only 1 CV bit is set the core my have modified the data. If the t= ransaction was an RFO, it would need to invalidate the lines. This event c= an be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requ= ests", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Core Req= uests : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Core Reques= ts", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Core Reque= sts : Counts the number of transactions that trigger a configurable number = of cross snoops. Cores are snooped if the transaction looks up the cache a= nd determines that it is necessary based on the operation type and what Cor= eValid bits are set. For example, if 2 CV bits are set on a data read, the= cores must have the data in S state so it is not necessary to snoop them. = However, if only 1 CV bit is set the core my have modified the data. If t= he transaction was an RFO, it would need to invalidate the lines. This eve= nt can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Eviction= : Counts the number of transactions that trigger a configurable number of = cross snoops. Cores are snooped if the transaction looks up the cache and = determines that it is necessary based on the operation type and what CoreVa= lid bits are set. For example, if 2 CV bits are set on a data read, the co= res must have the data in S state so it is not necessary to snoop them. Ho= wever, if only 1 CV bit is set the core my have modified the data. If the = transaction was an RFO, it would need to invalidate the lines. This event = can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Eviction := Counts the number of transactions that trigger a configurable number of cr= oss snoops. Cores are snooped if the transaction looks up the cache and de= termines that it is necessary based on the operation type and what CoreVali= d bits are set. For example, if 2 CV bits are set on a data read, the core= s must have the data in S state so it is not necessary to snoop them. Howe= ver, if only 1 CV bit is set the core my have modified the data. If the tr= ansaction was an RFO, it would need to invalidate the lines. This event ca= n be filtered based on who triggered the initial snoop(s).", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple External = Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple External= Snoops : Counts the number of transactions that trigger a configurable num= ber of cross snoops. Cores are snooped if the transaction looks up the cac= he and determines that it is necessary based on the operation type and what= CoreValid bits are set. For example, if 2 CV bits are set on a data read,= the cores must have the data in S state so it is not necessary to snoop th= em. However, if only 1 CV bit is set the core my have modified the data. = If the transaction was an RFO, it would need to invalidate the lines. This= event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single External Sn= oops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single External S= noops : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Snoop Tar= gets from Remote", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.REMOTE_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Snoop Ta= rgets from Remote : Counts the number of transactions that trigger a config= urable number of cross snoops. Cores are snooped if the transaction looks = up the cache and determines that it is necessary based on the operation typ= e and what CoreValid bits are set. For example, if 2 CV bits are set on a = data read, the cores must have the data in S state so it is not necessary t= o snoop them. However, if only 1 CV bit is set the core my have modified t= he data. If the transaction was an RFO, it would need to invalidate the li= nes. This event can be filtered based on who triggered the initial snoop(s= ).", + "UMask": "0x12", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Snoop Targe= t from Remote", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.REMOTE_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Snoop Targ= et from Remote : Counts the number of transactions that trigger a configura= ble number of cross snoops. Cores are snooped if the transaction looks up = the cache and determines that it is necessary based on the operation type a= nd what CoreValid bits are set. For example, if 2 CV bits are set on a dat= a read, the cores must have the data in S state so it is not necessary to s= noop them. However, if only 1 CV bit is set the core my have modified the = data. If the transaction was an RFO, it would need to invalidate the lines= . This event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6e", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6e", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6e", + "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6d", + "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Not Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", + "PerPkg": "1", + "PublicDescription": "Counts transactions that looked into the mul= ti-socket cacheline Directory state, and therefore did not send a snoop bec= ause the Directory indicated it was not needed.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.SNP", + "PerPkg": "1", + "PublicDescription": "Counts transactions that looked into the mu= lti-socket cacheline Directory state, and sent one or more snoops, because = the Directory indicated it was needed.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from the HA pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.HA", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline Directory= state updates memory writes issued from the HA pipe. This does not include= memory write requests which are for I (Invalid) or E (Exclusive) cacheline= s.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from TOR pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.TOR", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline Directory= state updates due to memory writes issued from the TOR pipe which are the = result of remote transaction hitting the SF/LLC and returning data Core2Cor= e. This does not include memory write requests which are for I (Invalid) or= E (Exclusive) cachelines.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Read request from a remote socket which hit i= n the HitMe Cache to a line In the E state", + "EventCode": "0x5f", + "EventName": "UNC_CHA_HITME_HIT.EX_RDS", + "PerPkg": "1", + "PublicDescription": "Counts read requests from a remote socket wh= ich hit in the HitME cache (used to cache the multi-socket Directory state)= to a line in the E(Exclusive) state. This includes the following read opc= odes (RdCode, RdData, RdDataMigratory, RdCur, RdInv*, Inv*).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache : Shared= hit and op is RdInvOwn, RdInv, Inv*", + "EventCode": "0x5f", + "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache : op is = WbMtoE", + "EventCode": "0x5f", + "EventName": "UNC_CHA_HITME_HIT.WBMTOE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache : op is = WbMtoI, WbPushMtoI, WbFlush, or WbMtoS", + "EventCode": "0x5f", + "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d : op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*", + "EventCode": "0x5e", + "EventName": "UNC_CHA_HITME_LOOKUP.READ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d : op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS", + "EventCode": "0x5e", + "EventName": "UNC_CHA_HITME_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache : No S= F/LLC HitS/F and op is RdInvOwn", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache : op i= s RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache : SF/L= LC HitS/F and op is RdInvOwn", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Deallocate HitME$ on Reads without RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : op is RspIFwd or RspIFwdWb for a local request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "PerPkg": "1", + "PublicDescription": "Counts the number of Allocate/Update to HitM= e Cache : op is RspIFwd or RspIFwdWb for a local request : Received RspFwdI= * for a local request, but converted HitME$ to SF entry", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Update HitMe Cache on RdInvOwn even if not RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : op is RspIFwd or RspIFwdWb for a remote request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM", + "PerPkg": "1", + "PublicDescription": "Counts the number of Allocate/Update to HitM= e Cache : op is RspIFwd or RspIFwdWb for a remote request : Updated HitME$ = on RspFwdI* or local HitM/E received for a remote request", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Update HitMe Cache to SHARed", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.SHARED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "HA to iMC Reads Issued : ISOCH", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "PublicDescription": "HA to iMC Reads Issued : ISOCH : Count of th= e number of reads issued to any of the memory controller channels. This ca= n be filtered by the priority of the reads.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line= Non-ISOCH", + "EventCode": "0x5b", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to the any of the memory controller chann= els.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Fu= ll Line", + "EventCode": "0x5b", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH F= ull Line : Counts the total number of full line writes issued from the HA i= nto the memory controller.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial = Non-ISOCH", + "EventCode": "0x5b", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : Partial= Non-ISOCH : Counts the total number of full line writes issued from the HA= into the memory controller.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Pa= rtial", + "EventCode": "0x5b", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH P= artial : Counts the total number of full line writes issued from the HA int= o the memory controller.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x1fffff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All transactions from Remote = Agents", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ALL_REMOTE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All transactions from Remote= Agents : Counts the number of times the LLC was accessed - this includes c= ode, data, prefetches and hints coming from L2. This has numerous filters = available. Note the non-standard filtering equation. This event will coun= t requests that lookup the cache multiple times with multiple increments. = One must ALWAYS select a state or states (in the umask field) to match. Ot= herwise, the event will count nothing.", + "UMask": "0x17e0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Any local or remote transaction to the LLC, including pref= etch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "UMask": "0x1bd0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Local non-prefetch requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Local non-prefetch requests = : Counts the number of times the LLC was accessed - this includes code, dat= a, prefetches and hints coming from L2. This has numerous filters availabl= e. Note the non-standard filtering equation. This event will count reques= ts that lookup the cache multiple times with multiple increments. One must= ALWAYS set umask bit 0 and select a state or states to match. Otherwise, = the event will count nothing. : Any local transaction to the LLC, not inclu= ding prefetch", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1bc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Reads", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Reads : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1fc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Request : Counts t= he number of times the LLC was accessed - this includes code, data, prefetc= hes and hints coming from L2. This has numerous filters available. Note t= he non-standard filtering equation. This event will count requests that lo= okup the cache multiple times with multiple increments. One must ALWAYS se= t umask bit 0 and select a state or states to match. Otherwise, the event = will count nothing. : Read transactions.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Demand Data Reads, Core and L= LC prefetches", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Demand Data Reads, Core and = LLC prefetches : Counts the number of times the LLC was accessed - this inc= ludes code, data, prefetches and hints coming from L2. This has numerous f= ilters available. Note the non-standard filtering equation. This event wi= ll count requests that lookup the cache multiple times with multiple increm= ents. One must ALWAYS select a state or states (in the umask field) to mat= ch. Otherwise, the event will count nothing.", + "UMask": "0x841ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", + "UMask": "0x1fc101", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : E State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS set umask bi= t 0 and select a state or states to match. Otherwise, the event will count= nothing. : Hit Exclusive State", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : F State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : F State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS set umask bi= t 0 and select a state or states to match. Otherwise, the event will count= nothing. : Hit Forward State", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1a44ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : I State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.I", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : I State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS set umask bi= t 0 and select a state or states to match. Otherwise, the event will count= nothing. : Miss", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Local LLC prefetch requests (= from LLC)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Local LLC prefetch requests = (from LLC) : Counts the number of times the LLC was accessed - this include= s code, data, prefetches and hints coming from L2. This has numerous filte= rs available. Note the non-standard filtering equation. This event will c= ount requests that lookup the cache multiple times with multiple increments= . One must ALWAYS set umask bit 0 and select a state or states to match. = Otherwise, the event will count nothing. : Any local LLC prefetch to the LL= C", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed locally", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCALLY_HOMED_ADDRESS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed locally := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS set umask bit 0 and select a state or states to match. Otherwise, t= he event will count nothing. : Transaction whose address resides in the loc= al MC.", + "UMask": "0xbdfff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Requests that come from t= he local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_CODE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "UMask": "0x19d0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DATA_RD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x19c1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Demand CRd Requests that come= from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_CODE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "UMask": "0x1850ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Demand Data R= eads that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_DATA_RD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1841ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Demand RFO Requests that come= from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1848ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed locally", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed locally := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS set umask bit 0 and select a state or states to match. Otherwise, t= he event will count nothing. : Transaction whose address resides in the loc= al MC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Requests = that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_FLUSH_INV", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1844ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Prefetch requ= ests to the LLC that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_LLC_PF", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x189dff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Pre= fetches that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x199dff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Prefetches that come from= the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_CODE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "UMask": "0x1910ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Pre= fetches that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_DATA_RD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1981ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Prefetches that come from= the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1908ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests that come from t= he local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x19c8ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : M State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.M", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : M State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS set umask bi= t 0 and select a state or states to match. Otherwise, the event will count= nothing. : Hit Modified State", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS select a state or states (in the umask= field) to match. Otherwise, the event will count nothing.", + "UMask": "0x1fe001", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Write Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remote non-snoop requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.PREF_OR_DMND_REMOTE_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remote non-snoop requests : = Counts the number of times the LLC was accessed - this includes code, data,= prefetches and hints coming from L2. This has numerous filters available.= Note the non-standard filtering equation. This event will count requests= that lookup the cache multiple times with multiple increments. One must A= LWAYS set umask bit 0 and select a state or states to match. Otherwise, th= e event will count nothing. : Remote non-snoop transactions to the LLC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed remotely", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTELY_HOMED_ADDRESS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed remotely = : Counts the number of times the LLC was accessed - this includes code, dat= a, prefetches and hints coming from L2. This has numerous filters availabl= e. Note the non-standard filtering equation. This event will count reques= ts that lookup the cache multiple times with multiple increments. One must= ALWAYS set umask bit 0 and select a state or states to match. Otherwise, = the event will count nothing. : Transaction whose address resides in a remo= te MC", + "UMask": "0x15dfff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Requests that come from a= Remote socket.", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_CODE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "UMask": "0x1a10ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uests that come from a Remote socket", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_DATA_RD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1a01ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed remotely", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed remotely = : Counts the number of times the LLC was accessed - this includes code, dat= a, prefetches and hints coming from L2. This has numerous filters availabl= e. Note the non-standard filtering equation. This event will count reques= ts that lookup the cache multiple times with multiple increments. One must= ALWAYS set umask bit 0 and select a state or states to match. Otherwise, = the event will count nothing. : Transaction whose address resides in a remo= te MC", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate requests = that come from a Remote socket.", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_FLUSH_INV", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1a04ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Filters Requests for those th= at write info into the cache that come from a remote socket", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_OTHER", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", + "UMask": "0x1a02ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests that come from a= Remote socket.", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1a08ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remote snoop requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remote snoop requests : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S set umask bit 0 and select a state or states to match. Otherwise, the ev= ent will count nothing. : Remote snoop transactions to the LLC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Snoop Request= s from a Remote Socket", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x1c19ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1bc8ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS select a state or states (in the umask= field) to match. Otherwise, the event will count nothing. : Local or remo= te RFO transactions to the LLC. This includes RFO prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally HOMed RFOs - Demand a= nd Prefetches", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS select a state or states (in the umask= field) to match. Otherwise, the event will count nothing.", + "UMask": "0x9c8ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : S State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS set umask bi= t 0 and select a state or states to match. Otherwise, the event will count= nothing. : Hit Shared State", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - E State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S set umask bit 0 and select a state or states to match. Otherwise, the ev= ent will count nothing. : SF Hit Exclusive State", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - H State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_H", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - H State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S set umask bit 0 and select a state or states to match. Otherwise, the ev= ent will count nothing. : SF Hit HitMe State", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - S State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S set umask bit 0 and select a state or states to match. Otherwise, the ev= ent will count nothing. : SF Hit Shared State", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Writes", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS select a state or states (in the umask= field) to match. Otherwise, the event will count nothing. : Requests that= install or change a line in the LLC. Examples: Writebacks from Core L2= 's and UPI. Prefetches into the LLC.", + "UMask": "0x842ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remote Writes", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS select a state or states (in the umask= field) to match. Otherwise, the event will count nothing.", + "UMask": "0x17c2ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in E state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in E state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : IA traffic", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.IA", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : IA traffic : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : IO traffic", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.IO", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : IO traffic : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "All LLC lines in E state that are victimized = on a fill from an IO device", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.IO_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x12", + "Unit": "CHA" + }, + { + "BriefDescription": "All LLC lines in F or S state that are victim= ized on a fill from an IO device", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.IO_FS", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x1c", + "Unit": "CHA" + }, + { + "BriefDescription": "All LLC lines in M state that are victimized = on a fill from an IO device", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.IO_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "All LLC lines in any state that are victimize= d on a fill from an IO device", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.IO_MESF", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x1f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x200f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Counts the number of line= s that were victimized on a fill. This can be filtered by the state that t= he line was in.", + "UMask": "0x2002", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Counts the number of line= s that were victimized on a fill. This can be filtered by the state that t= he line was in.", + "UMask": "0x2001", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local Only", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local Only : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Counts the number of line= s that were victimized on a fill. This can be filtered by the state that t= he line was in.", + "UMask": "0x2004", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in M state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in M state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x800f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Counts the number of line= s that were victimized on a fill. This can be filtered by the state that t= he line was in.", + "UMask": "0x8002", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Counts the number of line= s that were victimized on a fill. This can be filtered by the state that t= he line was in.", + "UMask": "0x8001", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Remote Only", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ONLY", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Remote Only : Counts the = number of lines that were victimized on a fill. This can be filtered by th= e state that the line was in.", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Counts the number of line= s that were victimized on a fill. This can be filtered by the state that t= he line was in.", + "UMask": "0x8004", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in S State : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "All LLC lines in E state that are victimized = on a fill", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "All LLC lines in M state that are victimized = on a fill", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "All LLC lines in S state that are victimized = on a fill", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Miss", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Miss : Miscellaneous= events in the Cbo.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Victim", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Victim : Miscellaneo= us events in the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Number of times that an RFO hit in S state.", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RFO_HIT_S", + "PerPkg": "1", + "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Silent Snoop Eviction", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Silent Snoop Eviction : Miscellan= eous events in the Cbo. : Counts the number of times when a Snoop hit in FS= E states and triggered a silent eviction. This is useful because this info= rmation is lost in the PRE encodings.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Write Combining Aliasing", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.WC_ALIASING", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Write Combining Aliasing : Miscel= laneous events in the Cbo. : Counts the number of times that a USWC write (= WCIL(F)) transaction hit in the LLC in M state, triggering a WBMtoI followe= d by the USWC write. This occurs when there is WC aliasing.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Local InvItoE", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.LOCAL_INVITOE", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Local InvItoE : Count = of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to be b= roadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Local Rd", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.LOCAL_READ", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Local Rd : Count of OS= B snoop broadcasts. Counts by 1 per request causing OSB snoops to be broadc= ast. Does not count all the snoops generated by OSB.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Off", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.OFF_PWRHEURISTIC", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Off : Count of OSB sno= op broadcasts. Counts by 1 per request causing OSB snoops to be broadcast. = Does not count all the snoops generated by OSB.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Remote Rd", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.REMOTE_READ", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Remote Rd : Count of O= SB snoop broadcasts. Counts by 1 per request causing OSB snoops to be broad= cast. Does not count all the snoops generated by OSB.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Remote Rd InvItoE", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.REMOTE_READINVITOE", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Remote Rd InvItoE : Co= unt of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to = be broadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadcas= t", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.RFO_HITS_SNP_BCAST", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadca= st : Count of OSB snoop broadcasts. Counts by 1 per request causing OSB sno= ops to be broadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", + "EventCode": "0x65", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", + "EventCode": "0x65", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", + "EventCode": "0x65", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw a Near Memory set conflict in SF/LLC", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC", + "PerPkg": "1", + "PublicDescription": "Near Memory evictions due to another read to= the same Near Memory set in the LLC.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw a Near memory set conflict in SF/LLC", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF", + "PerPkg": "1", + "PublicDescription": "Near Memory evictions due to another read to= the same Near Memory set in the SF", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw a Near Memory set conflict in TOR", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR", + "PerPkg": "1", + "PublicDescription": "No Reject in the CHA due to a pending read t= o the same Near Memory set in the TOR.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC", + "EventCode": "0x70", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", + "EventCode": "0x70", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", + "EventCode": "0x70", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.REJ_IRQ", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.REJ_IRQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.SLOW_INSERT", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.SLOW_INSERT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.THROTTLE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_IRQ", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.THROTTLE_IRQ", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_PRQ", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.THROTTLE_PRQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO", + "EventCode": "0x67", + "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO", + "PerPkg": "1", + "PublicDescription": ": count # of FAST TOR Request inserted to ha= _tor_req_fifo", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Number of SLOW TOR Request inserted to ha_pmm= _tor_req_fifo", + "EventCode": "0x67", + "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC0 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC2 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC3 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC4 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC5 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Requests for exclusive ownership of a cache l= ine without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Remote requests for exclusive ownership of a = cache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a remote socket for exclusive ownership of a cache line without receivi= ng data (INVITOE) to the CHA.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests made into the CHA", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS", + "PerPkg": "1", + "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests from a remote socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Write requests made into the CHA", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "Write Requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Read and Write Requests; Writes Remote", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IPQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IPQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected= ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ Rejecte= d : Counts number of allocations per cycle into the specified Ingress queue= .", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : RRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.RRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : RRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : WBQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.WBQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : WBQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IPQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C or SF Way", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : L= LC or SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2c", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : ANY0", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : HA", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : ANY0", + "EventCode": "0x2d", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : HA", + "EventCode": "0x2d", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : IPQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : IPQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : RRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.RRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : RRQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : WBQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.WBQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : WBQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD REQ on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI AK Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject AK ring me= ssage", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCB on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCS on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for generat= ing a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL WB on VN0 : Retry= Queue Inserts of Transactions that were already in another Retry Q (sub-ev= ents encode the reason for the next reject) : No BL VN0 credit for generati= ng a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2e", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI IV Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject IV ring me= ssage", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Allow Snoop", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Allow Snoop : Retry = Queue Inserts of Transactions that were already in another Retry Q (sub-eve= nts encode the reason for the next reject)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : ANY0", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : ANY0 : Retry Queue I= nserts of Transactions that were already in another Retry Q (sub-events enc= ode the reason for the next reject) : Any condition listed in the Other0 Re= ject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : HA", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : HA : Retry Queue Ins= erts of Transactions that were already in another Retry Q (sub-events encod= e the reason for the next reject)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC OR SF Way : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Way conflict with another re= quest that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC Victim", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC Victim : Retry Q= ueue Inserts of Transactions that were already in another Retry Q (sub-even= ts encode the reason for the next reject)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : PhyAddr Match", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : PhyAddr Match : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Address match with an outsta= nding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : SF Victim", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : SF Victim : Retry Qu= eue Inserts of Transactions that were already in another Retry Q (sub-event= s encode the reason for the next reject) : Requests did not generate Snoop = filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Victim", + "EventCode": "0x2f", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Victim : Retry Queue= Inserts of Transactions that were already in another Retry Q (sub-events e= ncode the reason for the next reject)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the PRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0= ", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD REQ on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0= ", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Re= quest", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI AK R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0= ", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCB on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0= ", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCS on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0= ", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL WB on VN0= : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)= : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Re= quest", + "EventCode": "0x2a", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI IV R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Allow Snoop = : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : ANY0", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : ANY0 : REQUE= STQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : Any c= ondition listed in the WBQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : HA", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : HA : REQUEST= Q includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way= ", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC OR SF Wa= y : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC Victim := REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match= ", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : PhyAddr Matc= h : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : SF Victim", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : SF Victim : = REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : = Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Victim", + "EventCode": "0x2b", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Victim : REQ= UESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : AD REQ on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : AD RSP on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : Non UPI AK Request : N= umber of times a transaction flowing through the RRQ (Remote Response Queue= ) had to retry. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL NCB on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL NCS on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL RSP on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL WB on VN0 : Number = of times a transaction flowing through the RRQ (Remote Response Queue) had = to retry. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : Non UPI IV Request : N= umber of times a transaction flowing through the RRQ (Remote Response Queue= ) had to retry. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : Allow Snoop", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : Allow Snoop : Number o= f times a transaction flowing through the RRQ (Remote Response Queue) had t= o retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : ANY0", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : ANY0 : Number of times= a transaction flowing through the RRQ (Remote Response Queue) had to retry= . : Any condition listed in the RRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : HA", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : HA : Number of times a= transaction flowing through the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : LLC OR SF Way", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : LLC OR SF Way : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : LLC Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : LLC Victim : Number of= times a transaction flowing through the RRQ (Remote Response Queue) had to= retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : PhyAddr Match", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : PhyAddr Match : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : SF Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : SF Victim : Number of = times a transaction flowing through the RRQ (Remote Response Queue) had to = retry. : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : Victim : Number of tim= es a transaction flowing through the RRQ (Remote Response Queue) had to ret= ry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : AD REQ on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : AD RSP on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : Non UPI AK Request : N= umber of times a transaction flowing through the WBQ (Writeback Queue) had = to retry. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL NCB on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL NCS on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL RSP on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL WB on VN0 : Number = of times a transaction flowing through the WBQ (Writeback Queue) had to ret= ry. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : Non UPI IV Request : N= umber of times a transaction flowing through the WBQ (Writeback Queue) had = to retry. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : Allow Snoop", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : Allow Snoop : Number o= f times a transaction flowing through the WBQ (Writeback Queue) had to retr= y.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : ANY0", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : ANY0 : Number of times= a transaction flowing through the WBQ (Writeback Queue) had to retry. : An= y condition listed in the WBQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : HA", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : HA : Number of times a= transaction flowing through the WBQ (Writeback Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : LLC OR SF Way", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : LLC OR SF Way : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : LLC Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : LLC Victim : Number of= times a transaction flowing through the WBQ (Writeback Queue) had to retry= .", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : PhyAddr Match", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : PhyAddr Match : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : SF Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : SF Victim : Number of = times a transaction flowing through the WBQ (Writeback Queue) had to retry.= : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : Victim : Number of tim= es a transaction flowing through the WBQ (Writeback Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : All", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : All : Counts the number of sno= ops issued by the HA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast snoop for Local Reque= sts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast snoop for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= broadcast snoops issued by the HA. This filter includes only requests comi= ng from local sockets.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast snoops for Remote Req= uests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast snoops for Remote Re= quests : Counts the number of snoops issued by the HA. : Counts the number = of broadcast snoops issued by the HA.This filter includes only requests com= ing from remote sockets.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Directed snoops for Local Reque= sts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Directed snoops for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= directed snoops issued by the HA. This filter includes only requests comin= g from local sockets.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Directed snoops for Remote Requ= ests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Directed snoops for Remote Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f directed snoops issued by the HA. This filter includes only requests comi= ng from remote sockets.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast or directed Snoops se= nt for Local Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast or directed Snoops s= ent for Local Requests : Counts the number of snoops issued by the HA. : Co= unts the number of broadcast or directed snoops issued by the HA per reques= t. This filter includes only requests coming from the local socket.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast or directed Snoops se= nt for Remote Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast or directed Snoops s= ent for Remote Requests : Counts the number of snoops issued by the HA. : C= ounts the number of broadcast or directed snoops issued by the HA per reque= st. This filter includes only requests coming from the remote socket.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RSPCNFLCT*", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : RSPCNFLCT* : Coun= ts the total number of RspI snoop responses received. Whenever a snoops ar= e issued, one or more snoop responses will be returned depending on the top= ology of the system. In systems larger than 2s, when multiple snoops are = returned this will count all the snoops that are received. For example, if= 3 snoops were issued and returned RspI, RspS, and RspSFwd; then each of th= ese sub-events would increment by 1. : Filters for snoops responses of RspC= onflict. This is returned when a snoop finds an existing outstanding trans= action in a remote caching agent when it CAMs that caching agent. This tri= ggers conflict resolution hardware. This covers both RspCnflct and RspCnfl= ctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspFwd", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : RspFwd : Counts t= he total number of RspI snoop responses received. Whenever a snoops are is= sued, one or more snoop responses will be returned depending on the topolog= y of the system. In systems larger than 2s, when multiple snoops are retu= rned this will count all the snoops that are received. For example, if 3 s= noops were issued and returned RspI, RspS, and RspSFwd; then each of these = sub-events would increment by 1. : Filters for a snoop response of RspFwd t= o a CA request. This snoop response is only possible for RdCur when a snoo= p HITM/E in a remote caching agent and it directly forwards data to a reque= stor without changing the requestor's cache line state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : Rsp*Fwd*WB", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPFWDWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : Rsp*Fwd*WB : Coun= ts the total number of RspI snoop responses received. Whenever a snoops ar= e issued, one or more snoop responses will be returned depending on the top= ology of the system. In systems larger than 2s, when multiple snoops are = returned this will count all the snoops that are received. For example, if= 3 snoops were issued and returned RspI, RspS, and RspSFwd; then each of th= ese sub-events would increment by 1. : Filters for a snoop response of Rsp*= Fwd*WB. This snoop response is only used in 4s systems. It is used when a= snoop HITM's in a remote caching agent and it directly forwards data to a = requestor, and simultaneously returns data to the home to be written back t= o memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RspI Snoop Responses Received", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPI", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe RspI Snoop Response was received which indicates the remote cache does n= ot have the data, or when the remote cache silently evicts data (such as wh= en an RFO: the Read for Ownership issued before a write hits non-modified d= ata).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RspIFwd Snoop Responses Received", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspIFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data and the requesting agent is able to acquire the dat= a in E (Exclusive) or M (modified) states. This is commonly returned with = RFO (the Read for Ownership issued before a write) transactions. The snoop= could have either been to a cacheline in the M,E,F (Modified, Exclusive or= Forward) states.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RspS Snoop Responses Received", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPS", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe RspS Snoop Response was received which indicates when a remote cache has= data but is not forwarding it. It is a way to let the requesting socket k= now that it cannot allocate the data in E state. No data is sent with S Rs= pS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RspSFwd Snoop Responses Received", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspSFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data but held on to its current copy. This is common fo= r data and code reads that hit in a remote socket in E (Exclusive) or F (Fo= rward) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : Rsp*WB", + "EventCode": "0x5c", + "EventName": "UNC_CHA_SNOOP_RESP.RSPWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : Rsp*WB : Counts t= he total number of RspI snoop responses received. Whenever a snoops are is= sued, one or more snoop responses will be returned depending on the topolog= y of the system. In systems larger than 2s, when multiple snoops are retu= rned this will count all the snoops that are received. For example, if 3 s= noops were issued and returned RspI, RspS, and RspSFwd; then each of these = sub-events would increment by 1. : Filters for a snoop response of RspIWB o= r RspSWB. This is returned when a non-RFO request hits in M state. Data a= nd Code Reads can return either RspIWB or RspSWB depending on how the syste= m has been configured. InvItoE transactions will also return RspIWB becaus= e they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspCnflct", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspCnflct := Number of snoop responses received for a Local request : Filters for snoo= ps responses of RspConflict to local CA requests. This is returned when a = snoop finds an existing outstanding transaction in a remote caching agent w= hen it CAMs that caching agent. This triggers conflict resolution hardware= . This covers both RspCnflct and RspCnflctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspFwd", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspFwd : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspFwd to local CA requests. This snoop response is only poss= ible for RdCur when a snoop HITM/E in a remote caching agent and it directl= y forwards data to a requestor without changing the requestor's cache line = state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*FWD*WB = : Number of snoop responses received for a Local request : Filters for a s= noop response of Rsp*Fwd*WB to local CA requests. This snoop response is o= nly used in 4s systems. It is used when a snoop HITM's in a remote caching= agent and it directly forwards data to a requestor, and simultaneously ret= urns data to the home to be written back to memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspI", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspI : Numb= er of snoop responses received for a Local request : Filters for snoops re= sponses of RspI to local CA requests. RspI is returned when the remote cac= he does not have the data, or when the remote cache silently evicts data (s= uch as when an RFO hits non-modified data).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspIFwd", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspIFwd : N= umber of snoop responses received for a Local request : Filters for snoop = responses of RspIFwd to local CA requests. This is returned when a remote = caching agent forwards data and the requesting agent is able to acquire the= data in E or M states. This is commonly returned with RFO transactions. = It can be either a HitM or a HitFE.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspS", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspS : Numb= er of snoop responses received for a Local request : Filters for snoop res= ponses of RspS to local CA requests. RspS is returned when a remote cache = has data but is not forwarding it. It is a way to let the requesting socke= t know that it cannot allocate the data in E state. No data is sent with S= RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspSFwd", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspSFwd : N= umber of snoop responses received for a Local request : Filters for a snoo= p response of RspSFwd to local CA requests. This is returned when a remote= caching agent forwards data but holds on to its current copy. This is com= mon for data and code reads that hit in a remote socket in E or F state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*WB", + "EventCode": "0x5d", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*WB : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspIWB or RspSWB to local CA requests. This is returned when = a non-RFO request hits in M state. Data and Code Reads can return either R= spIWB or RspSWB depending on how the system has been configured. InvItoE t= ransactions will also return RspIWB because they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIData= M", + "EventCode": "0x6b", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM= ", + "EventCode": "0x6b", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit LLC", + "EventCode": "0x6b", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit SF", + "EventCode": "0x6b", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t LLC", + "EventCode": "0x6b", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t SF", + "EventCode": "0x6b", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", + "UMask": "0xc001ffff", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DDR Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DDR Access : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : SF/LLC Evictions", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. : TOR allocation occurred as a result of SF/= LLC evictions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Hits", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests from IA Cores", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts;CLFlush from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; C= LFlush events that are initiated from the Core", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts;CLFlushOpt from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; C= LFlushOpt events that are initiated from the Core", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read from local IA that mi= sses in the snoop filter", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc817ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Opt from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read opt from local IA tha= t misses in the snoop filter", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Opt Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read opt prefetch from loc= al IA that misses in the snoop filter", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read prefetch from local I= A that misses in the snoop filter", + "UMask": "0xc897ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read from local IA that hi= ts in the snoop filter", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd Pref hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that hits in the snoop filter", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that hi= ts in the snoop filter", + "UMask": "0xc817fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Opt hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read opt from local IA tha= t hits in the snoop filter", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Opt Pref hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read opt prefetch from loc= al IA that hits in the snoop filter", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Pref hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read prefetch from local I= A that hits in the snoop filter", + "UMask": "0xc897fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that H= it LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefCode hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch code = read from local IA that hits in the snoop filter", + "UMask": "0xcccffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefData hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch data = read from local IA that hits in the snoop filter", + "UMask": "0xccd7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefRFO hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch read = for ownership from local IA that hits in the snoop filter", + "UMask": "0xccc7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership from local I= A that hits in the snoop filter", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO Pref hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that hits in the snoop filter", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts;ItoM from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; I= toM events that are initiated from the Core", + "UMask": "0xcc47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cor= es", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcd47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefCode from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch code = read from local IA.", + "UMask": "0xcccfff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefData from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch data = read from local IA.", + "UMask": "0xccd7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefRFO from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch read = for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; misses from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for CRd misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode CRd", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "CRds and equivalent opcodes issued from an IA= core which miss the L3 and target memory in a CXL type 2 accelerator.", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRDMORPH_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10c80b8201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd Pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRd misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd", + "UMask": "0xc817fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "DRds and equivalent opcodes issued from an IA= core which miss the L3 and target memory in a CXL type 2 accelerator.", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDMORPH_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10c8138201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRds issued by IA Cores targe= ting DDR Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and which target DDR = memory", + "UMask": "0xc8178601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRd misses from local IA targ= eting local memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and which target loca= l memory", + "UMask": "0xc816fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8168601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8168a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Opt misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read opt from local IA tha= t misses in the snoop filter", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Opt Pref misses from local I= A", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read opt prefetch from loc= al IA that misses in the snoop filter", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and which target PMM = memory", + "UMask": "0xc8178a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRd Pref misses from local IA= ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRD_PREF", + "UMask": "0xc897fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8978601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRd Pref misses from local IA= targeting local memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRD_PREF, and target local= memory", + "UMask": "0xc896fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8968601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8968a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8978a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRd Pref misses from local IA= targeting remote memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRD_PREF, and target remot= e memory", + "UMask": "0xc8977e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8970601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8970a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for DRd misses from local IA targ= eting remote memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and target remote mem= ory", + "UMask": "0xc8177e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8170601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8170a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that M= issed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefCode misses from local IA= ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch code = read from local IA that misses in the snoop filter", + "UMask": "0xcccffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "LLC Prefetch Code transactions issued from an= IA core which miss the L3 and target memory in a CXL type 2 accelerator.", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10cccf8201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefData misses from local IA= ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch data = read from local IA that misses in the snoop filter", + "UMask": "0xccd7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; LLCPrefRFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Last level cache prefetch read = for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8668601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8668a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86e8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86e8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8670601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8670a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f0601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f0a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership from local I= A that misses in the snoop filter", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "RFO and L2 RFO prefetches issued from an IA c= ore which miss the L3 and target memory in a CXL type 2 accelerator.", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFOMORPH_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10c8038201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts RFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership from local I= A that misses in the snoop filter", + "UMask": "0xc806fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO prefetch misses from local I= A", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", + "UMask": "0xc886fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO prefetch misses from local I= A", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", + "UMask": "0xc8877e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts Read for ownership from local IA= that misses in the snoop filter", + "UMask": "0xc8077e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership from local I= A that misses in the snoop filter", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts;SpecItoM from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; S= pecItoM events that are initiated from the Core", + "UMask": "0xcc57ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", + "PerPkg": "1", + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc3fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI", + "PerPkg": "1", + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc37ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE", + "PerPkg": "1", + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc2fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI", + "PerPkg": "1", + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc67ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; ItoM hits from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RdCur and FsRdCur hits from loca= l IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO hits from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for ItoM from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IO with the = opcode ItoM", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for ItoMCacheNears from IO device= s.", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IO devices w= ith the opcode ItoMCacheNears. This event indicates a partial write reques= t.", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Misses from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; ItoM misses from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RdCur and FsRdCur misses from lo= cal IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO misses from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts for RdCur from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "Inserts into the TOR from local IO with the = opcode RdCur", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IPQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IPQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - Non iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just ISOC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Local Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA and IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. : All locally initiated requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. : All locally initiated requests from iA Co= res", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. : All locally generated IO traffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Misses", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : MMCFG Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : MMIO Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MMIO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : MMIO Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NearMem : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NonCoherent", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NotNearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NotNearMem : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PMM Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PM Access : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - Non IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Remote Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Remote Targets : Counts t= he number of entries successfully inserted into the TOR that match qualific= ations specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Remote", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Remote : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. : All remote requests (e.g. snoops, writeback= s) that came from remote sockets", + "UMask": "0xc001ffc8", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All Snoops from Remote", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REM_SNPS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All Snoops from Remote : Count= s the number of entries successfully inserted into the TOR that match quali= fications specified by the subevent. : All snoops to this LLC that came fro= m remote sockets", + "UMask": "0xc001ff08", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RRQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.RRQ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RRQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All Snoops from Remote", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.SNPS_FROM_REM", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. Al= l snoops to this LLC that came from remote sockets.", + "UMask": "0xc001ff08", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.WBQ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WBQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", + "UMask": "0xc001ffff", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DDR Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DDR Access : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : SF/LLC Evictions", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. T : TOR allocation occurre= d as a result of SF/LLC evictions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Hits", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read from local IA that = misses in the snoop filter", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc817ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRDPTE", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Opt from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read opt from local IA t= hat misses in the snoop filter", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Opt Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read opt prefetch from l= ocal IA that misses in the snoop filter", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc897ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read from local IA that = hits in the snoop filter", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd Pref hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that hits in the snoop filter", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = hits in the snoop filter", + "UMask": "0xc817fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRDPTE", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that hit the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Opt hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read opt from local IA t= hat hits in the snoop filter", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Opt Pref hits from local I= A", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read opt prefetch from l= ocal IA that hits in the snoop filter", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Pref hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that hits in the snoop filter", + "UMask": "0xc897fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Hit LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Hit LLC : For each cycle, this event accumulates the number of valid entr= ies in the TOR that match qualifications specified by the subevent. Doe= s not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefCode hits from local IA= ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch cod= e read from local IA that hits in the snoop filter", + "UMask": "0xcccffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefData hits from local IA= ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA that hits in the snoop filter", + "UMask": "0xccd7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefRFO hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch rea= d for ownership from local IA that hits in the snoop filter", + "UMask": "0xccc7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that hits in the snoop filter", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO Pref hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that hits in the snoop filter", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears issued by iA C= ores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears issued by iA = Cores : For each cycle, this event accumulates the number of valid entries = in the TOR that match qualifications specified by the subevent. Does no= t include addressless requests such as locks and interrupts.", + "UMask": "0xcd47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefCode from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA.", + "UMask": "0xcccfff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefData from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA that misses in the snoop filter", + "UMask": "0xccd7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefRFO from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch rea= d for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from Local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read from local IA that = misses in the snoop filter", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for CRds and equivalent opcodes= issued from an IA core which miss the L3 and target memory in a CXL type 2= accelerator.", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRDMORPH_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10c80b8201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed locally : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc80efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed locally : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc88efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed remotely : For each cycle, this event accumula= tes the number of valid entries in the TOR that match qualifications specif= ied by the subevent. Does not include addressless requests such as lock= s and interrupts.", + "UMask": "0xc88f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed remotely : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc80f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for DRd misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", + "PerPkg": "1", + "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd", + "UMask": "0xc817fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for DRds and equivalent opcodes= issued from an IA core which miss the L3 and target memory in a CXL type 2= accelerator.", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDMORPH_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10c8138201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDPTE", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that missed the LLC : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for DRds issued by iA Cores tar= geting DDR Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR", + "PerPkg": "1", + "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target DDR memory", + "UMask": "0xc8178601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for DRd misses from local IA ta= rgeting local memory", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target local memory", + "UMask": "0xc816fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", + "UMask": "0xc8168601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", + "UMask": "0xc8168a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Opt misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read opt from local IA t= hat misses in the snoop filter", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Opt Pref misses from local= IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read opt prefetch from l= ocal IA that misses in the snoop filter", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for DRds issued by iA Cores tar= geting PMM Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM", + "PerPkg": "1", + "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target PMM memory", + "UMask": "0xc8178a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc897fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xc8978601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc896fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc8968601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc8968a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xc8978a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc8977e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xc8970601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xc8970a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for DRd misses from local IA ta= rgeting remote memory", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target remote memory", + "UMask": "0xc8177e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", + "UMask": "0xc8170601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", + "UMask": "0xc8170a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Missed LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefCode misses from local = IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch cod= e read from local IA that misses in the snoop filter", + "UMask": "0xcccffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for LLC Prefetch Code transacti= ons issued from an IA core which miss the L3 and target memory in a CXL typ= e 2 accelerator.", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFCODE_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10cccf8201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefData misses from local = IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA that misses in the snoop filter", + "UMask": "0xccd7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; LLCPrefRFO misses from local I= A", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Last level cache prefetch rea= d for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc8668601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc8668a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", + "UMask": "0xc86e8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", + "UMask": "0xc86e8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", + "UMask": "0xc8670601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", + "UMask": "0xc8670a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc86f0601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc86f0a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy for RFO and L2 RFO prefetches i= ssued from an IA core which miss the L3 and target memory in a CXL type 2 a= ccelerator.", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFOMORPH_CXL_ACC", + "PerPkg": "1", + "UMask": "0x10c8038201", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", + "UMask": "0xc806fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO prefetch misses from local= IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO prefetch misses from local= IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", + "UMask": "0xc886fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO prefetch misses from local= IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", + "UMask": "0xc8877e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", + "UMask": "0xc8077e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc8678601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc8678a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc86f8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc86f8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO prefetch from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_SPECITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : SpecItoMs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc57ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; ITOM hits from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RdCur and FsRdCur hits from lo= cal IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO hits from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; ITOM from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; ITOM misses from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RdCur and FsRdCur misses from = local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO misses from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RdCur and FsRdCur from local I= O", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; ItoM from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IPQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IPQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. T : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - Non iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. T", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just ISOC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Local Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA and IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. T : All locally in= itiated requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. T : All locally initiated= requests from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. T : All locally generated= IO traffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Misses", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : MMCFG Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : MMIO Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MMIO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : MMIO Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NearMem : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NonCoherent", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NotNearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NotNearMem : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PMM Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PMM Access : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. T : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. T", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Remote Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.REMOTE_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Remote Targets : For ea= ch cycle, this event accumulates the number of valid entries in the TOR tha= t match qualifications specified by the subevent. T", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Remote", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Remote : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. T : All remote requests (e.= g. snoops, writebacks) that came from remote sockets", + "UMask": "0xc001ffc8", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All Snoops from Remote", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_SNPS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All Snoops from Remote : For= each cycle, this event accumulates the number of valid entries in the TOR = that match qualifications specified by the subevent. T : All snoops to th= is LLC that came from remote sockets", + "UMask": "0xc001ff08", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RRQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RRQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All Snoops from Remote", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.SNPS_FROM_REM", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. All snoops to this LLC that came from remote sockets.", + "UMask": "0xc001ff08", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WBQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.WBQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WBQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to LLC", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to LLC : Counts the numb= er of times when the CHA was received WbPushMtoI : Counts the number of tim= es when the CHA was able to push WbPushMToI to LLC", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to Memory", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to Memory : Counts the n= umber of times when the CHA was received WbPushMtoI : Counts the number of = times when the CHA was unable to push WbPushMToI to LLC (hence pushed it to= MEM)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0", + "EventCode": "0x5a", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC0 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1", + "EventCode": "0x5a", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2", + "EventCode": "0x5a", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC2 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3", + "EventCode": "0x5a", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC3 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4", + "EventCode": "0x5a", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC4 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5", + "EventCode": "0x5a", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC5 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 0?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT0", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 0?) : Number of XP= T prefetches sent", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 1?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT1", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 1?) : Number of XP= T prefetches sent", + "UMask": "0x10", + "Unit": "CHA" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json = b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json new file mode 100644 index 000000000000..f3e84fd88de3 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json @@ -0,0 +1,450 @@ +[ + { + "BriefDescription": "Counts the number of lfclk ticks", + "EventCode": "0x01", + "EventName": "UNC_CXLCM_CLOCKTICKS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Mem Rxx AGF 0", + "EventCode": "0x43", + "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_DATA", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Req AGF0", + "EventCode": "0x43", + "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Rsp AGF", + "EventCode": "0x43", + "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Data AGF", + "EventCode": "0x43", + "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Rsp AGF", + "EventCode": "0x43", + "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Req AGF 1", + "EventCode": "0x43", + "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_DATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Mem Data AGF", + "EventCode": "0x43", + "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_REQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Flits with AK set", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.AK_HDR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Flits with BE set", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.BE_HDR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of control flits received", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.CTRL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Headerless flits received= ", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.NO_HDR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of protocol flits received", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.PROT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Flits with SZ set", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.SZ_HDR", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of flits received", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.VALID", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of valid messages in the fli= t", + "EventCode": "0x4b", + "EventName": "UNC_CXLCM_RxC_FLITS.VALID_MSG", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of CRC errors detected", + "EventCode": "0x40", + "EventName": "UNC_CXLCM_RxC_MISC.CRC_ERRORS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Init flits sent", + "EventCode": "0x40", + "EventName": "UNC_CXLCM_RxC_MISC.INIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of LLCRD flits sent", + "EventCode": "0x40", + "EventName": "UNC_CXLCM_RxC_MISC.LLCRD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Retry flits sent", + "EventCode": "0x40", + "EventName": "UNC_CXLCM_RxC_MISC.RETRY", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles the Packing Buffer is Full", + "EventCode": "0x52", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_DATA", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles the Packing Buffer is Full", + "EventCode": "0x52", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles the Packing Buffer is Full", + "EventCode": "0x52", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_RSP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles the Packing Buffer is Full", + "EventCode": "0x52", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_DATA", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles the Packing Buffer is Full", + "EventCode": "0x52", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Data Packing bu= ffer", + "EventCode": "0x41", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_DATA", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Req Packing buf= fer", + "EventCode": "0x41", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Rsp Packing buf= fer", + "EventCode": "0x41", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_RSP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Mem Data Packing buff= er", + "EventCode": "0x41", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_DATA", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Mem Rxx Packing buffe= r", + "EventCode": "0x41", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles of Not Empty for Cache Data = Packing buffer", + "EventCode": "0x42", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_DATA", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles of Not Empty for Cache Req P= acking buffer", + "EventCode": "0x42", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles of Not Empty for Cache Rsp P= acking buffer", + "EventCode": "0x42", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_RSP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles of Not Empty for Mem Data Pa= cking buffer", + "EventCode": "0x42", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_DATA", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of cycles of Not Empty for Mem Rxx Pac= king buffer", + "EventCode": "0x42", + "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Flits with AK set", + "EventCode": "0x05", + "EventName": "UNC_CXLCM_TxC_FLITS.AK_HDR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Flits with BE set", + "EventCode": "0x05", + "EventName": "UNC_CXLCM_TxC_FLITS.BE_HDR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of control flits packed", + "EventCode": "0x05", + "EventName": "UNC_CXLCM_TxC_FLITS.CTRL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Headerless flits packed", + "EventCode": "0x05", + "EventName": "UNC_CXLCM_TxC_FLITS.NO_HDR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of protocol flits packed", + "EventCode": "0x05", + "EventName": "UNC_CXLCM_TxC_FLITS.PROT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of Flits with SZ set", + "EventCode": "0x05", + "EventName": "UNC_CXLCM_TxC_FLITS.SZ_HDR", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Count the number of flits packed", + "EventCode": "0x05", + "EventName": "UNC_CXLCM_TxC_FLITS.VALID", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Data Packing bu= ffer", + "EventCode": "0x02", + "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_DATA", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Req Packing buf= fer", + "EventCode": "0x02", + "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Rsp1 Packing bu= ffer", + "EventCode": "0x02", + "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Rsp0 Packing bu= ffer", + "EventCode": "0x02", + "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Cache Req Packing buf= fer", + "EventCode": "0x02", + "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Mem Data Packing buff= er", + "EventCode": "0x02", + "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_DATA", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Number of Allocation to Mem Rxx Packing buffe= r", + "EventCode": "0x02", + "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLCM" + }, + { + "BriefDescription": "Counts the number of uclk ticks", + "EventCode": "0x01", + "EventName": "UNC_CXLDP_CLOCKTICKS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLDP" + }, + { + "BriefDescription": "Number of Allocation to M2S Data AGF", + "EventCode": "0x02", + "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_DATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CXLDP" + }, + { + "BriefDescription": "Number of Allocation to M2S Req AGF", + "EventCode": "0x02", + "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_REQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CXLDP" + }, + { + "BriefDescription": "Number of Allocation to U2C Data AGF", + "EventCode": "0x02", + "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_DATA", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CXLDP" + }, + { + "BriefDescription": "Number of Allocation to U2C Req AGF", + "EventCode": "0x02", + "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CXLDP" + }, + { + "BriefDescription": "Number of Allocation to U2C Rsp AGF 0", + "EventCode": "0x02", + "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CXLDP" + }, + { + "BriefDescription": "Number of Allocation to U2C Rsp AGF 1", + "EventCode": "0x02", + "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP1", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CXLDP" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconn= ect.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnec= t.json new file mode 100644 index 000000000000..08faf38115d9 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json @@ -0,0 +1,6199 @@ +[ + { + "BriefDescription": "Total IRP occupancy of inbound read and write= requests to coherent memory.", + "EventCode": "0x0f", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", + "PerPkg": "1", + "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests to coherent memory. This is effectively the sum of read occupan= cy and write occupancy.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "IRP Clockticks", + "EventCode": "0x01", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of IRP clock cycles while the event i= s enabled", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF RF full", + "EventCode": "0x17", + "EventName": "UNC_I_FAF_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF - request insert from TC.", + "EventCode": "0x18", + "EventName": "UNC_I_FAF_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF occupancy", + "EventCode": "0x19", + "EventName": "UNC_I_FAF_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF allocation -- sent to ADQ", + "EventCode": "0x16", + "EventName": "UNC_I_FAF_TRANSACTIONS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.EVICTS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of At= omic Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Re= ad Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Wr= ite Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.FAST_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.FAST_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers = From Primary to Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.FAST_XFER", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints = From Primary to Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn= 't find prefetch", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Lost Forward", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.LOST_FWD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Invalid", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Invalid : Sec= ondary received a transfer that did not have sufficient MESI state", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Valid", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Valid : Secon= dary received a transfer that did have sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_E", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of E Lin= e : Secondary received a transfer that did have sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of I Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_M", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of M Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_S", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of S Lin= e : Secondary received a transfer that did not have sufficient MESI state", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", + "UMask": "0x7e", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", + "UMask": "0x74", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", + "UMask": "0x72", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", + "UMask": "0x78", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", + "UMask": "0x71", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit E or S", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit I", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit M", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Miss", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.MISS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpCode", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpData", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpInv", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Egress Allocations", + "EventCode": "0x0b", + "EventName": "UNC_I_TxC_AK_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Cycles Full", + "EventCode": "0x05", + "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Inserts", + "EventCode": "0x02", + "EventName": "UNC_I_TxC_BL_DRS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Occupancy", + "EventCode": "0x08", + "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Cycles Full", + "EventCode": "0x06", + "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Inserts", + "EventCode": "0x03", + "EventName": "UNC_I_TxC_BL_NCB_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Occupancy", + "EventCode": "0x09", + "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Cycles Full", + "EventCode": "0x07", + "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Inserts", + "EventCode": "0x04", + "EventName": "UNC_I_TxC_BL_NCS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Occupancy", + "EventCode": "0x0a", + "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "EventCode": "0x1c", + "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": ": Counts the number times when it is not pos= sible to issue a request to the M2PCIe because there are no Egress Credits = available on AD0, A1 or AD0AD1 both. Stalls on both AD0 and AD1 will count = as 2", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD0 Egress Credits Stalls", + "EventCode": "0x1a", + "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD0 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD0 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD1 Egress Credits Stalls", + "EventCode": "0x1b", + "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD1 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD1 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x1d", + "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No BL Egress Credit Stalls : Counts the numb= er times when it is not possible to issue data to the R2PCIe because there = are no BL Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0d", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0e", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0x0c", + "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Outbound Request Queue Occupancy : Accumulat= es the number of outstanding outbound requests from the IRP to the switch (= towards the devices). This can be used in conjunction with the allocations= event in order to calculate average latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "M2M Clockticks", + "EventCode": "0x01", + "EventName": "UNC_M2M_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Clockticks of the mesh to memory (M2M)", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2M_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to core mode (which bypass= es the CHA) was disabled", + "EventCode": "0x17", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to core mode, which bypass= es the CHA, was disabled : Non Cisgress", + "EventCode": "0x17", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE.NON_CISGRESS", + "PerPkg": "1", + "PublicDescription": "Cycles when direct to core mode, which bypas= ses the CHA, was disabled : Non Cisgress : Counts the number of time non ci= sgress D2C was not honoured by egress due to directory state constraints", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Counts the time when FM didn? do d2c for fill= reads (cross tile case)", + "EventCode": "0x4a", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action were overridden", + "EventCode": "0x18", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action was overridden : Cisgress", + "EventCode": "0x18", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE.CISGRESS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action was overridden : 2LM Hit?", + "EventCode": "0x18", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE.PMM_HIT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of times a direct to UPI transaction w= as overridden.", + "EventCode": "0x1C", + "EventName": "UNC_M2M_DIRECT2UPITXN_OVERRIDE.PMM_HIT", + "PerPkg": "1", + "PublicDescription": "Number of times a direct to UPI transaction = was overridden. : Counts the number of times D2K wasn't honored even though= the incoming request had d2k set", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to Intel UPI = transactions were overridden", + "EventCode": "0x1b", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to Intel UPI was disabled", + "EventCode": "0x1a", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when Direct2UPI was Disabled : Cisgres= s D2U Ignored", + "EventCode": "0x1A", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.CISGRESS", + "PerPkg": "1", + "PublicDescription": "Cycles when Direct2UPI was Disabled : Cisgre= ss D2U Ignored : Counts cisgress d2K that was not honored due to directory = constraints", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when Direct2UPI was Disabled : Egress = Ignored D2U", + "EventCode": "0x1A", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.EGRESS", + "PerPkg": "1", + "PublicDescription": "Cycles when Direct2UPI was Disabled : Egress= Ignored D2U : Counts the number of time D2K was not honoured by egress due= to directory state constraints", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when Direct2UPI was Disabled : Non Cis= gress D2U Ignored", + "EventCode": "0x1A", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.NON_CISGRESS", + "PerPkg": "1", + "PublicDescription": "Cycles when Direct2UPI was Disabled : Non Ci= sgress D2U Ignored : Counts non cisgress d2K that was not honored due to di= rectory constraints", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages sent direct to the Intel UPI", + "EventCode": "0x19", + "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of times egress did D2K (D= irect to KTI)", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads that a message sent direct2 I= ntel UPI was overridden", + "EventCode": "0x1c", + "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of times a direct to UPI transaction w= as overridden.", + "EventCode": "0x1C", + "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE.CISGRESS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in A State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in I State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in L State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in S State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in A State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in I State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in L State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in S State", + "EventCode": "0x1d", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (any= state found)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with any directory to non persistent memory", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (cac= heline found in A state)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with directory A to non persistent memory", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in I state)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with directory I to non persistent memory", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in S state)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with directory S to non persistent memory", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in A State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in I State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in L State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in S State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in A State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in I State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in L State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in S State", + "EventCode": "0x1e", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to I", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", + "PerPkg": "1", + "UMask": "0x320", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to S", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", + "PerPkg": "1", + "UMask": "0x340", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from/= to Any state", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", + "PerPkg": "1", + "UMask": "0x301", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_I_HIT_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from A to I to non persistent memory (DRAM or= HBM)", + "UMask": "0x120", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_I_MISS_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from A to I to non persistent memory (DRAM or HBM)", + "UMask": "0x220", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_S_HIT_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from A to S to non persistent memory (DRAM or= HBM)", + "UMask": "0x140", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_S_MISS_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from A to S to non persistent memory (DRAM or HBM)", + "UMask": "0x240", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.HIT_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts any 1lm or 2lm hit data return that w= ould result in directory update to non persistent memory (DRAM or HBM)", + "UMask": "0x101", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to A", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", + "PerPkg": "1", + "UMask": "0x304", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to S", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", + "PerPkg": "1", + "UMask": "0x302", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_A_HIT_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from I to A to non persistent memory (DRAM or= HBM)", + "UMask": "0x104", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_A_MISS_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from I to A to non persistent memory (DRAM or HBM)", + "UMask": "0x204", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_S_HIT_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from I to S to non persistent memory (DRAM or= HBM)", + "UMask": "0x102", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_S_MISS_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 2lm miss data returns that would re= sult in directory update from I to S to non persistent memory (DRAM or HBM)= ", + "UMask": "0x202", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.MISS_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts any 2lm miss data return that would r= esult in directory update to non persistent memory (DRAM or HBM)", + "UMask": "0x201", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to A", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", + "PerPkg": "1", + "UMask": "0x310", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to I", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", + "PerPkg": "1", + "UMask": "0x308", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_A_HIT_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from S to A to non persistent memory (DRAM or= HBM)", + "UMask": "0x110", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_A_MISS_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from S to A to non persistent memory (DRAM or HBM)", + "UMask": "0x210", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_I_HIT_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from S to I to non persistent memory (DRAM or= HBM)", + "UMask": "0x108", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_I_MISS_NON_PMM", + "PerPkg": "1", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from S to I to non persistent memory (DRAM or HBM)", + "UMask": "0x208", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x80000004", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x80000001", + "Unit": "M2M" + }, + { + "BriefDescription": "Count when Starve Glocab counter is at 7", + "EventCode": "0x44", + "EventName": "UNC_M2M_IGR_STARVE_WINNER.MASK7", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Reads to iMC issued", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.ALL", + "PerPkg": "1", + "UMask": "0x304", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0.TO_NM1LM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0.TO_NM1LM", + "PerPkg": "1", + "UMask": "0x108", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0.TO_NMCache", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0.TO_NMCache", + "PerPkg": "1", + "UMask": "0x110", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0_ALL", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x104", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0_FROM_TGR", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR", + "PerPkg": "1", + "UMask": "0x140", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0_ISOCH", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH", + "PerPkg": "1", + "UMask": "0x102", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0_NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x101", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x110", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x108", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_PMM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH0_TO_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x120", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1.TO_NM1LM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1.TO_NM1LM", + "PerPkg": "1", + "UMask": "0x208", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1.TO_NMCache", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1.TO_NMCache", + "PerPkg": "1", + "UMask": "0x210", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1_ALL", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x204", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1_FROM_TGR", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR", + "PerPkg": "1", + "UMask": "0x240", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1_ISOCH", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH", + "PerPkg": "1", + "UMask": "0x202", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1_NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x201", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x210", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x208", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_PMM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.CH1_TO_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x220", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.FROM_TGR", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.FROM_TGR", + "PerPkg": "1", + "UMask": "0x340", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.ISOCH", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.ISOCH", + "PerPkg": "1", + "UMask": "0x302", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.NORMAL", + "PerPkg": "1", + "UMask": "0x301", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x310", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x308", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.TO_NM1LM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.TO_NM1LM", + "PerPkg": "1", + "UMask": "0x308", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.TO_NMCACHE", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.TO_NMCACHE", + "PerPkg": "1", + "UMask": "0x310", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_READS.TO_PMM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.TO_PMM", + "PerPkg": "1", + "UMask": "0x320", + "Unit": "M2M" + }, + { + "BriefDescription": "All Writes - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.ALL", + "PerPkg": "1", + "UMask": "0x1810", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0.NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_ALL", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x810", + "Unit": "M2M" + }, + { + "BriefDescription": "From TGR - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_FULL", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x801", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x804", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive Miss - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x802", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x808", + "Unit": "M2M" + }, + { + "BriefDescription": "DDR, acting as Cache - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x840", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x820", + "Unit": "M2M" + }, + { + "BriefDescription": "PMM - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "PMM - Ch0 : Counts all PMM dimm writes reque= sts(full line and partial) sent from M2M to iMC", + "UMask": "0x880", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1.NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "All Writes - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x1010", + "Unit": "M2M" + }, + { + "BriefDescription": "From TGR - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Full Line Non-ISOCH - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x1001", + "Unit": "M2M" + }, + { + "BriefDescription": "ISOCH Full Line - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x1004", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive Miss - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Partial Non-ISOCH - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x1002", + "Unit": "M2M" + }, + { + "BriefDescription": "ISOCH Partial - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x1008", + "Unit": "M2M" + }, + { + "BriefDescription": "DDR, acting as Cache - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x1040", + "Unit": "M2M" + }, + { + "BriefDescription": "DDR - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x1020", + "Unit": "M2M" + }, + { + "BriefDescription": "PMM - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "PMM - Ch1 : Counts all PMM dimm writes reque= sts(full line and partial) sent from M2M to iMC", + "UMask": "0x1080", + "Unit": "M2M" + }, + { + "BriefDescription": "From TGR - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Full Non-ISOCH - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.FULL", + "PerPkg": "1", + "UMask": "0x1801", + "Unit": "M2M" + }, + { + "BriefDescription": "ISOCH Full Line - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x1804", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Non-Inclusive Miss - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Partial Non-ISOCH - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", + "PerPkg": "1", + "UMask": "0x1802", + "Unit": "M2M" + }, + { + "BriefDescription": "ISOCH Partial - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x1808", + "Unit": "M2M" + }, + { + "BriefDescription": "DDR, acting as Cache - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x1840", + "Unit": "M2M" + }, + { + "BriefDescription": "DDR - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x1820", + "Unit": "M2M" + }, + { + "BriefDescription": "PMM - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", + "PerPkg": "1", + "UMask": "0x1880", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS", + "EventCode": "0x5c", + "EventName": "UNC_M2M_PREFCAM_CIS_DROPS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : UPI - All Channels", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "M2M" + }, + { + "BriefDescription": ": UPI - All Channels", + "EventCode": "0x5d", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "M2M" + }, + { + "BriefDescription": ": XPT - All Channels", + "EventCode": "0x5d", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches", + "EventCode": "0x5E", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.RD_MERGED", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches", + "EventCode": "0x5E", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.WR_MERGED", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches", + "EventCode": "0x5E", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.WR_SQUASHED", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_UPI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_UPI", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", + "PerPkg": "1", + "PublicDescription": "Prefetch CAM Inserts : XPT -All Channels", + "UMask": "0x5", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : All Channels", + "EventCode": "0x54", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 0", + "EventCode": "0x54", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 1", + "EventCode": "0x54", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "All Channels", + "EventCode": "0x5F", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 0", + "EventCode": "0x5f", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 1", + "EventCode": "0x5f", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "EventCode": "0x62", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "EventCode": "0x62", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCE= PT", + "EventCode": "0x62", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "EventCode": "0x62", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches", + "EventCode": "0x60", + "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS)= Allocations", + "EventCode": "0x02", + "EventName": "UNC_M2M_RxC_AD_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x03", + "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Clean NearMem Read Hit", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN", + "PerPkg": "1", + "PublicDescription": "Counts clean full line read hits (reads and = RFOs).", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Dirty NearMem Read Hit", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY", + "PerPkg": "1", + "PublicDescription": "Counts dirty full line read hits (reads and = RFOs).", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tag Hit : Clean NearMem Underfill Hit", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN", + "PerPkg": "1", + "PublicDescription": "Tag Hit indicates when a request sent to the= iMC hit in Near Memory. : Counts clean underfill hits due to a partial wri= te", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tag Hit : Dirty NearMem Underfill Hit", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY", + "PerPkg": "1", + "PublicDescription": "Tag Hit indicates when a request sent to the= iMC hit in Near Memory. : Counts dirty underfill read hits due to a partia= l write", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_TAG_MISS", + "EventCode": "0x4b", + "EventName": "UNC_M2M_TAG_MISS", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "Number AD Ingress Credits", + "EventCode": "0x2e", + "EventName": "UNC_M2M_TGR_AD_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number BL Ingress Credits", + "EventCode": "0x2f", + "EventName": "UNC_M2M_TGR_BL_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 0", + "EventCode": "0x32", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x104", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 1", + "EventCode": "0x32", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x204", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 0", + "EventCode": "0x33", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 1", + "EventCode": "0x33", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 0", + "EventCode": "0x42", + "EventName": "UNC_M2M_WPQ_FLUSH.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 1", + "EventCode": "0x42", + "EventName": "UNC_M2M_WPQ_FLUSH.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 0", + "EventCode": "0x37", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 1", + "EventCode": "0x37", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 0", + "EventCode": "0x38", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 1", + "EventCode": "0x38", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 0", + "EventCode": "0x40", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 1", + "EventCode": "0x40", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0", + "EventCode": "0x35", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 1", + "EventCode": "0x35", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Mirror", + "EventCode": "0x35", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x35", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x35", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", + "EventCode": "0x4d", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", + "EventCode": "0x4d", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", + "EventCode": "0x4c", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", + "EventCode": "0x4c", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 0", + "EventCode": "0x48", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 1", + "EventCode": "0x48", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", + "EventCode": "0x47", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", + "EventCode": "0x47", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CBox AD Credits Empty : Requests", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : Requests : No credit= s available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty : Snoops", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : Snoops : No credits = available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty : VNA Messages", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : VNA Messages : No cr= edits available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty : Writebacks", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : Writebacks : No cred= its available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M3UPI Clockticks", + "EventCode": "0x01", + "EventName": "UNC_M3UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of M2UPI clock cycles while the event= is enabled", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M3UPI CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2C Sent", + "EventCode": "0x2b", + "EventName": "UNC_M3UPI_D2C_SENT", + "PerPkg": "1", + "PublicDescription": "D2C Sent : Count cases BL sends direct to co= re", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2U Sent", + "EventCode": "0x2a", + "EventName": "UNC_M3UPI_D2U_SENT", + "PerPkg": "1", + "PublicDescription": "D2U Sent : Cases where SMI3 sends D2U comman= d", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO0 and IIO1 share the= same ring destination. (1 VN0 credit only)", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO1_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO0 and IIO1 share th= e same ring destination. (1 VN0 credit only) : No vn0 and vna credits avail= able to send to M2", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO2", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO2 : No vn0 and vna = credits available to send to M2", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO3", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO3 : No vn0 and vna = credits available to send to M2", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO4", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO4 : No vn0 and vna = credits available to send to M2", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO5", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO5 : No vn0 and vna = credits available to send to M2", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : All IIO targets for NCS= are in single mask. ORs them together", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : All IIO targets for NC= S are in single mask. ORs them together : No vn0 and vna credits available = to send to M2", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : Selected M2p BL NCS cre= dits", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : Selected M2p BL NCS cr= edits : No vn0 and vna credits available to send to M2", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO5", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.UBOX_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO5 : No vn0 and vna = credits available to send to M2", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AD - Slot 0", + "EventCode": "0x3e", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AD - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AD - Slot 1", + "EventCode": "0x3e", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AD - Slot 1 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AD - Slot 2", + "EventCode": "0x3e", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AD - Slot 2 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AK - Slot 0", + "EventCode": "0x3e", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AK - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AK - Slot 2", + "EventCode": "0x3e", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AK - Slot 2 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : BL - Slot 0", + "EventCode": "0x3e", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : BL - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : REQ on AD", + "EventCode": "0x4b", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : REQ on AD : VN0 message r= equested but lost arbitration : Home (REQ) messages on AD. REQ is generall= y used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : RSP on AD", + "EventCode": "0x4b", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : RSP on AD : VN0 message r= equested but lost arbitration : Response (RSP) messages on AD. RSP packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : SNP on AD", + "EventCode": "0x4b", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : SNP on AD : VN0 message r= equested but lost arbitration : Snoops (SNP) messages on AD. SNP is used f= or outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : NCB on BL", + "EventCode": "0x4b", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : NCB on BL : VN0 message r= equested but lost arbitration : Non-Coherent Broadcast (NCB) messages on BL= . NCB is generally used to transmit data without coherency. For example, = non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : NCS on BL", + "EventCode": "0x4b", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : NCS on BL : VN0 message r= equested but lost arbitration : Non-Coherent Standard (NCS) messages on BL.= ", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : RSP on BL", + "EventCode": "0x4b", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : RSP on BL : VN0 message r= equested but lost arbitration : Response (RSP) messages on BL. RSP packets = are used to transmit a variety of protocol flits including grants and compl= etions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : WB on BL", + "EventCode": "0x4b", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : WB on BL : VN0 message re= quested but lost arbitration : Data Response (WB) messages on BL. WB is ge= nerally used to transmit data with coherency. For example, remote reads an= d writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : REQ on AD", + "EventCode": "0x4c", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : REQ on AD : VN1 message r= equested but lost arbitration : Home (REQ) messages on AD. REQ is generall= y used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : RSP on AD", + "EventCode": "0x4c", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : RSP on AD : VN1 message r= equested but lost arbitration : Response (RSP) messages on AD. RSP packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : SNP on AD", + "EventCode": "0x4c", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : SNP on AD : VN1 message r= equested but lost arbitration : Snoops (SNP) messages on AD. SNP is used f= or outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : NCB on BL", + "EventCode": "0x4c", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : NCB on BL : VN1 message r= equested but lost arbitration : Non-Coherent Broadcast (NCB) messages on BL= . NCB is generally used to transmit data without coherency. For example, = non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : NCS on BL", + "EventCode": "0x4c", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : NCS on BL : VN1 message r= equested but lost arbitration : Non-Coherent Standard (NCS) messages on BL.= ", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : RSP on BL", + "EventCode": "0x4c", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : RSP on BL : VN1 message r= equested but lost arbitration : Response (RSP) messages on BL. RSP packets = are used to transmit a variety of protocol flits including grants and compl= etions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : WB on BL", + "EventCode": "0x4c", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : WB on BL : VN1 message re= quested but lost arbitration : Data Response (WB) messages on BL. WB is ge= nerally used to transmit data with coherency. For example, remote reads an= d writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN0", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN0", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : AD, BL Parallel Win VN0 = : AD and BL messages won arbitration concurrently / in parallel", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN1", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN1", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : AD, BL Parallel Win VN1 = : AD and BL messages won arbitration concurrently / in parallel", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : Max Parallel Win", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ALL_PARALLEL_WIN", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : Max Parallel Win : VN0 a= nd VN1 arbitration sub-pipelines both produced AD and BL winners (maximum p= ossible parallel winners)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending AD= VN0", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending A= D VN0 : Arbitration stage made no progress on pending ad vn0 messages becau= se slotting stage cannot accept new message", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending AD= VN1", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending A= D VN1 : Arbitration stage made no progress on pending ad vn1 messages becau= se slotting stage cannot accept new message", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending BL= VN0", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending B= L VN0 : Arbitration stage made no progress on pending bl vn0 messages becau= se slotting stage cannot accept new message", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending BL= VN1", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending B= L VN1 : Arbitration stage made no progress on pending bl vn1 messages becau= se slotting stage cannot accept new message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : VN0, VN1 Parallel Win", + "EventCode": "0x4d", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.VN01_PARALLEL_WIN", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : VN0, VN1 Parallel Win : = VN0 and VN1 arbitration sub-pipelines had parallel winners (at least one AD= or BL on each side)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : REQ on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : REQ on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Home (REQ) messages on AD. REQ is generally used to send requests,= request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : RSP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : RSP on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on AD. RSP packets are used to transmit a = variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : SNP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : SNP on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : NCB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : NCB on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used= to transmit data without coherency. For example, non-coherent read data r= eturns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : NCS on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : NCS on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : RSP on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : RSP on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on BL. RSP packets are used to transmit a v= ariety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : WB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : WB on BL : VN0 m= essage is blocked from requesting arbitration due to lack of remote UPI cre= dits : Data Response (WB) messages on BL. WB is generally used to transmit= data with coherency. For example, remote reads and writes, or cache to ca= che transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : REQ on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : REQ on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Home (REQ) messages on AD. REQ is generally used to send requests,= request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : RSP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : RSP on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on AD. RSP packets are used to transmit a = variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : SNP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : SNP on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : NCB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : NCB on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used= to transmit data without coherency. For example, non-coherent read data r= eturns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : NCS on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : NCS on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : RSP on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : RSP on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on BL. RSP packets are used to transmit a v= ariety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : WB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : WB on BL : VN1 m= essage is blocked from requesting arbitration due to lack of remote UPI cre= dits : Data Response (WB) messages on BL. WB is generally used to transmit= data with coherency. For example, remote reads and writes, or cache to ca= che transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : REQ on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : REQ on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Home (REQ) messages on AD. REQ is generally used to send requests, req= uest responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : RSP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : RSP on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on AD. RSP packets are used to transmit a vari= ety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : SNP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : SNP on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : NCB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : NCB on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to = transmit data without coherency. For example, non-coherent read data retur= ns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : NCS on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : NCS on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : RSP on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : RSP on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on BL. RSP packets are used to transmit a varie= ty of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : WB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : WB on BL : VN0 message w= as not able to request arbitration while some other message won arbitration= : Data Response (WB) messages on BL. WB is generally used to transmit dat= a with coherency. For example, remote reads and writes, or cache to cache = transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : REQ on AD", + "EventCode": "0x4a", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : REQ on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Home (REQ) messages on AD. REQ is generally used to send requests, req= uest responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : RSP on AD", + "EventCode": "0x4a", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : RSP on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on AD. RSP packets are used to transmit a vari= ety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : SNP on AD", + "EventCode": "0x4a", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : SNP on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : NCB on BL", + "EventCode": "0x4a", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : NCB on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to = transmit data without coherency. For example, non-coherent read data retur= ns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : NCS on BL", + "EventCode": "0x4a", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : NCS on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : RSP on BL", + "EventCode": "0x4a", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : RSP on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on BL. RSP packets are used to transmit a varie= ty of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : WB on BL", + "EventCode": "0x4a", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : WB on BL : VN1 message w= as not able to request arbitration while some other message won arbitration= : Data Response (WB) messages on BL. WB is generally used to transmit dat= a with coherency. For example, remote reads and writes, or cache to cache = transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL A= rb", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL = Arb : Number of times message is bypassed around the Ingress Queue : AD is = taking bypass to slot 0 of independent flit while bl message is in arbitrat= ion", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idle= ", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idl= e : Number of times message is bypassed around the Ingress Queue : AD is ta= king bypass to slot 0 of independent flit while pipeline is idle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 1", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD + BL to Slot 1 := Number of times message is bypassed around the Ingress Queue : AD is takin= g bypass to flit slot 1 while merging with bl message in same flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 2", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD + BL to Slot 2 := Number of times message is bypassed around the Ingress Queue : AD is takin= g bypass to flit slot 2 while merging with bl message in same flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events : Any In BGF FIFO= ", + "EventCode": "0x5f", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : Any In BGF FIF= O : Indication that at least one packet (flit) is in the bgf (fifo only)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events : Any in BGF Path= ", + "EventCode": "0x5f", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : Any in BGF Pat= h : Indication that at least one packet (flit) is in the bgf path (i.e. pip= e to fifo)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events", + "EventCode": "0x5f", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.LT1_FOR_D2K", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : d2k credit cou= nt is less than 1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events", + "EventCode": "0x5f", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.LT2_FOR_D2K", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : d2k credit cou= nt is less than 2", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events : No D2K For Arb", + "EventCode": "0x5f", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.VN0_NO_D2K_FOR_ARB", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : No D2K For Arb= : VN0 BL RSP message was blocked from arbitration request due to lack of D= 2K CMP credit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events", + "EventCode": "0x5f", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.VN1_NO_D2K_FOR_ARB", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : VN1 BL RSP mes= sage was blocked from arbitration request due to lack of D2K CMP credits", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Credits Consumed", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.CONSUMED", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Credits Consumed : number= of remote vna credits consumed per cycle", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : D2K Credits", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : D2K Credits : D2K complet= ion fifo credit occupancy (credits in use), accumulated across all cycles", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Packets in BGF FIFO", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Packets in BGF FIFO : Occ= upancy of m3upi ingress -> upi link layer bgf; packets (flits) in fifo", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Packets in BGF Path", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Packets in BGF Path : Occ= upancy of m3upi ingress -> upi link layer bgf; packets (flits) in path (i.e= . pipe to fifo or fifo)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : count of bl messages in p= ump-1-pending state, in completion fifo only", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : count of bl messages in p= ump-1-pending state, in marker table and in fifo", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Transmit Credits", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Transmit Credits : Link l= ayer transmit queue credit occupancy (credits in use), accumulated across a= ll cycles", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : VNA In Use", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : VNA In Use : Remote UPI V= NA credit occupancy (number of credits in use), accumulated across all cycl= es", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : REQ on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : REQ on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Home (REQ) me= ssages on AD. REQ is generally used to send requests, request responses, a= nd snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on AD. RSP packets are used to transmit a variety of protocol f= lits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : SNP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : SNP on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Snoops (SNP) = messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : NCB on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Broadcast (NCB) messages on BL. NCB is generally used to transmit data wit= hout coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCS on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : NCS on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on BL. RSP packets are used to transmit a variety of protocol fl= its including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : WB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : WB on BL : Counts the number of cycles when the UPI Ingress is not em= pty. This tracks one of the three rings that are used by the UPI agent. T= his can be used in conjunction with the UPI Ingress Occupancy Accumulator e= vent in order to calculate average queue occupancy. Multiple ingress buffe= rs can be tracked at a given time using multiple counters. : Data Response = (WB) messages on BL. WB is generally used to transmit data with coherency.= For example, remote reads and writes, or cache to cache transfers will tr= ansmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : All", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : All : Data flit is read= y for transmission but could not be sent : data flit is ready for transmiss= ion but could not be sent for any reason, e.g. low credits, low tsv, stall = injection", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : No BGF Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_BGF", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : No BGF Credits : Data f= lit is ready for transmission but could not be sent", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : No TxQ Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_TXQ", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : No TxQ Credits : Data f= lit is ready for transmission but could not be sent", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : TSV High", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.TSV_HI", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : TSV High : Data flit is= ready for transmission but could not be sent : data flit is ready for tran= smission but was not sent while tsv high", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : Cycle valid for Flit", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.VALID_FOR_FLIT", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : Cycle valid for Flit : = Data flit is ready for transmission but could not be sent : data flit is re= ady for transmission but was not sent while cycle is valid for flit transmi= ssion", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence : Wait on Pu= mp 0", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : Wait on P= ump 0 : generating bl data flit sequence; waiting for data pump 0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is at capacity (pending table plus completion fifo at limit)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is tracking at least one message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding completion fifo is full", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is at or near capacity, such that pump-0-only bl messages are g= etting stalled in slotting stage", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : a bl mess= age finished but is in limbo and moved to pump-1-pending logic", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence : Wait on Pu= mp 1", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : Wait on P= ump 1 : generating bl data flit sequence; waiting for data pump 1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF", + "PerPkg": "1", + "PublicDescription": ": slot 2 request naturally serviced during h= old-off period", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE", + "PerPkg": "1", + "PublicDescription": ": slot 2 request forcibly serviced during se= rvice window", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED", + "PerPkg": "1", + "PublicDescription": ": slot 2 request received from link layer wh= ile idle (with no slot 2 request active immediately prior)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN", + "PerPkg": "1", + "PublicDescription": ": slot 2 request withdrawn during hold-off p= eriod or service window", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : All", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Needs = Data Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Needs= Data Flit : BL message requires data flit sequence", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Wait o= n Pump 0", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Wait = on Pump 0 : Waiting for header pump 0", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 : Header pump 1 is not required for flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1 - Bubble", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 - Bubble : Header pump 1 is not required for flit but flit tra= nsmission delayed", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1 - Not Avail", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 - Not Avail : Header pump 1 is not required for flit and not a= vailable", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Wait o= n Pump 1", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Wait = on Pump 1 : Waiting for header pump 1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Accumulate", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Accumulate : Events re= lated to Header Flit Generation - Set 1 : Header flit slotting control stat= e machine is in any accumulate state; multi-message flit may be assembled o= ver multiple cycles", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Accumulate Ready", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Accumulate Ready : Eve= nts related to Header Flit Generation - Set 1 : header flit slotting contro= l state machine is in accum_ready state; flit is ready to send but transmis= sion is blocked; more messages may be slotted into flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Accumulate Wasted", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Accumulate Wasted : Ev= ents related to Header Flit Generation - Set 1 : Flit is being assembled ov= er multiple cycles, but no additional message is being slotted into flit in= current cycle; accumulate cycle is wasted", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Blocked", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Run-Ahead - Blocked : = Events related to Header Flit Generation - Set 1 : Header flit slotting ent= ered run-ahead state; new header flit is started while transmission of prio= r, fully assembled flit is blocked", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_AFTER", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: message was slotted only after= run-ahead was over; run-ahead mode definitely wasted", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Message", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_DURING", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Run-Ahead - Message : = Events related to Header Flit Generation - Set 1 : run-ahead mode: one mess= age slotted during run-ahead", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_AFTER", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: second message slotted immedia= tely after run-ahead; potential run-ahead success", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_SENT", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: two (or three) message flit se= nt immediately after run-ahead; complete run-ahead success", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Parallel Ok", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Parallel Ok : Events r= elated to Header Flit Generation - Set 2 : new header flit construction may= proceed in parallel with data flit sequence", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Parallel Flit Finished", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_FLIT", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Parallel Flit Finished= : Events related to Header Flit Generation - Set 2 : header flit finished = assembly in parallel with data flit sequence", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Parallel Message", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_MSG", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Parallel Message : Eve= nts related to Header Flit Generation - Set 2 : message is slotted into hea= der flit in parallel with data flit sequence", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Rate-matching Stall : = Events related to Header Flit Generation - Set 2 : Rate-matching stall inje= cted", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall - N= o Message", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Rate-matching Stall - = No Message : Events related to Header Flit Generation - Set 2 : Rate matchi= ng stall injected, but no additional message slotted during stall cycle", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : One Message", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : One Message : One message= in flit; VNA or non-VNA flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : One Message in non-VNA", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG_VNX", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : One Message in non-VNA : = One message in flit; non-VNA flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : Two Messages", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.2_MSGS", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : Two Messages : Two messag= es in flit; VNA flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : Three Messages", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.3_MSGS", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : Three Messages : Three me= ssages in flit; VNA flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : One Slot Taken", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : Two Slots Taken", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_2", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : All Slots Taken", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_3", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : All", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : All : header flit is ready= for transmission but could not be sent : header flit is ready for transmis= sion but could not be sent for any reason, e.g. no credits, low tsv, stall = injection", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No BGF Credits", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_CRD", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No BGF Credits : header fl= it is ready for transmission but could not be sent : No BGF credits availab= le", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No BGF Credits + No Extra M= essage Slotted", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_NO_MSG", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No BGF Credits + No Extra = Message Slotted : header flit is ready for transmission but could not be se= nt : No BGF credits available; no additional message slotted into flit", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No TxQ Credits", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_CRD", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No TxQ Credits : header fl= it is ready for transmission but could not be sent : No TxQ credits availab= le", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No TxQ Credits + No Extra M= essage Slotted", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_NO_MSG", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No TxQ Credits + No Extra = Message Slotted : header flit is ready for transmission but could not be se= nt : No TxQ credits available; no additional message slotted into flit", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : TSV High", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.TSV_HI", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : TSV High : header flit is = ready for transmission but could not be sent : header flit is ready for tra= nsmission but was not sent while tsv high", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : Cycle valid for Flit", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.VALID_FOR_FLIT", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : Cycle valid for Flit : hea= der flit is ready for transmission but could not be sent : header flit is r= eady for transmission but was not sent while cycle is valid for flit transm= ission", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Can't Slot AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD", + "PerPkg": "1", + "PublicDescription": "Message Held : Can't Slot AD : some AD messa= ge could not be slotted (logical OR of all AD events under INGR_SLOT_CANT_M= C_VN{0,1})", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Can't Slot BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL", + "PerPkg": "1", + "PublicDescription": "Message Held : Can't Slot BL : some BL messa= ge could not be slotted (logical OR of all BL events under INGR_SLOT_CANT_M= C_VN{0,1})", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Parallel Attempt", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT", + "PerPkg": "1", + "PublicDescription": "Message Held : Parallel Attempt : ad and bl = messages attempted to slot into the same flit in parallel", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Parallel Success", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS", + "PerPkg": "1", + "PublicDescription": "Message Held : Parallel Success : ad and bl = messages were actually slotted into the same flit in paralle", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : VN0", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.VN0", + "PerPkg": "1", + "PublicDescription": "Message Held : VN0 : vn0 message(s) that cou= ldn't be slotted into last vn0 flit are held in slotting stage while proces= sing vn1 flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : VN1", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.VN1", + "PerPkg": "1", + "PublicDescription": "Message Held : VN1 : vn1 message(s) that cou= ldn't be slotted into last vn1 flit are held in slotting stage while proces= sing vn0 flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : REQ on AD", + "EventCode": "0x4e", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : REQ on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Home (REQ) messages on AD. REQ is generally used to send re= quests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : RSP on AD", + "EventCode": "0x4e", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : RSP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on AD. RSP packets are used to tran= smit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : SNP on AD", + "EventCode": "0x4e", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : SNP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Snoops (SNP) messages on AD. SNP is used for outgoing snoop= s.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : NCB on BL", + "EventCode": "0x4e", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : NCB on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Broadcast (NCB) messages on BL. NCB is general= ly used to transmit data without coherency. For example, non-coherent read= data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : NCS on BL", + "EventCode": "0x4e", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : NCS on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : RSP on BL", + "EventCode": "0x4e", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : RSP on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on BL. RSP packets are used to trans= mit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : WB on BL", + "EventCode": "0x4e", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : WB on BL = : Count cases where Ingress has packets to send but did not have time to pa= ck into flit before sending to Agent so slot was left NULL which could have= been used. : Data Response (WB) messages on BL. WB is generally used to t= ransmit data with coherency. For example, remote reads and writes, or cach= e to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : REQ on AD", + "EventCode": "0x4f", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : REQ on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Home (REQ) messages on AD. REQ is generally used to send re= quests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : RSP on AD", + "EventCode": "0x4f", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : RSP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on AD. RSP packets are used to tran= smit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : SNP on AD", + "EventCode": "0x4f", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : SNP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Snoops (SNP) messages on AD. SNP is used for outgoing snoop= s.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : NCB on BL", + "EventCode": "0x4f", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : NCB on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Broadcast (NCB) messages on BL. NCB is general= ly used to transmit data without coherency. For example, non-coherent read= data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : NCS on BL", + "EventCode": "0x4f", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : NCS on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : RSP on BL", + "EventCode": "0x4f", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : RSP on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on BL. RSP packets are used to trans= mit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : WB on BL", + "EventCode": "0x4f", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : WB on BL = : Count cases where Ingress has packets to send but did not have time to pa= ck into flit before sending to Agent so slot was left NULL which could have= been used. : Data Response (WB) messages on BL. WB is generally used to t= ransmit data with coherency. For example, remote reads and writes, or cach= e to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Any In Use", + "EventCode": "0x5a", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Any In Use : At least o= ne remote vna credit is in use", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Corrected", + "EventCode": "0x5a", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Corrected : Number of r= emote vna credits corrected (local return) per cycle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 1", + "EventCode": "0x5a", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 1 : Remote vna = credit level is less than 1 (i.e. no vna credits available)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 10", + "EventCode": "0x5a", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT10", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 10 : remote vna= credit level is less than 10; parallel vn0/vn1 arb not possible", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 4", + "EventCode": "0x5a", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 4 : Remote vna = credit level is less than 4; bl (or ad requiring 4 vna) cannot arb on vna", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 5", + "EventCode": "0x5a", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 5 : Remote vna = credit level is less than 5; parallel ad/bl arb on vna not possible", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5", + "PerPkg": "1", + "PublicDescription": ": remote vna credit count was less than 5 an= d allocation to ad or bl messages was required", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT1= 0", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT10", + "PerPkg": "1", + "PublicDescription": ": remote vna credit count was less than 10 a= nd allocation to vn0 or vn1 was required", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD", + "PerPkg": "1", + "PublicDescription": ": on vn0, remote vna credits were allocated = only to ad messages, not to bl", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL", + "PerPkg": "1", + "PublicDescription": ": on vn0, remote vna credits were allocated = only to bl messages, not to ad", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY", + "PerPkg": "1", + "PublicDescription": ": remote vna credits were allocated only to = vn0, not to vn1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD", + "PerPkg": "1", + "PublicDescription": ": on vn1, remote vna credits were allocated = only to ad messages, not to bl", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL", + "PerPkg": "1", + "PublicDescription": ": on vn1, remote vna credits were allocated = only to bl messages, not to ad", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY", + "PerPkg": "1", + "PublicDescription": ": remote vna credits were allocated only to = vn1, not to vn0", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 REQ Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 RSP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 SNP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 WB Messages : AD arb= but no win; arb request asserted but not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 REQ Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 RSP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 SNP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 WB Messages : AD arb= but no win; arb request asserted but not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 REQ Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 RSP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 SNP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 WB Messages : Numb= er of cycles the AD Egress queue is Not Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 REQ Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 RSP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 SNP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 WB Messages : Numb= er of cycles the AD Egress queue is Not Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 REQ Messages", + "EventCode": "0x2d", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 REQ Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 RSP Messages", + "EventCode": "0x2d", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 SNP Messages", + "EventCode": "0x2d", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 SNP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 WB Messages", + "EventCode": "0x2d", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN1 REQ Messages", + "EventCode": "0x2d", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN1 REQ Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN1 RSP Messages", + "EventCode": "0x2d", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN1 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN1 SNP Messages", + "EventCode": "0x2d", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN1 SNP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 REQ Messages", + "EventCode": "0x1c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 RSP Messages", + "EventCode": "0x1c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 SNP Messages", + "EventCode": "0x1c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_SNP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 WB Messages", + "EventCode": "0x1c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN1 REQ Messages", + "EventCode": "0x1c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_REQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN1 RSP Messages", + "EventCode": "0x1c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN1 SNP Messages", + "EventCode": "0x1c", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_SNP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Inserts", + "EventCode": "0x2f", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Occupancy", + "EventCode": "0x1e", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_OCCUPANCY", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 NCB Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 NCS Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 RSP Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 WB Messages : BL arb= but no win; arb request asserted but not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 NCS Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 NCB Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 RSP Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 WB Messages : BL arb= but no win; arb request asserted but not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 REQ Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 RSP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 SNP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 WB Messages : Numb= er of cycles the BL Egress queue is Not Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 REQ Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 RSP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 SNP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 WB Messages : Numb= er of cycles the BL Egress queue is Not Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 RSP Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 WB Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 NCS Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 NCS Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 NCB Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 NCB Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1 RSP Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1 WB Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1_NCB Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1_NCB Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1_NCS Messages", + "EventCode": "0x2e", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1_NCS Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 NCB Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 NCS Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 RSP Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 WB Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1_NCS Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1_NCB Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 RSP Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 WB Messages", + "EventCode": "0x1d", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 RSP Messages", + "EventCode": "0x1f", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 WB Messages", + "EventCode": "0x1f", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_THROUGH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 NCB Messages", + "EventCode": "0x1f", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_WRPULL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 RSP Messages", + "EventCode": "0x1f", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_LOCAL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 WB Messages", + "EventCode": "0x1f", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_THROUGH", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1_NCS Messages", + "EventCode": "0x1f", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_WRPULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN0 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN0 REQ Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN0 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN0 RSP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN0 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN0 SNP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN1 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN1 REQ Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN1 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN1 RSP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN1 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN1 SNP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VNA", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VNA : No credits ava= ilable to send to UPIs on the AD Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN0 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN0 RSP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN0 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN0 REQ Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN0 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN0 SNP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN1 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN1 RSP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN1 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN1 REQ Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN1 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN1 SNP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VNA", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VNA : No credits ava= ilable to send to UPI on the BL Ring (diff between non-SMI and SMI mode)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "FlowQ Generated Prefetch", + "EventCode": "0x29", + "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", + "PerPkg": "1", + "PublicDescription": "FlowQ Generated Prefetch : Count cases where= FlowQ causes spawn of Prefetch to iMC/SMI3 target", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : WB on BL", + "EventCode": "0x5b", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : WB on BL : Number of times= a VN0 credit was used on the DRS message channel. In order for a request = to be transferred across UPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN0.= VNA is a shared pool used to achieve high performance. The VN0 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN0 if= they fail. This counts the number of times a VN0 credit was used. Note t= hat a single VN0 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN0 will only count a single credit ev= en though it may use multiple buffers. : Data Response (WB) messages on BL.= WB is generally used to transmit data with coherency. For example, remot= e reads and writes, or cache to cache transfers will transmit their data us= ing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : NCB on BL", + "EventCode": "0x5b", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : NCB on BL : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : REQ on AD", + "EventCode": "0x5b", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : REQ on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : RSP on AD", + "EventCode": "0x5b", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : RSP on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : SNP on AD", + "EventCode": "0x5b", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : SNP on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : RSP on BL", + "EventCode": "0x5b", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : RSP on BL : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : WB on BL", + "EventCode": "0x5d", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : WB on BL : Number of Cycles= there were no VN0 Credits : Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : NCB on BL", + "EventCode": "0x5d", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : NCB on BL : Number of Cycle= s there were no VN0 Credits : Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, no= n-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : REQ on AD", + "EventCode": "0x5d", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : REQ on AD : Number of Cycle= s there were no VN0 Credits : Home (REQ) messages on AD. REQ is generally = used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : RSP on AD", + "EventCode": "0x5d", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : RSP on AD : Number of Cycle= s there were no VN0 Credits : Response (RSP) messages on AD. RSP packets a= re used to transmit a variety of protocol flits including grants and comple= tions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : SNP on AD", + "EventCode": "0x5d", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : SNP on AD : Number of Cycle= s there were no VN0 Credits : Snoops (SNP) messages on AD. SNP is used for= outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : RSP on BL", + "EventCode": "0x5d", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : RSP on BL : Number of Cycle= s there were no VN0 Credits : Response (RSP) messages on BL. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : WB on BL", + "EventCode": "0x5c", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : WB on BL : Number of times= a VN1 credit was used on the WB message channel. In order for a request t= o be transferred across QPI, it must be guaranteed to have a flit buffer on= the remote socket to sink into. There are two credit pools, VNA and VN1. = VNA is a shared pool used to achieve high performance. The VN1 pool has r= eserved entries for each message class and is used to prevent deadlock. Re= quests first attempt to acquire a VNA credit, and then fall back to VN1 if = they fail. This counts the number of times a VN1 credit was used. Note th= at a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that = case uses 9 credits. A transfer on VN1 will only count a single credit eve= n though it may use multiple buffers. : Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote= reads and writes, or cache to cache transfers will transmit their data usi= ng WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : NCB on BL", + "EventCode": "0x5c", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : NCB on BL : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Non-Coherent Broadcast (NCB) messa= ges on BL. NCB is generally used to transmit data without coherency. For = example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : REQ on AD", + "EventCode": "0x5c", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : REQ on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Home (REQ) messages on AD. REQ is= generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : RSP on AD", + "EventCode": "0x5c", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : RSP on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Response (RSP) messages on AD. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : SNP on AD", + "EventCode": "0x5c", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : SNP on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Snoops (SNP) messages on AD. SNP = is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : RSP on BL", + "EventCode": "0x5c", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : RSP on BL : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Response (RSP) messages on BL. RSP= packets are used to transmit a variety of protocol flits including grants = and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : WB on BL", + "EventCode": "0x5e", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : WB on BL : Number of Cycles= there were no VN1 Credits : Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : NCB on BL", + "EventCode": "0x5e", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : NCB on BL : Number of Cycle= s there were no VN1 Credits : Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, no= n-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : REQ on AD", + "EventCode": "0x5e", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : REQ on AD : Number of Cycle= s there were no VN1 Credits : Home (REQ) messages on AD. REQ is generally = used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : RSP on AD", + "EventCode": "0x5e", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : RSP on AD : Number of Cycle= s there were no VN1 Credits : Response (RSP) messages on AD. RSP packets a= re used to transmit a variety of protocol flits including grants and comple= tions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : SNP on AD", + "EventCode": "0x5e", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : SNP on AD : Number of Cycle= s there were no VN1 Credits : Snoops (SNP) messages on AD. SNP is used for= outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : RSP on BL", + "EventCode": "0x5e", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : RSP on BL : Number of Cycle= s there were no VN1 Credits : Response (RSP) messages on BL. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LO= CALDEST_VN0", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST= _VN0", + "PerPkg": "1", + "UMask": "0x82", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LO= CALDEST_VN1", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST= _VN1", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LO= CALDEST_VN0", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST= _VN0", + "PerPkg": "1", + "UMask": "0x81", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LO= CALDEST_VN1", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST= _VN1", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LO= CALDEST_VN0", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST= _VN0", + "PerPkg": "1", + "UMask": "0x84", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LO= CALDEST_VN1", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST= _VN1", + "PerPkg": "1", + "UMask": "0xc0", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1", + "EventCode": "0x7e", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1", + "EventCode": "0x7d", + "EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARB", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.ARB", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message is making arbitration= request", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARRIVED", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.ARRIVED", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message arrived in ingress pi= peline", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.BYPASS", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.BYPASS", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message took bypass path", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.FLITTED", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.FLITTED", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message was slotted into flit= (non bypass)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_ARB", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_ARB", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message lost arbitration", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_OLD", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_OLD", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message was dropped because i= t became too old", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message was dropped because i= t was overwritten by new message while prefetch queue was full", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of allocations into the CRS Egress us= ed to queue up requests destined to the mesh (AD Bouncable)", + "EventCode": "0x47", + "EventName": "UNC_MDF_CRS_TxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "AD Bouncable : Number of allocations into th= e CRS Egress", + "UMask": "0x1", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of allocations into the CRS Egress us= ed to queue up requests destined to the mesh (AD credited)", + "EventCode": "0x47", + "EventName": "UNC_MDF_CRS_TxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "AD credited : Number of allocations into the= CRS Egress", + "UMask": "0x2", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of allocations into the CRS Egress us= ed to queue up requests destined to the mesh (AK)", + "EventCode": "0x47", + "EventName": "UNC_MDF_CRS_TxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "AK : Number of allocations into the CRS Egre= ss", + "UMask": "0x10", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of allocations into the CRS Egress us= ed to queue up requests destined to the mesh (AKC)", + "EventCode": "0x47", + "EventName": "UNC_MDF_CRS_TxR_INSERTS.AKC", + "PerPkg": "1", + "PublicDescription": "AKC : Number of allocations into the CRS Egr= ess", + "UMask": "0x40", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of allocations into the CRS Egress us= ed to queue up requests destined to the mesh (BL Bouncable)", + "EventCode": "0x47", + "EventName": "UNC_MDF_CRS_TxR_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "BL Bouncable : Number of allocations into th= e CRS Egress", + "UMask": "0x4", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of allocations into the CRS Egress us= ed to queue up requests destined to the mesh (BL credited)", + "EventCode": "0x47", + "EventName": "UNC_MDF_CRS_TxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "BL credited : Number of allocations into the= CRS Egress", + "UMask": "0x8", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of allocations into the CRS Egress us= ed to queue up requests destined to the mesh (IV)", + "EventCode": "0x47", + "EventName": "UNC_MDF_CRS_TxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "IV : Number of allocations into the CRS Egre= ss", + "UMask": "0x20", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of cycles incoming messages from the v= ertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AD)", + "EventCode": "0x4B", + "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AD", + "PerPkg": "1", + "PublicDescription": "AD : Number of cycles incoming messages from= the vertical ring that are bounced at the SBO", + "UMask": "0x1", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of cycles incoming messages from the v= ertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AK)", + "EventCode": "0x4B", + "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AK", + "PerPkg": "1", + "PublicDescription": "AK : Number of cycles incoming messages from= the vertical ring that are bounced at the SBO", + "UMask": "0x4", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of cycles incoming messages from the v= ertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AKC)", + "EventCode": "0x4B", + "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AKC", + "PerPkg": "1", + "PublicDescription": "AKC : Number of cycles incoming messages fro= m the vertical ring that are bounced at the SBO", + "UMask": "0x10", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of cycles incoming messages from the v= ertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (BL)", + "EventCode": "0x4B", + "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.BL", + "PerPkg": "1", + "PublicDescription": "BL : Number of cycles incoming messages from= the vertical ring that are bounced at the SBO", + "UMask": "0x2", + "Unit": "MDF" + }, + { + "BriefDescription": "Number of cycles incoming messages from the v= ertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (IV)", + "EventCode": "0x4B", + "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.IV", + "PerPkg": "1", + "PublicDescription": "IV : Number of cycles incoming messages from= the vertical ring that are bounced at the SBO", + "UMask": "0x8", + "Unit": "MDF" + }, + { + "BriefDescription": "Counts the number of cycles when the distress= signals are asserted based on SBO Ingress threshold", + "EventCode": "0x15", + "EventName": "UNC_MDF_FAST_ASSERTED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "AD bnc : Counts the number of cycles when th= e distress signals are asserted based on SBO Ingress threshold", + "UMask": "0x1", + "Unit": "MDF" + }, + { + "BriefDescription": "Counts the number of cycles when the distress= signals are asserted based on SBO Ingress threshold", + "EventCode": "0x15", + "EventName": "UNC_MDF_FAST_ASSERTED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "BL bnc : Counts the number of cycles when th= e distress signals are asserted based on SBO Ingress threshold", + "UMask": "0x2", + "Unit": "MDF" + }, + { + "BriefDescription": "UPI Clockticks", + "EventCode": "0x01", + "EventName": "UNC_UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of UPI LL clock cycles while the even= t is enabled", + "Unit": "UPI" + }, + { + "BriefDescription": "Direct packet attempts : D2C", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", + "PerPkg": "1", + "PublicDescription": "Direct packet attempts : D2C : Counts the nu= mber of DRS packets that we attempted to do direct2core/direct2UPI on. The= re are 4 mutually exclusive filters. Filter [0] can be used to get success= ful spawns, while [1:3] provide the different failure cases. Note that thi= s does not count packets that are not candidates for Direct2Core. The only= candidates for Direct2Core are DRS packets destined for Cbos.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Direct packet attempts : D2K", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K", + "PerPkg": "1", + "PublicDescription": "Direct packet attempts : D2K : Counts the nu= mber of DRS packets that we attempted to do direct2core/direct2UPI on. The= re are 4 mutually exclusive filters. Filter [0] can be used to get success= ful spawns, while [1:3] provide the different failure cases. Note that thi= s does not count packets that are not candidates for Direct2Core. The only= candidates for Direct2Core are DRS packets destined for Cbos.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L1", + "EventCode": "0x21", + "EventName": "UNC_UPI_L1_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L1 : Number of UPI qfclk cycles sp= ent in L1 power mode. L1 is a mode that totally shuts down a UPI link. Us= e edge detect to count the number of instances when the UPI link entered L1= . Link power states are per link and per direction, so for example the Tx = direction could be in one state while Rx was in another. Because L1 totally= shuts down the link, it takes a good amount of time to exit this mode.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "EventCode": "0x16", + "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1", + "EventCode": "0x20", + "EventName": "UNC_UPI_PHY_INIT_CYCLES", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req Nack", + "EventCode": "0x23", + "EventName": "UNC_UPI_POWER_L1_NACK", + "PerPkg": "1", + "PublicDescription": "L1 Req Nack : Counts the number of times a l= ink sends/receives a LinkReqNAck. When the UPI links would like to change = power state, the Tx side initiates a request to the Rx side requesting to c= hange states. This requests can either be accepted or denied. If the Rx s= ide replies with an Ack, the power mode will change. If it replies with NA= ck, no change will take place. This can be filtered based on Rx and Tx. A= n Rx LinkReqNAck refers to receiving an NAck (meaning this agent's Tx origi= nally requested the power change). A Tx LinkReqNAck refers to sending this= command (meaning the peer agent's Tx originally requested the power change= and this agent accepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req (same as L1 Ack).", + "EventCode": "0x22", + "EventName": "UNC_UPI_POWER_L1_REQ", + "PerPkg": "1", + "PublicDescription": "L1 Req (same as L1 Ack). : Counts the number= of times a link sends/receives a LinkReqAck. When the UPI links would lik= e to change power state, the Tx side initiates a request to the Rx side req= uesting to change states. This requests can either be accepted or denied. = If the Rx side replies with an Ack, the power mode will change. If it rep= lies with NAck, no change will take place. This can be filtered based on R= x and Tx. An Rx LinkReqAck refers to receiving an Ack (meaning this agent'= s Tx originally requested the power change). A Tx LinkReqAck refers to sen= ding this command (meaning the peer agent's Tx originally requested the pow= er change and this agent accepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0x25", + "EventName": "UNC_UPI_RxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles s= pent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lane= s, decreasing our bandwidth in order to save power. It increases snoop and= data transfer latencies and decreases overall bandwidth. This mode can be= very useful in NUMA optimized workloads that largely only utilize UPI for = snoops and their responses. Use edge detect to count the number of instanc= es when the UPI link entered L0p. Link power states are per link and per d= irection, so for example the Tx direction could be in one state while Rx wa= s in another.", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0x24", + "EventName": "UNC_UPI_RxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0 : Number of UPI qfclk cycles sp= ent in L0 power mode in the Link Layer. L0 is the default mode which provi= des the highest performance with the most power. Use edge detect to count = the number of instances that the link entered L0. Link power states are pe= r link and per direction, so for example the Tx direction could be in one s= tate while Rx was in another. The phy layer sometimes leaves L0 for train= ing, which will not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.DATA", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.DATA", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.LLCRD", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.LLCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.LLCTRL", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.LLCTRL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.NULL", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.NULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.PROTHDR", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.PROTHDR", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT0", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT1", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT2", + "EventCode": "0x4B", + "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass, Match Opcode : Matches on Receive path of a UPI port.\r\nM= atch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Messag= e Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\= r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: D= ual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control type= s are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match= _en cases.\r\nNote: If Message Class is disabled, we expect opcode to also = be disabled.", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard : Matches on Receive path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard, Match Opcode : Matches on Receive path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 0 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 1 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 2 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "CRC Errors Detected", + "EventCode": "0x0b", + "EventName": "UNC_UPI_RxL_CRC_ERRORS", + "PerPkg": "1", + "PublicDescription": "CRC Errors Detected : Number of CRC errors d= etected in the UPI Agent. Each UPI flit incorporates 8 bits of CRC for err= or detection. This counts the number of flits where the CRC was able to de= tect an error. After an error has been detected, the UPI agent will send a= request to the transmitting socket to resend the flit (as well as any flit= s that came after it).", + "Unit": "UPI" + }, + { + "BriefDescription": "LLR Requests Sent", + "EventCode": "0x08", + "EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT", + "PerPkg": "1", + "PublicDescription": "LLR Requests Sent : Number of LLR Requests w= ere transmitted. This should generally be <=3D the number of CRC errors de= tected. If multiple errors are detected before the Rx side receives a LLC_= REQ_ACK from the Tx side, there is no need to send more LLR_REQ_NACKs..", + "Unit": "UPI" + }, + { + "BriefDescription": "VN0 Credit Consumed", + "EventCode": "0x39", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Consumed : Counts the number of t= imes that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", + "Unit": "UPI" + }, + { + "BriefDescription": "VN1 Credit Consumed", + "EventCode": "0x3a", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Consumed : Counts the number of t= imes that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credit Consumed", + "EventCode": "0x38", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : All Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : All Data : Shows lega= l flit time (hides impact of L0p and L0c).", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Null FLITs received from any slot", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", + "PerPkg": "1", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Data : Shows legal fl= it time (hides impact of L0p and L0c). : Count Data Flits (which consume al= l slots), but how much to count is based on Slot0-2 mask, so count can be 0= -3 depending on which slots are enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Idle", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Idle : Shows legal fl= it time (hides impact of L0p and L0c).", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : LLCRD Not Empty", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : LLCRD Not Empty : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables counting of LLC= RD (with non-zero payload). This only applies to slot 2 since LLCRD is only= allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : LLCTRL", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : LLCTRL : Shows legal = flit time (hides impact of L0p and L0c). : Equivalent to an idle packet. E= nables counting of slot 0 LLCTRL messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : All Non Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : All Non Data : Shows = legal flit time (hides impact of L0p and L0c).", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Emp= ty", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.NULL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot NULL or LLCRD Em= pty : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all= zeros is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dua= l slot. This can apply to slot 0,1, or 2.", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Protocol Header", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Protocol Header : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables count of protoc= ol headers in slot 0,1,2 (depending on slot uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot 0", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot 0 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits d= etermine types of headers to count.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot 1", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot 1 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits d= etermine types of headers to count.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot 2", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot 2 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits d= etermine types of headers to count.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 0", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 0 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 1", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 1 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 2", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 2 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets : Slot 0", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", + "PerPkg": "1", + "PublicDescription": "RxQ Occupancy - All Packets : Slot 0 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets : Slot 1", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", + "PerPkg": "1", + "PublicDescription": "RxQ Occupancy - All Packets : Slot 1 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets : Slot 2", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", + "PerPkg": "1", + "PublicDescription": "RxQ Occupancy - All Packets : Slot 2 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "EventCode": "0x2a", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0x27", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles s= pent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lane= s, decreasing our bandwidth in order to save power. It increases snoop and= data transfer latencies and decreases overall bandwidth. This mode can be= very useful in NUMA optimized workloads that largely only utilize UPI for = snoops and their responses. Use edge detect to count the number of instanc= es when the UPI link entered L0p. Link power states are per link and per d= irection, so for example the Tx direction could be in one state while Rx wa= s in another.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "EventCode": "0x28", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "EventCode": "0x29", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0x26", + "EventName": "UNC_UPI_TxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0 : Number of UPI qfclk cycles sp= ent in L0 power mode in the Link Layer. L0 is the default mode which provi= des the highest performance with the most power. Use edge detect to count = the number of instances that the link entered L0. Link power states are pe= r link and per direction, so for example the Tx direction could be in one s= tate while Rx was in another. The phy layer sometimes leaves L0 for train= ing, which will not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.DATA", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.DATA", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.LLCRD", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.LLCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.LLCTRL", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.LLCTRL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.NULL", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.NULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.PROTHDR", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.PROTHDR", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT0", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT1", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT2", + "EventCode": "0x4A", + "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass, Match Opcode : Matches on Transmit path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard : Matches on Transmit path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard, Match Opcode : Matches on Transmit path of a UPI port.\= r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Me= ssage Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Ena= ble\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\n= Q: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control = types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode m= atch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to a= lso be disabled.", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Bypassed", + "EventCode": "0x41", + "EventName": "UNC_UPI_TxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Bypassed : Counts the number = of times that an incoming flit was able to bypass the Tx flit buffer and pa= ss directly out the UPI Link. Generally, when data is transmitted across UP= I, it will bypass the TxQ and pass directly to the link. However, the TxQ = will be used with L0p and when LLR occurs, increasing latency to transfer o= ut to the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : All Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All Data : Counts number = of data flits across this UPI link.", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : All LLCRD Not Empty", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_LLCRD", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All Data : Shows legal fl= it time (hides impact of L0p and L0c).", + "UMask": "0x17", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : All LLCTRL", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_LLCTRL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All LLCTRL : Shows legal = flit time (hides impact of L0p and L0c).", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "All Null Flits", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", + "PerPkg": "1", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : All Protocol Header", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_PROTHDR", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All ProtDDR : Shows legal= flit time (hides impact of L0p and L0c).", + "UMask": "0x87", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Data : Shows legal flit t= ime (hides impact of L0p and L0c). : Count Data Flits (which consume all sl= ots), but how much to count is based on Slot0-2 mask, so count can be 0-3 d= epending on which slots are enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Idle", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Idle : Shows legal flit t= ime (hides impact of L0p and L0c).", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : LLCRD Not Empty", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : LLCRD Not Empty : Shows l= egal flit time (hides impact of L0p and L0c). : Enables counting of LLCRD (= with non-zero payload). This only applies to slot 2 since LLCRD is only all= owed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : LLCTRL", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : LLCTRL : Shows legal flit= time (hides impact of L0p and L0c). : Equivalent to an idle packet. Enabl= es counting of slot 0 LLCTRL messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : All Non Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All Non Data : Shows lega= l flit time (hides impact of L0p and L0c).", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.NULL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty = : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all zer= os is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dual sl= ot. This can apply to slot 0,1, or 2.", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Protocol Header", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Protocol Header : Shows l= egal flit time (hides impact of L0p and L0c). : Enables count of protocol h= eaders in slot 0,1,2 (depending on slot uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 0", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 0 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits deter= mine types of headers to count.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 1", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 1 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits deter= mine types of headers to count.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 2", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 2 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits deter= mine types of headers to count.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Allocations", + "EventCode": "0x40", + "EventName": "UNC_UPI_TxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Allocations : Number of alloc= ations into the UPI Tx Flit Buffer. Generally, when data is transmitted ac= ross UPI, it will bypass the TxQ and pass directly to the link. However, t= he TxQ will be used with L0p and when LLR occurs, increasing latency to tra= nsfer out to the link. This event can be used in conjunction with the Flit= Buffer Occupancy event in order to calculate the average flit buffer lifet= ime.", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Occupancy", + "EventCode": "0x42", + "EventName": "UNC_UPI_TxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Occupancy : Accumulates the n= umber of flits in the TxQ. Generally, when data is transmitted across UPI,= it will bypass the TxQ and pass directly to the link. However, the TxQ wi= ll be used with L0p and when LLR occurs, increasing latency to transfer out= to the link. This can be used with the cycles not empty event to track ave= rage occupancy, or the allocations event to track average lifetime in the T= xQ.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "EventCode": "0x45", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credits Pending Return - Occupancy", + "EventCode": "0x44", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "VNA Credits Pending Return - Occupancy : Num= ber of VNA credits in the Rx side that are waitng to be returned back acros= s the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Message Received : Doorbell", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : Interrupt", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Message Received : Interrupt : Interrupts", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : IPI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : IPI : Inter Processor Int= errupts", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : MSI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : MSI : Message Signaled In= terrupts - interrupts sent by devices (including PCIe via IOxAPIC) (Socket = Mode only)", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : VLW", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : VLW : Virtual Logical Wir= e (legacy) message were received from Uncore.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS", + "EventCode": "0x4d", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "EventCode": "0x4e", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "EventCode": "0x4f", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "EventCode": "0x4f", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "Cycles PHOLD Assert to Ack : Assert to ACK := PHOLD cycles.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "EventCode": "0x4c", + "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", + "EventCode": "0x4c", + "EventName": "UNC_U_RACU_DRNG.RDRAND", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", + "EventCode": "0x4c", + "EventName": "UNC_U_RACU_DRNG.RDSEED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "PublicDescription": "RACU Request : Number outstanding register r= equests within message channel tracker", + "Unit": "UBOX" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json b= /tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json new file mode 100644 index 000000000000..8b5f54fed103 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json @@ -0,0 +1,3651 @@ +[ + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", + "PerPkg": "1", + "UMask": "0x22", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", + "PerPkg": "1", + "UMask": "0x23", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", + "PerPkg": "1", + "UMask": "0x25", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", + "PerPkg": "1", + "UMask": "0x26", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", + "PerPkg": "1", + "UMask": "0x27", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART0_FREERUN", + "PerPkg": "1", + "UMask": "0x30", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART1_FREERUN", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART2_FREERUN", + "PerPkg": "1", + "UMask": "0x32", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART3_FREERUN", + "PerPkg": "1", + "UMask": "0x33", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART4_FREERUN", + "PerPkg": "1", + "UMask": "0x34", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART5_FREERUN", + "PerPkg": "1", + "UMask": "0x35", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART6_FREERUN", + "PerPkg": "1", + "UMask": "0x36", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_OUT.PART7_FREERUN", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "IIO Clockticks", + "EventCode": "0x01", + "EventName": "UNC_IIO_CLOCKTICKS", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "Number of IIO clock cycles while the event i= s enabled", + "Unit": "IIO" + }, + { + "BriefDescription": "Free running counter that increments for IIO = clocktick", + "EventCode": "0xff", + "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xff", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0-7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7001004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", + "UMask": "0x7002004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", + "UMask": "0x7004004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", + "UMask": "0x7008004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", + "UMask": "0x7010004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", + "UMask": "0x7020004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", + "UMask": "0x7040004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", + "UMask": "0x7080004", + "Unit": "IIO" + }, + { + "BriefDescription": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "FCMask": "0x07", + "PerPkg": "1", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 0", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x16 card plugged in to stack, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7000001", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 1", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x4 card is plugged in to slot 1", + "UMask": "0x7000002", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 2", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x8 card plugged in to Lane 2/3, Or x4 card i= s plugged in to slot 1", + "UMask": "0x7000004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 3", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x4 card is plugged in to slot 3", + "UMask": "0x7000008", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 4", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x16 card plugged in to stack, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7000010", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 5", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x4 card is plugged in to slot 1", + "UMask": "0x7000020", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 6", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x8 card plugged in to Lane 2/3, Or x4 card i= s plugged in to slot 1", + "UMask": "0x7000040", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy : Part 7", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "x4 card is plugged in to slot 3", + "UMask": "0x7000080", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part0-7", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.ALL_PARTS", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00ff", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part0", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's MMIO space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", + "UMask": "0x7001004", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part1", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's MMIO space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 1", + "UMask": "0x7002004", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part2", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's MMIO space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x7004004", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part3", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's MMIO space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 3", + "UMask": "0x7008004", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Cards MMIO space : Number of DWs (4 bytes) requested by the main die. In= cludes all requests initiated by the main die, including reads and writes. = : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 ca= rd is plugged in to slot 0", + "UMask": "0x7010004", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Cards MMIO space : Number of DWs (4 bytes) requested by the main die. In= cludes all requests initiated by the main die, including reads and writes. = : x4 card is plugged in to slot 1", + "UMask": "0x7020004", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Cards MMIO space : Number of DWs (4 bytes) requested by the main die. In= cludes all requests initiated by the main die, including reads and writes. = : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x7040004", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Cards MMIO space : Number of DWs (4 bytes) requested by the main die. In= cludes all requests initiated by the main die, including reads and writes. = : x4 card is plugged in to slot 3", + "UMask": "0x7080004", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part0-7 = by the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.ALL_PARTS", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00ff", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0100", + "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0200", + "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part0 by= the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part1 by= the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part2 by= the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part3 by= the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to stack, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7001008", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x7002008", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 1", + "UMask": "0x7004008", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x7008008", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to stack, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7010008", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x7020008", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 1", + "UMask": "0x7040008", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x7080008", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to stack, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7001002", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x7002002", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 1", + "UMask": "0x7004002", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x7008002", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to stack, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7010002", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x7020002", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 1", + "UMask": "0x7040002", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x7080002", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.ALL_PARTS", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xff", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by IIO Part0-7 = to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00ff", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by IIO Part0 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is = plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by IIO Part1 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by IIO Part2 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by IIO Part3 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is = plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made by IIO Part0-7 = to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00ff", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made by IIO Part0 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is pl= ugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made by IIO Part1 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made by IIO Part2 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made by IIO Part3 to= Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is pl= ugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to stack, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to stack, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Passing data = to be written", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests : Passing data= to be written : How often different queues (e.g. channel / fc) ask to send= request into pipeline : Only for posted requests", + "UMask": "0x70ff020", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing final= read or write of line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests : Issuing fina= l read or write of line : How often different queues (e.g. channel / fc) as= k to send request into pipeline", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Processing re= sponse from IOMMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests : Processing r= esponse from IOMMU : How often different queues (e.g. channel / fc) ask to = send request into pipeline", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing to IO= MMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests : Issuing to I= OMMU : How often different queues (e.g. channel / fc) ask to send request i= nto pipeline", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Request Owner= ship", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests : Request Owne= rship : How often different queues (e.g. channel / fc) ask to send request = into pipeline : Only for posted requests", + "UMask": "0x70ff004", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Writing line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests : Writing line= : How often different queues (e.g. channel / fc) ask to send request into = pipeline : Only for posted requests", + "UMask": "0x70ff010", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Passi= ng data to be written", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests granted : Pass= ing data to be written : How often different queues (e.g. channel / fc) are= allowed to send request into pipeline : Only for posted requests", + "UMask": "0x70ff020", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng final read or write of line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing final read or write of line : How often different queues (e.g. channel = / fc) are allowed to send request into pipeline", + "UMask": "0x70ff008", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Proce= ssing response from IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests granted : Proc= essing response from IOMMU : How often different queues (e.g. channel / fc)= are allowed to send request into pipeline", + "UMask": "0x70ff002", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng to IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing to IOMMU : How often different queues (e.g. channel / fc) are allowed t= o send request into pipeline", + "UMask": "0x70ff001", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Reque= st Ownership", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests granted : Requ= est Ownership : How often different queues (e.g. channel / fc) are allowed = to send request into pipeline : Only for posted requests", + "UMask": "0x70ff004", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Writi= ng line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Incoming arbitration requests granted : Writ= ing line : How often different queues (e.g. channel / fc) are allowed to se= nd request into pipeline : Only for posted requests", + "UMask": "0x70ff010", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache hits", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache lookups", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB lookups first", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "IOTLB Fills (same as IOTLB miss)", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.MISSES", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "IOTLB Fills (same as IOTLB miss) : When a tr= ansaction misses IOTLB, it does a page walk to look up memory and bring in = the relevant page translation. Counts when this page translation is written= to IOTLB.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOMMU memory access", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", + "PerPkg": "1", + "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", + "UMask": "0xc0", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 2M page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWT Hit to a 256T page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_256T_HITS", + "PerPkg": "1", + "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 4K page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 1G page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache fill", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache fill : When a transaction m= isses SLPWC, it does a page walk to look up memory and bring in the relevan= t page translation. When this page translation is written to SLPWC, ObsPwcF= illValid_nnnH is asserted.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache lookup", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache lookup : Counts each time a= transaction looks up second level page walk cache.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 2M page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.SLPWC_1G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 2M page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.SLPWC_256T_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 1G page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.SLPWC_512G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Global IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.PWT_OCCUPANCY_MSB", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = : Asserted if all bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "AND Mask/match for debug bus : PCIE bus : As= serted if all bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus := Asserted if any bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "OR Mask/match for debug bus : PCIE bus : Ass= erted if any bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests PCIe makes of the main die : = All", + "EventCode": "0x85", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0FFF", + "PublicDescription": "Number requests PCIe makes of the main die := All : Counts full PCIe requests before they're broken into a series of cac= he-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_OF_CPU.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Abort= ", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Confi= ned P2P", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Local= P2P", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Multi= -cast", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Memor= y", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : MsgB", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Remot= e P2P", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Ubox", + "EventCode": "0x8e", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "ITC address map 1", + "EventCode": "0x8f", + "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound cacheline requests issued : 64B requ= ests issued to device", + "EventCode": "0xd0", + "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Outbound cacheline requests issued : 64B req= uests issued to device : Each outbound cacheline granular request may need = to make multiple passes through the pipeline. Each time a cacheline comple= tes all its passes it advances line", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound TLP (transaction layer packet) reque= sts issued : To device", + "EventCode": "0xd1", + "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Outbound TLP (transaction layer packet) requ= ests issued : To device : Each time an outbound completes all its passes it= advances the pointer", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PWT occupancy. Does not include 9th bit of o= ccupancy (will undercount if PWT is greater than 255 per cycle).", + "EventCode": "0x42", + "EventName": "UNC_IIO_PWT_OCCUPANCY", + "PerPkg": "1", + "PortMask": "0x0000", + "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "Request Ownership : PCIe Request complete", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Request Ownership : PCIe Request complete : = Only for posted requests : Each PCIe request is broken down into a series o= f cacheline granular requests and each cacheline size request may need to m= ake multiple passes through the pipeline (e.g. for posted interrupts or mul= ti-cast). Each time a single PCIe request completes all its cacheline gra= nular requests, it advances pointer.", + "UMask": "0x70ff020", + "Unit": "IIO" + }, + { + "BriefDescription": "Request Ownership : Writing line", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Request Ownership : Writing line : Only for = posted requests : Only for posted requests", + "UMask": "0x70ff008", + "Unit": "IIO" + }, + { + "BriefDescription": "Request Ownership : Issuing final read or wri= te of line", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Request Ownership : Issuing final read or wr= ite of line : Only for posted requests", + "UMask": "0x70ff004", + "Unit": "IIO" + }, + { + "BriefDescription": "Request Ownership : Passing data to be writte= n", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Request Ownership : Passing data to be writt= en : Only for posted requests : Only for posted requests", + "UMask": "0x70ff010", + "Unit": "IIO" + }, + { + "BriefDescription": "Processing response from IOMMU : Passing data= to be written", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Processing response from IOMMU : Passing dat= a to be written : Only for posted requests", + "UMask": "0x70ff008", + "Unit": "IIO" + }, + { + "BriefDescription": "Processing response from IOMMU : Issuing fina= l read or write of line", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "UMask": "0x70ff002", + "Unit": "IIO" + }, + { + "BriefDescription": "Processing response from IOMMU : Request Owne= rship", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Processing response from IOMMU : Request Own= ership : Only for posted requests", + "UMask": "0x70ff001", + "Unit": "IIO" + }, + { + "BriefDescription": "Processing response from IOMMU : Writing line= ", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "Processing response from IOMMU : Writing lin= e : Only for posted requests", + "UMask": "0x70ff004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Passing data t= o be written", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "PCIe Request - pass complete : Passing data = to be written : Each PCIe request is broken down into a series of cacheline= granular requests and each cacheline size request may need to make multipl= e passes through the pipeline (e.g. for posted interrupts or multi-cast). = Each time a cacheline completes a single pass (e.g. posts a write to singl= e multi-cast target) it advances state : Only for posted requests", + "UMask": "0x70ff020", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Issuing final = read or write of line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "PCIe Request - pass complete : Issuing final= read or write of line : Each PCIe request is broken down into a series of = cacheline granular requests and each cacheline size request may need to mak= e multiple passes through the pipeline (e.g. for posted interrupts or multi= -cast). Each time a cacheline completes a single pass (e.g. posts a write= to single multi-cast target) it advances state", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Request Owners= hip", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "PCIe Request - pass complete : Request Owner= ship : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes a single pass (e.g. posts a write to single multi-c= ast target) it advances state : Only for posted requests", + "UMask": "0x70ff004", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Writing line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x00FF", + "PublicDescription": "PCIe Request - pass complete : Writing line = : Each PCIe request is broken down into a series of cacheline granular requ= ests and each cacheline size request may need to make multiple passes throu= gh the pipeline (e.g. for posted interrupts or multi-cast). Each time a c= acheline completes a single pass (e.g. posts a write to single multi-cast t= arget) it advances state : Only for posted requests", + "UMask": "0x70ff010", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part0", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged = in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part1", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part2", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part3", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x16 card plug= ged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged i= n to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x4 card is pl= ugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x8 card plugg= ed in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x4 card is pl= ugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part0 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in= to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part1 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part2 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part3 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x16 card plugge= d in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in = to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x4 card is plug= ged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x4 card is plug= ged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane= 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x7001002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 1", + "UMask": "0x7002002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2= ", + "UMask": "0x7004002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 3", + "UMask": "0x7008002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane= 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x7010002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 5", + "UMask": "0x7020002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6= ", + "UMask": "0x7040002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 7", + "UMask": "0x7080002", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lan= e 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot = 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lan= e 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot = 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in = to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in = to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to= slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to= slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in t= o slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in= to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in t= o slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "M2P Clockticks", + "EventCode": "0x01", + "EventName": "UNC_M2P_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of M2P clock cycles while the event i= s enabled", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2P_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCS message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credit fo= r transfer through CMS Port 0s to the IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the DRS message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCB message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCS me= ssage class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credit for transfer through CMS Port 0s to the IIO for the NCS me= ssage class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent0", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent1", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent2", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent0", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent1", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent2", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent3", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent4", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent5", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : All", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : All", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : All", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - DRS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - NCB", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - NCS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - DRS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_DRS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - NCB", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - NCS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - DRS", + "EventCode": "0x49", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - NCB", + "EventCode": "0x49", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - NCS", + "EventCode": "0x49", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 = - NCB", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 = - NCS", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 = - NCB", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 = - NCS", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 = - NCB", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 = - NCS", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent0", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent1", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent2", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent0", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent1", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent2", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - D= RS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - N= CB", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - N= CS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - D= RS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_DRS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - N= CB", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - N= CS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - D= RS", + "EventCode": "0x43", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - N= CB", + "EventCode": "0x43", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - N= CS", + "EventCode": "0x43", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - DRS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - NCB", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - NCS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - DRS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_DRS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - NCB", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - NCS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - DRS", + "EventCode": "0x4d", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - NCB", + "EventCode": "0x4d", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - NCS", + "EventCode": "0x4d", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "UNC_M2P_TxC_CREDITS.PMM", + "EventCode": "0x2d", + "EventName": "UNC_M2P_TxC_CREDITS.PMM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ", + "EventCode": "0x2d", + "EventName": "UNC_M2P_TxC_CREDITS.PRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_0", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_1", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_0", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_1", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x8", + "Unit": "M2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.js= on b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json index b77fd0f7ab50..225333561295 100644 --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json @@ -1,427 +1,3254 @@ [ + { + "BriefDescription": "Cycles - at UCLK", + "EventCode": "0x01", + "EventName": "UNC_M2HBM_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2HBM_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Cycles when direct to core mode (which bypass= es the CHA) was disabled", + "EventCode": "0x17", + "EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Cycles when direct to core mode, which bypass= es the CHA, was disabled : Non Cisgress", + "EventCode": "0x17", + "EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_DIRSTATE.NON_CISGRES= S", + "PerPkg": "1", + "PublicDescription": "Counts the number of time non cisgress D2C w= as not honoured by egress due to directory state constraints", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Counts the time when FM didn't do d2c for fil= l reads (cross tile case)", + "EventCode": "0x4a", + "EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action were overridden", + "EventCode": "0x18", + "EventName": "UNC_M2HBM_DIRECT2CORE_TXN_OVERRIDE", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action was overridden : Cisgress", + "EventCode": "0x18", + "EventName": "UNC_M2HBM_DIRECT2CORE_TXN_OVERRIDE.CISGRESS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Number of reads in which direct to Intel UPI = transactions were overridden", + "EventCode": "0x1b", + "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_CREDITS", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Cycles when direct to Intel UPI was disabled", + "EventCode": "0x1a", + "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Cycles when Direct2UPI was Disabled : Cisgres= s D2U Ignored", + "EventCode": "0x1A", + "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.CISGRESS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts cisgress d2K that was not honored due= to directory constraints", + "UMask": "0x4", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Cycles when Direct2UPI was Disabled : Egress = Ignored D2U", + "EventCode": "0x1A", + "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.EGRESS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of time D2K was not honour= ed by egress due to directory state constraints", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Cycles when Direct2UPI was Disabled : Non Cis= gress D2U Ignored", + "EventCode": "0x1A", + "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.NON_CISGRESS= ", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts non cisgress d2K that was not honored= due to directory constraints", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Number of reads that a message sent direct2 I= ntel UPI was overridden", + "EventCode": "0x1c", + "EventName": "UNC_M2HBM_DIRECT2UPI_TXN_OVERRIDE", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Number of times a direct to UPI transaction w= as overridden.", + "EventCode": "0x1c", + "EventName": "UNC_M2HBM_DIRECT2UPI_TXN_OVERRIDE.CISGRESS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in A State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in I State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in L State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in S State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in A State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in I State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in L State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in S State", + "EventCode": "0x1d", + "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (any= state found)", + "EventCode": "0x20", + "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with any directory to non persistent memory", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (cac= heline found in A state)", + "EventCode": "0x20", + "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_A", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with directory A to non persistent memory", + "UMask": "0x8", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in I state)", + "EventCode": "0x20", + "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_I", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with directory I to non persistent memory", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in S state)", + "EventCode": "0x20", + "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of hit data returns to egr= ess with directory S to non persistent memory", + "UMask": "0x4", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in A State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in I State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in L State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in S State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in A State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in I State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in L State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in S State", + "EventCode": "0x1e", + "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to I", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A2I", + "PerPkg": "1", + "UMask": "0x320", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to S", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A2S", + "PerPkg": "1", + "UMask": "0x340", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from/= to Any state", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.ANY", + "PerPkg": "1", + "UMask": "0x301", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_I_HIT_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from A to I to non persistent memory", + "UMask": "0x120", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_I_MISS_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from A to I to non persistent memory", + "UMask": "0x220", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_S_HIT_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from A to S to non persistent memory", + "UMask": "0x140", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_S_MISS_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from A to S to non persistent memory", + "UMask": "0x240", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.HIT_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts any 1lm or 2lm hit data return that w= ould result in directory update to non persistent memory", + "UMask": "0x101", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to A", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I2A", + "PerPkg": "1", + "UMask": "0x304", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to S", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I2S", + "PerPkg": "1", + "UMask": "0x302", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_A_HIT_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from I to A to non persistent memory", + "UMask": "0x104", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_A_MISS_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from I to A to non persistent memory", + "UMask": "0x204", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_S_HIT_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from I to S to non persistent memory", + "UMask": "0x102", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_S_MISS_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 2lm miss data returns that would re= sult in directory update from I to S to non persistent memory", + "UMask": "0x202", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.MISS_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts any 2lm miss data return that would r= esult in directory update to non persistent memory", + "UMask": "0x201", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to A", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S2A", + "PerPkg": "1", + "UMask": "0x310", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to I", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S2I", + "PerPkg": "1", + "UMask": "0x308", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_A_HIT_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from S to A to non persistent memory", + "UMask": "0x110", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_A_MISS_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from S to A to non persistent memory", + "UMask": "0x210", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_I_HIT_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 1lm or 2lm hit data returns that wou= ld result in directory update from S to I to non persistent memory", + "UMask": "0x108", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates", + "EventCode": "0x21", + "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_I_MISS_NON_PMM", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts 2lm miss data returns that would res= ult in directory update from S to I to non persistent memory", + "UMask": "0x208", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count distress signalled on AkAd cmp message", + "EventCode": "0x67", + "EventName": "UNC_M2HBM_DISTRESS.AD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count distress signalled on any packet type", + "EventCode": "0x67", + "EventName": "UNC_M2HBM_DISTRESS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count distress signalled on Bl Cmp message", + "EventCode": "0x67", + "EventName": "UNC_M2HBM_DISTRESS.BL_CMP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count distress signalled on NM fill write mes= sage", + "EventCode": "0x67", + "EventName": "UNC_M2HBM_DISTRESS.CROSSTILE_NMWR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count distress signalled on D2Cha message", + "EventCode": "0x67", + "EventName": "UNC_M2HBM_DISTRESS.D2CHA", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count distress signalled on D2c message", + "EventCode": "0x67", + "EventName": "UNC_M2HBM_DISTRESS.D2CORE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count distress signalled on D2k message", + "EventCode": "0x67", + "EventName": "UNC_M2HBM_DISTRESS.D2UPI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_M2HBM_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x80000004", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_M2HBM_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x80000001", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Count when Starve Glocab counter is at 7", + "EventCode": "0x44", + "EventName": "UNC_M2HBM_IGR_STARVE_WINNER.MASK7", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x80", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Reads to iMC issued", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.ALL", + "PerPkg": "1", + "UMask": "0x304", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH0.ALL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH0.ALL", + "PerPkg": "1", + "UMask": "0x104", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH0.NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH0.NORMAL", + "PerPkg": "1", + "UMask": "0x101", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH0_ALL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH0_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x104", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH0_FROM_TGR", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH0_FROM_TGR", + "PerPkg": "1", + "UMask": "0x140", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Critical Priority - Ch0", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH0_ISOCH", + "PerPkg": "1", + "UMask": "0x102", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH0_NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH0_NORMAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x101", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.ALL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH1.ALL", + "PerPkg": "1", + "UMask": "0x204", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH1.NORMAL", + "PerPkg": "1", + "UMask": "0x201", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH1_ALL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH1_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x204", + "Unit": "M2HBM" + }, + { + "BriefDescription": "From TGR - Ch1", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH1_FROM_TGR", + "PerPkg": "1", + "UMask": "0x240", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Critical Priority - Ch1", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH1_ISOCH", + "PerPkg": "1", + "UMask": "0x202", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.CH1_NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.CH1_NORMAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x201", + "Unit": "M2HBM" + }, + { + "BriefDescription": "From TGR - All Channels", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.FROM_TGR", + "PerPkg": "1", + "UMask": "0x340", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Critical Priority - All Channels", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.ISOCH", + "PerPkg": "1", + "UMask": "0x302", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_READS.NORMAL", + "EventCode": "0x24", + "EventName": "UNC_M2HBM_IMC_READS.NORMAL", + "PerPkg": "1", + "UMask": "0x301", + "Unit": "M2HBM" + }, + { + "BriefDescription": "All Writes - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.ALL", + "PerPkg": "1", + "UMask": "0x1810", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.ALL", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0.ALL", + "PerPkg": "1", + "UMask": "0x810", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.FULL", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0.FULL", + "PerPkg": "1", + "UMask": "0x801", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.PARTIAL", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0.PARTIAL", + "PerPkg": "1", + "UMask": "0x802", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_ALL", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x810", + "Unit": "M2HBM" + }, + { + "BriefDescription": "From TGR - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_FROM_TGR", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_FULL", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_FULL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x801", + "Unit": "M2HBM" + }, + { + "BriefDescription": "ISOCH Full Line - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x804", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Non-Inclusive - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_NI", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Non-Inclusive Miss - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_NI_MISS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x802", + "Unit": "M2HBM" + }, + { + "BriefDescription": "ISOCH Partial - Ch0", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x808", + "Unit": "M2HBM" + }, + { + "BriefDescription": "All Writes - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1.ALL", + "PerPkg": "1", + "UMask": "0x1010", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Full Line Non-ISOCH - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1.FULL", + "PerPkg": "1", + "UMask": "0x1001", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Partial Non-ISOCH - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1.PARTIAL", + "PerPkg": "1", + "UMask": "0x1002", + "Unit": "M2HBM" + }, + { + "BriefDescription": "All Writes - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_ALL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x1010", + "Unit": "M2HBM" + }, + { + "BriefDescription": "From TGR - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_FROM_TGR", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Full Line Non-ISOCH - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_FULL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x1001", + "Unit": "M2HBM" + }, + { + "BriefDescription": "ISOCH Full Line - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x1004", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Non-Inclusive - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_NI", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Non-Inclusive Miss - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_NI_MISS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Partial Non-ISOCH - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_PARTIAL", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x1002", + "Unit": "M2HBM" + }, + { + "BriefDescription": "ISOCH Partial - Ch1", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.CH1_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x1008", + "Unit": "M2HBM" + }, + { + "BriefDescription": "From TGR - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.FROM_TGR", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Full Non-ISOCH - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.FULL", + "PerPkg": "1", + "UMask": "0x1801", + "Unit": "M2HBM" + }, + { + "BriefDescription": "ISOCH Full Line - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x1804", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Non-Inclusive - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.NI", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Non-Inclusive Miss - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.NI_MISS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Partial Non-ISOCH - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.PARTIAL", + "PerPkg": "1", + "UMask": "0x1802", + "Unit": "M2HBM" + }, + { + "BriefDescription": "ISOCH Partial - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2HBM_IMC_WRITES.PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x1808", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_PREFCAM_CIS_DROPS", + "EventCode": "0x5c", + "EventName": "UNC_M2HBM_PREFCAM_CIS_DROPS", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH0_UPI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH1_UPI", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Data Prefetches Dropped : UPI - All Channels", + "EventCode": "0x58", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "M2HBM" + }, + { + "BriefDescription": ": UPI - All Channels", + "EventCode": "0x5d", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_MERGE.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "M2HBM" + }, + { + "BriefDescription": ": XPT - All Channels", + "EventCode": "0x5d", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_MERGE.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches", + "EventCode": "0x5e", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.RD_MERGED", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches", + "EventCode": "0x5e", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.WR_MERGED", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches", + "EventCode": "0x5e", + "EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.WR_SQUASHED", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0", + "EventCode": "0x56", + "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH0_UPI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", + "EventCode": "0x56", + "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1", + "EventCode": "0x56", + "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH1_UPI", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", + "EventCode": "0x56", + "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels", + "EventCode": "0x56", + "EventName": "UNC_M2HBM_PREFCAM_INSERTS.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", + "EventCode": "0x56", + "EventName": "UNC_M2HBM_PREFCAM_INSERTS.XPT_ALLCH", + "PerPkg": "1", + "PublicDescription": "Prefetch CAM Inserts : XPT -All Channels", + "UMask": "0x5", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : All Channels", + "EventCode": "0x54", + "EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.ALLCH", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 0", + "EventCode": "0x54", + "EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 1", + "EventCode": "0x54", + "EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "All Channels", + "EventCode": "0x5f", + "EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.ALLCH", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2HBM" + }, + { + "BriefDescription": ": Channel 0", + "EventCode": "0x5f", + "EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": ": Channel 1", + "EventCode": "0x5f", + "EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "EventCode": "0x62", + "EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.CIS", + "EventCode": "0x62", + "EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.CIS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.SQUASHED", + "EventCode": "0x62", + "EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.SQUASHED", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_OCCUPANCY", + "EventCode": "0x60", + "EventName": "UNC_M2HBM_PREFCAM_RxC_OCCUPANCY", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "Unit": "M2HBM" + }, + { + "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS)= Allocations", + "EventCode": "0x02", + "EventName": "UNC_M2HBM_RxC_AD.INSERTS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS)= Allocations", + "EventCode": "0x02", + "EventName": "UNC_M2HBM_RxC_AD_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x03", + "EventName": "UNC_M2HBM_RxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Ingress (from CMS) : BL Ingress (from CMS)= Allocations", + "EventCode": "0x04", + "EventName": "UNC_M2HBM_RxC_BL.INSERTS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts anytime a BL packet is added to Ingre= ss", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Ingress (from CMS) : BL Ingress (from CMS)= Allocations", + "EventCode": "0x04", + "EventName": "UNC_M2HBM_RxC_BL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts anytime a BL packet is added to Ingre= ss", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Ingress (from CMS) Occupancy", + "EventCode": "0x05", + "EventName": "UNC_M2HBM_RxC_BL_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Number AD Ingress Credits", + "EventCode": "0x2e", + "EventName": "UNC_M2HBM_TGR_AD_CREDITS", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Number BL Ingress Credits", + "EventCode": "0x2f", + "EventName": "UNC_M2HBM_TGR_BL_CREDITS", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Tracker Inserts : Channel 0", + "EventCode": "0x32", + "EventName": "UNC_M2HBM_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x104", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Tracker Inserts : Channel 1", + "EventCode": "0x32", + "EventName": "UNC_M2HBM_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x204", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 0", + "EventCode": "0x33", + "EventName": "UNC_M2HBM_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 1", + "EventCode": "0x33", + "EventName": "UNC_M2HBM_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "AD Egress (to CMS) : AD Egress (to CMS) Alloc= ations", + "EventCode": "0x06", + "EventName": "UNC_M2HBM_TxC_AD.INSERTS", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts anytime a AD packet is added to Egres= s", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "AD Egress (to CMS) : AD Egress (to CMS) Alloc= ations", + "EventCode": "0x06", + "EventName": "UNC_M2HBM_TxC_AD_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts anytime a AD packet is added to Egres= s", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "AD Egress (to CMS) Occupancy", + "EventCode": "0x07", + "EventName": "UNC_M2HBM_TxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Egress (to CMS) : Inserts - CMS0 - Near Si= de", + "EventCode": "0x0E", + "EventName": "UNC_M2HBM_TxC_BL.INSERTS_CMS0", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of BL transactions to CMS = add port 0", + "UMask": "0x101", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Egress (to CMS) : Inserts - CMS1 - Far Sid= e", + "EventCode": "0x0E", + "EventName": "UNC_M2HBM_TxC_BL.INSERTS_CMS1", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of BL transactions to CMS = add port 1", + "UMask": "0x201", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy : All", + "EventCode": "0x0f", + "EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy : Common Mesh St= op - Near Side", + "EventCode": "0x0f", + "EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy : Common Mesh St= op - Far Side", + "EventCode": "0x0f", + "EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "WPQ Flush : Channel 0", + "EventCode": "0x42", + "EventName": "UNC_M2HBM_WPQ_FLUSH.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "WPQ Flush : Channel 1", + "EventCode": "0x42", + "EventName": "UNC_M2HBM_WPQ_FLUSH.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Regular : = Channel 0", + "EventCode": "0x37", + "EventName": "UNC_M2HBM_WPQ_NO_REG_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Regular : = Channel 1", + "EventCode": "0x37", + "EventName": "UNC_M2HBM_WPQ_NO_REG_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Special : = Channel 0", + "EventCode": "0x38", + "EventName": "UNC_M2HBM_WPQ_NO_SPEC_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Special : = Channel 1", + "EventCode": "0x38", + "EventName": "UNC_M2HBM_WPQ_NO_SPEC_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 0", + "EventCode": "0x40", + "EventName": "UNC_M2HBM_WR_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 1", + "EventCode": "0x40", + "EventName": "UNC_M2HBM_WR_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", + "EventCode": "0x4d", + "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", + "EventCode": "0x4d", + "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", + "EventCode": "0x4c", + "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", + "EventCode": "0x4c", + "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 0", + "EventCode": "0x48", + "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 1", + "EventCode": "0x48", + "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", + "EventCode": "0x47", + "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", + "EventCode": "0x47", + "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2HBM" + }, + { + "BriefDescription": "Activate due to read, write, underfill, or by= pass", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0xff", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Activate due to read", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.RD", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x11", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Activate Count : Activate due to Read in = PCH0", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.RD_PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Activate Count : Activate due to Read in = PCH1", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.RD_PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x10", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Activate Count : Underfill Read transacti= on on Page Empty or Page Miss", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.UFILL", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x44", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Activate Count", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.UFILL_PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x4", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Activate Count", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.UFILL_PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x40", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Activate due to write", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.WR", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x22", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Activate Count : Activate due to Write in= PCH0", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.WR_PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Activate Count : Activate due to Write in= PCH1", + "EventCode": "0x02", + "EventName": "UNC_MCHBM_ACT_COUNT.WR_PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Activate commands s= ent on this channel. Activate commands are issued to open up a page on the= HBM devices so that it can be read or written to with a CAS. One can calc= ulate the number of Page Misses by subtracting the number of Page Miss prec= harges from the number of Activates.", + "UMask": "0x20", + "Unit": "MCHBM" + }, + { + "BriefDescription": "All CAS commands issued", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.ALL", + "PerPkg": "1", + "UMask": "0xff", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Pseudo Channel 0", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.PCH0", + "PerPkg": "1", + "PublicDescription": "HBM RD_CAS and WR_CAS Commands", + "UMask": "0x40", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Pseudo Channel 1", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.PCH1", + "PerPkg": "1", + "PublicDescription": "HBM RD_CAS and WR_CAS Commands", + "UMask": "0x80", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read CAS commands issued (regular and underfi= ll)", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.RD", + "PerPkg": "1", + "UMask": "0xcf", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Regular read CAS commands with precharge", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.RD_PRE_REG", + "PerPkg": "1", + "UMask": "0xc2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Underfill read CAS commands with precharge", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.RD_PRE_UNDERFILL", + "PerPkg": "1", + "UMask": "0xc8", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Regular read CAS commands issued (does not in= clude underfills)", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.RD_REG", + "PerPkg": "1", + "UMask": "0xc1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Underfill read CAS commands issued", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.RD_UNDERFILL", + "PerPkg": "1", + "UMask": "0xc4", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write CAS commands issued", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.WR", + "PerPkg": "1", + "UMask": "0xf0", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM RD_CAS and WR_CAS Commands. : HBM WR_CAS = commands w/o auto-pre", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.WR_NONPRE", + "PerPkg": "1", + "UMask": "0xd0", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write CAS commands with precharge", + "EventCode": "0x05", + "EventName": "UNC_MCHBM_CAS_COUNT.WR_PRE", + "PerPkg": "1", + "UMask": "0xe0", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Pseudo Channel 0", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.PCH0", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Pseudo Channel 1", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.PCH1", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read CAS Command in Interleaved Mode (32B)", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_32B", + "PerPkg": "1", + "UMask": "0xc8", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read CAS Command in Regular Mode (64B) in Pse= udochannel 0", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_64B", + "PerPkg": "1", + "UMask": "0xc1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Underfill Read CAS Command in Interleaved Mod= e (32B)", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_UFILL_32B", + "PerPkg": "1", + "UMask": "0xd0", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Underfill Read CAS Command in Regular Mode (6= 4B) in Pseudochannel 1", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_UFILL_64B", + "PerPkg": "1", + "UMask": "0xc2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write CAS Command in Interleaved Mode (32B)", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.WR_32B", + "PerPkg": "1", + "UMask": "0xe0", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write CAS Command in Regular Mode (64B) in Ps= eudochannel 0", + "EventCode": "0x06", + "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.WR_64B", + "PerPkg": "1", + "UMask": "0xc4", + "Unit": "MCHBM" + }, + { + "BriefDescription": "IMC Clockticks at DCLK frequency", + "EventCode": "0x01", + "EventName": "UNC_MCHBM_CLOCKTICKS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge All Commands", + "EventCode": "0x44", + "EventName": "UNC_MCHBM_HBM_PREALL.PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that the precharg= e all command was sent.", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge All Commands", + "EventCode": "0x44", + "EventName": "UNC_MCHBM_HBM_PREALL.PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that the precharg= e all command was sent.", + "UMask": "0x2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "All Precharge Commands", + "EventCode": "0x44", + "EventName": "UNC_MCHBM_HBM_PRE_ALL", + "PerPkg": "1", + "PublicDescription": "Precharge All Commands: Counts the number of= times that the precharge all command was sent.", + "UMask": "0x3", + "Unit": "MCHBM" + }, + { + "BriefDescription": "IMC Clockticks at HCLK frequency", + "EventCode": "0x01", + "EventName": "UNC_MCHBM_HCLOCKTICKS", + "PerPkg": "1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "All precharge events", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0xff", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Precharge from MC page table", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.PGT", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x88", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands. : Precharges from Pag= e Table", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.PGT_PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel. : Equivalent to PAGE_EMPTY", + "UMask": "0x8", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.PGT_PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x80", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Precharge due to read on page miss", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.RD", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x11", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands. : Precharge due to re= ad", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.RD_PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel. : Precharge from read bank scheduler", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.RD_PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x10", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.UFILL", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x44", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.UFILL_PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x4", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.UFILL_PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x40", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Precharge due to write on page miss", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.WR", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x22", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands. : Precharge due to wr= ite", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.WR_PCH0", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel. : Precharge from write bank scheduler", + "UMask": "0x2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "HBM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_MCHBM_PRE_COUNT.WR_PCH1", + "PerPkg": "1", + "PublicDescription": "Counts the number of HBM Precharge commands = sent on this channel.", + "UMask": "0x20", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Counts the number of cycles where the read bu= ffer has greater than UMASK elements. NOTE: Umask must be set to the maxim= um number of elements in the queue (24 entries for SPR).", + "EventCode": "0x19", + "EventName": "UNC_MCHBM_RDB_FULL", + "PerPkg": "1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Counts the number of inserts into the read bu= ffer.", + "EventCode": "0x17", + "EventName": "UNC_MCHBM_RDB_INSERTS", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read Data Buffer Inserts", + "EventCode": "0x17", + "EventName": "UNC_MCHBM_RDB_INSERTS.PCH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read Data Buffer Inserts", + "EventCode": "0x17", + "EventName": "UNC_MCHBM_RDB_INSERTS.PCH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Counts the number of elements in the read buf= fer per cycle.", + "EventCode": "0x1a", + "EventName": "UNC_MCHBM_RDB_OCCUPANCY", + "PerPkg": "1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read Pending Queue Allocations", + "EventCode": "0x10", + "EventName": "UNC_MCHBM_RPQ_INSERTS.PCH0", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Allocations: Counts the n= umber of allocations into the Read Pending Queue. This queue is used to sc= hedule reads out to the memory controller and to track the requests. Reque= sts allocate into the RPQ soon after they enter the memory controller, and = need credits for an entry in this buffer before being sent from the HA to t= he iMC. They deallocate after the CAS command has been issued to memory. = This includes both ISOCH and non-ISOCH requests.", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read Pending Queue Allocations", + "EventCode": "0x10", + "EventName": "UNC_MCHBM_RPQ_INSERTS.PCH1", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Allocations: Counts the n= umber of allocations into the Read Pending Queue. This queue is used to sc= hedule reads out to the memory controller and to track the requests. Reque= sts allocate into the RPQ soon after they enter the memory controller, and = need credits for an entry in this buffer before being sent from the HA to t= he iMC. They deallocate after the CAS command has been issued to memory. = This includes both ISOCH and non-ISOCH requests.", + "UMask": "0x2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read Pending Queue Occupancy", + "EventCode": "0x80", + "EventName": "UNC_MCHBM_RPQ_OCCUPANCY_PCH0", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Occupancy: Accumulates th= e occupancies of the Read Pending Queue each cycle. This can then be used = to calculate both the average occupancy (in conjunction with the number of = cycles not empty) and the average latency (in conjunction with the number o= f allocations). The RPQ is used to schedule reads out to the memory contro= ller and to track the requests. Requests allocate into the RPQ soon after = they enter the memory controller, and need credits for an entry in this buf= fer before being sent from the HA to the iMC. They deallocate after the CAS= command has been issued to memory.", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Read Pending Queue Occupancy", + "EventCode": "0x81", + "EventName": "UNC_MCHBM_RPQ_OCCUPANCY_PCH1", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Occupancy: Accumulates th= e occupancies of the Read Pending Queue each cycle. This can then be used = to calculate both the average occupancy (in conjunction with the number of = cycles not empty) and the average latency (in conjunction with the number o= f allocations). The RPQ is used to schedule reads out to the memory contro= ller and to track the requests. Requests allocate into the RPQ soon after = they enter the memory controller, and need credits for an entry in this buf= fer before being sent from the HA to the iMC. They deallocate after the CAS= command has been issued to memory.", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue Allocations", + "EventCode": "0x20", + "EventName": "UNC_MCHBM_WPQ_INSERTS.PCH0", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue Allocations: Counts the = number of allocations into the Write Pending Queue. This can then be used = to calculate the average queuing latency (in conjunction with the WPQ occup= ancy count). The WPQ is used to schedule write out to the memory controlle= r and to track the writes. Requests allocate into the WPQ soon after they = enter the memory controller, and need credits for an entry in this buffer b= efore being sent from the CHA to the iMC. They deallocate after being issu= ed. Write requests themselves are able to complete (from the perspective o= f the rest of the system) as soon they have posted to the iMC.", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue Allocations", + "EventCode": "0x20", + "EventName": "UNC_MCHBM_WPQ_INSERTS.PCH1", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue Allocations: Counts the = number of allocations into the Write Pending Queue. This can then be used = to calculate the average queuing latency (in conjunction with the WPQ occup= ancy count). The WPQ is used to schedule write out to the memory controlle= r and to track the writes. Requests allocate into the WPQ soon after they = enter the memory controller, and need credits for an entry in this buffer b= efore being sent from the CHA to the iMC. They deallocate after being issu= ed. Write requests themselves are able to complete (from the perspective o= f the rest of the system) as soon they have posted to the iMC.", + "UMask": "0x2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue Occupancy", + "EventCode": "0x82", + "EventName": "UNC_MCHBM_WPQ_OCCUPANCY_PCH0", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue Occupancy: Accumulates t= he occupancies of the Write Pending Queue each cycle. This can then be use= d to calculate both the average queue occupancy (in conjunction with the nu= mber of cycles not empty) and the average latency (in conjunction with the = number of allocations). The WPQ is used to schedule write out to the memor= y controller and to track the writes. Requests allocate into the WPQ soon = after they enter the memory controller, and need credits for an entry in th= is buffer before being sent from the HA to the iMC. They deallocate after = being issued to memory. Write requests themselves are able to complete (fr= om the perspective of the rest of the system) as soon they have posted to t= he iMC. This is not to be confused with actually performing the write. Th= erefore, the average latency for this queue is actually not useful for deco= nstruction intermediate write latencies. So, we provide filtering based on= if the request has posted or not. By using the not posted filter, we can = track how long writes spent in the iMC before completions were sent to the = HA. The posted filter, on the other hand, provides information about how m= uch queueing is actually happening in the iMC for writes before they are ac= tually issued to memory. High average occupancies will generally coincide = with high write major mode counts.", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue Occupancy", + "EventCode": "0x83", + "EventName": "UNC_MCHBM_WPQ_OCCUPANCY_PCH1", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue Occupancy: Accumulates t= he occupancies of the Write Pending Queue each cycle. This can then be use= d to calculate both the average queue occupancy (in conjunction with the nu= mber of cycles not empty) and the average latency (in conjunction with the = number of allocations). The WPQ is used to schedule write out to the memor= y controller and to track the writes. Requests allocate into the WPQ soon = after they enter the memory controller, and need credits for an entry in th= is buffer before being sent from the HA to the iMC. They deallocate after = being issued to memory. Write requests themselves are able to complete (fr= om the perspective of the rest of the system) as soon they have posted to t= he iMC. This is not to be confused with actually performing the write. Th= erefore, the average latency for this queue is actually not useful for deco= nstruction intermediate write latencies. So, we provide filtering based on= if the request has posted or not. By using the not posted filter, we can = track how long writes spent in the iMC before completions were sent to the = HA. The posted filter, on the other hand, provides information about how m= uch queueing is actually happening in the iMC for writes before they are ac= tually issued to memory. High average occupancies will generally coincide = with high write major mode counts.", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x23", + "EventName": "UNC_MCHBM_WPQ_READ_HIT", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of times a request hits in= the WPQ (write-pending queue). The iMC allows writes and reads to pass up= other writes to different addresses. Before a read or a write is issued, = it will first CAM the WPQ to see if there is a write pending to that addres= s. When reads hit, they are able to directly pull their data from the WPQ = instead of going to memory. Writes that hit will overwrite the existing da= ta. Partial writes that hit will not need to do underfill reads and will s= imply update their relevant sections.", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x23", + "EventName": "UNC_MCHBM_WPQ_READ_HIT.PCH0", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue CAM Match: Counts the nu= mber of times a request hits in the WPQ (write-pending queue). The iMC all= ows writes and reads to pass up other writes to different addresses. Befor= e a read or a write is issued, it will first CAM the WPQ to see if there is= a write pending to that address. When reads hit, they are able to directl= y pull their data from the WPQ instead of going to memory. Writes that hit= will overwrite the existing data. Partial writes that hit will not need t= o do underfill reads and will simply update their relevant sections.", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x23", + "EventName": "UNC_MCHBM_WPQ_READ_HIT.PCH1", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue CAM Match: Counts the nu= mber of times a request hits in the WPQ (write-pending queue). The iMC all= ows writes and reads to pass up other writes to different addresses. Befor= e a read or a write is issued, it will first CAM the WPQ to see if there is= a write pending to that address. When reads hit, they are able to directl= y pull their data from the WPQ instead of going to memory. Writes that hit= will overwrite the existing data. Partial writes that hit will not need t= o do underfill reads and will simply update their relevant sections.", + "UMask": "0x2", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x24", + "EventName": "UNC_MCHBM_WPQ_WRITE_HIT", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of times a request hits in= the WPQ (write-pending queue). The iMC allows writes and reads to pass up= other writes to different addresses. Before a read or a write is issued, = it will first CAM the WPQ to see if there is a write pending to that addres= s. When reads hit, they are able to directly pull their data from the WPQ = instead of going to memory. Writes that hit will overwrite the existing da= ta. Partial writes that hit will not need to do underfill reads and will s= imply update their relevant sections.", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x24", + "EventName": "UNC_MCHBM_WPQ_WRITE_HIT.PCH0", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue CAM Match: Counts the nu= mber of times a request hits in the WPQ (write-pending queue). The iMC all= ows writes and reads to pass up other writes to different addresses. Befor= e a read or a write is issued, it will first CAM the WPQ to see if there is= a write pending to that address. When reads hit, they are able to directl= y pull their data from the WPQ instead of going to memory. Writes that hit= will overwrite the existing data. Partial writes that hit will not need t= o do underfill reads and will simply update their relevant sections.", + "UMask": "0x1", + "Unit": "MCHBM" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x24", + "EventName": "UNC_MCHBM_WPQ_WRITE_HIT.PCH1", + "PerPkg": "1", + "PublicDescription": "Write Pending Queue CAM Match: Counts the nu= mber of times a request hits in the WPQ (write-pending queue). The iMC all= ows writes and reads to pass up other writes to different addresses. Befor= e a read or a write is issued, it will first CAM the WPQ to see if there is= a write pending to that address. When reads hit, they are able to directl= y pull their data from the WPQ instead of going to memory. Writes that hit= will overwrite the existing data. Partial writes that hit will not need t= o do underfill reads and will simply update their relevant sections.", + "UMask": "0x2", + "Unit": "MCHBM" + }, { "BriefDescription": "Activate due to read, write, underfill, or by= pass", "EventCode": "0x02", "EventName": "UNC_M_ACT_COUNT.ALL", "PerPkg": "1", - "PublicDescription": "DRAM Activate Count : Counts the number of D= RAM Activate commands sent on this channel. Activate commands are issued t= o open up a page on the DRAM devices so that it can be read or written to w= ith a CAS. One can calculate the number of Page Misses by subtracting the = number of Page Miss precharges from the number of Activates.", - "UMask": "0xff", + "PublicDescription": "DRAM Activate Count : Counts the number of D= RAM Activate commands sent on this channel. Activate commands are issued t= o open up a page on the DRAM devices so that it can be read or written to w= ith a CAS. One can calculate the number of Page Misses by subtracting the = number of Page Miss precharges from the number of Activates.", + "UMask": "0xff", + "Unit": "iMC" + }, + { + "BriefDescription": "All DRAM CAS commands issued", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.ALL", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : All DRAM = Read and Write actions : DRAM RD_CAS and WR_CAS Commands : Counts the total= number of DRAM CAS commands issued on this channel.", + "UMask": "0xff", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Cha= nnel 0", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.PCH0", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Ch= annel 0 : DRAM RD_CAS and WR_CAS Commands", + "UMask": "0x40", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Cha= nnel 1", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.PCH1", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Ch= annel 1 : DRAM RD_CAS and WR_CAS Commands", + "UMask": "0x80", + "Unit": "iMC" + }, + { + "BriefDescription": "All DRAM read CAS commands issued (including = underfills)", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.RD", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands : Counts the= total number of DRAM Read CAS commands issued on this channel. This inclu= des underfills.", + "UMask": "0xcf", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.RD_PRE_REG", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS and WR_CAS Commands", + "UMask": "0xc2", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS and WR_CAS Commands", + "UMask": "0xc8", + "Unit": "iMC" + }, + { + "BriefDescription": "All DRAM read CAS commands issued (does not i= nclude underfills)", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.RD_REG", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS commands w/out auto-pre : DRAM RD_CAS and WR_CAS Commands : Counts the t= otal number or DRAM Read CAS commands issued on this channel. This include= s both regular RD CAS commands as well as those with implicit Precharge. = We do not filter based on major mode, as RD_CAS is not issued during WMM (w= ith the exception of underfills).", + "UMask": "0xc1", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM underfill read CAS commands issued", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : Underfill= Read Issued : DRAM RD_CAS and WR_CAS Commands", + "UMask": "0xc4", + "Unit": "iMC" + }, + { + "BriefDescription": "All DRAM write CAS commands issued", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.WR", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands : Counts the= total number of DRAM Write CAS commands issued on this channel.", + "UMask": "0xf0", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CA= S commands w/o auto-pre", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.WR_NONPRE", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_C= AS commands w/o auto-pre : DRAM RD_CAS and WR_CAS Commands", + "UMask": "0xd0", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.", + "EventCode": "0x05", + "EventName": "UNC_M_CAS_COUNT.WR_PRE", + "PerPkg": "1", + "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS and WR_CAS Commands", + "UMask": "0xe0", + "Unit": "iMC" + }, + { + "BriefDescription": "Pseudo Channel 0", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.PCH0", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "iMC" + }, + { + "BriefDescription": "Pseudo Channel 1", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.PCH1", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "iMC" + }, + { + "BriefDescription": "Read CAS Command in Interleaved Mode (32B)", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_32B", + "PerPkg": "1", + "UMask": "0xc8", + "Unit": "iMC" + }, + { + "BriefDescription": "Read CAS Command in Regular Mode (64B) in Pse= udochannel 0", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_64B", + "PerPkg": "1", + "UMask": "0xc1", + "Unit": "iMC" + }, + { + "BriefDescription": "Underfill Read CAS Command in Interleaved Mod= e (32B)", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_UFILL_32B", + "PerPkg": "1", + "UMask": "0xd0", + "Unit": "iMC" + }, + { + "BriefDescription": "Underfill Read CAS Command in Regular Mode (6= 4B) in Pseudochannel 1", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_UFILL_64B", + "PerPkg": "1", + "UMask": "0xc2", + "Unit": "iMC" + }, + { + "BriefDescription": "Write CAS Command in Interleaved Mode (32B)", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.WR_32B", + "PerPkg": "1", + "UMask": "0xe0", + "Unit": "iMC" + }, + { + "BriefDescription": "Write CAS Command in Regular Mode (64B) in Ps= eudochannel 0", + "EventCode": "0x06", + "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.WR_64B", + "PerPkg": "1", + "UMask": "0xc4", + "Unit": "iMC" + }, + { + "BriefDescription": "IMC Clockticks at DCLK frequency", + "EventCode": "0x01", + "EventName": "UNC_M_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of DRAM DCLK clock cycles while the e= vent is enabled", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge All Commands", + "EventCode": "0x44", + "EventName": "UNC_M_DRAM_PRE_ALL", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge All Commands : Counts the num= ber of times that the precharge all command was sent.", + "UMask": "0x3", + "Unit": "iMC" + }, + { + "BriefDescription": "IMC Clockticks at HCLK frequency", + "EventCode": "0x01", + "EventName": "UNC_M_HCLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of DRAM HCLK clock cycles while the e= vent is enabled", + "Unit": "iMC" + }, + { + "BriefDescription": "UNC_M_PCLS.RD", + "EventCode": "0xa0", + "EventName": "UNC_M_PCLS.RD", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "iMC" + }, + { + "BriefDescription": "UNC_M_PCLS.TOTAL", + "EventCode": "0xa0", + "EventName": "UNC_M_PCLS.TOTAL", + "PerPkg": "1", + "UMask": "0xf", + "Unit": "iMC" + }, + { + "BriefDescription": "UNC_M_PCLS.WR", + "EventCode": "0xa0", + "EventName": "UNC_M_PCLS.WR", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Read Pending Queue inserts", + "EventCode": "0xe3", + "EventName": "UNC_M_PMM_RPQ_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts number of read requests allocated in = the PMM Read Pending Queue.", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Read Pending Queue occupancy", + "EventCode": "0xe0", + "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH0", + "PerPkg": "1", + "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Read Pending Queue occupancy", + "EventCode": "0xe0", + "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH1", + "PerPkg": "1", + "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Read Pending Queue Occupancy", + "EventCode": "0xE0", + "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH0", + "PerPkg": "1", + "PublicDescription": "PMM Read Pending Queue Occupancy : Accumulat= es the per cycle occupancy of the PMM Read Pending Queue.", + "UMask": "0x10", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Read Pending Queue Occupancy", + "EventCode": "0xE0", + "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH1", + "PerPkg": "1", + "PublicDescription": "PMM Read Pending Queue Occupancy : Accumulat= es the per cycle occupancy of the PMM Read Pending Queue.", + "UMask": "0x20", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Read Pending Queue Occupancy", + "EventCode": "0xe0", + "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH0", + "PerPkg": "1", + "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Read Pending Queue Occupancy", + "EventCode": "0xe0", + "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH1", + "PerPkg": "1", + "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", + "UMask": "0x8", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM (for IXP) Write Queue Cycles Not Empty", + "EventCode": "0xe5", + "EventName": "UNC_M_PMM_WPQ_CYCLES_NE", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Write Pending Queue inserts", + "EventCode": "0xe7", + "EventName": "UNC_M_PMM_WPQ_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts number of write requests allocated i= n the PMM Write Pending Queue.", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Write Pending Queue Occupancy", + "EventCode": "0xe4", + "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL", + "PerPkg": "1", + "PublicDescription": "PMM Write Pending Queue Occupancy : Accumula= tes the per cycle occupancy of the Write Pending Queue to the PMM DIMM.", + "UMask": "0x3", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Write Pending Queue Occupancy", + "EventCode": "0xE4", + "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH0", + "PerPkg": "1", + "PublicDescription": "PMM Write Pending Queue Occupancy : Accumula= tes the per cycle occupancy of the PMM Write Pending Queue.", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM Write Pending Queue Occupancy", + "EventCode": "0xE4", + "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH1", + "PerPkg": "1", + "PublicDescription": "PMM Write Pending Queue Occupancy : Accumula= tes the per cycle occupancy of the PMM Write Pending Queue.", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM (for IXP) Write Pending Queue Occupancy", + "EventCode": "0xe4", + "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.CAS", + "PerPkg": "1", + "PublicDescription": "PMM (for IXP) Write Pending Queue Occupancy = : Accumulates the per cycle occupancy of the Write Pending Queue to the IXP= DIMM.", + "UMask": "0xc", + "Unit": "iMC" + }, + { + "BriefDescription": "PMM (for IXP) Write Pending Queue Occupancy", + "EventCode": "0xe4", + "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.PWR", + "PerPkg": "1", + "PublicDescription": "PMM (for IXP) Write Pending Queue Occupancy = : Accumulates the per cycle occupancy of the Write Pending Queue to the IXP= DIMM.", + "UMask": "0x30", + "Unit": "iMC" + }, + { + "BriefDescription": "Channel PPD Cycles", + "EventCode": "0x85", + "EventName": "UNC_M_POWER_CHANNEL_PPD", + "PerPkg": "1", + "PublicDescription": "Channel PPD Cycles : Number of cycles when a= ll the ranks in the channel are in PPD mode. If IBT=3Doff is enabled, then= this can be used to count those cycles. If it is not enabled, then this c= an count the number of cycles when that could have been taken advantage of.= ", + "Unit": "iMC" + }, + { + "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", + "EventCode": "0x47", + "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_0", + "PerPkg": "1", + "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", + "EventCode": "0x47", + "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_1", + "PerPkg": "1", + "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", + "EventCode": "0x47", + "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_2", + "PerPkg": "1", + "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", + "EventCode": "0x47", + "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_3", + "PerPkg": "1", + "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", + "UMask": "0x8", + "Unit": "iMC" + }, + { + "BriefDescription": "Throttle Cycles for Rank 0", + "EventCode": "0x86", + "EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT0", + "PerPkg": "1", + "PublicDescription": "Throttle Cycles for Rank 0 : Counts the numb= er of cycles while the iMC is being throttled by either thermal constraints= or by the PCU throttling. It is not possible to distinguish between the t= wo. This can be filtered by rank. If multiple ranks are selected and are = being throttled at the same time, the counter will only increment by 1. : T= hermal throttling is performed per DIMM. We support 3 DIMMs per channel. = This ID allows us to filter by ID.", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "Throttle Cycles for Rank 0", + "EventCode": "0x86", + "EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT1", + "PerPkg": "1", + "PublicDescription": "Throttle Cycles for Rank 0 : Counts the numb= er of cycles while the iMC is being throttled by either thermal constraints= or by the PCU throttling. It is not possible to distinguish between the t= wo. This can be filtered by rank. If multiple ranks are selected and are = being throttled at the same time, the counter will only increment by 1.", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "Clock-Enabled Self-Refresh", + "EventCode": "0x43", + "EventName": "UNC_M_POWER_SELF_REFRESH", + "PerPkg": "1", + "PublicDescription": "Clock-Enabled Self-Refresh : Counts the numb= er of cycles when the iMC is in self-refresh and the iMC still has a clock.= This happens in some package C-states. For example, the PCU may ask the = iMC to enter self-refresh even though some of the cores are still processin= g. One use of this is for Monroe technology. Self-refresh is required dur= ing package C3 and C6, but there is no clock in the iMC at this time, so it= is not possible to count these cases.", + "Unit": "iMC" + }, + { + "BriefDescription": "Precharge due to read, write, underfill, or P= GT.", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.ALL", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0xff", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands. : Precharge due to (= ?)", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.PGT", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Precharge due to = (?) : Counts the number of DRAM Precharge commands sent on this channel.", + "UMask": "0x88", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands. : Precharges from Pa= ge Table", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.PGT_PCH0", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Precharges from P= age Table : Counts the number of DRAM Precharge commands sent on this chann= el. : Equivalent to PAGE_EMPTY", + "UMask": "0x8", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.PGT_PCH1", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0x80", + "Unit": "iMC" + }, + { + "BriefDescription": "Precharge due to read on page miss", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.RD", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0x11", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands. : Precharge due to r= ead", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.RD_PCH0", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Precharge due to = read : Counts the number of DRAM Precharge commands sent on this channel. := Precharge from read bank scheduler", + "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "All DRAM CAS commands issued", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.ALL", + "BriefDescription": "DRAM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.RD_PCH1", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : All DRAM = Read and Write actions : DRAM RD_CAS and WR_CAS Commands : Counts the total= number of DRAM CAS commands issued on this channel.", - "UMask": "0xff", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0x10", "Unit": "iMC" }, { - "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Cha= nnel 0", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.PCH0", + "BriefDescription": "DRAM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.UFILL", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Ch= annel 0 : DRAM RD_CAS and WR_CAS Commands", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0x44", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.UFILL_PCH0", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.UFILL_PCH1", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", "UMask": "0x40", "Unit": "iMC" }, { - "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Cha= nnel 1", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.PCH1", + "BriefDescription": "Precharge due to write on page miss", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.WR", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0x22", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands. : Precharge due to w= rite", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.WR_PCH0", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Precharge due to = write : Counts the number of DRAM Precharge commands sent on this channel. = : Precharge from write bank scheduler", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "DRAM Precharge commands.", + "EventCode": "0x03", + "EventName": "UNC_M_PRE_COUNT.WR_PCH1", + "PerPkg": "1", + "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", + "UMask": "0x20", + "Unit": "iMC" + }, + { + "BriefDescription": "Counts the number of cycles where the read bu= ffer has greater than UMASK elements. This includes reads to both DDR and = PMEM. NOTE: Umask must be set to the maximum number of elements in the que= ue (24 entries for SPR).", + "EventCode": "0x19", + "EventName": "UNC_M_RDB_FULL", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Counts the number of inserts into the read bu= ffer destined for DDR. Does not count reads destined for PMEM.", + "EventCode": "0x17", + "EventName": "UNC_M_RDB_INSERTS", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Data Buffer Inserts", + "EventCode": "0x17", + "EventName": "UNC_M_RDB_INSERTS.PCH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Data Buffer Inserts", + "EventCode": "0x17", + "EventName": "UNC_M_RDB_INSERTS.PCH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "Counts the number of cycles where there's at = least one element in the read buffer. This includes reads to both DDR and = PMEM.", + "EventCode": "0x18", + "EventName": "UNC_M_RDB_NE", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Data Buffer Not Empty", + "EventCode": "0x18", + "EventName": "UNC_M_RDB_NE.PCH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Data Buffer Not Empty", + "EventCode": "0x18", + "EventName": "UNC_M_RDB_NE.PCH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "Counts the number of cycles where there's at = least one element in the read buffer. This includes reads to both DDR and = PMEM.", + "EventCode": "0x18", + "EventName": "UNC_M_RDB_NOT_EMPTY", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "iMC" + }, + { + "BriefDescription": "Counts the number of elements in the read buf= fer, including reads to both DDR and PMEM.", + "EventCode": "0x1a", + "EventName": "UNC_M_RDB_OCCUPANCY", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Pending Queue Allocations", + "EventCode": "0x10", + "EventName": "UNC_M_RPQ_INSERTS.PCH0", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Allocations : Counts the = number of allocations into the Read Pending Queue. This queue is used to s= chedule reads out to the memory controller and to track the requests. Requ= ests allocate into the RPQ soon after they enter the memory controller, and= need credits for an entry in this buffer before being sent from the HA to = the iMC. They deallocate after the CAS command has been issued to memory. = This includes both ISOCH and non-ISOCH requests.", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Pending Queue Allocations", + "EventCode": "0x10", + "EventName": "UNC_M_RPQ_INSERTS.PCH1", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Allocations : Counts the = number of allocations into the Read Pending Queue. This queue is used to s= chedule reads out to the memory controller and to track the requests. Requ= ests allocate into the RPQ soon after they enter the memory controller, and= need credits for an entry in this buffer before being sent from the HA to = the iMC. They deallocate after the CAS command has been issued to memory. = This includes both ISOCH and non-ISOCH requests.", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Pending Queue Occupancy", + "EventCode": "0x80", + "EventName": "UNC_M_RPQ_OCCUPANCY_PCH0", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Occupancy : Accumulates t= he occupancies of the Read Pending Queue each cycle. This can then be used= to calculate both the average occupancy (in conjunction with the number of= cycles not empty) and the average latency (in conjunction with the number = of allocations). The RPQ is used to schedule reads out to the memory contr= oller and to track the requests. Requests allocate into the RPQ soon after= they enter the memory controller, and need credits for an entry in this bu= ffer before being sent from the HA to the iMC. They deallocate after the CA= S command has been issued to memory.", + "Unit": "iMC" + }, + { + "BriefDescription": "Read Pending Queue Occupancy", + "EventCode": "0x81", + "EventName": "UNC_M_RPQ_OCCUPANCY_PCH1", + "PerPkg": "1", + "PublicDescription": "Read Pending Queue Occupancy : Accumulates t= he occupancies of the Read Pending Queue each cycle. This can then be used= to calculate both the average occupancy (in conjunction with the number of= cycles not empty) and the average latency (in conjunction with the number = of allocations). The RPQ is used to schedule reads out to the memory contr= oller and to track the requests. Requests allocate into the RPQ soon after= they enter the memory controller, and need credits for an entry in this bu= ffer before being sent from the HA to the iMC. They deallocate after the CA= S command has been issued to memory.", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard accepts", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.ACCEPTS", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Accesses : Write Accepts", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.FM_RD_CMPS", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Accesses : Write Rejects", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.FM_WR_CMPS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Ch= annel 1 : DRAM RD_CAS and WR_CAS Commands", "UMask": "0x80", "Unit": "iMC" }, { - "BriefDescription": "All DRAM read CAS commands issued (including = underfills)", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.RD", + "BriefDescription": "Scoreboard Accesses : FM read completions", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.NM_RD_CMPS", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Accesses : FM write completions", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.NM_WR_CMPS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Accesses : Read Accepts", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.RD_ACCEPTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Accesses : Read Rejects", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.RD_REJECTS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard rejects", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.REJECTS", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Accesses : NM read completions", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.WR_ACCEPTS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Accesses : NM write completions", + "EventCode": "0xd2", + "EventName": "UNC_M_SB_ACCESSES.WR_REJECTS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "iMC" + }, + { + "BriefDescription": ": Alloc", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.ALLOC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "iMC" + }, + { + "BriefDescription": ": Dealloc", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.DEALLOC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "iMC" + }, + { + "BriefDescription": ": Near Mem Write Starved", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.FM_RD_STARVED", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "iMC" + }, + { + "BriefDescription": ": Far Mem Write Starved", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.FM_TGR_WR_STARVED", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "iMC" + }, + { + "BriefDescription": ": Far Mem Read Starved", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.FM_WR_STARVED", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "iMC" + }, + { + "BriefDescription": ": Valid", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.NM_RD_STARVED", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "iMC" + }, + { + "BriefDescription": ": Near Mem Read Starved", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.NM_WR_STARVED", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "iMC" + }, + { + "BriefDescription": ": Reject", + "EventCode": "0xd9", + "EventName": "UNC_M_SB_CANARY.VLD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Cycles Full", + "EventCode": "0xd1", + "EventName": "UNC_M_SB_CYCLES_FULL", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Cycles Not-Empty", + "EventCode": "0xd0", + "EventName": "UNC_M_SB_CYCLES_NE", + "PerPkg": "1", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Inserts : Block region reads", + "EventCode": "0xd6", + "EventName": "UNC_M_SB_INSERTS.BLOCK_RDS", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Inserts : Block region writes", + "EventCode": "0xd6", + "EventName": "UNC_M_SB_INSERTS.BLOCK_WRS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Inserts : Persistent Mem reads", + "EventCode": "0xd6", + "EventName": "UNC_M_SB_INSERTS.PMM_RDS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": "Scoreboard Inserts : Persistent Mem writes", + "EventCode": "0xd6", + "EventName": "UNC_M_SB_INSERTS.PMM_WRS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands : Counts the= total number of DRAM Read CAS commands issued on this channel. This inclu= des underfills.", - "UMask": "0xcf", + "UMask": "0x8", "Unit": "iMC" }, { - "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.RD_PRE_REG", + "BriefDescription": "Scoreboard Inserts : Reads", + "EventCode": "0xd6", + "EventName": "UNC_M_SB_INSERTS.RDS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS and WR_CAS Commands", - "UMask": "0xc2", + "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL", + "BriefDescription": "Scoreboard Inserts : Writes", + "EventCode": "0xd6", + "EventName": "UNC_M_SB_INSERTS.WRS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS and WR_CAS Commands", - "UMask": "0xc8", + "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "All DRAM read CAS commands issued (does not i= nclude underfills)", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.RD_REG", + "BriefDescription": "Scoreboard Occupancy : Block region reads", + "EventCode": "0xd5", + "EventName": "UNC_M_SB_OCCUPANCY.BLOCK_RDS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS commands w/out auto-pre : DRAM RD_CAS and WR_CAS Commands : Counts the t= otal number or DRAM Read CAS commands issued on this channel. This include= s both regular RD CAS commands as well as those with implicit Precharge. = We do not filter based on major mode, as RD_CAS is not issued during WMM (w= ith the exception of underfills).", - "UMask": "0xc1", + "UMask": "0x20", "Unit": "iMC" }, { - "BriefDescription": "DRAM underfill read CAS commands issued", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL", + "BriefDescription": "Scoreboard Occupancy : Block region writes", + "EventCode": "0xd5", + "EventName": "UNC_M_SB_OCCUPANCY.BLOCK_WRS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : Underfill= Read Issued : DRAM RD_CAS and WR_CAS Commands", - "UMask": "0xc4", + "UMask": "0x40", "Unit": "iMC" }, { - "BriefDescription": "All DRAM write CAS commands issued", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.WR", + "BriefDescription": "Scoreboard Occupancy : Persistent Mem reads", + "EventCode": "0xd5", + "EventName": "UNC_M_SB_OCCUPANCY.PMM_RDS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands : Counts the= total number of DRAM Write CAS commands issued on this channel.", - "UMask": "0xf0", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CA= S commands w/o auto-pre", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.WR_NONPRE", + "BriefDescription": "Scoreboard Occupancy : Persistent Mem writes", + "EventCode": "0xd5", + "EventName": "UNC_M_SB_OCCUPANCY.PMM_WRS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_C= AS commands w/o auto-pre : DRAM RD_CAS and WR_CAS Commands", - "UMask": "0xd0", + "UMask": "0x8", "Unit": "iMC" }, { - "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.", - "EventCode": "0x05", - "EventName": "UNC_M_CAS_COUNT.WR_PRE", + "BriefDescription": "Scoreboard Occupancy : Reads", + "EventCode": "0xd5", + "EventName": "UNC_M_SB_OCCUPANCY.RDS", "PerPkg": "1", - "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_C= AS and WR_CAS Commands", - "UMask": "0xe0", + "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "IMC Clockticks at DCLK frequency", - "EventCode": "0x01", - "EventName": "UNC_M_CLOCKTICKS", + "BriefDescription": "Scoreboard Prefetch Inserts : All", + "EventCode": "0xda", + "EventName": "UNC_M_SB_PREF_INSERTS.ALL", "PerPkg": "1", - "PublicDescription": "Number of DRAM DCLK clock cycles while the e= vent is enabled", "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "IMC Clockticks at HCLK frequency", - "EventCode": "0x01", - "EventName": "UNC_M_HCLOCKTICKS", + "BriefDescription": "Scoreboard Prefetch Inserts : DDR4", + "EventCode": "0xda", + "EventName": "UNC_M_SB_PREF_INSERTS.DDR", "PerPkg": "1", - "PublicDescription": "Number of DRAM HCLK clock cycles while the e= vent is enabled", + "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "PMM Read Pending Queue inserts", - "EventCode": "0xe3", - "EventName": "UNC_M_PMM_RPQ_INSERTS", + "BriefDescription": "Scoreboard Prefetch Inserts : PMM", + "EventCode": "0xda", + "EventName": "UNC_M_SB_PREF_INSERTS.PMM", "PerPkg": "1", - "PublicDescription": "Counts number of read requests allocated in = the PMM Read Pending Queue.", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "PMM Read Pending Queue occupancy", - "EventCode": "0xe0", - "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH0", + "BriefDescription": "Scoreboard Prefetch Occupancy : All", + "EventCode": "0xdb", + "EventName": "UNC_M_SB_PREF_OCCUPANCY.ALL", "PerPkg": "1", - "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "PMM Read Pending Queue occupancy", - "EventCode": "0xe0", - "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH1", + "BriefDescription": "Scoreboard Prefetch Occupancy : DDR4", + "EventCode": "0xdb", + "EventName": "UNC_M_SB_PREF_OCCUPANCY.DDR", "PerPkg": "1", - "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "PMM Read Pending Queue Occupancy", - "EventCode": "0xE0", - "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH0", + "BriefDescription": "Scoreboard Prefetch Occupancy : Persistent Me= m", + "EventCode": "0xDB", + "EventName": "UNC_M_SB_PREF_OCCUPANCY.PMM", + "FCMask": "0x00000000", "PerPkg": "1", - "PublicDescription": "PMM Read Pending Queue Occupancy : Accumulat= es the per cycle occupancy of the PMM Read Pending Queue.", - "UMask": "0x10", + "PortMask": "0x00000000", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "PMM Read Pending Queue Occupancy", - "EventCode": "0xE0", - "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH1", + "BriefDescription": "Number of Scoreboard Requests Rejected", + "EventCode": "0xd4", + "EventName": "UNC_M_SB_REJECT.CANARY", "PerPkg": "1", - "PublicDescription": "PMM Read Pending Queue Occupancy : Accumulat= es the per cycle occupancy of the PMM Read Pending Queue.", - "UMask": "0x20", + "UMask": "0x8", "Unit": "iMC" }, { - "BriefDescription": "PMM Read Pending Queue Occupancy", - "EventCode": "0xe0", - "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH0", + "BriefDescription": "Number of Scoreboard Requests Rejected", + "EventCode": "0xd4", + "EventName": "UNC_M_SB_REJECT.DDR_EARLY_CMP", "PerPkg": "1", - "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", - "UMask": "0x4", + "UMask": "0x20", "Unit": "iMC" }, { - "BriefDescription": "PMM Read Pending Queue Occupancy", - "EventCode": "0xe0", - "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH1", + "BriefDescription": "Number of Scoreboard Requests Rejected : FM r= equests rejected due to full address conflict", + "EventCode": "0xd4", + "EventName": "UNC_M_SB_REJECT.FM_ADDR_CNFLT", "PerPkg": "1", - "PublicDescription": "Accumulates the per cycle occupancy of the P= MM Read Pending Queue.", - "UMask": "0x8", + "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "PMM Write Pending Queue inserts", - "EventCode": "0xe7", - "EventName": "UNC_M_PMM_WPQ_INSERTS", + "BriefDescription": "Number of Scoreboard Requests Rejected : NM r= equests rejected due to set conflict", + "EventCode": "0xd4", + "EventName": "UNC_M_SB_REJECT.NM_SET_CNFLT", "PerPkg": "1", - "PublicDescription": "Counts number of write requests allocated i= n the PMM Write Pending Queue.", + "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "PMM Write Pending Queue Occupancy", - "EventCode": "0xe4", - "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL", + "BriefDescription": "Number of Scoreboard Requests Rejected : Patr= ol requests rejected due to set conflict", + "EventCode": "0xd4", + "EventName": "UNC_M_SB_REJECT.PATROL_SET_CNFLT", "PerPkg": "1", - "PublicDescription": "PMM Write Pending Queue Occupancy : Accumula= tes the per cycle occupancy of the Write Pending Queue to the PMM DIMM.", - "UMask": "0x3", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "PMM Write Pending Queue Occupancy", - "EventCode": "0xE4", - "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH0", + "BriefDescription": ": Far Mem Read - Set", + "EventCode": "0xd7", + "EventName": "UNC_M_SB_STRV_ALLOC.FM_RD", "PerPkg": "1", - "PublicDescription": "PMM Write Pending Queue Occupancy : Accumula= tes the per cycle occupancy of the PMM Write Pending Queue.", - "UMask": "0x1", + "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "PMM Write Pending Queue Occupancy", - "EventCode": "0xE4", - "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH1", + "BriefDescription": ": Near Mem Read - Clear", + "EventCode": "0xd7", + "EventName": "UNC_M_SB_STRV_ALLOC.FM_TGR", "PerPkg": "1", - "PublicDescription": "PMM Write Pending Queue Occupancy : Accumula= tes the per cycle occupancy of the PMM Write Pending Queue.", - "UMask": "0x2", + "UMask": "0x10", "Unit": "iMC" }, { - "BriefDescription": "Channel PPD Cycles", - "EventCode": "0x85", - "EventName": "UNC_M_POWER_CHANNEL_PPD", + "BriefDescription": ": Far Mem Write - Set", + "EventCode": "0xd7", + "EventName": "UNC_M_SB_STRV_ALLOC.FM_WR", "PerPkg": "1", - "PublicDescription": "Channel PPD Cycles : Number of cycles when a= ll the ranks in the channel are in PPD mode. If IBT=3Doff is enabled, then= this can be used to count those cycles. If it is not enabled, then this c= an count the number of cycles when that could have been taken advantage of.= ", + "UMask": "0x8", "Unit": "iMC" }, { - "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", - "EventCode": "0x47", - "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_0", + "BriefDescription": ": Near Mem Read - Set", + "EventCode": "0xd7", + "EventName": "UNC_M_SB_STRV_ALLOC.NM_RD", "PerPkg": "1", - "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", - "EventCode": "0x47", - "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_1", + "BriefDescription": ": Near Mem Write - Set", + "EventCode": "0xd7", + "EventName": "UNC_M_SB_STRV_ALLOC.NM_WR", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "iMC" + }, + { + "BriefDescription": ": Far Mem Read - Set", + "EventCode": "0xde", + "EventName": "UNC_M_SB_STRV_DEALLOC.FM_RD", "PerPkg": "1", - "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", - "EventCode": "0x47", - "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_2", + "BriefDescription": ": Near Mem Read - Clear", + "EventCode": "0xde", + "EventName": "UNC_M_SB_STRV_DEALLOC.FM_TGR", "PerPkg": "1", - "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", - "UMask": "0x4", + "UMask": "0x10", "Unit": "iMC" }, { - "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", - "EventCode": "0x47", - "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_3", + "BriefDescription": ": Far Mem Write - Set", + "EventCode": "0xde", + "EventName": "UNC_M_SB_STRV_DEALLOC.FM_WR", "PerPkg": "1", - "PublicDescription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of = cycles spent in CKE ON mode. The filter allows you to select a rank to mon= itor. If multiple ranks are in CKE ON mode at one time, the counter will O= NLY increment by one rather than doing accumulation. Multiple counters wil= l need to be used to track multiple ranks simultaneously. There is no dist= inction between the different CKE modes (APD, PPDS, PPDF). This can be det= ermined based on the system programming. These events should commonly be u= sed with Invert to get the number of cycles in power saving mode. Edge Det= ect is also useful here. Make sure that you do NOT use Invert with Edge De= tect (this just confuses the system and is not necessary).", "UMask": "0x8", "Unit": "iMC" }, { - "BriefDescription": "Clock-Enabled Self-Refresh", - "EventCode": "0x43", - "EventName": "UNC_M_POWER_SELF_REFRESH", + "BriefDescription": ": Near Mem Read - Set", + "EventCode": "0xde", + "EventName": "UNC_M_SB_STRV_DEALLOC.NM_RD", "PerPkg": "1", - "PublicDescription": "Clock-Enabled Self-Refresh : Counts the numb= er of cycles when the iMC is in self-refresh and the iMC still has a clock.= This happens in some package C-states. For example, the PCU may ask the = iMC to enter self-refresh even though some of the cores are still processin= g. One use of this is for Monroe technology. Self-refresh is required dur= ing package C3 and C6, but there is no clock in the iMC at this time, so it= is not possible to count these cases.", + "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "Precharge due to read, write, underfill, or P= GT.", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.ALL", + "BriefDescription": ": Near Mem Write - Set", + "EventCode": "0xde", + "EventName": "UNC_M_SB_STRV_DEALLOC.NM_WR", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0xff", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands. : Precharge due to (= ?)", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.PGT", + "BriefDescription": ": Far Mem Read", + "EventCode": "0xd8", + "EventName": "UNC_M_SB_STRV_OCC.FM_RD", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Precharge due to = (?) : Counts the number of DRAM Precharge commands sent on this channel.", - "UMask": "0x88", + "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands. : Prechages from Pag= e Table", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.PGT_PCH0", + "BriefDescription": ": Near Mem Read - Clear", + "EventCode": "0xd8", + "EventName": "UNC_M_SB_STRV_OCC.FM_TGR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "iMC" + }, + { + "BriefDescription": ": Far Mem Write", + "EventCode": "0xd8", + "EventName": "UNC_M_SB_STRV_OCC.FM_WR", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Prechages from Pa= ge Table : Counts the number of DRAM Precharge commands sent on this channe= l. : Equivalent to PAGE_EMPTY", "UMask": "0x8", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands.", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.PGT_PCH1", + "BriefDescription": ": Near Mem Read", + "EventCode": "0xd8", + "EventName": "UNC_M_SB_STRV_OCC.NM_RD", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x80", + "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "Precharge due to read on page miss", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.RD", + "BriefDescription": ": Near Mem Write", + "EventCode": "0xd8", + "EventName": "UNC_M_SB_STRV_OCC.NM_WR", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x11", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands. : Precharge due to r= ead", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.RD_PCH0", + "BriefDescription": "UNC_M_SB_TAGGED.DDR4_CMP", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.DDR4_CMP", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Precharge due to = read : Counts the number of DRAM Precharge commands sent on this channel. := Precharge from read bank scheduler", - "UMask": "0x1", + "UMask": "0x8", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands.", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.RD_PCH1", + "BriefDescription": "UNC_M_SB_TAGGED.NEW", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.NEW", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x10", + "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands.", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.UFILL", + "BriefDescription": "UNC_M_SB_TAGGED.OCC", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.OCC", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x44", + "UMask": "0x80", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands.", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.UFILL_PCH0", + "BriefDescription": "UNC_M_SB_TAGGED.PMM0_CMP", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.PMM0_CMP", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x4", + "UMask": "0x10", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands.", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.UFILL_PCH1", + "BriefDescription": "UNC_M_SB_TAGGED.PMM1_CMP", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.PMM1_CMP", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x40", + "UMask": "0x20", "Unit": "iMC" }, { - "BriefDescription": "Precharge due to write on page miss", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.WR", + "BriefDescription": "UNC_M_SB_TAGGED.PMM2_CMP", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.PMM2_CMP", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x22", + "UMask": "0x40", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands. : Precharge due to w= rite", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.WR_PCH0", + "BriefDescription": "UNC_M_SB_TAGGED.RD_HIT", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.RD_HIT", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Precharge due to = write : Counts the number of DRAM Precharge commands sent on this channel. = : Precharge from write bank scheduler", "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "DRAM Precharge commands.", - "EventCode": "0x03", - "EventName": "UNC_M_PRE_COUNT.WR_PCH1", + "BriefDescription": "UNC_M_SB_TAGGED.RD_MISS", + "EventCode": "0xdd", + "EventName": "UNC_M_SB_TAGGED.RD_MISS", "PerPkg": "1", - "PublicDescription": "DRAM Precharge commands. : Counts the number= of DRAM Precharge commands sent on this channel.", - "UMask": "0x20", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "Read Pending Queue Allocations", - "EventCode": "0x10", - "EventName": "UNC_M_RPQ_INSERTS.PCH0", + "BriefDescription": "2LM Tag check hit in near memory cache (DDR4)= ", + "EventCode": "0xd3", + "EventName": "UNC_M_TAGCHK.HIT", "PerPkg": "1", - "PublicDescription": "Read Pending Queue Allocations : Counts the = number of allocations into the Read Pending Queue. This queue is used to s= chedule reads out to the memory controller and to track the requests. Requ= ests allocate into the RPQ soon after they enter the memory controller, and= need credits for an entry in this buffer before being sent from the HA to = the iMC. They deallocate after the CAS command has been issued to memory. = This includes both ISOCH and non-ISOCH requests.", "UMask": "0x1", "Unit": "iMC" }, { - "BriefDescription": "Read Pending Queue Allocations", - "EventCode": "0x10", - "EventName": "UNC_M_RPQ_INSERTS.PCH1", + "BriefDescription": "2LM Tag check miss, no data at this line", + "EventCode": "0xd3", + "EventName": "UNC_M_TAGCHK.MISS_CLEAN", "PerPkg": "1", - "PublicDescription": "Read Pending Queue Allocations : Counts the = number of allocations into the Read Pending Queue. This queue is used to s= chedule reads out to the memory controller and to track the requests. Requ= ests allocate into the RPQ soon after they enter the memory controller, and= need credits for an entry in this buffer before being sent from the HA to = the iMC. They deallocate after the CAS command has been issued to memory. = This includes both ISOCH and non-ISOCH requests.", "UMask": "0x2", "Unit": "iMC" }, { - "BriefDescription": "Read Pending Queue Occupancy", - "EventCode": "0x80", - "EventName": "UNC_M_RPQ_OCCUPANCY_PCH0", + "BriefDescription": "2LM Tag check miss, existing data may be evic= ted to PMM", + "EventCode": "0xd3", + "EventName": "UNC_M_TAGCHK.MISS_DIRTY", "PerPkg": "1", - "PublicDescription": "Read Pending Queue Occupancy : Accumulates t= he occupancies of the Read Pending Queue each cycle. This can then be used= to calculate both the average occupancy (in conjunction with the number of= cycles not empty) and the average latency (in conjunction with the number = of allocations). The RPQ is used to schedule reads out to the memory contr= oller and to track the requests. Requests allocate into the RPQ soon after= they enter the memory controller, and need credits for an entry in this bu= ffer before being sent from the HA to the iMC. They deallocate after the CA= S command has been issued to memory.", + "UMask": "0x4", "Unit": "iMC" }, { - "BriefDescription": "Read Pending Queue Occupancy", - "EventCode": "0x81", - "EventName": "UNC_M_RPQ_OCCUPANCY_PCH1", + "BriefDescription": "2LM Tag check hit due to memory read (bug?)", + "EventCode": "0xd3", + "EventName": "UNC_M_TAGCHK.NM_RD_HIT", "PerPkg": "1", - "PublicDescription": "Read Pending Queue Occupancy : Accumulates t= he occupancies of the Read Pending Queue each cycle. This can then be used= to calculate both the average occupancy (in conjunction with the number of= cycles not empty) and the average latency (in conjunction with the number = of allocations). The RPQ is used to schedule reads out to the memory contr= oller and to track the requests. Requests allocate into the RPQ soon after= they enter the memory controller, and need credits for an entry in this bu= ffer before being sent from the HA to the iMC. They deallocate after the CA= S command has been issued to memory.", + "UMask": "0x8", + "Unit": "iMC" + }, + { + "BriefDescription": "2LM Tag check hit due to memory write (bug?)", + "EventCode": "0xd3", + "EventName": "UNC_M_TAGCHK.NM_WR_HIT", + "PerPkg": "1", + "UMask": "0x10", "Unit": "iMC" }, { @@ -457,5 +3284,25 @@ "PerPkg": "1", "PublicDescription": "Write Pending Queue Occupancy : Accumulates = the occupancies of the Write Pending Queue each cycle. This can then be us= ed to calculate both the average queue occupancy (in conjunction with the n= umber of cycles not empty) and the average latency (in conjunction with the= number of allocations). The WPQ is used to schedule write out to the memo= ry controller and to track the writes. Requests allocate into the WPQ soon= after they enter the memory controller, and need credits for an entry in t= his buffer before being sent from the HA to the iMC. They deallocate after= being issued to DRAM. Write requests themselves are able to complete (fro= m the perspective of the rest of the system) as soon they have posted to th= e iMC. This is not to be confused with actually performing the write to DR= AM. Therefore, the average latency for this queue is actually not useful f= or deconstruction intermediate write latencies. So, we provide filtering b= ased on if the request has posted or not. By using the not posted filter, = we can track how long writes spent in the iMC before completions were sent = to the HA. The posted filter, on the other hand, provides information abou= t how much queueing is actually happening in the iMC for writes before they= are actually issued to memory. High average occupancies will generally co= incide with high write major mode counts.", "Unit": "iMC" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x23", + "EventName": "UNC_M_WPQ_READ_HIT", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of times a request hits in= the WPQ (write-pending queue). The iMC allows writes and reads to pass up= other writes to different addresses. Before a read or a write is issued, = it will first CAM the WPQ to see if there is a write pending to that addres= s. When reads hit, they are able to directly pull their data from the WPQ = instead of going to memory. Writes that hit will overwrite the existing da= ta. Partial writes that hit will not need to do underfill reads and will s= imply update their relevant sections.", + "Unit": "iMC" + }, + { + "BriefDescription": "Write Pending Queue CAM Match", + "EventCode": "0x24", + "EventName": "UNC_M_WPQ_WRITE_HIT", + "FCMask": "0x00000000", + "PerPkg": "1", + "PortMask": "0x00000000", + "PublicDescription": "Counts the number of times a request hits in= the WPQ (write-pending queue). The iMC allows writes and reads to pass up= other writes to different addresses. Before a read or a write is issued, = it will first CAM the WPQ to see if there is a write pending to that addres= s. When reads hit, they are able to directly pull their data from the WPQ = instead of going to memory. Writes that hit will overwrite the existing da= ta. Partial writes that hit will not need to do underfill reads and will s= imply update their relevant sections.", + "Unit": "iMC" } ] diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.jso= n b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json deleted file mode 100644 index 11c037e8291d..000000000000 --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json +++ /dev/null @@ -1,4525 +0,0 @@ -[ - { - "BriefDescription": "CHA Clockticks", - "EventCode": "0x01", - "EventName": "UNC_CHA_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of CHA clock cycles while the event i= s enabled", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_CHA_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Not Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", - "PerPkg": "1", - "PublicDescription": "Counts transactions that looked into the mul= ti-socket cacheline Directory state, and therefore did not send a snoop bec= ause the Directory indicated it was not needed.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.SNP", - "PerPkg": "1", - "PublicDescription": "Counts transactions that looked into the mu= lti-socket cacheline Directory state, and sent one or more snoops, because = the Directory indicated it was needed.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from the HA pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.HA", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline Directory= state updates memory writes issued from the HA pipe. This does not include= memory write requests which are for I (Invalid) or E (Exclusive) cacheline= s.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from TOR pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.TOR", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline Directory= state updates due to memory writes issued from the TOR pipe which are the = result of remote transaction hitting the SF/LLC and returning data Core2Cor= e. This does not include memory write requests which are for I (Invalid) or= E (Exclusive) cachelines.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", - "UMask": "0x1bc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Snoop Request= s from a Remote Socket", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", - "UMask": "0x1c19ff", - "Unit": "CHA" - }, - { - "BriefDescription": "All LLC lines in E state that are victimized = on a fill", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "All LLC lines in M state that are victimized = on a fill", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "All LLC lines in S state that are victimized = on a fill", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : Local InvItoE", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.LOCAL_INVITOE", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : Local InvItoE : Count = of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to be b= roadcast. Does not count all the snoops generated by OSB.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : Local Rd", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.LOCAL_READ", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : Local Rd : Count of OS= B snoop broadcasts. Counts by 1 per request causing OSB snoops to be broadc= ast. Does not count all the snoops generated by OSB.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Requests for exclusive ownership of a cache l= ine without receiving data", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests made into the CHA", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS", - "PerPkg": "1", - "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests from a unit on this socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests from a remote socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Write requests made into the CHA", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "Write Requests from a unit on this socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Read and Write Requests; Writes Remote", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", - "UMask": "0xc001ffff", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DDR Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DDR Access : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : SF/LLC Evictions", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. : TOR allocation occurred as a result of SF/= LLC evictions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Hits", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from Local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests from IA Cores", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts;CLFlush from Local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; C= LFlush events that are initiated from the Core", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts;CLFlushOpt from Local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; C= LFlushOpt events that are initiated from the Core", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read from local IA that mi= sses in the snoop filter", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd Pref from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc817ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc837ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Opt from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read opt from local IA tha= t misses in the snoop filter", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Opt Pref from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read opt prefetch from loc= al IA that misses in the snoop filter", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Pref from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read prefetch from local I= A that misses in the snoop filter", - "UMask": "0xc897ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from Local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read from local IA that hi= ts in the snoop filter", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd Pref hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that hits in the snoop filter", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that hi= ts in the snoop filter", - "UMask": "0xc817fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc837fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Opt hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read opt from local IA tha= t hits in the snoop filter", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Opt Pref hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read opt prefetch from loc= al IA that hits in the snoop filter", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Pref hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read prefetch from local I= A that hits in the snoop filter", - "UMask": "0xc897fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that H= it LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc47fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefCode hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch code = read from local IA that hits in the snoop filter", - "UMask": "0xcccffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefData hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch data = read from local IA that hits in the snoop filter", - "UMask": "0xccd7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefRFO hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch read = for ownership from local IA that hits in the snoop filter", - "UMask": "0xccc7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership from local I= A that hits in the snoop filter", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO Pref hits from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that hits in the snoop filter", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts;ItoM from Local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; I= toM events that are initiated from the Core", - "UMask": "0xcc47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cor= es", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcd47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefCode from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch code = read from local IA.", - "UMask": "0xcccfff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefData from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch data = read from local IA.", - "UMask": "0xccd7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefRFO from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch read = for ownership from local IA that misses in the snoop filter", - "UMask": "0xccc7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; misses from Local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for CRd misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode CRd", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd Pref misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc88efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc88f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRd misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd", - "UMask": "0xc817fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc837fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRds issued by IA Cores targe= ting DDR Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and which target DDR = memory", - "UMask": "0xc8178601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRd misses from local IA targ= eting local memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and which target loca= l memory", - "UMask": "0xc816fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8168601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8168a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Opt misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read opt from local IA tha= t misses in the snoop filter", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Opt Pref misses from local I= A", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read opt prefetch from loc= al IA that misses in the snoop filter", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and which target PMM = memory", - "UMask": "0xc8178a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRd Pref misses from local IA= ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRD_PREF", - "UMask": "0xc897fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8978601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRd Pref misses from local IA= targeting local memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRD_PREF, and target local= memory", - "UMask": "0xc896fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8968601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8968a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8978a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRd Pref misses from local IA= targeting remote memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRD_PREF, and target remot= e memory", - "UMask": "0xc8977e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8970601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8970a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for DRd misses from local IA targ= eting remote memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IA cores whi= ch miss the LLC and snoop filter with the opcode DRd, and target remote mem= ory", - "UMask": "0xc8177e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8170601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8170a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that M= issed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc47fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefCode misses from local IA= ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch code = read from local IA that misses in the snoop filter", - "UMask": "0xcccffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefData misses from local IA= ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch data = read from local IA that misses in the snoop filter", - "UMask": "0xccd7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; LLCPrefRFO misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Last level cache prefetch read = for ownership from local IA that misses in the snoop filter", - "UMask": "0xccc7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8668601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8668a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86e8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86e8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8670601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8670a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86f0601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86f0a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership from local I= A that misses in the snoop filter", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts RFO misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership from local I= A that misses in the snoop filter", - "UMask": "0xc806fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO pref misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO prefetch misses from local I= A", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", - "UMask": "0xc886fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO prefetch misses from local I= A", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", - "UMask": "0xc8877e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts Read for ownership from local IA= that misses in the snoop filter", - "UMask": "0xc8077e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8678601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8678a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86f8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86f8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership from local I= A that misses in the snoop filter", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO pref from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Read for ownership prefetch fro= m local IA that misses in the snoop filter", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts;SpecItoM from Local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; S= pecItoM events that are initiated from the Core", - "UMask": "0xcc57ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", - "PerPkg": "1", - "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc3fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; ItoM hits from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RdCur and FsRdCur hits from loca= l IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO hits from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for ItoM from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IO with the = opcode ItoM", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for ItoMCacheNears from IO device= s.", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IO devices w= ith the opcode ItoMCacheNears. This event indicates a partial write reques= t.", - "UMask": "0xcd43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Misses from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; ItoM misses from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RdCur and FsRdCur misses from lo= cal IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO misses from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts for RdCur from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "Inserts into the TOR from local IO with the = opcode RdCur", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO from local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IPQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IPQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - Non iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just ISOC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Local Targets", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA and IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. : All locally initiated requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. : All locally initiated requests from iA Co= res", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. : All locally generated IO traffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Misses", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : MMCFG Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : MMIO Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MMIO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : MMIO Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NonCoherent", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PMM Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PM Access : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - Non IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Remote Targets", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Remote Targets : Counts t= he number of entries successfully inserted into the TOR that match qualific= ations specified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Remote", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Remote : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. : All remote requests (e.g. snoops, writeback= s) that came from remote sockets", - "UMask": "0xc001ffc8", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All Snoops from Remote", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REM_SNPS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All Snoops from Remote : Count= s the number of entries successfully inserted into the TOR that match quali= fications specified by the subevent. : All snoops to this LLC that came fro= m remote sockets", - "UMask": "0xc001ff08", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RRQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.RRQ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RRQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All Snoops from Remote", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.SNPS_FROM_REM", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. Al= l snoops to this LLC that came from remote sockets.", - "UMask": "0xc001ff08", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.WBQ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WBQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", - "UMask": "0xc001ffff", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DDR Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DDR Access : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : SF/LLC Evictions", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. T : TOR allocation occurre= d as a result of SF/LLC evictions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Hits", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read from local IA that = misses in the snoop filter", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd Pref from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc817ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Opt from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read opt from local IA t= hat misses in the snoop filter", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Opt Pref from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read opt prefetch from l= ocal IA that misses in the snoop filter", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Pref from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc897ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read from local IA that = hits in the snoop filter", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd Pref hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that hits in the snoop filter", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = hits in the snoop filter", - "UMask": "0xc817fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Opt hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read opt from local IA t= hat hits in the snoop filter", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Opt Pref hits from local I= A", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read opt prefetch from l= ocal IA that hits in the snoop filter", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Pref hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that hits in the snoop filter", - "UMask": "0xc897fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Hit LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Hit LLC : For each cycle, this event accumulates the number of valid entr= ies in the TOR that match qualifications specified by the subevent. Doe= s not include addressless requests such as locks and interrupts.", - "UMask": "0xcc47fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefCode hits from local IA= ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch cod= e read from local IA that hits in the snoop filter", - "UMask": "0xcccffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefData hits from local IA= ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA that hits in the snoop filter", - "UMask": "0xccd7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefRFO hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch rea= d for ownership from local IA that hits in the snoop filter", - "UMask": "0xccc7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that hits in the snoop filter", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO Pref hits from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that hits in the snoop filter", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears issued by iA C= ores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears issued by iA = Cores : For each cycle, this event accumulates the number of valid entries = in the TOR that match qualifications specified by the subevent. Does no= t include addressless requests such as locks and interrupts.", - "UMask": "0xcd47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefCode from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA.", - "UMask": "0xcccfff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefData from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA that misses in the snoop filter", - "UMask": "0xccd7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefRFO from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch rea= d for ownership from local IA that misses in the snoop filter", - "UMask": "0xccc7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from Local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read from local IA that = misses in the snoop filter", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed locally : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc80efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd Pref misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed locally : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc88efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed remotely : For each cycle, this event accumula= tes the number of valid entries in the TOR that match qualifications specif= ied by the subevent. Does not include addressless requests such as lock= s and interrupts.", - "UMask": "0xc88f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed remotely : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc80f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy for DRd misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", - "PerPkg": "1", - "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd", - "UMask": "0xc817fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy for DRds issued by iA Cores tar= geting DDR Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR", - "PerPkg": "1", - "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target DDR memory", - "UMask": "0xc8178601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy for DRd misses from local IA ta= rgeting local memory", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target local memory", - "UMask": "0xc816fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", - "UMask": "0xc8168601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", - "UMask": "0xc8168a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Opt misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read opt from local IA t= hat misses in the snoop filter", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Opt Pref misses from local= IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read opt prefetch from l= ocal IA that misses in the snoop filter", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy for DRds issued by iA Cores tar= geting PMM Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM", - "PerPkg": "1", - "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target PMM memory", - "UMask": "0xc8178a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc897fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xc8978601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc896fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc8968601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc8968a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xc8978a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc8977e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xc8970601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xc8970a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy for DRd misses from local IA ta= rgeting remote memory", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "Number of cycles for elements in the TOR fro= m local IA cores which miss the LLC and snoop filter with the opcode DRd, a= nd which target remote memory", - "UMask": "0xc8177e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", - "UMask": "0xc8170601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", - "UMask": "0xc8170a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Missed LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc47fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefCode misses from local = IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch cod= e read from local IA that misses in the snoop filter", - "UMask": "0xcccffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefData misses from local = IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch dat= a read from local IA that misses in the snoop filter", - "UMask": "0xccd7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; LLCPrefRFO misses from local I= A", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Last level cache prefetch rea= d for ownership from local IA that misses in the snoop filter", - "UMask": "0xccc7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc8668601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc8668a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", - "UMask": "0xc86e8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", - "UMask": "0xc86e8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", - "UMask": "0xc8670601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", - "UMask": "0xc8670a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc86f0601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc86f0a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", - "UMask": "0xc806fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO prefetch misses from local= IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO prefetch misses from local= IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", - "UMask": "0xc886fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO prefetch misses from local= IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", - "UMask": "0xc8877e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", - "UMask": "0xc8077e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc8678601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc8678a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc86f8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc86f8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership from local= IA that misses in the snoop filter", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO prefetch from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Read for ownership prefetch f= rom local IA that misses in the snoop filter", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_SPECITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : SpecItoMs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc57ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; ITOM hits from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RdCur and FsRdCur hits from lo= cal IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO hits from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; ITOM from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; ITOM misses from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RdCur and FsRdCur misses from = local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO misses from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RdCur and FsRdCur from local I= O", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; ItoM from local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IPQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IPQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. T : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - Non iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. T", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just ISOC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Local Targets", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA and IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. T : All locally in= itiated requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. T : All locally initiated= requests from iA Cores", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. T : All locally generated= IO traffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Misses", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : MMCFG Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : MMIO Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MMIO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : MMIO Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NonCoherent", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PMM Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PMM Access : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. T : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. T", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Remote Targets", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.REMOTE_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Remote Targets : For ea= ch cycle, this event accumulates the number of valid entries in the TOR tha= t match qualifications specified by the subevent. T", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Remote", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Remote : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. T : All remote requests (e.= g. snoops, writebacks) that came from remote sockets", - "UMask": "0xc001ffc8", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All Snoops from Remote", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_SNPS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All Snoops from Remote : For= each cycle, this event accumulates the number of valid entries in the TOR = that match qualifications specified by the subevent. T : All snoops to th= is LLC that came from remote sockets", - "UMask": "0xc001ff08", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RRQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RRQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All Snoops from Remote", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.SNPS_FROM_REM", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. All snoops to this LLC that came from remote sockets.", - "UMask": "0xc001ff08", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WBQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.WBQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WBQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. T", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IIO Clockticks", - "EventCode": "0x01", - "EventName": "UNC_IIO_CLOCKTICKS", - "PerPkg": "1", - "PortMask": "0x0000", - "PublicDescription": "Number of IIO clock cycles while the event i= s enabled", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0100", - "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = IOMMU - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0200", - "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = IOMMU - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part0 by= the CPU", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part1 by= the CPU", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part2 by= the CPU", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part3 by= the CPU", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ards MMIO space", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Data requested by the CPU : Core writing to = Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Incl= udes all requests initiated by the main die, including reads and writes. : = x4 card is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by IIO Part0-7 = to Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x00ff", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by IIO Part0 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is = plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by IIO Part1 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by IIO Part2 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by IIO Part3 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is = plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made by IIO Part0-7 = to Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x00ff", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made by IIO Part0 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is pl= ugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made by IIO Part1 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made by IIO Part2 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made by IIO Part3 to= Memory", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is pl= ugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to D= RAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to stack, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to stack, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache hits", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", - "PerPkg": "1", - "PortMask": "0x0000", - "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache lookups", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", - "PerPkg": "1", - "PortMask": "0x0000", - "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB lookups first", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", - "PerPkg": "1", - "PortMask": "0x0000", - "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "IOTLB Fills (same as IOTLB miss)", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.MISSES", - "PerPkg": "1", - "PortMask": "0x0000", - "PublicDescription": "IOTLB Fills (same as IOTLB miss) : When a tr= ansaction misses IOTLB, it does a page walk to look up memory and bring in = the relevant page translation. Counts when this page translation is written= to IOTLB.", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOMMU memory access", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", - "PerPkg": "1", - "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", - "UMask": "0xc0", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 2M page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWT Hit to a 256T page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_256T_HITS", - "PerPkg": "1", - "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 4K page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 1G page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Global IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.PWT_OCCUPANCY_MSB", - "PerPkg": "1", - "PortMask": "0x0000", - "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PWT occupancy. Does not include 9th bit of o= ccupancy (will undercount if PWT is greater than 255 per cycle).", - "EventCode": "0x42", - "EventName": "UNC_IIO_PWT_OCCUPANCY", - "PerPkg": "1", - "PortMask": "0x0000", - "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part0", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged = in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part1", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part2", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part3", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x16 card plug= ged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged i= n to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x4 card is pl= ugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x8 card plugg= ed in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Cards MMIO space : Also known as Outbound. Number of requ= ests initiated by the main die, including reads and writes. : x4 card is pl= ugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part0 by the CPU", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in= to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part1 by the CPU", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part2 by the CPU", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part3 by the CPU", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x16 card plugge= d in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in = to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x4 card is plug= ged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Cards MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Cards MMIO space : Also known as Outbound. Number of reques= ts initiated by the main die, including reads and writes. : x4 card is plug= ged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part0 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in = to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part1 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part2 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part3 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in = to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part0 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to= slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part1 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part2 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part3 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to= slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0001", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0002", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0004", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in t= o slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0008", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0010", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in= to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0020", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0040", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in t= o slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x0080", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "IRP Clockticks", - "EventCode": "0x01", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of IRP clock cycles while the event i= s enabled", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF - request insert from TC.", - "EventCode": "0x18", - "EventName": "UNC_I_FAF_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF occupancy", - "EventCode": "0x19", - "EventName": "UNC_I_FAF_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF allocation -- sent to ADQ", - "EventCode": "0x16", - "EventName": "UNC_I_FAF_TRANSACTIONS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Lost Forward", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "M2M Clockticks", - "EventCode": "0x01", - "EventName": "UNC_M2M_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Clockticks of the mesh to memory (M2M)", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to core mode (which bypass= es the CHA) was disabled", - "EventCode": "0x17", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages sent direct to core (bypassing the C= HA)", - "EventCode": "0x16", - "EventName": "UNC_M2M_DIRECT2CORE_TAKEN", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to core trans= action were overridden", - "EventCode": "0x18", - "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to Intel UPI = transactions were overridden", - "EventCode": "0x1b", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to Intel UPI was disabled", - "EventCode": "0x1a", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages sent direct to the Intel UPI", - "EventCode": "0x19", - "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads that a message sent direct2 I= ntel UPI was overridden", - "EventCode": "0x1c", - "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookups (any= state found)", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookups (cac= heline found in A state)", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in I state)", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in S state)", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = A to I", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", - "PerPkg": "1", - "UMask": "0x320", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = A to S", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", - "PerPkg": "1", - "UMask": "0x340", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from/= to Any state", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", - "PerPkg": "1", - "UMask": "0x301", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = I to A", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", - "PerPkg": "1", - "UMask": "0x304", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = I to S", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", - "PerPkg": "1", - "UMask": "0x302", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = S to A", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", - "PerPkg": "1", - "UMask": "0x310", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = S to I", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", - "PerPkg": "1", - "UMask": "0x308", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_IMC_READS.TO_PMM", - "EventCode": "0x24", - "EventName": "UNC_M2M_IMC_READS.TO_PMM", - "PerPkg": "1", - "UMask": "0x320", - "Unit": "M2M" - }, - { - "BriefDescription": "PMM - All Channels", - "EventCode": "0x25", - "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", - "PerPkg": "1", - "UMask": "0x1880", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x5", - "Unit": "M2M" - }, - { - "BriefDescription": ": UPI - All Channels", - "EventCode": "0x5d", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.UPI_ALLCH", - "PerPkg": "1", - "UMask": "0xa", - "Unit": "M2M" - }, - { - "BriefDescription": ": XPT - All Channels", - "EventCode": "0x5d", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x5", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels", - "EventCode": "0x56", - "EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH", - "PerPkg": "1", - "UMask": "0xa", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", - "EventCode": "0x56", - "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", - "PerPkg": "1", - "PublicDescription": "Prefetch CAM Inserts : XPT -All Channels", - "UMask": "0x5", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS)= Allocations", - "EventCode": "0x02", - "EventName": "UNC_M2M_RxC_AD_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy", - "EventCode": "0x03", - "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 0", - "EventCode": "0x32", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x104", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 1", - "EventCode": "0x32", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x204", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 0", - "EventCode": "0x33", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 1", - "EventCode": "0x33", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2P Clockticks", - "EventCode": "0x01", - "EventName": "UNC_M2P_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of M2P clock cycles while the event i= s enabled", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M2P_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M3UPI Clockticks", - "EventCode": "0x01", - "EventName": "UNC_M3UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of M2UPI clock cycles while the event= is enabled", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M3UPI CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2C Sent", - "EventCode": "0x2b", - "EventName": "UNC_M3UPI_D2C_SENT", - "PerPkg": "1", - "PublicDescription": "D2C Sent : Count cases BL sends direct to co= re", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2U Sent", - "EventCode": "0x2a", - "EventName": "UNC_M3UPI_D2U_SENT", - "PerPkg": "1", - "PublicDescription": "D2U Sent : Cases where SMI3 sends D2U comman= d", - "Unit": "M3UPI" - }, - { - "BriefDescription": "FlowQ Generated Prefetch", - "EventCode": "0x29", - "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", - "PerPkg": "1", - "PublicDescription": "FlowQ Generated Prefetch : Count cases where= FlowQ causes spawn of Prefetch to iMC/SMI3 target", - "Unit": "M3UPI" - }, - { - "BriefDescription": "All CAS commands issued", - "EventCode": "0x05", - "EventName": "UNC_MCHBM_CAS_COUNT.ALL", - "PerPkg": "1", - "UMask": "0xff", - "Unit": "MCHBM" - }, - { - "BriefDescription": "Read CAS commands issued (regular and underfi= ll)", - "EventCode": "0x05", - "EventName": "UNC_MCHBM_CAS_COUNT.RD", - "PerPkg": "1", - "UMask": "0xcf", - "Unit": "MCHBM" - }, - { - "BriefDescription": "Regular read CAS commands issued (does not in= clude underfills)", - "EventCode": "0x05", - "EventName": "UNC_MCHBM_CAS_COUNT.RD_REG", - "PerPkg": "1", - "UMask": "0xc1", - "Unit": "MCHBM" - }, - { - "BriefDescription": "Underfill read CAS commands issued", - "EventCode": "0x05", - "EventName": "UNC_MCHBM_CAS_COUNT.RD_UNDERFILL", - "PerPkg": "1", - "UMask": "0xc4", - "Unit": "MCHBM" - }, - { - "BriefDescription": "Write CAS commands issued", - "EventCode": "0x05", - "EventName": "UNC_MCHBM_CAS_COUNT.WR", - "PerPkg": "1", - "UMask": "0xf0", - "Unit": "MCHBM" - }, - { - "BriefDescription": "UPI Clockticks", - "EventCode": "0x01", - "EventName": "UNC_UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of UPI LL clock cycles while the even= t is enabled", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Direct packet attempts : D2C", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", - "PerPkg": "1", - "PublicDescription": "Direct packet attempts : D2C : Counts the nu= mber of DRS packets that we attempted to do direct2core/direct2UPI on. The= re are 4 mutually exclusive filters. Filter [0] can be used to get success= ful spawns, while [1:3] provide the different failure cases. Note that thi= s does not count packets that are not candidates for Direct2Core. The only= candidates for Direct2Core are DRS packets destined for Cbos.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L1", - "EventCode": "0x21", - "EventName": "UNC_UPI_L1_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Cycles in L1 : Number of UPI qfclk cycles sp= ent in L1 power mode. L1 is a mode that totally shuts down a UPI link. Us= e edge detect to count the number of instances when the UPI link entered L1= . Link power states are per link and per direction, so for example the Tx = direction could be in one state while Rx was in another. Because L1 totally= shuts down the link, it takes a good amount of time to exit this mode.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass, Match Opcode : Matches on Receive path of a UPI port.\r\nM= atch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Messag= e Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\= r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: D= ual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control type= s are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match= _en cases.\r\nNote: If Message Class is disabled, we expect opcode to also = be disabled.", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard : Matches on Receive path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard, Match Opcode : Matches on Receive path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 0 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 1 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 2 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : All Data", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : All Data : Shows lega= l flit time (hides impact of L0p and L0c).", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Null FLITs received from any slot", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", - "PerPkg": "1", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Data", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Data : Shows legal fl= it time (hides impact of L0p and L0c). : Count Data Flits (which consume al= l slots), but how much to count is based on Slot0-2 mask, so count can be 0= -3 depending on which slots are enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Idle", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Idle : Shows legal fl= it time (hides impact of L0p and L0c).", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : LLCRD Not Empty", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : LLCRD Not Empty : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables counting of LLC= RD (with non-zero payload). This only applies to slot 2 since LLCRD is only= allowed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : LLCTRL", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : LLCTRL : Shows legal = flit time (hides impact of L0p and L0c). : Equivalent to an idle packet. E= nables counting of slot 0 LLCTRL messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : All Non Data", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : All Non Data : Shows = legal flit time (hides impact of L0p and L0c).", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Emp= ty", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.NULL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot NULL or LLCRD Em= pty : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all= zeros is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dua= l slot. This can apply to slot 0,1, or 2.", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Protocol Header", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Protocol Header : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables count of protoc= ol headers in slot 0,1,2 (depending on slot uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot 0", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot 0 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits d= etermine types of headers to count.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot 1", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot 1 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits d= etermine types of headers to count.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot 2", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot 2 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits d= etermine types of headers to count.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 0", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Allocations : Slot 0 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 1", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Allocations : Slot 1 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 2", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Allocations : Slot 2 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 0", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", - "PerPkg": "1", - "PublicDescription": "RxQ Occupancy - All Packets : Slot 0 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 1", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", - "PerPkg": "1", - "PublicDescription": "RxQ Occupancy - All Packets : Slot 1 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 2", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", - "PerPkg": "1", - "PublicDescription": "RxQ Occupancy - All Packets : Slot 2 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0p", - "EventCode": "0x27", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles s= pent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lane= s, decreasing our bandwidth in order to save power. It increases snoop and= data transfer latencies and decreases overall bandwidth. This mode can be= very useful in NUMA optimized workloads that largely only utilize UPI for = snoops and their responses. Use edge detect to count the number of instanc= es when the UPI link entered L0p. Link power states are per link and per d= irection, so for example the Tx direction could be in one state while Rx wa= s in another.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass, Match Opcode : Matches on Transmit path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard : Matches on Transmit path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard, Match Opcode : Matches on Transmit path of a UPI port.\= r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Me= ssage Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Ena= ble\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\n= Q: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control = types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode m= atch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to a= lso be disabled.", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Bypassed", - "EventCode": "0x41", - "EventName": "UNC_UPI_TxL_BYPASSED", - "PerPkg": "1", - "PublicDescription": "Tx Flit Buffer Bypassed : Counts the number = of times that an incoming flit was able to bypass the Tx flit buffer and pa= ss directly out the UPI Link. Generally, when data is transmitted across UP= I, it will bypass the TxQ and pass directly to the link. However, the TxQ = will be used with L0p and when LLR occurs, increasing latency to transfer o= ut to the link.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : All Data", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : All Data : Counts number = of data flits across this UPI link.", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "All Null Flits", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", - "PerPkg": "1", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Data", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Data : Shows legal flit t= ime (hides impact of L0p and L0c). : Count Data Flits (which consume all sl= ots), but how much to count is based on Slot0-2 mask, so count can be 0-3 d= epending on which slots are enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Idle", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Idle : Shows legal flit t= ime (hides impact of L0p and L0c).", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : LLCRD Not Empty", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : LLCRD Not Empty : Shows l= egal flit time (hides impact of L0p and L0c). : Enables counting of LLCRD (= with non-zero payload). This only applies to slot 2 since LLCRD is only all= owed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : LLCTRL", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : LLCTRL : Shows legal flit= time (hides impact of L0p and L0c). : Equivalent to an idle packet. Enabl= es counting of slot 0 LLCTRL messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : All Non Data", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : All Non Data : Shows lega= l flit time (hides impact of L0p and L0c).", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.NULL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty = : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all zer= os is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dual sl= ot. This can apply to slot 0,1, or 2.", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Protocol Header", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Protocol Header : Shows l= egal flit time (hides impact of L0p and L0c). : Enables count of protocol h= eaders in slot 0,1,2 (depending on slot uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot 0", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot 0 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits deter= mine types of headers to count.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot 1", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot 1 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits deter= mine types of headers to count.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot 2", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot 2 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits deter= mine types of headers to count.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Allocations", - "EventCode": "0x40", - "EventName": "UNC_UPI_TxL_INSERTS", - "PerPkg": "1", - "PublicDescription": "Tx Flit Buffer Allocations : Number of alloc= ations into the UPI Tx Flit Buffer. Generally, when data is transmitted ac= ross UPI, it will bypass the TxQ and pass directly to the link. However, t= he TxQ will be used with L0p and when LLR occurs, increasing latency to tra= nsfer out to the link. This event can be used in conjunction with the Flit= Buffer Occupancy event in order to calculate the average flit buffer lifet= ime.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Occupancy", - "EventCode": "0x42", - "EventName": "UNC_UPI_TxL_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Tx Flit Buffer Occupancy : Accumulates the n= umber of flits in the TxQ. Generally, when data is transmitted across UPI,= it will bypass the TxQ and pass directly to the link. However, the TxQ wi= ll be used with L0p and when LLR occurs, increasing latency to transfer out= to the link. This can be used with the cycles not empty event to track ave= rage occupancy, or the allocations event to track average lifetime in the T= xQ.", - "Unit": "UPI LL" - } -] diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.jso= n b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json index b1d5a605e0a7..8948e85074f0 100644 --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json @@ -7,6 +7,66 @@ "PublicDescription": "Number of PCU PCLK Clock cycles while the ev= ent is enabled", "Unit": "PCU" }, + { + "BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES", + "EventCode": "0x60", + "EventName": "UNC_P_CORE_TRANSITION_CYCLES", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "UNC_P_DEMOTIONS", + "EventCode": "0x30", + "EventName": "UNC_P_DEMOTIONS", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "Phase Shed 0 Cycles", + "EventCode": "0x75", + "EventName": "UNC_P_FIVR_PS_PS0_CYCLES", + "PerPkg": "1", + "PublicDescription": "Phase Shed 0 Cycles : Cycles spent in phase-= shedding power state 0", + "Unit": "PCU" + }, + { + "BriefDescription": "Phase Shed 1 Cycles", + "EventCode": "0x76", + "EventName": "UNC_P_FIVR_PS_PS1_CYCLES", + "PerPkg": "1", + "PublicDescription": "Phase Shed 1 Cycles : Cycles spent in phase-= shedding power state 1", + "Unit": "PCU" + }, + { + "BriefDescription": "Phase Shed 2 Cycles", + "EventCode": "0x77", + "EventName": "UNC_P_FIVR_PS_PS2_CYCLES", + "PerPkg": "1", + "PublicDescription": "Phase Shed 2 Cycles : Cycles spent in phase-= shedding power state 2", + "Unit": "PCU" + }, + { + "BriefDescription": "Phase Shed 3 Cycles", + "EventCode": "0x78", + "EventName": "UNC_P_FIVR_PS_PS3_CYCLES", + "PerPkg": "1", + "PublicDescription": "Phase Shed 3 Cycles : Cycles spent in phase-= shedding power state 3", + "Unit": "PCU" + }, + { + "BriefDescription": "AVX256 Frequency Clipping", + "EventCode": "0x49", + "EventName": "UNC_P_FREQ_CLIP_AVX256", + "PerPkg": "1", + "Unit": "PCU" + }, + { + "BriefDescription": "AVX512 Frequency Clipping", + "EventCode": "0x4a", + "EventName": "UNC_P_FREQ_CLIP_AVX512", + "PerPkg": "1", + "Unit": "PCU" + }, { "BriefDescription": "Thermal Strongest Upper Limit Cycles", "EventCode": "0x04", @@ -23,6 +83,14 @@ "PublicDescription": "Power Strongest Upper Limit Cycles : Counts = the number of cycles when power is the upper limit on frequency.", "Unit": "PCU" }, + { + "BriefDescription": "IO P Limit Strongest Lower Limit Cycles", + "EventCode": "0x73", + "EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES", + "PerPkg": "1", + "PublicDescription": "IO P Limit Strongest Lower Limit Cycles : Co= unts the number of cycles when IO P Limit is preventing us from dropping th= e frequency lower. This algorithm monitors the needs to the IO subsystem o= n both local and remote sockets and will maintain a frequency high enough t= o maintain good IO BW. This is necessary for when all the IA cores on a so= cket are idle but a user still would like to maintain high IO Bandwidth.", + "Unit": "PCU" + }, { "BriefDescription": "Cycles spent changing Frequency", "EventCode": "0x74", @@ -31,6 +99,22 @@ "PublicDescription": "Cycles spent changing Frequency : Counts the= number of cycles when the system is changing frequency. This can not be f= iltered by thread ID. One can also use it with the occupancy counter that = monitors number of threads in C0 to estimate the performance impact that fr= equency transitions had on the system.", "Unit": "PCU" }, + { + "BriefDescription": "Memory Phase Shedding Cycles", + "EventCode": "0x2f", + "EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES", + "PerPkg": "1", + "PublicDescription": "Memory Phase Shedding Cycles : Counts the nu= mber of cycles that the PCU has triggered memory phase shedding. This is a= mode that can be run in the iMC physicals that saves power at the expense = of additional latency.", + "Unit": "PCU" + }, + { + "BriefDescription": "Package C State Residency - C0", + "EventCode": "0x2a", + "EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES", + "PerPkg": "1", + "PublicDescription": "Package C State Residency - C0 : Counts the = number of cycles when the package was in C0. This event can be used in con= junction with edge detect to count C0 entrances (or exits using invert). R= esidency events do not include transition times.", + "Unit": "PCU" + }, { "BriefDescription": "Package C State Residency - C2E", "EventCode": "0x2b", @@ -47,6 +131,13 @@ "PublicDescription": "Package C State Residency - C6 : Counts the = number of cycles when the package was in C6. This event can be used in con= junction with edge detect to count C6 entrances (or exits using invert). R= esidency events do not include transition times.", "Unit": "PCU" }, + { + "BriefDescription": "UNC_P_PMAX_THROTTLED_CYCLES", + "EventCode": "0x06", + "EventName": "UNC_P_PMAX_THROTTLED_CYCLES", + "PerPkg": "1", + "Unit": "PCU" + }, { "BriefDescription": "Number of cores in C0", "EventCode": "0x35", @@ -86,5 +177,21 @@ "PerPkg": "1", "PublicDescription": "Internal Prochot : Counts the number of cycl= es that we are in Internal PROCHOT mode. This mode is triggered when a sen= sor on the die determines that we are too hot and must throttle to avoid da= maging the chip.", "Unit": "PCU" + }, + { + "BriefDescription": "Total Core C State Transition Cycles", + "EventCode": "0x72", + "EventName": "UNC_P_TOTAL_TRANSITION_CYCLES", + "PerPkg": "1", + "PublicDescription": "Total Core C State Transition Cycles : Numbe= r of cycles spent performing core C state transitions across all cores.", + "Unit": "PCU" + }, + { + "BriefDescription": "VR Hot", + "EventCode": "0x42", + "EventName": "UNC_P_VR_HOT_CYCLES", + "PerPkg": "1", + "PublicDescription": "VR Hot : Number of cycles that a CPU SVID VR= is hot. Does not cover DRAM VRs", + "Unit": "PCU" } ] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54FEAC77B61 for ; Thu, 13 Apr 2023 13:31:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231390AbjDMNa7 (ORCPT ); Thu, 13 Apr 2023 09:30:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229642AbjDMNan (ORCPT ); Thu, 13 Apr 2023 09:30:43 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8DEEA5ED for ; Thu, 13 Apr 2023 06:30:19 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-54f9df9ebc5so47692467b3.13 for ; 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charset="utf-8" Add v1.00 from: https://github.com/intel/perfmon/pull/69 Signed-off-by: Ian Rogers --- .../pmu-events/arch/x86/grandridge/cache.json | 155 ++++++++++++++++++ .../arch/x86/grandridge/frontend.json | 16 ++ .../arch/x86/grandridge/memory.json | 20 +++ .../pmu-events/arch/x86/grandridge/other.json | 20 +++ .../arch/x86/grandridge/pipeline.json | 96 +++++++++++ .../arch/x86/grandridge/virtual-memory.json | 24 +++ tools/perf/pmu-events/arch/x86/mapfile.csv | 1 + 7 files changed, 332 insertions(+) create mode 100644 tools/perf/pmu-events/arch/x86/grandridge/cache.json create mode 100644 tools/perf/pmu-events/arch/x86/grandridge/frontend.json create mode 100644 tools/perf/pmu-events/arch/x86/grandridge/memory.json create mode 100644 tools/perf/pmu-events/arch/x86/grandridge/other.json create mode 100644 tools/perf/pmu-events/arch/x86/grandridge/pipeline.json create mode 100644 tools/perf/pmu-events/arch/x86/grandridge/virtual-memor= y.json diff --git a/tools/perf/pmu-events/arch/x86/grandridge/cache.json b/tools/p= erf/pmu-events/arch/x86/grandridge/cache.json new file mode 100644 index 000000000000..7f0dc65a55d2 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/grandridge/cache.json @@ -0,0 +1,155 @@ +[ + { + "BriefDescription": "Counts the number of cacheable memory request= s that miss in the LLC. Counts on a per core basis.", + "EventCode": "0x2e", + "EventName": "LONGEST_LAT_CACHE.MISS", + "PublicDescription": "Counts the number of cacheable memory reques= ts that miss in the Last Level Cache (LLC). Requests include demand loads, = reads for ownership (RFO), instruction fetches and L1 HW prefetches. If the= platform has an L3 cache, the LLC is the L3 cache, otherwise it is the L2 = cache. Counts on a per core basis.", + "SampleAfterValue": "200003", + "UMask": "0x41" + }, + { + "BriefDescription": "Counts the number of cacheable memory request= s that access the LLC. Counts on a per core basis.", + "EventCode": "0x2e", + "EventName": "LONGEST_LAT_CACHE.REFERENCE", + "PublicDescription": "Counts the number of cacheable memory reques= ts that access the Last Level Cache (LLC). Requests include demand loads, r= eads for ownership (RFO), instruction fetches and L1 HW prefetches. If the = platform has an L3 cache, the LLC is the L3 cache, otherwise it is the L2 c= ache. Counts on a per core basis.", + "SampleAfterValue": "200003", + "UMask": "0x4f" + }, + { + "BriefDescription": "Counts the number of load ops retired.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.ALL_LOADS", + "PEBS": "1", + "SampleAfterValue": "200003", + "UMask": "0x81" + }, + { + "BriefDescription": "Counts the number of store ops retired.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.ALL_STORES", + "PEBS": "1", + "SampleAfterValue": "200003", + "UMask": "0x82" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_1024", + "MSRIndex": "0x3F6", + "MSRValue": "0x400", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128", + "MSRIndex": "0x3F6", + "MSRValue": "0x80", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16", + "MSRIndex": "0x3F6", + "MSRValue": "0x10", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_2048", + "MSRIndex": "0x3F6", + "MSRValue": "0x800", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256", + "MSRIndex": "0x3F6", + "MSRValue": "0x100", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32", + "MSRIndex": "0x3F6", + "MSRValue": "0x20", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4", + "MSRIndex": "0x3F6", + "MSRValue": "0x4", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512", + "MSRIndex": "0x3F6", + "MSRValue": "0x200", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64", + "MSRIndex": "0x3F6", + "MSRValue": "0x40", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8", + "MSRIndex": "0x3F6", + "MSRValue": "0x8", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of stores uops retired sam= e as MEM_UOPS_RETIRED.ALL_STORES", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.STORE_LATENCY", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x6" + } +] diff --git a/tools/perf/pmu-events/arch/x86/grandridge/frontend.json b/tool= s/perf/pmu-events/arch/x86/grandridge/frontend.json new file mode 100644 index 000000000000..be8f1c7e195c --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/grandridge/frontend.json @@ -0,0 +1,16 @@ +[ + { + "BriefDescription": "Counts every time the code stream enters into= a new cache line by walking sequential from the previous line or being red= irected by a jump.", + "EventCode": "0x80", + "EventName": "ICACHE.ACCESSES", + "SampleAfterValue": "200003", + "UMask": "0x3" + }, + { + "BriefDescription": "Counts every time the code stream enters into= a new cache line by walking sequential from the previous line or being red= irected by a jump and the instruction cache registers bytes are not present= . -", + "EventCode": "0x80", + "EventName": "ICACHE.MISSES", + "SampleAfterValue": "200003", + "UMask": "0x2" + } +] diff --git a/tools/perf/pmu-events/arch/x86/grandridge/memory.json b/tools/= perf/pmu-events/arch/x86/grandridge/memory.json new file mode 100644 index 000000000000..79d8af45100c --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/grandridge/memory.json @@ -0,0 +1,20 @@ +[ + { + "BriefDescription": "Counts demand data reads that were not suppli= ed by the L3 cache.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_DATA_RD.L3_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FBFC00001", + "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts demand reads for ownership (RFO) and s= oftware prefetches for exclusive ownership (PREFETCHW) that were not suppli= ed by the L3 cache.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_RFO.L3_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FBFC00002", + "SampleAfterValue": "100003", + "UMask": "0x1" + } +] diff --git a/tools/perf/pmu-events/arch/x86/grandridge/other.json b/tools/p= erf/pmu-events/arch/x86/grandridge/other.json new file mode 100644 index 000000000000..2414f6ff53b0 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/grandridge/other.json @@ -0,0 +1,20 @@ +[ + { + "BriefDescription": "Counts demand data reads that have any type o= f response.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10001", + "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts demand reads for ownership (RFO) and s= oftware prefetches for exclusive ownership (PREFETCHW) that have any type o= f response.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10002", + "SampleAfterValue": "100003", + "UMask": "0x1" + } +] diff --git a/tools/perf/pmu-events/arch/x86/grandridge/pipeline.json b/tool= s/perf/pmu-events/arch/x86/grandridge/pipeline.json new file mode 100644 index 000000000000..41212957ef21 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/grandridge/pipeline.json @@ -0,0 +1,96 @@ +[ + { + "BriefDescription": "Counts the total number of branch instruction= s retired for all branch types.", + "EventCode": "0xc4", + "EventName": "BR_INST_RETIRED.ALL_BRANCHES", + "PEBS": "1", + "PublicDescription": "Counts the total number of instructions in w= hich the instruction pointer (IP) of the processor is resteered due to a br= anch instruction and the branch instruction successfully retires. All bran= ch type instructions are accounted for.", + "SampleAfterValue": "200003" + }, + { + "BriefDescription": "Counts the total number of mispredicted branc= h instructions retired for all branch types.", + "EventCode": "0xc5", + "EventName": "BR_MISP_RETIRED.ALL_BRANCHES", + "PEBS": "1", + "PublicDescription": "Counts the total number of mispredicted bran= ch instructions retired. All branch type instructions are accounted for. = Prediction of the branch target address enables the processor to begin exec= uting instructions before the non-speculative execution path is known. The = branch prediction unit (BPU) predicts the target address based on the instr= uction pointer (IP) of the branch and on the execution path through which e= xecution reached this IP. A branch misprediction occurs when the predict= ion is wrong, and results in discarding all instructions executed in the sp= eculative path and re-fetching from the correct path.", + "SampleAfterValue": "200003" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of unhalted = core clock cycles", + "EventName": "CPU_CLK_UNHALTED.CORE", + "SampleAfterValue": "2000003", + "UMask": "0x2" + }, + { + "BriefDescription": "Counts the number of unhalted core clock cycl= es [This event is alias to CPU_CLK_UNHALTED.THREAD_P]", + "EventCode": "0x3c", + "EventName": "CPU_CLK_UNHALTED.CORE_P", + "SampleAfterValue": "2000003" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of unhalted = reference clock cycles", + "EventName": "CPU_CLK_UNHALTED.REF_TSC", + "SampleAfterValue": "2000003", + "UMask": "0x3" + }, + { + "BriefDescription": "Counts the number of unhalted reference clock= cycles at TSC frequency.", + "EventCode": "0x3c", + "EventName": "CPU_CLK_UNHALTED.REF_TSC_P", + "PublicDescription": "Counts the number of reference cycles that t= he core is not in a halt state. The core enters the halt state when it is r= unning the HLT instruction. This event is not affected by core frequency ch= anges and increments at a fixed frequency that is also used for the Time St= amp Counter (TSC). This event uses a programmable general purpose performan= ce counter.", + "SampleAfterValue": "2000003", + "UMask": "0x1" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of unhalted = core clock cycles", + "EventName": "CPU_CLK_UNHALTED.THREAD", + "SampleAfterValue": "2000003", + "UMask": "0x2" + }, + { + "BriefDescription": "Counts the number of unhalted core clock cycl= es [This event is alias to CPU_CLK_UNHALTED.CORE_P]", + "EventCode": "0x3c", + "EventName": "CPU_CLK_UNHALTED.THREAD_P", + "SampleAfterValue": "2000003" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of instructi= ons retired", + "EventName": "INST_RETIRED.ANY", + "PEBS": "1", + "SampleAfterValue": "2000003", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts the number of instructions retired", + "EventCode": "0xc0", + "EventName": "INST_RETIRED.ANY_P", + "PEBS": "1", + "SampleAfterValue": "2000003" + }, + { + "BriefDescription": "Counts the number of issue slots that were no= t consumed by the backend because allocation is stalled due to a mispredict= ed jump or a machine clear.", + "EventCode": "0x73", + "EventName": "TOPDOWN_BAD_SPECULATION.ALL", + "PublicDescription": "Counts the total number of issue slots that = were not consumed by the backend because allocation is stalled due to a mis= predicted jump or a machine clear. Only issue slots wasted due to fast nuke= s such as memory ordering nukes are counted. Other nukes are not accounted = for. Counts all issue slots blocked during this recovery window, including = relevant microcode flows, and while uops are not yet available in the instr= uction queue (IQ) or until an FE_BOUND event occurs besides OTHER and CISC.= Also includes the issue slots that were consumed by the backend but were t= hrown away because they were younger than the mispredict or machine clear.", + "SampleAfterValue": "1000003" + }, + { + "BriefDescription": "Counts the number of retirement slots not con= sumed due to backend stalls", + "EventCode": "0x74", + "EventName": "TOPDOWN_BE_BOUND.ALL", + "SampleAfterValue": "1000003" + }, + { + "BriefDescription": "Counts the number of retirement slots not con= sumed due to front end stalls", + "EventCode": "0x71", + "EventName": "TOPDOWN_FE_BOUND.ALL", + "SampleAfterValue": "1000003" + }, + { + "BriefDescription": "Counts the number of consumed retirement slot= s. Similar to UOPS_RETIRED.ALL", + "EventCode": "0x72", + "EventName": "TOPDOWN_RETIRING.ALL", + "PEBS": "1", + "SampleAfterValue": "1000003" + } +] diff --git a/tools/perf/pmu-events/arch/x86/grandridge/virtual-memory.json = b/tools/perf/pmu-events/arch/x86/grandridge/virtual-memory.json new file mode 100644 index 000000000000..bd5f2b634c98 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/grandridge/virtual-memory.json @@ -0,0 +1,24 @@ +[ + { + "BriefDescription": "Counts the number of page walks completed due= to load DTLB misses to a 1G page.", + "EventCode": "0x08", + "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED", + "SampleAfterValue": "1000003", + "UMask": "0xe" + }, + { + "BriefDescription": "Counts the number of page walks completed due= to store DTLB misses to a 1G page.", + "EventCode": "0x49", + "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED", + "SampleAfterValue": "1000003", + "UMask": "0xe" + }, + { + "BriefDescription": "Counts the number of page walks completed due= to instruction fetch misses to any page size.", + "EventCode": "0x85", + "EventName": "ITLB_MISSES.WALK_COMPLETED", + "PublicDescription": "Counts the number of page walks completed du= e to instruction fetches whose address translations missed in all Translati= on Lookaside Buffer (TLB) levels and were mapped to any page size. Include= s page walks that page fault.", + "SampleAfterValue": "200003", + "UMask": "0xe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-ev= ents/arch/x86/mapfile.csv index 437eeecfaf64..c2b83cbae225 100644 --- a/tools/perf/pmu-events/arch/x86/mapfile.csv +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv @@ -9,6 +9,7 @@ GenuineIntel-6-55-[56789ABCDEF],v1.17,cascadelakex,core GenuineIntel-6-9[6C],v1.03,elkhartlake,core GenuineIntel-6-5[CF],v13,goldmont,core GenuineIntel-6-7A,v1.01,goldmontplus,core +GenuineIntel-6-B6,v1.00,grandridge,core GenuineIntel-6-A[DE],v1.01,graniterapids,core GenuineIntel-6-(3C|45|46),v33,haswell,core GenuineIntel-6-3F,v27,haswellx,core --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54399C77B76 for ; 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Thu, 13 Apr 2023 06:30:26 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:31 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-4-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 03/21] perf vendor events intel: Add sierraforest From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add v1.00 from: https://github.com/intel/perfmon/pull/69 Signed-off-by: Ian Rogers --- tools/perf/pmu-events/arch/x86/mapfile.csv | 1 + .../arch/x86/sierraforest/cache.json | 155 ++++++++++++++++++ .../arch/x86/sierraforest/frontend.json | 16 ++ .../arch/x86/sierraforest/memory.json | 20 +++ .../arch/x86/sierraforest/other.json | 20 +++ .../arch/x86/sierraforest/pipeline.json | 96 +++++++++++ .../arch/x86/sierraforest/virtual-memory.json | 24 +++ 7 files changed, 332 insertions(+) create mode 100644 tools/perf/pmu-events/arch/x86/sierraforest/cache.json create mode 100644 tools/perf/pmu-events/arch/x86/sierraforest/frontend.js= on create mode 100644 tools/perf/pmu-events/arch/x86/sierraforest/memory.json create mode 100644 tools/perf/pmu-events/arch/x86/sierraforest/other.json create mode 100644 tools/perf/pmu-events/arch/x86/sierraforest/pipeline.js= on create mode 100644 tools/perf/pmu-events/arch/x86/sierraforest/virtual-mem= ory.json diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-ev= ents/arch/x86/mapfile.csv index c2b83cbae225..66c37a3cbf43 100644 --- a/tools/perf/pmu-events/arch/x86/mapfile.csv +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv @@ -24,6 +24,7 @@ GenuineIntel-6-1[AEF],v3,nehalemep,core GenuineIntel-6-2E,v3,nehalemex,core GenuineIntel-6-2A,v19,sandybridge,core GenuineIntel-6-(8F|CF),v1.12,sapphirerapids,core +GenuineIntel-6-AF,v1.00,sierraforest,core GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v55,skylake,core GenuineIntel-6-55-[01234],v1.29,skylakex,core diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/cache.json b/tools= /perf/pmu-events/arch/x86/sierraforest/cache.json new file mode 100644 index 000000000000..7f0dc65a55d2 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sierraforest/cache.json @@ -0,0 +1,155 @@ +[ + { + "BriefDescription": "Counts the number of cacheable memory request= s that miss in the LLC. Counts on a per core basis.", + "EventCode": "0x2e", + "EventName": "LONGEST_LAT_CACHE.MISS", + "PublicDescription": "Counts the number of cacheable memory reques= ts that miss in the Last Level Cache (LLC). Requests include demand loads, = reads for ownership (RFO), instruction fetches and L1 HW prefetches. If the= platform has an L3 cache, the LLC is the L3 cache, otherwise it is the L2 = cache. Counts on a per core basis.", + "SampleAfterValue": "200003", + "UMask": "0x41" + }, + { + "BriefDescription": "Counts the number of cacheable memory request= s that access the LLC. Counts on a per core basis.", + "EventCode": "0x2e", + "EventName": "LONGEST_LAT_CACHE.REFERENCE", + "PublicDescription": "Counts the number of cacheable memory reques= ts that access the Last Level Cache (LLC). Requests include demand loads, r= eads for ownership (RFO), instruction fetches and L1 HW prefetches. If the = platform has an L3 cache, the LLC is the L3 cache, otherwise it is the L2 c= ache. Counts on a per core basis.", + "SampleAfterValue": "200003", + "UMask": "0x4f" + }, + { + "BriefDescription": "Counts the number of load ops retired.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.ALL_LOADS", + "PEBS": "1", + "SampleAfterValue": "200003", + "UMask": "0x81" + }, + { + "BriefDescription": "Counts the number of store ops retired.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.ALL_STORES", + "PEBS": "1", + "SampleAfterValue": "200003", + "UMask": "0x82" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_1024", + "MSRIndex": "0x3F6", + "MSRValue": "0x400", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128", + "MSRIndex": "0x3F6", + "MSRValue": "0x80", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16", + "MSRIndex": "0x3F6", + "MSRValue": "0x10", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_2048", + "MSRIndex": "0x3F6", + "MSRValue": "0x800", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256", + "MSRIndex": "0x3F6", + "MSRValue": "0x100", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32", + "MSRIndex": "0x3F6", + "MSRValue": "0x20", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4", + "MSRIndex": "0x3F6", + "MSRValue": "0x4", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512", + "MSRIndex": "0x3F6", + "MSRValue": "0x200", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64", + "MSRIndex": "0x3F6", + "MSRValue": "0x40", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of tagged load uops retired= that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD = - Only counts with PEBS enabled.", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8", + "MSRIndex": "0x3F6", + "MSRValue": "0x8", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x5" + }, + { + "BriefDescription": "Counts the number of stores uops retired sam= e as MEM_UOPS_RETIRED.ALL_STORES", + "Data_LA": "1", + "EventCode": "0xd0", + "EventName": "MEM_UOPS_RETIRED.STORE_LATENCY", + "PEBS": "2", + "SampleAfterValue": "1000003", + "UMask": "0x6" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/frontend.json b/to= ols/perf/pmu-events/arch/x86/sierraforest/frontend.json new file mode 100644 index 000000000000..be8f1c7e195c --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sierraforest/frontend.json @@ -0,0 +1,16 @@ +[ + { + "BriefDescription": "Counts every time the code stream enters into= a new cache line by walking sequential from the previous line or being red= irected by a jump.", + "EventCode": "0x80", + "EventName": "ICACHE.ACCESSES", + "SampleAfterValue": "200003", + "UMask": "0x3" + }, + { + "BriefDescription": "Counts every time the code stream enters into= a new cache line by walking sequential from the previous line or being red= irected by a jump and the instruction cache registers bytes are not present= . -", + "EventCode": "0x80", + "EventName": "ICACHE.MISSES", + "SampleAfterValue": "200003", + "UMask": "0x2" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/memory.json b/tool= s/perf/pmu-events/arch/x86/sierraforest/memory.json new file mode 100644 index 000000000000..79d8af45100c --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sierraforest/memory.json @@ -0,0 +1,20 @@ +[ + { + "BriefDescription": "Counts demand data reads that were not suppli= ed by the L3 cache.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_DATA_RD.L3_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FBFC00001", + "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts demand reads for ownership (RFO) and s= oftware prefetches for exclusive ownership (PREFETCHW) that were not suppli= ed by the L3 cache.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_RFO.L3_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x3FBFC00002", + "SampleAfterValue": "100003", + "UMask": "0x1" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/other.json b/tools= /perf/pmu-events/arch/x86/sierraforest/other.json new file mode 100644 index 000000000000..2414f6ff53b0 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sierraforest/other.json @@ -0,0 +1,20 @@ +[ + { + "BriefDescription": "Counts demand data reads that have any type o= f response.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10001", + "SampleAfterValue": "100003", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts demand reads for ownership (RFO) and s= oftware prefetches for exclusive ownership (PREFETCHW) that have any type o= f response.", + "EventCode": "0xB7", + "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x10002", + "SampleAfterValue": "100003", + "UMask": "0x1" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/pipeline.json b/to= ols/perf/pmu-events/arch/x86/sierraforest/pipeline.json new file mode 100644 index 000000000000..41212957ef21 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sierraforest/pipeline.json @@ -0,0 +1,96 @@ +[ + { + "BriefDescription": "Counts the total number of branch instruction= s retired for all branch types.", + "EventCode": "0xc4", + "EventName": "BR_INST_RETIRED.ALL_BRANCHES", + "PEBS": "1", + "PublicDescription": "Counts the total number of instructions in w= hich the instruction pointer (IP) of the processor is resteered due to a br= anch instruction and the branch instruction successfully retires. All bran= ch type instructions are accounted for.", + "SampleAfterValue": "200003" + }, + { + "BriefDescription": "Counts the total number of mispredicted branc= h instructions retired for all branch types.", + "EventCode": "0xc5", + "EventName": "BR_MISP_RETIRED.ALL_BRANCHES", + "PEBS": "1", + "PublicDescription": "Counts the total number of mispredicted bran= ch instructions retired. All branch type instructions are accounted for. = Prediction of the branch target address enables the processor to begin exec= uting instructions before the non-speculative execution path is known. The = branch prediction unit (BPU) predicts the target address based on the instr= uction pointer (IP) of the branch and on the execution path through which e= xecution reached this IP. A branch misprediction occurs when the predict= ion is wrong, and results in discarding all instructions executed in the sp= eculative path and re-fetching from the correct path.", + "SampleAfterValue": "200003" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of unhalted = core clock cycles", + "EventName": "CPU_CLK_UNHALTED.CORE", + "SampleAfterValue": "2000003", + "UMask": "0x2" + }, + { + "BriefDescription": "Counts the number of unhalted core clock cycl= es [This event is alias to CPU_CLK_UNHALTED.THREAD_P]", + "EventCode": "0x3c", + "EventName": "CPU_CLK_UNHALTED.CORE_P", + "SampleAfterValue": "2000003" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of unhalted = reference clock cycles", + "EventName": "CPU_CLK_UNHALTED.REF_TSC", + "SampleAfterValue": "2000003", + "UMask": "0x3" + }, + { + "BriefDescription": "Counts the number of unhalted reference clock= cycles at TSC frequency.", + "EventCode": "0x3c", + "EventName": "CPU_CLK_UNHALTED.REF_TSC_P", + "PublicDescription": "Counts the number of reference cycles that t= he core is not in a halt state. The core enters the halt state when it is r= unning the HLT instruction. This event is not affected by core frequency ch= anges and increments at a fixed frequency that is also used for the Time St= amp Counter (TSC). This event uses a programmable general purpose performan= ce counter.", + "SampleAfterValue": "2000003", + "UMask": "0x1" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of unhalted = core clock cycles", + "EventName": "CPU_CLK_UNHALTED.THREAD", + "SampleAfterValue": "2000003", + "UMask": "0x2" + }, + { + "BriefDescription": "Counts the number of unhalted core clock cycl= es [This event is alias to CPU_CLK_UNHALTED.CORE_P]", + "EventCode": "0x3c", + "EventName": "CPU_CLK_UNHALTED.THREAD_P", + "SampleAfterValue": "2000003" + }, + { + "BriefDescription": "Fixed Counter: Counts the number of instructi= ons retired", + "EventName": "INST_RETIRED.ANY", + "PEBS": "1", + "SampleAfterValue": "2000003", + "UMask": "0x1" + }, + { + "BriefDescription": "Counts the number of instructions retired", + "EventCode": "0xc0", + "EventName": "INST_RETIRED.ANY_P", + "PEBS": "1", + "SampleAfterValue": "2000003" + }, + { + "BriefDescription": "Counts the number of issue slots that were no= t consumed by the backend because allocation is stalled due to a mispredict= ed jump or a machine clear.", + "EventCode": "0x73", + "EventName": "TOPDOWN_BAD_SPECULATION.ALL", + "PublicDescription": "Counts the total number of issue slots that = were not consumed by the backend because allocation is stalled due to a mis= predicted jump or a machine clear. Only issue slots wasted due to fast nuke= s such as memory ordering nukes are counted. Other nukes are not accounted = for. Counts all issue slots blocked during this recovery window, including = relevant microcode flows, and while uops are not yet available in the instr= uction queue (IQ) or until an FE_BOUND event occurs besides OTHER and CISC.= Also includes the issue slots that were consumed by the backend but were t= hrown away because they were younger than the mispredict or machine clear.", + "SampleAfterValue": "1000003" + }, + { + "BriefDescription": "Counts the number of retirement slots not con= sumed due to backend stalls", + "EventCode": "0x74", + "EventName": "TOPDOWN_BE_BOUND.ALL", + "SampleAfterValue": "1000003" + }, + { + "BriefDescription": "Counts the number of retirement slots not con= sumed due to front end stalls", + "EventCode": "0x71", + "EventName": "TOPDOWN_FE_BOUND.ALL", + "SampleAfterValue": "1000003" + }, + { + "BriefDescription": "Counts the number of consumed retirement slot= s. Similar to UOPS_RETIRED.ALL", + "EventCode": "0x72", + "EventName": "TOPDOWN_RETIRING.ALL", + "PEBS": "1", + "SampleAfterValue": "1000003" + } +] diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/virtual-memory.jso= n b/tools/perf/pmu-events/arch/x86/sierraforest/virtual-memory.json new file mode 100644 index 000000000000..bd5f2b634c98 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/sierraforest/virtual-memory.json @@ -0,0 +1,24 @@ +[ + { + "BriefDescription": "Counts the number of page walks completed due= to load DTLB misses to a 1G page.", + "EventCode": "0x08", + "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED", + "SampleAfterValue": "1000003", + "UMask": "0xe" + }, + { + "BriefDescription": "Counts the number of page walks completed due= to store DTLB misses to a 1G page.", + "EventCode": "0x49", + "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED", + "SampleAfterValue": "1000003", + "UMask": "0xe" + }, + { + "BriefDescription": "Counts the number of page walks completed due= to instruction fetch misses to any page size.", + "EventCode": "0x85", + "EventName": "ITLB_MISSES.WALK_COMPLETED", + "PublicDescription": "Counts the number of page walks completed du= e to instruction fetches whose address translations missed in all Translati= on Lookaside Buffer (TLB) levels and were mapped to any page size. Include= s page walks that page fault.", + "SampleAfterValue": "200003", + "UMask": "0xe" + } +] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26EDEC77B61 for ; Thu, 13 Apr 2023 13:31:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231392AbjDMNbM (ORCPT ); Thu, 13 Apr 2023 09:31:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231421AbjDMNat (ORCPT ); Thu, 13 Apr 2023 09:30:49 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D38859C5 for ; Thu, 13 Apr 2023 06:30:35 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-54efad677cbso142806967b3.6 for ; Thu, 13 Apr 2023 06:30:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392634; x=1683984634; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=5FlASAiO5Pas0vHW7aNptfPEsLffZYlOmd21jPi59uM=; b=dIpHMp8AFZtpRcUNWN3chw6is0TrNZj/cBdbO1q6meKVZ0kWjTKBSXXspzZkXfoT6i gBD5BB5+ir4aGo/DRQeFmEK6wGxXd+ntb5efmBTTmUF4y+G2XDQqWb8Pdbgaygi6ime/ Z1VHIIuVvy/ATKa/HPKUDp5VMgrKWYHaMQv9/2bJ2O/H/dG6vqddaZqSTu7M2cZ0O9QE 5ckCaTcMGEbBvVBdC4hledYeDIe2XZ/Fd5de/H2/uRxIt4/FTjv+1uE8HrNftBlOiWJP DC3fKh4YCBRBeyLDmV0OMep8TUzEatZmt3cNSP6R839eUbZ18ytGuSKPe7t9lN3PpIiC 9NPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392634; x=1683984634; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=5FlASAiO5Pas0vHW7aNptfPEsLffZYlOmd21jPi59uM=; b=FBNlEMN0bsudPkL3sO1eqlbicAj0BdS7sJMa7tqqY3dTkd7Z5Uq4a/G03Yd/vppX+P IS7I3ZHESrszl6ZI6ERU3aIypjtT2i+y7kD8sR1rjkUZL0CfSh4eE8Tbp/UWCYQ/GTSN nw24HavvSGFoFK0jFYN4zXS0w7dJMFC7x+YQ+6XEJ2EH/4uKeNDQlPSsk/LL2g3687rJ kjcHPI3Glo2hYzlFtLzJLGMUWkFYBrHb1fcVahnB98st5hAJGCrKiK2V+rahkoskDSVJ vjZ7wg9rSxIfdMz1QhKltxQppPlsP3vhW6hp4IzoiMgLQYR6i9O1B7znRPhGLhb+tj0E j6zQ== X-Gm-Message-State: AAQBX9eP7ql235UpKEqEjJLeNWhiQv7+yKd3f5vvrg/WNrrh1XCmnqP+ n6+v52USPZNf+HM+eTqmUPXkDWG1+64r X-Google-Smtp-Source: AKy350Zwc3a9qR2pXCRQBUhwd81YOs82W2+Gj6NERELs6VqyojbyCsSx1sMjEshlSjbMbGeyQxUAnt4TEuOK X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a25:d092:0:b0:b8f:67cd:fc12 with SMTP id h140-20020a25d092000000b00b8f67cdfc12mr105119ybg.13.1681392634495; Thu, 13 Apr 2023 06:30:34 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:32 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-5-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 04/21] perf vendor events intel: Fix uncore topics for alderlake From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move events from 'uncore-other' topic classification to interconnect. Signed-off-by: Ian Rogers --- .../x86/alderlake/uncore-interconnect.json | 90 +++++++++++++++++++ .../arch/x86/alderlake/uncore-other.json | 88 ------------------ .../x86/alderlaken/uncore-interconnect.json | 26 ++++++ .../arch/x86/alderlaken/uncore-other.json | 24 ----- 4 files changed, 116 insertions(+), 112 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/alderlake/uncore-interco= nnect.json create mode 100644 tools/perf/pmu-events/arch/x86/alderlaken/uncore-interc= onnect.json diff --git a/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.j= son b/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json new file mode 100644 index 000000000000..34fc052d00e4 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json @@ -0,0 +1,90 @@ +[ + { + "BriefDescription": "Number of requests allocated in Coherency Tra= cker.", + "EventCode": "0x84", + "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of any coherent requ= est at memory controller that were issued by any core.", + "EventCode": "0x85", + "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of coherent reads pe= nding on data return from memory controller that were issued by any core.", + "EventCode": "0x85", + "EventName": "UNC_ARB_DAT_OCCUPANCY.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_REQ_TRK_REQUEST.DRD", + "EventCode": "0x81", + "EventName": "UNC_ARB_DAT_REQUESTS.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_DAT_OCCUPANCY.ALL", + "EventCode": "0x85", + "EventName": "UNC_ARB_IFA_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_T= RK_OCCUPANCY.RD]", + "EventCode": "0x80", + "EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_TRK_REQUESTS.RD]", + "EventCode": "0x81", + "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of all outgoing vali= d entries in ReqTrk. Such entry is defined as valid from its allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_R= EQ_TRK_OCCUPANCY.DRD]", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Counts the number of coherent and in-coherent= requests initiated by IA cores, processor graphic units, or LLC.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_REQ_TRK_REQUEST.DRD= ]", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + } +] diff --git a/tools/perf/pmu-events/arch/x86/alderlake/uncore-other.json b/t= ools/perf/pmu-events/arch/x86/alderlake/uncore-other.json index 5f3b4c6e2e39..2af92e43b28a 100644 --- a/tools/perf/pmu-events/arch/x86/alderlake/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/alderlake/uncore-other.json @@ -1,92 +1,4 @@ [ - { - "BriefDescription": "Number of requests allocated in Coherency Tra= cker.", - "EventCode": "0x84", - "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of any coherent requ= est at memory controller that were issued by any core.", - "EventCode": "0x85", - "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of coherent reads pe= nding on data return from memory controller that were issued by any core.", - "EventCode": "0x85", - "EventName": "UNC_ARB_DAT_OCCUPANCY.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_REQ_TRK_REQUEST.DRD", - "EventCode": "0x81", - "EventName": "UNC_ARB_DAT_REQUESTS.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_DAT_OCCUPANCY.ALL", - "EventCode": "0x85", - "EventName": "UNC_ARB_IFA_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_T= RK_OCCUPANCY.RD]", - "EventCode": "0x80", - "EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_TRK_REQUESTS.RD]", - "EventCode": "0x81", - "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of all outgoing vali= d entries in ReqTrk. Such entry is defined as valid from its allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_R= EQ_TRK_OCCUPANCY.DRD]", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Counts the number of coherent and in-coherent= requests initiated by IA cores, processor graphic units, or LLC.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_REQ_TRK_REQUEST.DRD= ]", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, { "BriefDescription": "This 48-bit fixed counter counts the UCLK cyc= les.", "EventCode": "0xff", diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.= json b/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json new file mode 100644 index 000000000000..4af695a5e755 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json @@ -0,0 +1,26 @@ +[ + { + "BriefDescription": "Number of requests allocated in Coherency Tra= cker.", + "EventCode": "0x84", + "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of all outgoing vali= d entries in ReqTrk. Such entry is defined as valid from its allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Counts the number of coherent and in-coherent= requests initiated by IA cores, processor graphic units, or LLC.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + } +] diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/uncore-other.json b/= tools/perf/pmu-events/arch/x86/alderlaken/uncore-other.json index f9e7777cd2be..2af92e43b28a 100644 --- a/tools/perf/pmu-events/arch/x86/alderlaken/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/alderlaken/uncore-other.json @@ -1,28 +1,4 @@ [ - { - "BriefDescription": "Number of requests allocated in Coherency Tra= cker.", - "EventCode": "0x84", - "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of all outgoing vali= d entries in ReqTrk. Such entry is defined as valid from its allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Counts the number of coherent and in-coherent= requests initiated by IA cores, processor graphic units, or LLC.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, { "BriefDescription": "This 48-bit fixed counter counts the UCLK cyc= les.", "EventCode": "0xff", --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C003C77B6F for ; Thu, 13 Apr 2023 13:31:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231396AbjDMNbX (ORCPT ); Thu, 13 Apr 2023 09:31:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231393AbjDMNaw (ORCPT ); Thu, 13 Apr 2023 09:30:52 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 747E3AF3F for ; Thu, 13 Apr 2023 06:30:43 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id o19-20020a254113000000b00b8ed021361bso15968174yba.7 for ; Thu, 13 Apr 2023 06:30:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392642; x=1683984642; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=CNQ/CBH05fbccri6AIyGxIe8z9FNl5fUM56NJ0S2EHM=; b=N+3WQxmT2C4RSRQ3xlHNDugGT78FbRzG9Z3MeZz1LVAoMlyS060CINXSV0e1WAJYvq SaEzqvzyDWj7zJ1utpp8Onz99oWNbpzqgHgFUwQhHATTUMssPEKTggmIc89eGIL+FMA5 ntHRSBho2E+V2VZ1SUrPURZbqpwIKRiRxN79/6IfB/e7NqOHQTyjRZ9GD+lQBwY97lx+ 8kisuFeRVHaqFiJUlOPZJm+IziG6p5rcCKKt8gLZLrrVwaHzh8Ap1JcPRXRgNKIZw5Cz qs9t1nidjpgHagRPCJjx9jjUS70Uvqq7vY040xsuN02a7kGulLD0M72l0R54Zz3hiWJM uYDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392642; x=1683984642; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=CNQ/CBH05fbccri6AIyGxIe8z9FNl5fUM56NJ0S2EHM=; b=Uf76x4tnL2XNAPtSF0KhSPJyUsKzqmH4lI/PaPw+dCELlIMiHR+YJtFV4DuT8PAyuy 8O8AOwmKIcOgob+aMS9eGFOGzYRHi1l7ycRHbXKxnXbKxako7ZsYmoVzvTqMEoKxFTkQ NWSAtL+cKOg3S00H7o9ZhETrP7bCVN/pxMzkqgkY7pIhZv+L2znxARJSuMwUFkx5bcFF MRZr9esxnsgk4Qf4W8yNgKxnNXlSfwIumkOoyrXsWAbPAkE7cYIyqbk5uEEK2/PgJVgg xon3Av/dUcxTUM9zgu0ISdlOvrUG5s5mi1FheCzxvfy8xNQjNth/MPujA6PiqtY0WYZ9 uvGw== X-Gm-Message-State: AAQBX9dj40CV/MV3BnkNUvVIo1H6TLhUROKy1Clmq3YoLcZG2v8bGIPQ OjMEsqE0+ovEkZhb0rjkIP4dycBaErGg X-Google-Smtp-Source: AKy350YoyQl0cxmTP1BtWWKaM8dgdDV/ai17dgFQSZwS5fqzq91o/CqJooKnZA7O5P4sHKvPcTGL8GqfiBLc X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a25:6ed6:0:b0:b68:d117:305b with SMTP id j205-20020a256ed6000000b00b68d117305bmr1170202ybc.10.1681392642496; Thu, 13 Apr 2023 06:30:42 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:33 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-6-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 05/21] perf vendor events intel: Fix uncore topics for broadwell From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Reduce the number of 'uncore-other' topic classifications, move to cache and interconnect. Signed-off-by: Ian Rogers --- .../arch/x86/broadwell/uncore-cache.json | 30 ++++----- .../x86/broadwell/uncore-interconnect.json | 61 +++++++++++++++++++ .../arch/x86/broadwell/uncore-other.json | 59 ------------------ 3 files changed, 76 insertions(+), 74 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/broadwell/uncore-interco= nnect.json diff --git a/tools/perf/pmu-events/arch/x86/broadwell/uncore-cache.json b/t= ools/perf/pmu-events/arch/x86/broadwell/uncore-cache.json index fcb15b880bad..c5cc43825cb9 100644 --- a/tools/perf/pmu-events/arch/x86/broadwell/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/broadwell/uncore-cache.json @@ -6,7 +6,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in E or S-state.", "UMask": "0x86", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in I-state", @@ -15,7 +15,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in I-state.", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in M-state", @@ -24,7 +24,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in M-state.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in MESI-state", @@ -33,7 +33,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in MESI-state.", "UMask": "0x8f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in E or S-state", @@ -42,7 +42,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup read request that access cache and= found line in E or S-state.", "UMask": "0x16", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in I-state", @@ -51,7 +51,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup read request that access cache and= found line in I-state.", "UMask": "0x18", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in M-state", @@ -60,7 +60,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup read request that access cache and= found line in M-state.", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in any MESI-state", @@ -69,7 +69,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup read request that access cache and= found line in any MESI-state.", "UMask": "0x1f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in E or S-state", @@ -78,7 +78,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup write request that access cache an= d found line in E or S-state.", "UMask": "0x26", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in M-state", @@ -87,7 +87,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup write request that access cache an= d found line in M-state.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in MESI-state", @@ -96,7 +96,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup write request that access cache an= d found line in MESI-state.", "UMask": "0x2f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a modified line in some proces= sor core.", @@ -104,7 +104,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a non-modified line in some pr= ocessor core.", @@ -112,7 +112,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE", "PerPkg": "1", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which misses in some processor core.", @@ -120,7 +120,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EVICTION", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which misses in some processor core.", @@ -128,6 +128,6 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/broadwell/uncore-interconnect.j= son b/tools/perf/pmu-events/arch/x86/broadwell/uncore-interconnect.json new file mode 100644 index 000000000000..64af685274a2 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/broadwell/uncore-interconnect.json @@ -0,0 +1,61 @@ +[ + { + "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, Core aperture, etc.", + "EventCode": "0x84", + "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of all Core outgoing= valid entries. Such entry is defined as valid from its allocation till fir= st of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-cohe= rent traffic.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Cycles with at least one request outstanding = is waiting for data return from memory controller. Account for coherent and= non-coherent requests initiated by IA Cores, Processor Graphics Unit, or L= LC.;", + "CounterMask": "1", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries that are in DirectData mode. Such entry is defined as vali= d when it is allocated till data sent to Core (first chunk, IDI0). Applicab= le for IA Cores' requests in normal case.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.DRD_DIRECT", + "PerPkg": "1", + "PublicDescription": "Each cycle count number of valid coherent Da= ta Read entries that are in DirectData mode. Such entry is defined as valid= when it is allocated till data sent to Core (first chunk, IDI0). Applicabl= e for IA Cores' requests in normal case.", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Total number of Core outgoing entries allocat= ed. Accounts for Coherent and non-coherent traffic.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of Core coherent Data Read entries all= ocated in DirectData mode", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.DRD_DIRECT", + "PerPkg": "1", + "PublicDescription": "Number of Core coherent Data Read entries al= located in DirectData mode.", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of Writes allocated - any write transa= ctions: full/partials writes and evictions.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "ARB" + } +] diff --git a/tools/perf/pmu-events/arch/x86/broadwell/uncore-other.json b/t= ools/perf/pmu-events/arch/x86/broadwell/uncore-other.json index 368a958a18a0..58be90d7cc93 100644 --- a/tools/perf/pmu-events/arch/x86/broadwell/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/broadwell/uncore-other.json @@ -1,63 +1,4 @@ [ - { - "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, Core aperture, etc.", - "EventCode": "0x84", - "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of all Core outgoing= valid entries. Such entry is defined as valid from its allocation till fir= st of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-cohe= rent traffic.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Cycles with at least one request outstanding = is waiting for data return from memory controller. Account for coherent and= non-coherent requests initiated by IA Cores, Processor Graphics Unit, or L= LC.;", - "CounterMask": "1", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries that are in DirectData mode. Such entry is defined as vali= d when it is allocated till data sent to Core (first chunk, IDI0). Applicab= le for IA Cores' requests in normal case.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.DRD_DIRECT", - "PerPkg": "1", - "PublicDescription": "Each cycle count number of valid coherent Da= ta Read entries that are in DirectData mode. Such entry is defined as valid= when it is allocated till data sent to Core (first chunk, IDI0). Applicabl= e for IA Cores' requests in normal case.", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Total number of Core outgoing entries allocat= ed. Accounts for Coherent and non-coherent traffic.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of Core coherent Data Read entries all= ocated in DirectData mode", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.DRD_DIRECT", - "PerPkg": "1", - "PublicDescription": "Number of Core coherent Data Read entries al= located in DirectData mode.", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of Writes allocated - any write transa= ctions: full/partials writes and evictions.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "ARB" - }, { "BriefDescription": "This 48-bit fixed counter counts the UCLK cyc= les", "EventCode": "0xff", --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 132B4C77B6E for ; Thu, 13 Apr 2023 13:31:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231490AbjDMNbp (ORCPT ); Thu, 13 Apr 2023 09:31:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231417AbjDMNbI (ORCPT ); Thu, 13 Apr 2023 09:31:08 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08A182697 for ; Thu, 13 Apr 2023 06:30:51 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-54f810e01f5so68901487b3.0 for ; Thu, 13 Apr 2023 06:30:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392650; x=1683984650; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=0Vu/qm7ebPvmIhqU01a0jg47awCkYqvwG1si0PjsgVU=; b=UrN9BHSXvuQUIQfzxRkWf2UxmC06vvP1MW6o0VSBXbqGgwUBvxkhvBkgdFvMryVQ5h gvyaVg+3K1NxDXbRtF0GlwfXY8mxGsUIZAkJW4WSLfNxK2C3dQh7tuSbCh4Uq6EVOpSq wSIig7Ia4nwc8/qLCJReJf3/tgdmIoIa2VJ1PfLuO/cydTuvvJEII8JphEWhrH5UcyIK VYjR7TeV8zeWegu37+IAehjywScQzcg3DxU8k2CZ5jejr2O8LOIpYcMksIEw5M8ZZ0/P perEsthNMA8qA6woOFAJh/iyeebxl6+e9DuPshrlIvm3arAa9WH68ubSibSayaFymWrG PNyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392650; x=1683984650; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=0Vu/qm7ebPvmIhqU01a0jg47awCkYqvwG1si0PjsgVU=; b=btSwI1W9XiO3kv0VfaCYSh/jFa11s+SzksuVYG0NdBv0azxtwP0JPISHfsc17uTmZu RRsPyUwgwQcEqr3dlZAHVqYdyzB3KWyMwxxtlrHnmwDuKDwQiL7eynQTB13EYEcSwzwz 3l+cAGBgvaZ6dlGceigRZ4v46wBzhiQsRvraLtrbkrV5+AK+uM1TvvsHH01/PBdBfMXq NEpq6GS3ZMBisjlemolV/7wpq6MFu7IPaZWWQkGJRyK5hpY96K4u1+nFI8fF325vIeKb ilyK3b5nkuySQxPfTXgIx5LF2I3uZEi8GhPGURofq9ECX4+iAtl52zbsEMU1nsJNx7oQ JbqA== X-Gm-Message-State: AAQBX9dp4tMhkv+uyDTVdc79Eletc8A9ic2TG1roovCBJaDAH4CGgpyz uxuh1Kkw+ARxPDV/pGD1cLWaFvcxMIU8 X-Google-Smtp-Source: AKy350Y3XYUnmYbCBC+3EiIixVLYlPXHthUUw9cIeHm7hHz1P+lJI+UnOwhO8JX/pprjwwyRi44CNXCRoB2K X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a25:40f:0:b0:b26:884:c35e with SMTP id 15-20020a25040f000000b00b260884c35emr4468956ybe.4.1681392650730; Thu, 13 Apr 2023 06:30:50 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:34 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-7-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 06/21] perf vendor events intel: Fix uncore topics for broadwellde From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/broadwellde/uncore-cache.json | 324 ++++----- .../x86/broadwellde/uncore-interconnect.json | 614 ++++++++++++++++++ .../{uncore-other.json =3D> uncore-io.json} | 612 ----------------- 3 files changed, 776 insertions(+), 774 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/broadwellde/uncore-inter= connect.json rename tools/perf/pmu-events/arch/x86/broadwellde/{uncore-other.json =3D> = uncore-io.json} (53%) diff --git a/tools/perf/pmu-events/arch/x86/broadwellde/uncore-cache.json b= /tools/perf/pmu-events/arch/x86/broadwellde/uncore-cache.json index 2bf23ef7bfac..56bba6d4e0f6 100644 --- a/tools/perf/pmu-events/arch/x86/broadwellde/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/broadwellde/uncore-cache.json @@ -4,13 +4,13 @@ "EventCode": "0xA", "EventName": "UNC_C_BOUNCE_CONTROL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Uncore Clocks", "EventName": "UNC_C_CLOCKTICKS", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Counter 0 Occupancy", @@ -18,7 +18,7 @@ "EventName": "UNC_C_COUNTER0_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "FaST wire asserted", @@ -26,7 +26,7 @@ "EventName": "UNC_C_FAST_ASSERTED", "PerPkg": "1", "PublicDescription": "Counts the number of cycles either the local= distress or incoming distress signals are asserted. Incoming distress inc= ludes both up and dn.", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Any Request", @@ -35,7 +35,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Filters for any transaction originati= ng from the IPQ or IRQ. This does not include lookups originating from the= ISMQ.", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Data Read Request", @@ -44,7 +44,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Read transactions", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Lookups that Match NID", @@ -53,7 +53,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Qualify one of the other subevents by= the Target NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER.nid. In= conjunction with STATE =3D I, it is possible to monitor misses to specific= NIDs in the system.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Any Read Request", @@ -62,7 +62,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Read transactions", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; External Snoop Request", @@ -71,7 +71,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Filters for only snoop requests comin= g from the remote socket(s) through the IPQ.", "UMask": "0x9", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Write Requests", @@ -80,7 +80,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Writeback transactions from L2 to the= LLC This includes all write transactions -- both Cacheable and UC.", "UMask": "0x5", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in E state", @@ -89,7 +89,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -98,7 +98,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in S State", @@ -107,7 +107,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -116,7 +116,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in M state", @@ -125,7 +125,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Victimized Lines that Match= NID", @@ -134,7 +134,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.; Qu= alify one of the other subevents by the Target NID. The NID is programmed = in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it is pos= sible to monitor misses to specific NIDs in the system.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; DRd hitting non-M with raw CV=3D0", @@ -143,7 +143,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Clean Victim with raw CV=3D0", @@ -152,7 +152,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; RFO HitS", @@ -161,7 +161,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Number of = times that an RFO hit in S state. This is useful for determining if it mig= ht be good for a workload to use RspIWB instead of RspSWB.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Silent Snoop Eviction", @@ -170,7 +170,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc", @@ -179,7 +179,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Write Combining Aliasing", @@ -188,7 +188,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 0", @@ -197,7 +197,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 0", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 1", @@ -206,7 +206,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 2", @@ -215,7 +215,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 2", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 3", @@ -224,7 +224,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 3", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Bits Decremented", @@ -233,7 +233,7 @@ "PerPkg": "1", "PublicDescription": "How often all LRU bits were decremented by 1= ", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; Non-0 Aged Victim", @@ -242,7 +242,7 @@ "PerPkg": "1", "PublicDescription": "How often we picked a victim that had a non-= zero age", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; All", @@ -251,7 +251,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down", @@ -260,7 +260,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up", @@ -269,7 +269,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Even", @@ -278,7 +278,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Odd", @@ -287,7 +287,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Even", @@ -296,7 +296,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Odd", @@ -305,7 +305,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; All", @@ -314,7 +314,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down", @@ -323,7 +323,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up", @@ -332,7 +332,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Even", @@ -341,7 +341,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Odd", @@ -350,7 +350,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Even", @@ -359,7 +359,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Odd", @@ -368,7 +368,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -377,7 +377,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -386,7 +386,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up", @@ -395,7 +395,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Even", @@ -404,7 +404,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Odd", @@ -413,7 +413,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Even", @@ -422,7 +422,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Odd", @@ -431,7 +431,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; AD", @@ -439,7 +439,7 @@ "EventName": "UNC_C_RING_BOUNCES.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; AK", @@ -447,7 +447,7 @@ "EventName": "UNC_C_RING_BOUNCES.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; BL", @@ -455,7 +455,7 @@ "EventName": "UNC_C_RING_BOUNCES.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", @@ -463,7 +463,7 @@ "EventName": "UNC_C_RING_BOUNCES.IV", "PerPkg": "1", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -472,7 +472,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -481,7 +481,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -490,7 +490,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters for Down polarity", "UMask": "0xcc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -499,7 +499,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD", @@ -507,7 +507,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK", @@ -515,7 +515,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL", @@ -523,7 +523,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "IV", @@ -531,14 +531,14 @@ "EventName": "UNC_C_RING_SINK_STARVED.IV", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of cycles the Cbo is actively throttli= ng traffic onto the Ring in order to limit bounce traffic.", "EventCode": "0x7", "EventName": "UNC_C_RING_SRC_THRTL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IRQ", @@ -547,7 +547,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IPQ is externally startved and therefore we are blocking the IRQ.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IPQ", @@ -556,7 +556,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IRQ is externally starved and therefore we are blocking the IPQ.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; ISMQ_BID", @@ -565,7 +565,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; Number of times that the ISMQ Bid.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; PRQ", @@ -574,7 +574,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IPQ", @@ -583,7 +583,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ", @@ -592,7 +592,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ Rejected", @@ -601,7 +601,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; PRQ", @@ -610,7 +610,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; PRQ", @@ -619,7 +619,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IPQ", @@ -628,7 +628,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IPQ in Internal S= tarvation.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IRQ", @@ -637,7 +637,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IRQ in Internal S= tarvation.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; ISMQ", @@ -646,7 +646,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the ISMQ in Internal = Starvation.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; PRQ", @@ -655,7 +655,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Address Conflict", @@ -664,7 +664,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from an address conflicts. Address conflicts out of the IPQ shou= ld be rare. They will generally only occur if two different sockets are se= nding requests to the same address at the same time. This is a true confli= ct case, unlike the IPQ Address Conflict which is commonly caused by prefet= ching characteristics.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Any Reject", @@ -673,7 +673,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject. TOR rejects from the IPQ can be caused by the Egress being full= or Address Conflicts.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No Egress Credits", @@ -682,7 +682,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from the Egress being full. IPQ requests make use of the AD Egre= ss for regular responses, the BL egress to forward data, and the AK egress = to return credits.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No QPI Credits", @@ -691,7 +691,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No AD Sbo Credits", @@ -700,7 +700,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request from the IPQ was retried because of it = lacked credits to send an AD packet to the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Target Node Filter", @@ -709,7 +709,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request from the IPQ was retried filtered by th= e Target NodeID as specified in the Cbox's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Address Confli= ct", @@ -718,7 +718,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because of an address match in the TOR. In order to= maintain coherency, requests to the same address are not allowed to pass e= ach other up in the Cbo. Therefore, if there is an outstanding request to = a given address, one cannot issue another request to that address until it = is complete. This comes up most commonly with prefetches. Outstanding pre= fetches occasionally will not complete their memory fetch and a demand requ= est to the same address will then sit in the IRQ and get retried until the = prefetch fills the data into the LLC. Therefore, it will not be uncommon t= o see this case in high bandwidth streaming workloads when the LLC Prefetch= er in the core is enabled.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Any Reject", @@ -727,7 +727,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of IRQ retries that occur.= Requests from the IRQ are retried if they are rejected from the TOR pipel= ine for a variety of reasons. Some of the most common reasons include if t= he Egress is full, there are no RTIDs, or there is a Physical Address match= to another outstanding request.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No Egress Cred= its", @@ -736,7 +736,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because it failed to acquire an entry in the Egress.= The egress is the buffer that queues up for allocating onto the ring. IR= Q requests can make use of all four rings and all four Egresses. If any of= the queues that a given request needs to make use of are full, the request= will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No IIO Credits= ", @@ -745,7 +745,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a request attempted to acqui= re the NCS/NCB credit for sending messages on BL to the IIO. There is a si= ngle credit in each CBo that is shared between the NCS and NCB message clas= ses for sending transactions on the BL ring (such as read data) to the IIO.= ", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects", @@ -754,7 +754,7 @@ "PerPkg": "1", "PublicDescription": "Qualify one of the other subevents by a give= n RTID destination NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER1.n= id.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No QPI Credits= ", @@ -763,7 +763,7 @@ "PerPkg": "1", "PublicDescription": "Number of requests rejects because of lack o= f QPI Ingress credits. These credits are required in order to send transac= tions to the QPI agent. Please see the QPI_IGR_CREDITS events for more inf= ormation.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No RTIDs", @@ -772,7 +772,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that requests fro= m the IRQ were retried because there were no RTIDs available. RTIDs are re= quired after a request misses the LLC and needs to send snoops and/or reque= sts to memory. If there are no RTIDs available, requests will queue up in = the IRQ and retry until one becomes available. Note that there are multipl= e RTID pools for the different sockets. There may be cases where the local= RTIDs are all used, but requests destined for remote memory can still acqu= ire an RTID because there are remote RTIDs available. This event does not = provide any filtering for this case.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No AD Sbo Cred= its", @@ -781,7 +781,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried because of it lacked credits to send an AD packet to= the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No BL Sbo Cred= its", @@ -790,7 +790,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried because of it lacked credits to send an BL packet to= the Sbo.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Target Node Fi= lter", @@ -799,7 +799,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried filtered by the Target NodeID as specified in the Cb= ox's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; Any Reject", @@ -808,7 +808,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = total number of times that a request from the ISMQ retried because of a TOR= reject. ISMQ requests generally will not need to retry (or at least ISMQ = retries are less common than IRQ retries). ISMQ requests will retry if the= y are not able to acquire a needed Egress credit to get onto the ring, or f= or cache evictions that need to acquire an RTID. Most ISMQ requests alread= y have an RTID, so eviction retries will be less common here.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No Egress Credits", @@ -817,7 +817,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by a lack of Egress credits. The egress is the buffer that queues = up for allocating onto the ring. If any of the Egress queues that a given = request needs to make use of are full, the request will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No IIO Credits", @@ -826,7 +826,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Number of t= imes a request attempted to acquire the NCS/NCB credit for sending messages= on BL to the IIO. There is a single credit in each CBo that is shared bet= ween the NCS and NCB message classes for sending transactions on the BL rin= g (such as read data) to the IIO.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries", @@ -835,7 +835,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Qualify one= of the other subevents by a given RTID destination NID. The NID is progra= mmed in Cn_MSR_PMON_BOX_FILTER1.nid.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No QPI Credits", @@ -844,7 +844,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No RTIDs", @@ -853,7 +853,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by no RTIDs. M-state cache evictions are serviced through the ISM= Q, and must acquire an RTID in order to write back to memory. If no RTIDs = are available, they will be retried.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries", @@ -862,7 +862,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Qualify one= of the other subevents by a given RTID destination NID. The NID is progra= mmed in Cn_MSR_PMON_BOX_FILTER1.nid.", "UMask": "0x80", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; No AD Sbo Credits= ", @@ -871,7 +871,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried because of it lacked credits to send an AD packet t= o the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; No BL Sbo Credits= ", @@ -880,7 +880,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried because of it lacked credits to send an BL packet t= o the Sbo.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; Target Node Filte= r", @@ -889,7 +889,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried filtered by the Target NodeID as specified in the C= box's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IPQ", @@ -898,7 +898,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ", @@ -907,7 +907,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ Rejected", @@ -916,7 +916,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; PRQ Rejects", @@ -925,7 +925,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Acquired; For AD Ring", @@ -934,7 +934,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits acquired in a given cy= cle, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Acquired; For BL Ring", @@ -943,7 +943,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits acquired in a given cy= cle, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Occupancy; For AD Ring", @@ -952,7 +952,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits in use in a given cycl= e, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Occupancy; For BL Ring", @@ -961,7 +961,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits in use in a given cycl= e, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; All", @@ -970,7 +970,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR. This includes requests that reside in the TOR for a shor= t time, such as LLC Hits that do not need to snoop cores or requests that g= et rejected and have to be retried through one of the ingress queues. The = TOR is more commonly a bottleneck in skews with smaller core counts, where = the ratio of RTIDs to TOR entries is larger. Note that there are reserved = TOR entries for various request types, so it is possible that a given reque= st type be blocked with an occupancy that is less than 20. Also note that = generally requests will not be able to arbitrate into the TOR pipeline if t= here are no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Evictions", @@ -979,7 +979,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Eviction transactions in= serted into the TOR. Evictions can be quick, such as when the line is in t= he F, S, or E states and no core valid bits are set. They can also be long= er if either CV bits are set (so the cores need to be snooped) and/or if th= ere is a HitM (in which case it is necessary to write the request out to me= mory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory", @@ -988,7 +988,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory - Opcode Matched", @@ -997,7 +997,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisf= ied by an opcode, inserted into the TOR that are satisfied by locally HOMe= d memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory", @@ -1006,7 +1006,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory - Opcode = Matched", @@ -1015,7 +1015,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by locally HOMe= d memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Miss Opcode Match", @@ -1024,7 +1024,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory", @@ -1033,7 +1033,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory - Opcode= Matched", @@ -1042,7 +1042,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by remote cach= es or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched", @@ -1051,7 +1051,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched (matches= an RTID destination) transactions inserted into the TOR. The NID is progr= ammed in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it i= s possible to monitor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Evictions", @@ -1060,7 +1060,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched eviction tra= nsactions inserted into the TOR.", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Miss All", @@ -1069,7 +1069,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched miss req= uests that were inserted into the TOR.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched Miss", @@ -1078,7 +1078,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched", @@ -1087,7 +1087,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Writebacks", @@ -1096,7 +1096,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched write transa= ctions inserted into the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Opcode Match", @@ -1105,7 +1105,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory", @@ -1114,7 +1114,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory - Opcode Matched", @@ -1123,7 +1123,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisf= ied by an opcode, inserted into the TOR that are satisfied by remote cache= s or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Writebacks", @@ -1132,7 +1132,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Write transactions inser= ted into the TOR. This does not include RFO, but actual operations that c= ontain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Any", @@ -1141,7 +1141,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All valid TO= R entries. This includes requests that reside in the TOR for a short time,= such as LLC Hits that do not need to snoop cores or requests that get reje= cted and have to be retried through one of the ingress queues. The TOR is = more commonly a bottleneck in skews with smaller core counts, where the rat= io of RTIDs to TOR entries is larger. Note that there are reserved TOR ent= ries for various request types, so it is possible that a given request type= be blocked with an occupancy that is less than 20. Also note that general= ly requests will not be able to arbitrate into the TOR pipeline if there ar= e no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Evictions", @@ -1150,7 +1150,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding eviction transactions in the TOR. Evictions can be quick, such a= s when the line is in the F, S, or E states and no core valid bits are set.= They can also be longer if either CV bits are set (so the cores need to b= e snooped) and/or if there is a HitM (in which case it is necessary to writ= e the request out to memory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1159,7 +1159,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Local Memory - Opcode Matched", @@ -1168,7 +1168,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by locally HOMed memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss All", @@ -1177,7 +1177,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding miss requests in the TOR. 'Miss' means the allocation requires a= n RTID. This generally means that the request was sent to memory or MMIO.", "UMask": "0xa", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1186,7 +1186,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Local Memory - Opcod= e Matched", @@ -1195,7 +1195,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by locally HOMed memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss Opcode Match", @@ -1204,7 +1204,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = for miss transactions that match an opcode. This generally means that the r= equest was sent to memory or MMIO.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1213,7 +1213,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Remote Memory - Opco= de Matched", @@ -1222,7 +1222,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by remote caches or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1231,7 +1231,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of NI= D matched outstanding requests in the TOR. The NID is programmed in Cn_MSR= _PMON_BOX_FILTER.nid.In conjunction with STATE =3D I, it is possible to mon= itor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Evictions", @@ -1240,7 +1240,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding NID matched eviction transactions in the TOR .", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1249,7 +1249,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched Miss", @@ -1258,7 +1258,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched", @@ -1267,7 +1267,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Writebacks", @@ -1276,7 +1276,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); NID matched = write transactions int the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Opcode Match", @@ -1285,7 +1285,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc).", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1294,7 +1294,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Remote Memory - Opcode Matched= ", @@ -1303,7 +1303,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by remote caches or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Writebacks", @@ -1312,7 +1312,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Write transa= ctions in the TOR. This does not include RFO, but actual operations that = contain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AD Ring", @@ -1320,7 +1320,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AK Ring", @@ -1328,7 +1328,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto BL Ring", @@ -1336,7 +1336,7 @@ "EventName": "UNC_C_TxR_ADS_USED.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Cachebo", @@ -1345,7 +1345,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AD ring. Some example include out= bound requests, snoop requests, and snoop responses.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Corebo", @@ -1354,7 +1354,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AD ring. This is commonly used for= outbound requests.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Cachebo", @@ -1363,7 +1363,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AK ring. This is commonly used fo= r credit returns and GO responses.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Corebo", @@ -1372,7 +1372,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AK ring. This is commonly used for= snoop responses coming from the core and destined for a Cachebo.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Cacheno", @@ -1381,7 +1381,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the BL ring. This is commonly used to= send data from the cache to various destinations.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Corebo", @@ -1390,7 +1390,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the BL ring. This is commonly used for= transferring writeback data to the cache.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; IV - Cachebo", @@ -1399,7 +1399,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the IV ring. This is commonly used fo= r snoops to the cores.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AD Ring (to core)", @@ -1408,7 +1408,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the core AD egress spent in starvation", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AK Ring", @@ -1417,7 +1417,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that both AK egresses spent in starvation", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto BL Ring", @@ -1426,7 +1426,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that both BL egresses spent in starvation", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto IV Ring", @@ -1435,7 +1435,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the cachebo IV egress spent in starvati= on", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BT Cycles Not Empty", diff --git a/tools/perf/pmu-events/arch/x86/broadwellde/uncore-interconnect= .json b/tools/perf/pmu-events/arch/x86/broadwellde/uncore-interconnect.json new file mode 100644 index 000000000000..8a327e0f1441 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/broadwellde/uncore-interconnect.json @@ -0,0 +1,614 @@ +[ + { + "BriefDescription": "Total Write Cache Occupancy; Any Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy; Select Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Clocks in the IRP", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of clocks in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CLFlush", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CRd", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.CRD", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; DRd", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.DRD", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; PCIDCAHin5t", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; PCIRdCur", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; PCIItoM", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; RFO", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.RFO", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; WbMtoI", + "EventCode": "0x13", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", + "PerPkg": "1", + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of A= tomic Transactions as Secondary", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", + "PerPkg": "1", + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of R= ead Transactions as Secondary", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", + "PerPkg": "1", + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of W= rite Transactions as Secondary", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_REJ", + "PerPkg": "1", + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Requests", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_REQ", + "PerPkg": "1", + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Requests", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_XFER", + "PerPkg": "1", + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Transfers= From Primary to Secondary", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", + "PerPkg": "1", + "PublicDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints= From Primary to Secondary", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Prefetch TimeOut", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.PF_TIMEOUT", + "PerPkg": "1", + "PublicDescription": "Indicates the fetch for a previous prefetch = wasn't accepted by the prefetch. This happens in the case of a prefetch T= imeOut", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Data Throttled", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.DATA_THROTTLE", + "PerPkg": "1", + "PublicDescription": "IRP throttled switch data", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.LOST_FWD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Received Invalid", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Received Valid", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_E", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_M", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_S", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Ingress Occupancy", + "EventCode": "0xA", + "EventName": "UNC_I_RxR_AK_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL", + "EventCode": "0x4", + "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - DRS", + "EventCode": "0x1", + "EventName": "UNC_I_RxR_BL_DRS_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY", + "EventCode": "0x7", + "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL", + "EventCode": "0x5", + "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - NCB", + "EventCode": "0x2", + "EventName": "UNC_I_RxR_BL_NCB_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY", + "EventCode": "0x8", + "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL", + "EventCode": "0x6", + "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - NCS", + "EventCode": "0x3", + "EventName": "UNC_I_RxR_BL_NCS_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY", + "EventCode": "0x9", + "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit E or S", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", + "PerPkg": "1", + "PublicDescription": "Snoop Responses : Hit E or S", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit I", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", + "PerPkg": "1", + "PublicDescription": "Snoop Responses : Hit I", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit M", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", + "PerPkg": "1", + "PublicDescription": "Snoop Responses : Hit M", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Miss", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.MISS", + "PerPkg": "1", + "PublicDescription": "Snoop Responses : Miss", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpCode", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", + "PerPkg": "1", + "PublicDescription": "Snoop Responses : SnpCode", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpData", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", + "PerPkg": "1", + "PublicDescription": "Snoop Responses : SnpData", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpInv", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", + "PerPkg": "1", + "PublicDescription": "Snoop Responses : SnpInv", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Atomic", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Other", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Read Prefetches", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.RD_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Reads", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.READS", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Writes", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only write requests. = Each write request should have a prefetch, so there is no need to explicit= ly track these requests.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Write Prefetches", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of write p= refetches.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD Egress Credit Stalls", + "EventCode": "0x18", + "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x19", + "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xE", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xF", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0xD", + "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.DISABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.ENABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "PHOLD cycles. Filter from source CoreID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "PublicDescription": "Number outstanding register requests within = message channel tracker", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.CMC", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Livelock", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; LTError", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LTERROR", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Monitor T0", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Monitor T1", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Other", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.OTHER", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Trap", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.TRAP", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.UMC", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x20", + "Unit": "UBOX" + } +] diff --git a/tools/perf/pmu-events/arch/x86/broadwellde/uncore-other.json b= /tools/perf/pmu-events/arch/x86/broadwellde/uncore-io.json similarity index 53% rename from tools/perf/pmu-events/arch/x86/broadwellde/uncore-other.json rename to tools/perf/pmu-events/arch/x86/broadwellde/uncore-io.json index fea3dea67f38..01e04daf03da 100644 --- a/tools/perf/pmu-events/arch/x86/broadwellde/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/broadwellde/uncore-io.json @@ -1,482 +1,4 @@ [ - { - "BriefDescription": "Total Write Cache Occupancy; Any Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Select Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Clocks in the IRP", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of clocks in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CLFlush", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CRd", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.CRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; DRd", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.DRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIDCAHin5t", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIRdCur", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIItoM", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; RFO", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; WbMtoI", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of A= tomic Transactions as Secondary", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of R= ead Transactions as Secondary", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of W= rite Transactions as Secondary", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Requests", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Requests", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Transfers= From Primary to Secondary", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints= From Primary to Secondary", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch TimeOut", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.PF_TIMEOUT", - "PerPkg": "1", - "PublicDescription": "Indicates the fetch for a previous prefetch = wasn't accepted by the prefetch. This happens in the case of a prefetch T= imeOut", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Data Throttled", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.DATA_THROTTLE", - "PerPkg": "1", - "PublicDescription": "IRP throttled switch data", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Invalid", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Valid", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Ingress Occupancy", - "EventCode": "0xA", - "EventName": "UNC_I_RxR_AK_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "EventCode": "0x4", - "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - DRS", - "EventCode": "0x1", - "EventName": "UNC_I_RxR_BL_DRS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "EventCode": "0x7", - "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "EventCode": "0x5", - "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCB", - "EventCode": "0x2", - "EventName": "UNC_I_RxR_BL_NCB_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "EventCode": "0x8", - "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "EventCode": "0x6", - "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCS", - "EventCode": "0x3", - "EventName": "UNC_I_RxR_BL_NCS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "EventCode": "0x9", - "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit E or S", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit E or S", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit I", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit I", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit M", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit M", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Miss", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Miss", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpCode", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpCode", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpData", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpData", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpInv", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpInv", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Atomic", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Other", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Read Prefetches", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.RD_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Reads", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.READS", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Writes", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only write requests. = Each write request should have a prefetch, so there is no need to explicit= ly track these requests.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Write Prefetches", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of write p= refetches.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD Egress Credit Stalls", - "EventCode": "0x18", - "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x19", - "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xE", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xF", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0xD", - "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", - "Unit": "IRP" - }, { "BriefDescription": "Number of uclks in domain", "EventCode": "0x1", @@ -1029,139 +551,5 @@ "PublicDescription": "AD CounterClockwise Egress Queue", "UMask": "0x10", "Unit": "R2PCIe" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles. Filter from source CoreID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "Number outstanding register requests within = message channel tracker", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.CMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Livelock", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; LTError", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LTERROR", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T0", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T1", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Other", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.OTHER", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Trap", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.TRAP", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.UMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x20", - "Unit": "UBOX" } ] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40F33C77B61 for ; Thu, 13 Apr 2023 13:31:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231542AbjDMNbm (ORCPT ); Thu, 13 Apr 2023 09:31:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231530AbjDMNbH (ORCPT ); Thu, 13 Apr 2023 09:31:07 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF548B454 for ; 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bh=20LX+VuUJ1BSN+qIRYiI4gfQcPYnYXttFourhz9CK78=; b=k77ZVvicA6AZoAusad0/dfMGNg5QRYRc2E7FpFOB88zo4GaCaQKMd/MEAl/OT19YGP VqLoALHvVeU7Sa0E//866y8Vh257uljD3mmA1F1FTlkPqM0eJ7vRNZRa3YzclHM0uk4b nThi7eakoPaeHwWyQXvFDXVNxpJ+oD5dh8s+d9R6GVtdD+CvP3+ppILAgV/hnvFckTFM yZlQk2ncmZs0gHhR8X1mf+DWJ+mrpae+RDo3/wMzRr3zVfTOhjOrYVZpF3cAec9pwhc6 C1C72Lh7suB1x36PiizKHHTvnUrKXT9qQdk8stpzIqbFDOzBAWq4Z+kZsKJkdB4EpM/3 VBBA== X-Gm-Message-State: AAQBX9dHVQoxlb6El3szyfP8LlblNyTnv9vu9eltvgfwmAiAPW7NCuGo PySAbZbmoXRt3fHQgS7x+w6hptQ0GLI6 X-Google-Smtp-Source: AKy350ZN0aAFFs8bu6prXqzntPyAUCIMIC0b7QzgZEh9Y3jaGeHq9pS7fkuzdtziDntcdys+wHRvUK0/W8oO X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a81:e503:0:b0:54f:40fe:10cc with SMTP id s3-20020a81e503000000b0054f40fe10ccmr1416844ywl.9.1681392658799; Thu, 13 Apr 2023 06:30:58 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:35 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-8-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 07/21] perf vendor events intel: Fix uncore topics for broadwellx From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/broadwellx/uncore-cache.json | 358 +- .../x86/broadwellx/uncore-interconnect.json | 4297 ++++++++++++++--- .../arch/x86/broadwellx/uncore-io.json | 555 +++ .../arch/x86/broadwellx/uncore-other.json | 3242 ------------- 4 files changed, 4226 insertions(+), 4226 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/broadwellx/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/broadwellx/uncore-other.= json diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json b/= tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json index f794d2992323..400d784d1457 100644 --- a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-cache.json @@ -8,7 +8,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC prefetch misses for data reads. Derived f= rom unc_c_tor_inserts.miss_opcode", @@ -19,7 +19,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC misses - demand and prefetch data reads -= excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode", @@ -30,7 +30,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "MMIO reads. Derived from unc_c_tor_inserts.mi= ss_opcode", @@ -41,7 +41,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "MMIO writes. Derived from unc_c_tor_inserts.m= iss_opcode", @@ -52,7 +52,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe write misses (full cache line). Derived = from unc_c_tor_inserts.miss_opcode", @@ -63,7 +63,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC misses for PCIe read current. Derived fro= m unc_c_tor_inserts.miss_opcode", @@ -74,7 +74,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ItoM write misses (as part of fast string mem= cpy stores) + PCIe full line writes. Derived from unc_c_tor_inserts.miss_op= code", @@ -85,7 +85,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC prefetch misses for RFO. Derived from unc= _c_tor_inserts.miss_opcode", @@ -96,7 +96,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_c_tor_inserts.miss_opcode", @@ -107,7 +107,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L2 demand and L2 prefetch code references to = LLC. Derived from unc_c_tor_inserts.opcode", @@ -118,7 +118,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe writes (partial cache line). Derived fro= m unc_c_tor_inserts.opcode", @@ -128,7 +128,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe read current. Derived from unc_c_tor_ins= erts.opcode", @@ -139,7 +139,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe write references (full cache line). Deri= ved from unc_c_tor_inserts.opcode", @@ -150,7 +150,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_c_tor_inserts.opcode", @@ -161,7 +161,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_c_tor_inserts.opcode", @@ -172,20 +172,20 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Bounce Control", "EventCode": "0xA", "EventName": "UNC_C_BOUNCE_CONTROL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Uncore Clocks", "EventName": "UNC_C_CLOCKTICKS", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Counter 0 Occupancy", @@ -193,7 +193,7 @@ "EventName": "UNC_C_COUNTER0_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "FaST wire asserted", @@ -201,7 +201,7 @@ "EventName": "UNC_C_FAST_ASSERTED", "PerPkg": "1", "PublicDescription": "Counts the number of cycles either the local= distress or incoming distress signals are asserted. Incoming distress inc= ludes both up and dn.", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "All LLC Misses (code+ data rd + data wr - inc= luding demand and prefetch)", @@ -212,7 +212,7 @@ "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Filters for any transaction originati= ng from the IPQ or IRQ. This does not include lookups originating from the= ISMQ.", "ScaleUnit": "64Bytes", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Data Read Request", @@ -221,7 +221,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Read transactions", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Lookups that Match NID", @@ -230,7 +230,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Qualify one of the other subevents by= the Target NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER.nid. In= conjunction with STATE =3D I, it is possible to monitor misses to specific= NIDs in the system.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Any Read Request", @@ -239,7 +239,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Read transactions", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; External Snoop Request", @@ -248,7 +248,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Filters for only snoop requests comin= g from the remote socket(s) through the IPQ.", "UMask": "0x9", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Write Requests", @@ -257,7 +257,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Writeback transactions from L2 to the= LLC This includes all write transactions -- both Cacheable and UC.", "UMask": "0x5", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in E state", @@ -266,7 +266,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -275,7 +275,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in S State", @@ -284,7 +284,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -293,7 +293,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "M line evictions from LLC (writebacks to memo= ry)", @@ -303,7 +303,7 @@ "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Victimized Lines that Match= NID", @@ -312,7 +312,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.; Qu= alify one of the other subevents by the Target NID. The NID is programmed = in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it is pos= sible to monitor misses to specific NIDs in the system.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; DRd hitting non-M with raw CV=3D0", @@ -321,7 +321,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Clean Victim with raw CV=3D0", @@ -330,7 +330,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; RFO HitS", @@ -339,7 +339,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Number of = times that an RFO hit in S state. This is useful for determining if it mig= ht be good for a workload to use RspIWB instead of RspSWB.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Silent Snoop Eviction", @@ -348,7 +348,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc", @@ -357,7 +357,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Write Combining Aliasing", @@ -366,7 +366,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 0", @@ -375,7 +375,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 0", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 1", @@ -384,7 +384,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 2", @@ -393,7 +393,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 2", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 3", @@ -402,7 +402,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 3", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Bits Decremented", @@ -411,7 +411,7 @@ "PerPkg": "1", "PublicDescription": "How often all LRU bits were decremented by 1= ", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; Non-0 Aged Victim", @@ -420,7 +420,7 @@ "PerPkg": "1", "PublicDescription": "How often we picked a victim that had a non-= zero age", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; All", @@ -429,7 +429,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down", @@ -438,7 +438,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX-- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Even", @@ -447,7 +447,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Odd", @@ -456,7 +456,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up", @@ -465,7 +465,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Even", @@ -474,7 +474,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Odd", @@ -483,7 +483,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; All", @@ -492,7 +492,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down", @@ -501,7 +501,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Even", @@ -510,7 +510,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Odd", @@ -519,7 +519,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up", @@ -528,7 +528,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Even", @@ -537,7 +537,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Odd", @@ -546,7 +546,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -555,7 +555,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -564,7 +564,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Even", @@ -573,7 +573,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Odd", @@ -582,7 +582,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up", @@ -591,7 +591,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Even", @@ -600,7 +600,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Odd", @@ -609,7 +609,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in BDX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; AD", @@ -617,7 +617,7 @@ "EventName": "UNC_C_RING_BOUNCES.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; AK", @@ -625,7 +625,7 @@ "EventName": "UNC_C_RING_BOUNCES.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; BL", @@ -633,7 +633,7 @@ "EventName": "UNC_C_RING_BOUNCES.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", @@ -641,7 +641,7 @@ "EventName": "UNC_C_RING_BOUNCES.IV", "PerPkg": "1", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -650,7 +650,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -659,7 +659,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -668,7 +668,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters for Down polarity", "UMask": "0xcc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -677,7 +677,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in BDX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD", @@ -685,7 +685,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK", @@ -693,7 +693,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL", @@ -701,7 +701,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "IV", @@ -709,14 +709,14 @@ "EventName": "UNC_C_RING_SINK_STARVED.IV", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of cycles the Cbo is actively throttli= ng traffic onto the Ring in order to limit bounce traffic.", "EventCode": "0x7", "EventName": "UNC_C_RING_SRC_THRTL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IRQ", @@ -725,7 +725,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IPQ is externally startved and therefore we are blocking the IRQ.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IPQ", @@ -734,7 +734,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IRQ is externally starved and therefore we are blocking the IPQ.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; ISMQ_BID", @@ -743,7 +743,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; Number of times that the ISMQ Bid.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; PRQ", @@ -752,7 +752,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IPQ", @@ -761,7 +761,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ", @@ -770,7 +770,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ Rejected", @@ -779,7 +779,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; PRQ", @@ -788,7 +788,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; PRQ", @@ -797,7 +797,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IPQ", @@ -806,7 +806,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IPQ in Internal S= tarvation.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IRQ", @@ -815,7 +815,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IRQ in Internal S= tarvation.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; ISMQ", @@ -824,7 +824,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the ISMQ in Internal = Starvation.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; PRQ", @@ -833,7 +833,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Address Conflict", @@ -842,7 +842,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from an address conflicts. Address conflicts out of the IPQ shou= ld be rare. They will generally only occur if two different sockets are se= nding requests to the same address at the same time. This is a true confli= ct case, unlike the IPQ Address Conflict which is commonly caused by prefet= ching characteristics.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Any Reject", @@ -851,7 +851,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject. TOR rejects from the IPQ can be caused by the Egress being full= or Address Conflicts.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No Egress Credits", @@ -860,7 +860,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from the Egress being full. IPQ requests make use of the AD Egre= ss for regular responses, the BL egress to forward data, and the AK egress = to return credits.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No QPI Credits", @@ -869,7 +869,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No AD Sbo Credits", @@ -878,7 +878,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request from the IPQ was retried because of it = lacked credits to send an AD packet to the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Target Node Filter", @@ -887,7 +887,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request from the IPQ was retried filtered by th= e Target NodeID as specified in the Cbox's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Address Confli= ct", @@ -896,7 +896,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because of an address match in the TOR. In order to= maintain coherency, requests to the same address are not allowed to pass e= ach other up in the Cbo. Therefore, if there is an outstanding request to = a given address, one cannot issue another request to that address until it = is complete. This comes up most commonly with prefetches. Outstanding pre= fetches occasionally will not complete their memory fetch and a demand requ= est to the same address will then sit in the IRQ and get retried until the = prefetch fills the data into the LLC. Therefore, it will not be uncommon t= o see this case in high bandwidth streaming workloads when the LLC Prefetch= er in the core is enabled.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Any Reject", @@ -905,7 +905,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of IRQ retries that occur.= Requests from the IRQ are retried if they are rejected from the TOR pipel= ine for a variety of reasons. Some of the most common reasons include if t= he Egress is full, there are no RTIDs, or there is a Physical Address match= to another outstanding request.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No Egress Cred= its", @@ -914,7 +914,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because it failed to acquire an entry in the Egress.= The egress is the buffer that queues up for allocating onto the ring. IR= Q requests can make use of all four rings and all four Egresses. If any of= the queues that a given request needs to make use of are full, the request= will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No IIO Credits= ", @@ -923,7 +923,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a request attempted to acqui= re the NCS/NCB credit for sending messages on BL to the IIO. There is a si= ngle credit in each CBo that is shared between the NCS and NCB message clas= ses for sending transactions on the BL ring (such as read data) to the IIO.= ", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects", @@ -932,7 +932,7 @@ "PerPkg": "1", "PublicDescription": "Qualify one of the other subevents by a give= n RTID destination NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER1.n= id.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No QPI Credits= ", @@ -941,7 +941,7 @@ "PerPkg": "1", "PublicDescription": "Number of requests rejects because of lack o= f QPI Ingress credits. These credits are required in order to send transac= tions to the QPI agent. Please see the QPI_IGR_CREDITS events for more inf= ormation.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No RTIDs", @@ -950,7 +950,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that requests fro= m the IRQ were retried because there were no RTIDs available. RTIDs are re= quired after a request misses the LLC and needs to send snoops and/or reque= sts to memory. If there are no RTIDs available, requests will queue up in = the IRQ and retry until one becomes available. Note that there are multipl= e RTID pools for the different sockets. There may be cases where the local= RTIDs are all used, but requests destined for remote memory can still acqu= ire an RTID because there are remote RTIDs available. This event does not = provide any filtering for this case.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No AD Sbo Cred= its", @@ -959,7 +959,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried because of it lacked credits to send an AD packet to= the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No BL Sbo Cred= its", @@ -968,7 +968,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried because of it lacked credits to send an BL packet to= the Sbo.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Target Node Fi= lter", @@ -977,7 +977,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried filtered by the Target NodeID as specified in the Cb= ox's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; Any Reject", @@ -986,7 +986,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = total number of times that a request from the ISMQ retried because of a TOR= reject. ISMQ requests generally will not need to retry (or at least ISMQ = retries are less common than IRQ retries). ISMQ requests will retry if the= y are not able to acquire a needed Egress credit to get onto the ring, or f= or cache evictions that need to acquire an RTID. Most ISMQ requests alread= y have an RTID, so eviction retries will be less common here.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No Egress Credits", @@ -995,7 +995,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by a lack of Egress credits. The egress is the buffer that queues = up for allocating onto the ring. If any of the Egress queues that a given = request needs to make use of are full, the request will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No IIO Credits", @@ -1004,7 +1004,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Number of t= imes a request attempted to acquire the NCS/NCB credit for sending messages= on BL to the IIO. There is a single credit in each CBo that is shared bet= ween the NCS and NCB message classes for sending transactions on the BL rin= g (such as read data) to the IIO.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries", @@ -1013,7 +1013,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Qualify one= of the other subevents by a given RTID destination NID. The NID is progra= mmed in Cn_MSR_PMON_BOX_FILTER1.nid.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No QPI Credits", @@ -1022,7 +1022,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No RTIDs", @@ -1031,7 +1031,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by no RTIDs. M-state cache evictions are serviced through the ISM= Q, and must acquire an RTID in order to write back to memory. If no RTIDs = are available, they will be retried.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries", @@ -1040,7 +1040,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Qualify one= of the other subevents by a given RTID destination NID. The NID is progra= mmed in Cn_MSR_PMON_BOX_FILTER1.nid.", "UMask": "0x80", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; No AD Sbo Credits= ", @@ -1049,7 +1049,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried because of it lacked credits to send an AD packet t= o the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; No BL Sbo Credits= ", @@ -1058,7 +1058,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried because of it lacked credits to send an BL packet t= o the Sbo.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; Target Node Filte= r", @@ -1067,7 +1067,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried filtered by the Target NodeID as specified in the C= box's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IPQ", @@ -1076,7 +1076,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ", @@ -1085,7 +1085,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ Rejected", @@ -1094,7 +1094,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; PRQ Rejects", @@ -1103,7 +1103,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Acquired; For AD Ring", @@ -1112,7 +1112,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits acquired in a given cy= cle, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Acquired; For BL Ring", @@ -1121,7 +1121,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits acquired in a given cy= cle, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Occupancy; For AD Ring", @@ -1130,7 +1130,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits in use in a given cycl= e, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Occupancy; For BL Ring", @@ -1139,7 +1139,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits in use in a given cycl= e, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; All", @@ -1148,7 +1148,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR. This includes requests that reside in the TOR for a shor= t time, such as LLC Hits that do not need to snoop cores or requests that g= et rejected and have to be retried through one of the ingress queues. The = TOR is more commonly a bottleneck in skews with smaller core counts, where = the ratio of RTIDs to TOR entries is larger. Note that there are reserved = TOR entries for various request types, so it is possible that a given reque= st type be blocked with an occupancy that is less than 20. Also note that = generally requests will not be able to arbitrate into the TOR pipeline if t= here are no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Evictions", @@ -1157,7 +1157,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Eviction transactions in= serted into the TOR. Evictions can be quick, such as when the line is in t= he F, S, or E states and no core valid bits are set. They can also be long= er if either CV bits are set (so the cores need to be snooped) and/or if th= ere is a HitM (in which case it is necessary to write the request out to me= mory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory", @@ -1166,7 +1166,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory - Opcode Matched", @@ -1175,7 +1175,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisf= ied by an opcode, inserted into the TOR that are satisfied by locally HOMe= d memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory", @@ -1184,7 +1184,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory - Opcode = Matched", @@ -1193,7 +1193,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by locally HOMe= d memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Miss Opcode Match", @@ -1202,7 +1202,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory", @@ -1211,7 +1211,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory - Opcode= Matched", @@ -1220,7 +1220,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by remote cach= es or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched", @@ -1229,7 +1229,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched (matches= an RTID destination) transactions inserted into the TOR. The NID is progr= ammed in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it i= s possible to monitor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Evictions", @@ -1238,7 +1238,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched eviction tra= nsactions inserted into the TOR.", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Miss All", @@ -1247,7 +1247,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched miss req= uests that were inserted into the TOR.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched Miss", @@ -1256,7 +1256,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched", @@ -1265,7 +1265,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Writebacks", @@ -1274,7 +1274,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched write transa= ctions inserted into the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Opcode Match", @@ -1283,7 +1283,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory", @@ -1292,7 +1292,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory - Opcode Matched", @@ -1301,7 +1301,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisf= ied by an opcode, inserted into the TOR that are satisfied by remote cache= s or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Writebacks", @@ -1310,7 +1310,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Write transactions inser= ted into the TOR. This does not include RFO, but actual operations that c= ontain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Any", @@ -1319,7 +1319,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All valid TO= R entries. This includes requests that reside in the TOR for a short time,= such as LLC Hits that do not need to snoop cores or requests that get reje= cted and have to be retried through one of the ingress queues. The TOR is = more commonly a bottleneck in skews with smaller core counts, where the rat= io of RTIDs to TOR entries is larger. Note that there are reserved TOR ent= ries for various request types, so it is possible that a given request type= be blocked with an occupancy that is less than 20. Also note that general= ly requests will not be able to arbitrate into the TOR pipeline if there ar= e no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Evictions", @@ -1328,7 +1328,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding eviction transactions in the TOR. Evictions can be quick, such a= s when the line is in the F, S, or E states and no core valid bits are set.= They can also be longer if either CV bits are set (so the cores need to b= e snooped) and/or if there is a HitM (in which case it is necessary to writ= e the request out to memory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Occupancy counter for LLC data reads (demand = and L2 prefetch). Derived from unc_c_tor_occupancy.miss_opcode", @@ -1338,7 +1338,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = for miss transactions that match an opcode. This generally means that the r= equest was sent to memory or MMIO.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1347,7 +1347,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Local Memory - Opcode Matched", @@ -1356,7 +1356,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by locally HOMed memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss All", @@ -1365,7 +1365,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding miss requests in the TOR. 'Miss' means the allocation requires a= n RTID. This generally means that the request was sent to memory or MMIO.", "UMask": "0xa", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1374,7 +1374,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Local Memory - Opcod= e Matched", @@ -1383,7 +1383,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by locally HOMed memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss Opcode Match", @@ -1392,7 +1392,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = for miss transactions that match an opcode. This generally means that the r= equest was sent to memory or MMIO.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1401,7 +1401,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Remote Memory - Opco= de Matched", @@ -1410,7 +1410,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by remote caches or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1419,7 +1419,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of NI= D matched outstanding requests in the TOR. The NID is programmed in Cn_MSR= _PMON_BOX_FILTER.nid.In conjunction with STATE =3D I, it is possible to mon= itor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Evictions", @@ -1428,7 +1428,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding NID matched eviction transactions in the TOR .", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1437,7 +1437,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched Miss", @@ -1446,7 +1446,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched", @@ -1455,7 +1455,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Writebacks", @@ -1464,7 +1464,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); NID matched = write transactions int the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Opcode Match", @@ -1473,7 +1473,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc).", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1482,7 +1482,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Remote Memory - Opcode Matched= ", @@ -1491,7 +1491,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by remote caches or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Writebacks", @@ -1500,7 +1500,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Write transa= ctions in the TOR. This does not include RFO, but actual operations that = contain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AD Ring", @@ -1508,7 +1508,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AK Ring", @@ -1516,7 +1516,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto BL Ring", @@ -1524,7 +1524,7 @@ "EventName": "UNC_C_TxR_ADS_USED.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Cachebo", @@ -1533,7 +1533,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AD ring. Some example include out= bound requests, snoop requests, and snoop responses.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Corebo", @@ -1542,7 +1542,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AD ring. This is commonly used for= outbound requests.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Cachebo", @@ -1551,7 +1551,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AK ring. This is commonly used fo= r credit returns and GO responses.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Corebo", @@ -1560,7 +1560,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AK ring. This is commonly used for= snoop responses coming from the core and destined for a Cachebo.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Cacheno", @@ -1569,7 +1569,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the BL ring. This is commonly used to= send data from the cache to various destinations.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Corebo", @@ -1578,7 +1578,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the BL ring. This is commonly used for= transferring writeback data to the cache.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; IV - Cachebo", @@ -1587,7 +1587,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the IV ring. This is commonly used fo= r snoops to the cores.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AD Ring (to core)", @@ -1596,7 +1596,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the core AD egress spent in starvation", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AK Ring", @@ -1605,7 +1605,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that both AK egresses spent in starvation", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto BL Ring", @@ -1614,7 +1614,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that both BL egresses spent in starvation", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto IV Ring", @@ -1623,7 +1623,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the cachebo IV egress spent in starvati= on", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BT Cycles Not Empty", diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.= json b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.json index 2819c6621089..e61a23f68899 100644 --- a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.json +++ b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-interconnect.json @@ -6,7 +6,7 @@ "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL= non-data flits transmitted across QPI. This basically tracks the protocol= overhead on the QPI link. One can get a good picture of the QPI-link char= acteristics by evaluating the protocol flits, data flits, and idle/null fli= ts. This includes the header flits for data packets.", "ScaleUnit": "8Bytes", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Number of data flits transmitted . Derived fr= om unc_q_txl_flits_g0.data", @@ -15,1317 +15,4004 @@ "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data fli= ts transmitted over QPI. Each flit contains 64b of data. This includes bo= th DRS and NCB data flits (coherent and non-coherent). This can be used to= calculate the data bandwidth of the QPI link. One can get a good picture = of the QPI-link characteristics by evaluating the protocol flits, data flit= s, and idle/null flits. This does not include the header flits that go in = data packets.", "ScaleUnit": "8Bytes", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { - "BriefDescription": "Number of qfclks", - "EventCode": "0x14", - "EventName": "UNC_Q_CLOCKTICKS", + "BriefDescription": "Total Write Cache Occupancy; Any Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", "PerPkg": "1", - "PublicDescription": "Counts the number of clocks in the QPI LL. = This clock runs at 1/4th the GT/s speed of the QPI link. For example, a 4G= T/s link will have qfclk or 1GHz. BDX does not support dynamic link speeds= , so this frequency is fixed.", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", + "UMask": "0x1", + "Unit": "IRP" }, { - "BriefDescription": "Count of CTO Events", - "EventCode": "0x38", - "EventName": "UNC_Q_CTO_COUNT", + "BriefDescription": "Total Write Cache Occupancy; Select Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", "PerPkg": "1", - "PublicDescription": "Counts the number of CTO (cluster trigger ou= ts) events that were asserted across the two slots. If both slots trigger = in a given cycle, the event will increment by 2. You can use edge detect t= o count the number of cases when both events triggered.", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s Credits", + "BriefDescription": "Clocks in the IRP", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of clocks in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CLFlush", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits. Had there been enough credits, the spawn would have worked as th= e RBT bit was set and the RBT tag matched.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss", + "BriefDescription": "Coherent Ops; CRd", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_MISS", + "EventName": "UNC_I_COHERENT_OPS.CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d there weren't enough Egress credits. The valid bit was set.", - "UMask": "0x20", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Invalid", + "BriefDescription": "Coherent Ops; DRd", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT", + "EventName": "UNC_I_COHERENT_OPS.DRD", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits AND the RBT bit was not set, but the RBT tag matched.", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x4", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss, Invalid", + "BriefDescription": "Coherent Ops; PCIDCAHin5t", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT_MISS", + "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match, t= he valid bit was not set and there weren't enough Egress credits.", - "UMask": "0x80", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x20", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss", + "BriefDescription": "Coherent Ops; PCIRdCur", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_MISS", + "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match al= though the valid bit was set and there were enough Egress credits.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x1", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT I= nvalid", + "BriefDescription": "Coherent Ops; PCIItoM", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_HIT", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the route-back table (RBT) s= pecified that the transaction should not trigger a direct2core transaction.= This is common for IO transactions. There were enough Egress credits and= the RBT tag matched but the valid bit was not set.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss and Invalid", + "BriefDescription": "Coherent Ops; RFO", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_MISS", + "EventName": "UNC_I_COHERENT_OPS.RFO", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d the valid bit was not set although there were enough Egress credits.", - "UMask": "0x40", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x8", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Success", + "BriefDescription": "Coherent Ops; WbMtoI", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.SUCCESS_RBT_HIT", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn was successful. There were sufficient cred= its, the RBT valid bit was set and there was an RBT tag match. The message= was marked to spawn direct2core.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" }, { - "BriefDescription": "Cycles in L1", - "EventCode": "0x12", - "EventName": "UNC_Q_L1_POWER_CYCLES", + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L1 power= mode. L1 is a mode that totally shuts down a QPI link. Use edge detect t= o count the number of instances when the QPI link entered L1. Link power s= tates are per link and per direction, so for example the Tx direction could= be in one state while Rx was in another. Because L1 totally shuts down the= link, it takes a good amount of time to exit this mode.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of A= tomic Transactions as Secondary", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "Cycles in L0p", - "EventCode": "0x10", - "EventName": "UNC_Q_RxL0P_POWER_CYCLES", + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of R= ead Transactions as Secondary", + "UMask": "0x4", + "Unit": "IRP" }, { - "BriefDescription": "Cycles in L0", - "EventCode": "0xF", - "EventName": "UNC_Q_RxL0_POWER_CYCLES", + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of W= rite Transactions as Secondary", + "UMask": "0x8", + "Unit": "IRP" }, { - "BriefDescription": "Rx Flit Buffer Bypassed", - "EventCode": "0x9", - "EventName": "UNC_Q_RxL_BYPASSED", + "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_REJ", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the flit buffer and pass directly across the BGF an= d into the Egress. This is a latency optimization, and should generally be= the common case. If this value is less than the number of flits transferr= ed, it implies that there was queueing getting onto the ring, and thus the = transactions saw higher latency.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "CRC Errors Detected; LinkInit", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_CRC_ERRORS.LINK_INIT", + "BriefDescription": "Misc Events - Set 0; Fastpath Requests", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_REQ", "PerPkg": "1", - "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during link initialization.", + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Requests", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "UNC_Q_RxL_CRC_ERRORS.NORMAL_OP", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_CRC_ERRORS.NORMAL_OP", + "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_XFER", "PerPkg": "1", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Transfers= From Primary to Secondary", + "UMask": "0x20", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; DRS", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.DRS", + "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the DRS message class.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints= From Primary to Secondary", + "UMask": "0x40", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; HOM", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.HOM", + "BriefDescription": "Misc Events - Set 0; Prefetch TimeOut", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.PF_TIMEOUT", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the HOM message class.", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Indicates the fetch for a previous prefetch = wasn't accepted by the prefetch. This happens in the case of a prefetch T= imeOut", + "UMask": "0x80", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; NCB", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCB", + "BriefDescription": "Misc Events - Set 1; Data Throttled", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.DATA_THROTTLE", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCB message class.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "IRP throttled switch data", + "UMask": "0x80", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; NCS", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCS", + "BriefDescription": "Misc Events - Set 1", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.LOST_FWD", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCS message class.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; NDR", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NDR", + "BriefDescription": "Misc Events - Set 1; Received Invalid", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NDR message class.", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; SNP", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.SNP", + "BriefDescription": "Misc Events - Set 1; Received Valid", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the SNP message class.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; DRS", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.DRS", + "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_E", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the DRS message class.", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; HOM", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.HOM", + "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_M", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the HOM message class.", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; NCB", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCB", + "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_S", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCB message class.", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; NCS", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCS", + "BriefDescription": "AK Ingress Occupancy", + "EventCode": "0xA", + "EventName": "UNC_I_RxR_AK_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCS message class.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; NDR", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NDR", + "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL", + "EventCode": "0x4", + "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NDR message class.", - "UMask": "0x20", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; SNP", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.SNP", + "BriefDescription": "BL Ingress Occupancy - DRS", + "EventCode": "0x1", + "EventName": "UNC_I_RxR_BL_DRS_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the SNP message class.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" }, { - "BriefDescription": "VNA Credit Consumed", - "EventCode": "0x1D", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VNA", + "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY", + "EventCode": "0x7", + "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty", - "EventCode": "0xA", - "EventName": "UNC_Q_RxL_CYCLES_NE", + "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL", + "EventCode": "0x5", + "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy.", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN0", - "EventCode": "0xF", - "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN0", + "BriefDescription": "BL Ingress Occupancy - NCB", + "EventCode": "0x2", + "EventName": "UNC_I_RxR_BL_NCB_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN1", - "EventCode": "0xF", - "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN1", + "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY", + "EventCode": "0x8", + "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN0", - "EventCode": "0x12", - "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN0", + "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL", + "EventCode": "0x6", + "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN1", - "EventCode": "0x12", - "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN1", + "BriefDescription": "BL Ingress Occupancy - NCS", + "EventCode": "0x3", + "EventName": "UNC_I_RxR_BL_NCS_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN0", - "EventCode": "0x10", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN0", + "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY", + "EventCode": "0x9", + "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN1", - "EventCode": "0x10", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN1", + "BriefDescription": "Snoop Responses; Hit E or S", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : Hit E or S", + "UMask": "0x4", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN0", - "EventCode": "0x11", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN0", + "BriefDescription": "Snoop Responses; Hit I", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : Hit I", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN1", - "EventCode": "0x11", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN1", + "BriefDescription": "Snoop Responses; Hit M", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : Hit M", + "UMask": "0x8", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN0", - "EventCode": "0x14", - "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN0", + "BriefDescription": "Snoop Responses; Miss", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.MISS", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", + "PublicDescription": "Snoop Responses : Miss", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN1", - "EventCode": "0x14", - "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN1", + "BriefDescription": "Snoop Responses; SnpCode", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : SnpCode", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN0", - "EventCode": "0x13", - "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN0", + "BriefDescription": "Snoop Responses; SnpData", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : SnpData", + "UMask": "0x20", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN1", - "EventCode": "0x13", - "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN1", + "BriefDescription": "Snoop Responses; SnpInv", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : SnpInv", + "UMask": "0x40", + "Unit": "IRP" }, { - "BriefDescription": "Flits Received - Group 0; Idle and Null Flits= ", + "BriefDescription": "Inbound Transaction Count; Atomic", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Other", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Read Prefetches", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.RD_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Reads", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.READS", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Writes", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only write requests. = Each write request should have a prefetch, so there is no need to explicit= ly track these requests.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Write Prefetches", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of write p= refetches.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD Egress Credit Stalls", + "EventCode": "0x18", + "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x19", + "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xE", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xF", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0xD", + "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "Number of qfclks", + "EventCode": "0x14", + "EventName": "UNC_Q_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of clocks in the QPI LL. = This clock runs at 1/4th the GT/s speed of the QPI link. For example, a 4G= T/s link will have qfclk or 1GHz. BDX does not support dynamic link speeds= , so this frequency is fixed.", + "Unit": "QPI" + }, + { + "BriefDescription": "Count of CTO Events", + "EventCode": "0x38", + "EventName": "UNC_Q_CTO_COUNT", + "PerPkg": "1", + "PublicDescription": "Counts the number of CTO (cluster trigger ou= ts) events that were asserted across the two slots. If both slots trigger = in a given cycle, the event will increment by 2. You can use edge detect t= o count the number of cases when both events triggered.", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s Credits", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits. Had there been enough credits, the spawn would have worked as th= e RBT bit was set and the RBT tag matched.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d there weren't enough Egress credits. The valid bit was set.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Invalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits AND the RBT bit was not set, but the RBT tag matched.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss, Invalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match, t= he valid bit was not set and there weren't enough Egress credits.", + "UMask": "0x80", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match al= though the valid bit was set and there were enough Egress credits.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT I= nvalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the route-back table (RBT) s= pecified that the transaction should not trigger a direct2core transaction.= This is common for IO transactions. There were enough Egress credits and= the RBT tag matched but the valid bit was not set.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss and Invalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d the valid bit was not set although there were enough Egress credits.", + "UMask": "0x40", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Success", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.SUCCESS_RBT_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn was successful. There were sufficient cred= its, the RBT valid bit was set and there was an RBT tag match. The message= was marked to spawn direct2core.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L1", + "EventCode": "0x12", + "EventName": "UNC_Q_L1_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L1 power= mode. L1 is a mode that totally shuts down a QPI link. Use edge detect t= o count the number of instances when the QPI link entered L1. Link power s= tates are per link and per direction, so for example the Tx direction could= be in one state while Rx was in another. Because L1 totally shuts down the= link, it takes a good amount of time to exit this mode.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0x10", + "EventName": "UNC_Q_RxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0xF", + "EventName": "UNC_Q_RxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Bypassed", + "EventCode": "0x9", + "EventName": "UNC_Q_RxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the flit buffer and pass directly across the BGF an= d into the Egress. This is a latency optimization, and should generally be= the common case. If this value is less than the number of flits transferr= ed, it implies that there was queueing getting onto the ring, and thus the = transactions saw higher latency.", + "Unit": "QPI" + }, + { + "BriefDescription": "CRC Errors Detected; LinkInit", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_CRC_ERRORS.LINK_INIT", + "PerPkg": "1", + "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during link initialization.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "UNC_Q_RxL_CRC_ERRORS.NORMAL_OP", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_CRC_ERRORS.NORMAL_OP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; DRS", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the DRS message class.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; HOM", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the HOM message class.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; NCB", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCB message class.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; NCS", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCS message class.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; NDR", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NDR message class.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; SNP", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the SNP message class.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; DRS", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the DRS message class.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; HOM", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the HOM message class.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; NCB", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCB message class.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; NCS", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCS message class.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; NDR", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NDR message class.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; SNP", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the SNP message class.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "VNA Credit Consumed", + "EventCode": "0x1D", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VNA", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty", + "EventCode": "0xA", + "EventName": "UNC_Q_RxL_CYCLES_NE", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy.", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN0", + "EventCode": "0xF", + "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN1", + "EventCode": "0xF", + "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN0", + "EventCode": "0x12", + "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN1", + "EventCode": "0x12", + "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN0", + "EventCode": "0x10", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN1", + "EventCode": "0x10", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN0", + "EventCode": "0x11", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN1", + "EventCode": "0x11", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN0", + "EventCode": "0x14", + "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN1", + "EventCode": "0x14", + "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN0", + "EventCode": "0x13", + "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN1", + "EventCode": "0x13", + "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 0; Idle and Null Flits= ", + "EventCode": "0x1", + "EventName": "UNC_Q_RxL_FLITS_G0.IDLE", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each f= lit is made up of 80 bits of information (in addition to some ECC data). I= n full-width (L0) mode, flits are made up of four fits, each of which conta= ins 20 bits of data (along with some additional ECC data). In half-width = (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many= fits to transmit a flit. When one talks about QPI speed (for example, 8.0= GT/s), the transfers here refer to fits. Therefore, in L0, the system wil= l transfer 1 flit at the rate of 1/4th the QPI speed. One can calculate th= e bandwidth of the link by taking: flits*80b/time. Note that this is not t= he same as data bandwidth. For example, when we are transferring a 64B cac= heline across QPI, we will break it into 9 flits -- 1 with header informati= on and 8 with 64 bits of actual data and an additional 16 bits of other inf= ormation. To calculate data bandwidth, one should therefore do: data flits= * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of flits receive= d over QPI that do not hold protocol payload. When QPI is not in a power s= aving state, it continuously transmits flits across the link. When there a= re no protocol flits to send, it will send IDLE and NULL flits across. Th= ese flits sometimes do carry a payload, such as credit returns, but are gen= erally not considered part of the QPI bandwidth.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; DRS Flits (both Hea= der and Data)", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over QPI on the DRS (Data Respo= nse) channel. DRS flits are used to transmit data with coherency. This do= es not count data flits received over the NCB channel which transmits non-c= oherent data.", + "UMask": "0x18", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; DRS Data Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.DRS_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of data flits received over QPI on the DRS (Data = Response) channel. DRS flits are used to transmit data with coherency. Th= is does not count data flits received over the NCB channel which transmits = non-coherent data. This includes only the data flits (not the header).", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; DRS Header Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.DRS_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of protocol flits received over QPI on the DRS (D= ata Response) channel. DRS flits are used to transmit data with coherency.= This does not count data flits received over the NCB channel which transm= its non-coherent data. This includes only the header flits (not the data).= This includes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; HOM Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of flits received over QPI on the home channel.", + "UMask": "0x6", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; HOM Non-Request Fli= ts", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.HOM_NONREQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of non-request flits received over QPI on the home chan= nel. These are most commonly snoop responses, and this event can be used a= s a proxy for that.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; HOM Request Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.HOM_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of data request received over QPI on the home channel. = This basically counts the number of remote memory requests received over Q= PI. In conjunction with the local read count in the Home Agent, one can ca= lculate the number of LLC Misses.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; SNP Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of snoop request flits received over QPI. These reques= ts are contained in the snoop channel. This does not include snoop respons= es, which are received on the home channel.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent Rx Fli= ts", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass flits. These packets are generally used to= transmit non-coherent data across QPI.", + "UMask": "0xc", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent data R= x Flits", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCB_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass data flits. These flits are generally used= to transmit non-coherent data across QPI. This does not include a count o= f the DRS (coherent) data flits. This only counts the data flits, not the = NCB headers.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent non-da= ta Rx Flits", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCB_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass non-data flits. These packets are generall= y used to transmit non-coherent data across QPI, and the flits counted here= are for headers and other non-data flits. This includes extended headers.= ", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent standa= rd Rx Flits", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of NCS (non-coherent standard) flits received over QPI. This in= cludes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AD", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets to the local sock= et which use the AK ring.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AK", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets destined for Rout= e-thru to a remote socket.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations", + "EventCode": "0x8", + "EventName": "UNC_Q_RxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN0", + "EventCode": "0x9", + "EventName": "UNC_Q_RxL_INSERTS_DRS.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN1", + "EventCode": "0x9", + "EventName": "UNC_Q_RxL_INSERTS_DRS.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN0", + "EventCode": "0xC", + "EventName": "UNC_Q_RxL_INSERTS_HOM.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN1", + "EventCode": "0xC", + "EventName": "UNC_Q_RxL_INSERTS_HOM.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN0", + "EventCode": "0xA", + "EventName": "UNC_Q_RxL_INSERTS_NCB.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN1", + "EventCode": "0xA", + "EventName": "UNC_Q_RxL_INSERTS_NCB.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN0", + "EventCode": "0xB", + "EventName": "UNC_Q_RxL_INSERTS_NCS.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN1", + "EventCode": "0xB", + "EventName": "UNC_Q_RxL_INSERTS_NCS.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN0", + "EventCode": "0xE", + "EventName": "UNC_Q_RxL_INSERTS_NDR.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN1", + "EventCode": "0xE", + "EventName": "UNC_Q_RxL_INSERTS_NDR.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN0", + "EventCode": "0xD", + "EventName": "UNC_Q_RxL_INSERTS_SNP.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN1", + "EventCode": "0xD", + "EventName": "UNC_Q_RxL_INSERTS_SNP.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets", + "EventCode": "0xB", + "EventName": "UNC_Q_RxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - DRS; for VN0", + "EventCode": "0x15", + "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - DRS; for VN1", + "EventCode": "0x15", + "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - HOM; for VN0", + "EventCode": "0x18", + "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - HOM; for VN1", + "EventCode": "0x18", + "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCB; for VN0", + "EventCode": "0x16", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCB; for VN1", + "EventCode": "0x16", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCS; for VN0", + "EventCode": "0x17", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCS; for VN1", + "EventCode": "0x17", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NDR; for VN0", + "EventCode": "0x1A", + "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NDR; for VN1", + "EventCode": "0x1A", + "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - SNP; for VN0", + "EventCode": "0x19", + "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - SNP; for VN1", + "EventCode": "0x19", + "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - H= OM", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_DRS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the HOM message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - D= RS", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_HOM", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the DRS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - S= NP", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCB", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the SNP message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= DR", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NDR message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CS", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NDR", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CB", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_SNP", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCB message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; Egress Credit= s", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.EGRESS_CREDITS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet because there were insufficient BGF cre= dits. For details on a message class granularity, use the Egress Credit Oc= cupancy events.", + "UMask": "0x40", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; GV", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.GV", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled because a GV transition (frequency transition) w= as taking place.", + "UMask": "0x80", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - H= OM", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_DRS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the HOM message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - D= RS", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_HOM", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the DRS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - S= NP", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCB", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the SNP message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= DR", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NDR message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CS", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NDR", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CB", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_SNP", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCB message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0xD", + "EventName": "UNC_Q_TxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0xC", + "EventName": "UNC_Q_TxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Bypassed", + "EventCode": "0x5", + "EventName": "UNC_Q_TxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the Tx flit buffer and pass directly out the QPI Li= nk. Generally, when data is transmitted across QPI, it will bypass the TxQ = and pass directly to the link. However, the TxQ will be used with L0p and = when LLR occurs, increasing latency to transfer out to the link.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is al= most full", + "EventCode": "0x2", + "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.ALMOST_FULL", + "PerPkg": "1", + "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is almost ful= l, we block some but not all packets.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is fu= ll", + "EventCode": "0x2", + "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.FULL", + "PerPkg": "1", + "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is totally fu= ll, we are not allowed to send any packets.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Cycles not Empty", + "EventCode": "0x6", + "EventName": "UNC_Q_TxL_CYCLES_NE", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the TxQ is = not empty. Generally, when data is transmitted across QPI, it will bypass t= he TxQ and pass directly to the link. However, the TxQ will be used with L= 0p and when LLR occurs, increasing latency to transfer out to the link.", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 0; Data Tx Flits", + "EventName": "UNC_Q_TxL_FLITS_G0.DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data fli= ts transmitted over QPI. Each flit contains 64b of data. This includes bo= th DRS and NCB data flits (coherent and non-coherent). This can be used to= calculate the data bandwidth of the QPI link. One can get a good picture = of the QPI-link characteristics by evaluating the protocol flits, data flit= s, and idle/null flits. This does not include the header flits that go in = data packets.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 0; Non-Data protoco= l Tx Flits", + "EventName": "UNC_Q_TxL_FLITS_G0.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL= non-data flits transmitted across QPI. This basically tracks the protocol= overhead on the QPI link. One can get a good picture of the QPI-link char= acteristics by evaluating the protocol flits, data flits, and idle/null fli= ts. This includes the header flits for data packets.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; DRS Flits (both = Header and Data)", + "EventName": "UNC_Q_TxL_FLITS_G1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over QPI on the DRS (Da= ta Response) channel. DRS flits are used to transmit data with coherency.", + "UMask": "0x18", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; DRS Data Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.DRS_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of data flits transmitted over QPI on the DR= S (Data Response) channel. DRS flits are used to transmit data with cohere= ncy. This does not count data flits transmitted over the NCB channel which= transmits non-coherent data. This includes only the data flits (not the h= eader).", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; DRS Header Flits= ", + "EventName": "UNC_Q_TxL_FLITS_G1.DRS_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of protocol flits transmitted over QPI on th= e DRS (Data Response) channel. DRS flits are used to transmit data with co= herency. This does not count data flits transmitted over the NCB channel w= hich transmits non-coherent data. This includes only the header flits (not= the data). This includes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; HOM Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of flits transmitted over QPI on the home channel.= ", + "UMask": "0x6", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; HOM Non-Request = Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.HOM_NONREQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of non-request flits transmitted over QPI on the h= ome channel. These are most commonly snoop responses, and this event can b= e used as a proxy for that.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; HOM Request Flit= s", + "EventName": "UNC_Q_TxL_FLITS_G1.HOM_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of data request transmitted over QPI on the home c= hannel. This basically counts the number of remote memory requests transmi= tted over QPI. In conjunction with the local read count in the Home Agent,= one can calculate the number of LLC Misses.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; SNP Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of snoop request flits transmitted over QPI. Thes= e requests are contained in the snoop channel. This does not include snoop= responses, which are transmitted on the home channel.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent Byp= ass Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass flits. These packets are generally us= ed to transmit non-coherent data across QPI.", + "UMask": "0xc", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent dat= a Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCB_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass data flits. These flits are generally= used to transmit non-coherent data across QPI. This does not include a co= unt of the DRS (coherent) data flits. This only counts the data flits, not= the NCB headers.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent non= -data Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCB_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass non-data flits. These packets are gen= erally used to transmit non-coherent data across QPI, and the flits counted= here are for headers and other non-data flits. This includes extended hea= ders.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent sta= ndard Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of NCS (non-coherent standard) flits transmitted over QPI. = This includes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AD", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets to the lo= cal socket which use the AK ring.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AK", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets destined = for Route-thru to a remote socket.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Allocations", + "EventCode": "0x4", + "EventName": "UNC_Q_TxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Tx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Occupancy", + "EventCode": "0x7", + "EventName": "UNC_Q_TxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across QPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN0", + "EventCode": "0x26", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN1", + "EventCode": "0x26", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N0", + "EventCode": "0x22", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N1", + "EventCode": "0x22", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", + "EventCode": "0x28", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", + "EventCode": "0x28", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", + "EventCode": "0x24", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", + "EventCode": "0x24", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN0", + "EventCode": "0x27", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN1", + "EventCode": "0x27", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N0", + "EventCode": "0x23", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N1", + "EventCode": "0x23", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", + "EventCode": "0x29", + "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. Local NDR message class to AK Egre= ss.", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", + "EventCode": "0x25", + "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . Local NDR message class to AK Egress.", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN0", + "EventCode": "0x2A", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN1", + "EventCode": "0x2A", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for Shar= ed VN", + "EventCode": "0x2A", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN_SHR", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N0", + "EventCode": "0x1F", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N1", + "EventCode": "0x1F", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for S= hared VN", + "EventCode": "0x1F", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN_SHR", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN0", + "EventCode": "0x2B", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN1", + "EventCode": "0x2B", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N0", + "EventCode": "0x20", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N1", + "EventCode": "0x20", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN0", + "EventCode": "0x2C", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN1", + "EventCode": "0x2C", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N0", + "EventCode": "0x21", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N1", + "EventCode": "0x21", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VNA Credits Returned", + "EventCode": "0x1C", + "EventName": "UNC_Q_VNA_CREDIT_RETURNS", + "PerPkg": "1", + "PublicDescription": "Number of VNA credits returned.", + "Unit": "QPI" + }, + { + "BriefDescription": "VNA Credits Pending Return - Occupancy", + "EventCode": "0x1B", + "EventName": "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", + "Unit": "QPI" + }, + { + "BriefDescription": "Number of uclks in domain", "EventCode": "0x1", - "EventName": "UNC_Q_RxL_FLITS_G0.IDLE", + "EventName": "UNC_R3_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO10", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 10", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO11", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 11", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO12", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 12", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO13", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 13", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO14_16", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 14&16", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO8", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 8", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO9", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 9", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO_15_17", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 15&17", + "UMask": "0x80", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO0", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 0", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO1", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO2", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 2", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO3", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 3", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO4", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 4", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO5", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 5", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO6", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 6", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO7", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 7", + "UMask": "0x80", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA0", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA0", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA1", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCB Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCS", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCS Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Backpressure", + "EventCode": "0xB", + "EventName": "UNC_R3_IOT_BACKPRESSURE.HUB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Backpressure", + "EventCode": "0xB", + "EventName": "UNC_R3_IOT_BACKPRESSURE.SAT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Hi", + "EventCode": "0xD", + "EventName": "UNC_R3_IOT_CTS_HI.CTS2", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Hi", + "EventCode": "0xD", + "EventName": "UNC_R3_IOT_CTS_HI.CTS3", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Lo", + "EventCode": "0xC", + "EventName": "UNC_R3_IOT_CTS_LO.CTS0", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Lo", + "EventCode": "0xC", + "EventName": "UNC_R3_IOT_CTS_LO.CTS1", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; All", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xf", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; All", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xf", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; All", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xf", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 IV Ring in Use; Any", + "EventCode": "0xA", + "EventName": "UNC_R3_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0xf", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 IV Ring in Use; Clockwise", + "EventCode": "0xA", + "EventName": "UNC_R3_RING_IV_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ring Stop Starved; AK", + "EventCode": "0xE", + "EventName": "UNC_R3_RING_SINK_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles the ringstop is in starvati= on (per ring)", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; HOM", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NDR", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; SNP", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; DRS", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; HOM", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; HOM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; NCB", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; NCS", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; NDR", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NDR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; SNP", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; SNP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; DRS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; DRS Ingress= Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; HOM", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; HOM Ingress= Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCB", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCB Ingress= Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCS Ingress= Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NDR", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NDR Ingress= Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; SNP", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; SNP Ingress= Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; DRS", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= RS Ingress Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; HOM", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; NCB", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CB Ingress Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; NCS", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CS Ingress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; NDR", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; SNP", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; DRS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; HOM", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; HOM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCB", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; NDR", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NDR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; SNP", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; SNP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For AD Ring", + "EventCode": "0x28", + "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.AD", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For BL Ring", + "EventCode": "0x28", + "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.BL", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", + "EventCode": "0x2A", + "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.AD", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", + "EventCode": "0x2A", + "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.BL", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo1 Credits Acquired; For AD Ring", + "EventCode": "0x29", + "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each f= lit is made up of 80 bits of information (in addition to some ECC data). I= n full-width (L0) mode, flits are made up of four fits, each of which conta= ins 20 bits of data (along with some additional ECC data). In half-width = (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many= fits to transmit a flit. When one talks about QPI speed (for example, 8.0= GT/s), the transfers here refer to fits. Therefore, in L0, the system wil= l transfer 1 flit at the rate of 1/4th the QPI speed. One can calculate th= e bandwidth of the link by taking: flits*80b/time. Note that this is not t= he same as data bandwidth. For example, when we are transferring a 64B cac= heline across QPI, we will break it into 9 flits -- 1 with header informati= on and 8 with 64 bits of actual data and an additional 16 bits of other inf= ormation. To calculate data bandwidth, one should therefore do: data flits= * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of flits receive= d over QPI that do not hold protocol payload. When QPI is not in a power s= aving state, it continuously transmits flits across the link. When there a= re no protocol flits to send, it will send IDLE and NULL flits across. Th= ese flits sometimes do carry a payload, such as credit returns, but are gen= erally not considered part of the QPI bandwidth.", + "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; DRS Flits (both Hea= der and Data)", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.DRS", + "BriefDescription": "SBo1 Credits Acquired; For BL Ring", + "EventCode": "0x29", + "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over QPI on the DRS (Data Respo= nse) channel. DRS flits are used to transmit data with coherency. This do= es not count data flits received over the NCB channel which transmits non-c= oherent data.", - "UMask": "0x18", - "Unit": "QPI LL" + "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; DRS Data Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.DRS_DATA", + "BriefDescription": "SBo1 Credits Occupancy; For AD Ring", + "EventCode": "0x2B", + "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of data flits received over QPI on the DRS (Data = Response) channel. DRS flits are used to transmit data with coherency. Th= is does not count data flits received over the NCB channel which transmits = non-coherent data. This includes only the data flits (not the header).", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", + "UMask": "0x1", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; DRS Header Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.DRS_NONDATA", + "BriefDescription": "SBo1 Credits Occupancy; For BL Ring", + "EventCode": "0x2B", + "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of protocol flits received over QPI on the DRS (D= ata Response) channel. DRS flits are used to transmit data with coherency.= This does not count data flits received over the NCB channel which transm= its non-coherent data. This includes only the header flits (not the data).= This includes extended headers.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; HOM Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.HOM", + "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of flits received over QPI on the home channel.", - "UMask": "0x6", - "Unit": "QPI LL" + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x1", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; HOM Non-Request Fli= ts", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.HOM_NONREQ", + "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of non-request flits received over QPI on the home chan= nel. These are most commonly snoop responses, and this event can be used a= s a proxy for that.", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; HOM Request Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.HOM_REQ", + "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of data request received over QPI on the home channel. = This basically counts the number of remote memory requests received over Q= PI. In conjunction with the local read count in the Home Agent, one can ca= lculate the number of LLC Misses.", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; SNP Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.SNP", + "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of snoop request flits received over QPI. These reques= ts are contained in the snoop channel. This does not include snoop respons= es, which are received on the home channel.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x8", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent Rx Fli= ts", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCB", + "BriefDescription": "Egress CCW NACK; AD CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.DN_AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass flits. These packets are generally used to= transmit non-coherent data across QPI.", - "UMask": "0xc", - "Unit": "QPI LL" + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x1", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent data R= x Flits", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCB_DATA", + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.DN_AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass data flits. These flits are generally used= to transmit non-coherent data across QPI. This does not include a count o= f the DRS (coherent) data flits. This only counts the data flits, not the = NCB headers.", + "PublicDescription": "AK CounterClockwise Egress Queue", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent non-da= ta Rx Flits", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCB_NONDATA", + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.DN_BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass non-data flits. These packets are generall= y used to transmit non-coherent data across QPI, and the flits counted here= are for headers and other non-data flits. This includes extended headers.= ", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.UP_AD", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent standa= rd Rx Flits", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCS", + "BriefDescription": "Egress CCW NACK; BL CW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.UP_AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of NCS (non-coherent standard) flits received over QPI. This in= cludes extended headers.", + "PublicDescription": "AD Clockwise Egress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.UP_BL", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AD", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AD", + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets to the local sock= et which use the AK ring.", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Data Response (DRS). DRS is generally used to transmit data with coher= ency. For example, remote reads and writes, or cache to cache transfers wi= ll transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for the Home (HOM) message class. HOM is generally used to send requests, = request responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AK", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AK", + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets destined for Rout= e-thru to a remote socket.", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Broadcast (NCB). NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Standard (NCS). NCS is commonly used for ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; NDR pac= kets are used to transmit a variety of protocol flits including grants and = completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Snoop (SNP) message class. SNP is used for outgoing snoops. Note that= snoop responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations", - "EventCode": "0x8", - "EventName": "UNC_Q_RxL_INSERTS", + "BriefDescription": "VN0 Credit Used; DRS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "Unit": "QPI LL" + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN0", - "EventCode": "0x9", - "EventName": "UNC_Q_RxL_INSERTS_DRS.VN0", + "BriefDescription": "VN0 Credit Used; HOM Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN1", - "EventCode": "0x9", - "EventName": "UNC_Q_RxL_INSERTS_DRS.VN1", + "BriefDescription": "VN0 Credit Used; NCB Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NDR Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; SNP Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN0", - "EventCode": "0xC", - "EventName": "UNC_Q_RxL_INSERTS_HOM.VN0", + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; DRS Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.DRS", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Data Response (DRS). DRS is generally used to transmit data with coherency= . For example, remote reads and writes, or cache to cache transfers will t= ransmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; HOM Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = the Home (HOM) message class. HOM is generally used to send requests, requ= est responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN1", - "EventCode": "0xC", - "EventName": "UNC_Q_RxL_INSERTS_HOM.VN1", + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCB Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCB", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Broadcast (NCB). NCB is generally used to transmit data witho= ut coherency. For example, non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCS Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Standard (NCS). NCS is commonly used for ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NDR Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; NDR packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; SNP Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Snoop (SNP) message class. SNP is used for outgoing snoops. Note that sno= op responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN0", - "EventCode": "0xA", - "EventName": "UNC_Q_RxL_INSERTS_NCB.VN0", + "BriefDescription": "VN1 Credit Used; DRS Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.DRS", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; HOM Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN1", - "EventCode": "0xA", - "EventName": "UNC_Q_RxL_INSERTS_NCB.VN1", + "BriefDescription": "VN1 Credit Used; NCB Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NCB", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; NCS Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; NDR Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; SNP Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN0", - "EventCode": "0xB", - "EventName": "UNC_Q_RxL_INSERTS_NCS.VN0", + "BriefDescription": "VNA credit Acquisitions; HOM Message Class", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.AD", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN1", - "EventCode": "0xB", - "EventName": "UNC_Q_RxL_INSERTS_NCS.VN1", + "BriefDescription": "VNA credit Acquisitions; HOM Message Class", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.BL", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; DRS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Data Response (DRS). DRS = is generally used to transmit data with coherency. For example, remote rea= ds and writes, or cache to cache transfers will transmit their data using D= RS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; HOM Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for the Home (HOM) message cla= ss. HOM is generally used to send requests, request responses, and snoop r= esponses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCB Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Broadcast (NC= B). NCB is generally used to transmit data without coherency. For example= , non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Standard (NCS= ).", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NDR Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; NDR packets are used to transmit a va= riety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; SNP Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Snoop (SNP) message class.= SNP is used for outgoing snoops. Note that snoop responses flow on the H= OM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN0", - "EventCode": "0xE", - "EventName": "UNC_Q_RxL_INSERTS_NDR.VN0", + "BriefDescription": "Bounce Control", + "EventCode": "0xA", + "EventName": "UNC_S_BOUNCE_CONTROL", + "PerPkg": "1", + "Unit": "SBOX" + }, + { + "BriefDescription": "Uncore Clocks", + "EventName": "UNC_S_CLOCKTICKS", + "PerPkg": "1", + "Unit": "SBOX" + }, + { + "BriefDescription": "FaST wire asserted", + "EventCode": "0x9", + "EventName": "UNC_S_FAST_ASSERTED", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; All", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", + "UMask": "0xf", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Down", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.DOWN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", + "UMask": "0xc", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Down and Event", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.DOWN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Event ring polarity.", + "UMask": "0x4", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Down and Odd", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.DOWN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity.", + "UMask": "0x8", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Up", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", + "UMask": "0x3", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Up and Even", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.UP_EVEN", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN1", - "EventCode": "0xE", - "EventName": "UNC_Q_RxL_INSERTS_NDR.VN1", + "BriefDescription": "AD Ring In Use; Up and Odd", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.UP_ODD", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN0", - "EventCode": "0xD", - "EventName": "UNC_Q_RxL_INSERTS_SNP.VN0", + "BriefDescription": "AK Ring In Use; All", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.ALL", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0xf", + "Unit": "SBOX" }, { - "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN1", - "EventCode": "0xD", - "EventName": "UNC_Q_RxL_INSERTS_SNP.VN1", + "BriefDescription": "AK Ring In Use; Down", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.DOWN", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0xc", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - All Packets", - "EventCode": "0xB", - "EventName": "UNC_Q_RxL_OCCUPANCY", + "BriefDescription": "AK Ring In Use; Down and Event", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.DOWN_EVEN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - DRS; for VN0", - "EventCode": "0x15", - "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN0", + "BriefDescription": "AK Ring In Use; Down and Odd", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.DOWN_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - DRS; for VN1", - "EventCode": "0x15", - "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN1", + "BriefDescription": "AK Ring In Use; Up", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.UP", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0x3", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - HOM; for VN0", - "EventCode": "0x18", - "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN0", + "BriefDescription": "AK Ring In Use; Up and Even", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.UP_EVEN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - HOM; for VN1", - "EventCode": "0x18", - "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN1", + "BriefDescription": "AK Ring In Use; Up and Odd", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.UP_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCB; for VN0", - "EventCode": "0x16", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN0", + "BriefDescription": "BL Ring in Use; All", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.ALL", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0xf", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCB; for VN1", - "EventCode": "0x16", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN1", + "BriefDescription": "BL Ring in Use; Down", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.DOWN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0xc", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCS; for VN0", - "EventCode": "0x17", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN0", + "BriefDescription": "BL Ring in Use; Down and Event", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.DOWN_EVEN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCS; for VN1", - "EventCode": "0x17", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN1", + "BriefDescription": "BL Ring in Use; Down and Odd", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.DOWN_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NDR; for VN0", - "EventCode": "0x1A", - "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN0", + "BriefDescription": "BL Ring in Use; Up", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.UP", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0x3", + "Unit": "SBOX" + }, + { + "BriefDescription": "BL Ring in Use; Up and Even", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NDR; for VN1", - "EventCode": "0x1A", - "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN1", + "BriefDescription": "BL Ring in Use; Up and Odd", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.UP_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - SNP; for VN0", - "EventCode": "0x19", - "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN0", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.AD_CACHE", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - SNP; for VN1", - "EventCode": "0x19", - "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN1", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Acknowledgements to core", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.AK_CORE", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - H= OM", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_DRS", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Data Responses to core", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.BL_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the HOM message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x1", - "Unit": "QPI LL" + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - D= RS", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_HOM", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.IV_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the DRS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - S= NP", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCB", + "BriefDescription": "BL Ring in Use; Any", + "EventCode": "0x1E", + "EventName": "UNC_S_RING_IV_USED.DN", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the SNP message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", + "UMask": "0xc", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= DR", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCS", + "BriefDescription": "BL Ring in Use; Any", + "EventCode": "0x1E", + "EventName": "UNC_S_RING_IV_USED.UP", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NDR message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", + "UMask": "0x3", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CS", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NDR", + "BriefDescription": "UNC_S_RING_SINK_STARVED.AD_CACHE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.AD_CACHE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x20", - "Unit": "QPI LL" + "UMask": "0x1", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CB", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_SNP", + "BriefDescription": "UNC_S_RING_SINK_STARVED.AK_CORE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.AK_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCB message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x10", - "Unit": "QPI LL" + "UMask": "0x2", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; Egress Credit= s", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.EGRESS_CREDITS", + "BriefDescription": "UNC_S_RING_SINK_STARVED.BL_CORE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.BL_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet because there were insufficient BGF cre= dits. For details on a message class granularity, use the Egress Credit Oc= cupancy events.", - "UMask": "0x40", - "Unit": "QPI LL" + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; GV", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.GV", + "BriefDescription": "UNC_S_RING_SINK_STARVED.IV_CORE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.IV_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled because a GV transition (frequency transition) w= as taking place.", - "UMask": "0x80", - "Unit": "QPI LL" + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - H= OM", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_DRS", + "BriefDescription": "Injection Starvation; AD - Bounces", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the HOM message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", + "UMask": "0x2", + "Unit": "SBOX" + }, + { + "BriefDescription": "Injection Starvation; AD - Credits", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - D= RS", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_HOM", + "BriefDescription": "Injection Starvation; BL - Bounces", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.BL_BNC", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the DRS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - S= NP", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCB", + "BriefDescription": "Injection Starvation; BL - Credits", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.BL_CRD", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the SNP message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= DR", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCS", + "BriefDescription": "Bypass; AD - Bounces", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NDR message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x2", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CS", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NDR", + "BriefDescription": "Bypass; AD - Credits", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.AD_CRD", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x20", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x1", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CB", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_SNP", + "BriefDescription": "Bypass; AK", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.AK", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCB message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "PublicDescription": "Bypass the Sbo Ingress.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Cycles in L0p", - "EventCode": "0xD", - "EventName": "UNC_Q_TxL0P_POWER_CYCLES", + "BriefDescription": "Bypass; BL - Bounces", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.BL_BNC", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Cycles in L0", - "EventCode": "0xC", - "EventName": "UNC_Q_TxL0_POWER_CYCLES", + "BriefDescription": "Bypass; BL - Credits", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.BL_CRD", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Bypassed", - "EventCode": "0x5", - "EventName": "UNC_Q_TxL_BYPASSED", + "BriefDescription": "Bypass; IV", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.IV", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the Tx flit buffer and pass directly out the QPI Li= nk. Generally, when data is transmitted across QPI, it will bypass the TxQ = and pass directly to the link. However, the TxQ will be used with L0p and = when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x20", + "Unit": "SBOX" }, { - "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is al= most full", - "EventCode": "0x2", - "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.ALMOST_FULL", + "BriefDescription": "Injection Starvation; AD - Bounces", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is almost ful= l, we block some but not all packets.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is fu= ll", - "EventCode": "0x2", - "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.FULL", + "BriefDescription": "Injection Starvation; AD - Credits", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.AD_CRD", "PerPkg": "1", - "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is totally fu= ll, we are not allowed to send any packets.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Cycles not Empty", - "EventCode": "0x6", - "EventName": "UNC_Q_TxL_CYCLES_NE", + "BriefDescription": "Injection Starvation; AK", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the TxQ is = not empty. Generally, when data is transmitted across QPI, it will bypass t= he TxQ and pass directly to the link. However, the TxQ will be used with L= 0p and when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 0; Data Tx Flits", - "EventName": "UNC_Q_TxL_FLITS_G0.DATA", + "BriefDescription": "Injection Starvation; BL - Bounces", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.BL_BNC", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data fli= ts transmitted over QPI. Each flit contains 64b of data. This includes bo= th DRS and NCB data flits (coherent and non-coherent). This can be used to= calculate the data bandwidth of the QPI link. One can get a good picture = of the QPI-link characteristics by evaluating the protocol flits, data flit= s, and idle/null flits. This does not include the header flits that go in = data packets.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 0; Non-Data protoco= l Tx Flits", - "EventName": "UNC_Q_TxL_FLITS_G0.NON_DATA", + "BriefDescription": "Injection Starvation; BL - Credits", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.BL_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL= non-data flits transmitted across QPI. This basically tracks the protocol= overhead on the QPI link. One can get a good picture of the QPI-link char= acteristics by evaluating the protocol flits, data flits, and idle/null fli= ts. This includes the header flits for data packets.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; DRS Flits (both = Header and Data)", - "EventName": "UNC_Q_TxL_FLITS_G1.DRS", + "BriefDescription": "Injection Starvation; IVF Credit", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.IFV", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over QPI on the DRS (Da= ta Response) channel. DRS flits are used to transmit data with coherency.", - "UMask": "0x18", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x40", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; DRS Data Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.DRS_DATA", + "BriefDescription": "Injection Starvation; IV", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x20", + "Unit": "SBOX" + }, + { + "BriefDescription": "Ingress Allocations; AD - Bounces", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x2", + "Unit": "SBOX" + }, + { + "BriefDescription": "Ingress Allocations; AD - Credits", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.AD_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of data flits transmitted over QPI on the DR= S (Data Response) channel. DRS flits are used to transmit data with cohere= ncy. This does not count data flits transmitted over the NCB channel which= transmits non-coherent data. This includes only the data flits (not the h= eader).", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x1", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; DRS Header Flits= ", - "EventName": "UNC_Q_TxL_FLITS_G1.DRS_NONDATA", + "BriefDescription": "Ingress Allocations; AK", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of protocol flits transmitted over QPI on th= e DRS (Data Response) channel. DRS flits are used to transmit data with co= herency. This does not count data flits transmitted over the NCB channel w= hich transmits non-coherent data. This includes only the header flits (not= the data). This includes extended headers.", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; HOM Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.HOM", + "BriefDescription": "Ingress Allocations; BL - Bounces", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.BL_BNC", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of flits transmitted over QPI on the home channel.= ", - "UMask": "0x6", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; HOM Non-Request = Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.HOM_NONREQ", + "BriefDescription": "Ingress Allocations; BL - Credits", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.BL_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of non-request flits transmitted over QPI on the h= ome channel. These are most commonly snoop responses, and this event can b= e used as a proxy for that.", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; HOM Request Flit= s", - "EventName": "UNC_Q_TxL_FLITS_G1.HOM_REQ", + "BriefDescription": "Ingress Allocations; IV", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.IV", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of data request transmitted over QPI on the home c= hannel. This basically counts the number of remote memory requests transmi= tted over QPI. In conjunction with the local read count in the Home Agent,= one can calculate the number of LLC Misses.", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x20", + "Unit": "SBOX" + }, + { + "BriefDescription": "Ingress Occupancy; AD - Bounces", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; SNP Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.SNP", + "BriefDescription": "Ingress Occupancy; AD - Credits", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.AD_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of snoop request flits transmitted over QPI. Thes= e requests are contained in the snoop channel. This does not include snoop= responses, which are transmitted on the home channel.", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent Byp= ass Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCB", + "BriefDescription": "Ingress Occupancy; AK", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass flits. These packets are generally us= ed to transmit non-coherent data across QPI.", - "UMask": "0xc", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent dat= a Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCB_DATA", + "BriefDescription": "Ingress Occupancy; BL - Bounces", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.BL_BNC", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass data flits. These flits are generally= used to transmit non-coherent data across QPI. This does not include a co= unt of the DRS (coherent) data flits. This only counts the data flits, not= the NCB headers.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent non= -data Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCB_NONDATA", + "BriefDescription": "Ingress Occupancy; BL - Credits", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.BL_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass non-data flits. These packets are gen= erally used to transmit non-coherent data across QPI, and the flits counted= here are for headers and other non-data flits. This includes extended hea= ders.", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent sta= ndard Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCS", + "BriefDescription": "Ingress Occupancy; IV", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.IV", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of NCS (non-coherent standard) flits transmitted over QPI. = This includes extended headers.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x20", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AD", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AD", + "BriefDescription": "UNC_S_TxR_ADS_USED.AD", + "EventCode": "0x4", + "EventName": "UNC_S_TxR_ADS_USED.AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets to the lo= cal socket which use the AK ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AK", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AK", + "BriefDescription": "UNC_S_TxR_ADS_USED.AK", + "EventCode": "0x4", + "EventName": "UNC_S_TxR_ADS_USED.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets destined = for Route-thru to a remote socket.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Allocations", + "BriefDescription": "UNC_S_TxR_ADS_USED.BL", "EventCode": "0x4", - "EventName": "UNC_Q_TxL_INSERTS", + "EventName": "UNC_S_TxR_ADS_USED.BL", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Tx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", - "Unit": "QPI LL" + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Occupancy", - "EventCode": "0x7", - "EventName": "UNC_Q_TxL_OCCUPANCY", + "BriefDescription": "Egress Allocations; AD - Bounces", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.AD_BNC", "PerPkg": "1", - "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across QPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x2", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN0", - "EventCode": "0x26", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Egress Allocations; AD - Credits", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.AD_CRD", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN1", - "EventCode": "0x26", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Egress Allocations; AK", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.AK", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N0", - "EventCode": "0x22", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Egress Allocations; BL - Bounces", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.BL_BNC", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N1", - "EventCode": "0x22", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Egress Allocations; BL - Credits", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.BL_CRD", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", - "EventCode": "0x28", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Egress Allocations; IV", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.IV", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x20", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", - "EventCode": "0x28", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Egress Occupancy; AD - Bounces", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", - "EventCode": "0x24", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Egress Occupancy; AD - Credits", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.AD_CRD", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", - "EventCode": "0x24", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Egress Occupancy; AK", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.AK", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN0", - "EventCode": "0x27", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Egress Occupancy; BL - Bounces", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.BL_BNC", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN1", - "EventCode": "0x27", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Egress Occupancy; BL - Credits", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.BL_CRD", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N0", - "EventCode": "0x23", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Egress Occupancy; IV", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.IV", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x20", + "Unit": "SBOX" + }, + { + "BriefDescription": "Injection Starvation; Onto AD Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.AD", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N1", - "EventCode": "0x23", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Injection Starvation; Onto AK Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.AK", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", - "EventCode": "0x29", - "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED", + "BriefDescription": "Injection Starvation; Onto BL Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.BL", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. Local NDR message class to AK Egre= ss.", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", - "EventCode": "0x25", - "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY", + "BriefDescription": "Injection Starvation; Onto IV Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.IV", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . Local NDR message class to AK Egress.", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN0", - "EventCode": "0x2A", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", + "EventCode": "0xff", + "EventName": "UNC_U_CLOCKTICKS", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN1", - "EventCode": "0x2A", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN1", + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for Shar= ed VN", - "EventCode": "0x2A", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN_SHR", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.DISABLE", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x2", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N0", - "EventCode": "0x1F", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.ENABLE", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N1", - "EventCode": "0x1F", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for S= hared VN", - "EventCode": "0x1F", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN_SHR", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN0", - "EventCode": "0x2B", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", + "PublicDescription": "PHOLD cycles. Filter from source CoreID.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN1", - "EventCode": "0x2B", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN1", + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Number outstanding register requests within = message channel tracker", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N0", - "EventCode": "0x20", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.CMC", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x10", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N1", - "EventCode": "0x20", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Monitor Sent to T0; Livelock", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x4", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN0", - "EventCode": "0x2C", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Monitor Sent to T0; LTError", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LTERROR", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x8", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN1", - "EventCode": "0x2C", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Monitor Sent to T0; Monitor T0", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x1", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N0", - "EventCode": "0x21", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Monitor Sent to T0; Monitor T1", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x2", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N1", - "EventCode": "0x21", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Monitor Sent to T0; Other", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.OTHER", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", + "UMask": "0x80", + "Unit": "UBOX" }, { - "BriefDescription": "VNA Credits Returned", - "EventCode": "0x1C", - "EventName": "UNC_Q_VNA_CREDIT_RETURNS", + "BriefDescription": "Monitor Sent to T0; Trap", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.TRAP", "PerPkg": "1", - "PublicDescription": "Number of VNA credits returned.", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x40", + "Unit": "UBOX" }, { - "BriefDescription": "VNA Credits Pending Return - Occupancy", - "EventCode": "0x1B", - "EventName": "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY", + "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.UMC", "PerPkg": "1", - "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x20", + "Unit": "UBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-io.json b/too= ls/perf/pmu-events/arch/x86/broadwellx/uncore-io.json new file mode 100644 index 000000000000..01e04daf03da --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/broadwellx/uncore-io.json @@ -0,0 +1,555 @@ +[ + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_R2_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI0", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI1", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the DRS message class.= ", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCB message class.= ", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCS message class.= ", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; DRS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the DRS message = class.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCB", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCB message = class.", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCS message = class.", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; All", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xf", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced; Dn", + "EventCode": "0x12", + "EventName": "UNC_R2_RING_AK_BOUNCES.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced; Up", + "EventCode": "0x12", + "EventName": "UNC_R2_RING_AK_BOUNCES.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; All", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xf", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; All", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xf", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Any", + "EventCode": "0xA", + "EventName": "UNC_R2_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0xf", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Counterclockwise", + "EventCode": "0xA", + "EventName": "UNC_R2_RING_IV_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Clockwise", + "EventCode": "0xA", + "EventName": "UNC_R2_RING_IV_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCB", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCS", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Allocations; NCB", + "EventCode": "0x11", + "EventName": "UNC_R2_RxR_INSERTS.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= B Ingress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Allocations; NCS", + "EventCode": "0x11", + "EventName": "UNC_R2_RxR_INSERTS.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= S Ingress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; DRS", + "EventCode": "0x13", + "EventName": "UNC_R2_RxR_OCCUPANCY.DRS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given R2PCIe = Ingress queue in each cycles. This tracks one of the three ring Ingress bu= ffers. This can be used with the R2PCIe Ingress Not Empty event to calcula= te average occupancy or the R2PCIe Ingress Allocations event in order to ca= lculate average queuing latency.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For AD Ring", + "EventCode": "0x28", + "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.AD", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For BL Ring", + "EventCode": "0x28", + "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.BL", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", + "EventCode": "0x2A", + "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.AD", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", + "EventCode": "0x2A", + "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.BL", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AD", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AD Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AK", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AK Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; BL", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; BL Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AD", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AD Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AK", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AK Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; BL", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; BL Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AD CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.DN_AD", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.DN_AK", + "PerPkg": "1", + "PublicDescription": "AK CounterClockwise Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.DN_BL", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.UP_AD", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; BL CW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.UP_AK", + "PerPkg": "1", + "PublicDescription": "AD Clockwise Egress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.UP_BL", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-other.json b/= tools/perf/pmu-events/arch/x86/broadwellx/uncore-other.json deleted file mode 100644 index 43def2582617..000000000000 --- a/tools/perf/pmu-events/arch/x86/broadwellx/uncore-other.json +++ /dev/null @@ -1,3242 +0,0 @@ -[ - { - "BriefDescription": "Total Write Cache Occupancy; Any Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Select Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Clocks in the IRP", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of clocks in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CLFlush", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CRd", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.CRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; DRd", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.DRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIDCAHin5t", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIRdCur", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIItoM", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; RFO", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; WbMtoI", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of A= tomic Transactions as Secondary", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of R= ead Transactions as Secondary", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of W= rite Transactions as Secondary", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Requests", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Requests", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Transfers= From Primary to Secondary", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints= From Primary to Secondary", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch TimeOut", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.PF_TIMEOUT", - "PerPkg": "1", - "PublicDescription": "Indicates the fetch for a previous prefetch = wasn't accepted by the prefetch. This happens in the case of a prefetch T= imeOut", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Data Throttled", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.DATA_THROTTLE", - "PerPkg": "1", - "PublicDescription": "IRP throttled switch data", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Invalid", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Valid", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Ingress Occupancy", - "EventCode": "0xA", - "EventName": "UNC_I_RxR_AK_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "EventCode": "0x4", - "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - DRS", - "EventCode": "0x1", - "EventName": "UNC_I_RxR_BL_DRS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "EventCode": "0x7", - "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "EventCode": "0x5", - "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCB", - "EventCode": "0x2", - "EventName": "UNC_I_RxR_BL_NCB_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "EventCode": "0x8", - "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "EventCode": "0x6", - "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCS", - "EventCode": "0x3", - "EventName": "UNC_I_RxR_BL_NCS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "EventCode": "0x9", - "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit E or S", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit E or S", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit I", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit I", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit M", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit M", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Miss", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Miss", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpCode", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpCode", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpData", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpData", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpInv", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpInv", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Atomic", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Other", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Read Prefetches", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.RD_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Reads", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.READS", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Writes", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only write requests. = Each write request should have a prefetch, so there is no need to explicit= ly track these requests.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Write Prefetches", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of write p= refetches.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD Egress Credit Stalls", - "EventCode": "0x18", - "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x19", - "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xE", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xF", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0xD", - "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R2_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI0", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI1", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the DRS message class.= ", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCB message class.= ", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCS message class.= ", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; DRS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the DRS message = class.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCB", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCB message = class.", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCS message = class.", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; All", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xf", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced; Dn", - "EventCode": "0x12", - "EventName": "UNC_R2_RING_AK_BOUNCES.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced; Up", - "EventCode": "0x12", - "EventName": "UNC_R2_RING_AK_BOUNCES.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; All", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xf", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; All", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xf", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Any", - "EventCode": "0xA", - "EventName": "UNC_R2_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0xf", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Counterclockwise", - "EventCode": "0xA", - "EventName": "UNC_R2_RING_IV_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Clockwise", - "EventCode": "0xA", - "EventName": "UNC_R2_RING_IV_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCB", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCS", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Allocations; NCB", - "EventCode": "0x11", - "EventName": "UNC_R2_RxR_INSERTS.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= B Ingress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Allocations; NCS", - "EventCode": "0x11", - "EventName": "UNC_R2_RxR_INSERTS.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= S Ingress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; DRS", - "EventCode": "0x13", - "EventName": "UNC_R2_RxR_OCCUPANCY.DRS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given R2PCIe = Ingress queue in each cycles. This tracks one of the three ring Ingress bu= ffers. This can be used with the R2PCIe Ingress Not Empty event to calcula= te average occupancy or the R2PCIe Ingress Allocations event in order to ca= lculate average queuing latency.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For AD Ring", - "EventCode": "0x28", - "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For BL Ring", - "EventCode": "0x28", - "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", - "EventCode": "0x2A", - "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", - "EventCode": "0x2A", - "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AD", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AD Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AK", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AK Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; BL", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; BL Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AD", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AD Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AK", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AK Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; BL", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; BL Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AD CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.DN_AD", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.DN_AK", - "PerPkg": "1", - "PublicDescription": "AK CounterClockwise Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.DN_BL", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.UP_AD", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; BL CW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.UP_AK", - "PerPkg": "1", - "PublicDescription": "AD Clockwise Egress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.UP_BL", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R3_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO10", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 10", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO11", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 11", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO12", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 12", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO13", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 13", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO14_16", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 14&16", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO8", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 8", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO9", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 9", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO_15_17", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 15&17", - "UMask": "0x80", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO0", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 0", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO1", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO2", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 2", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO3", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 3", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO4", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 4", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO5", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 5", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO6", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 6", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO7", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 7", - "UMask": "0x80", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA0", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA0", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA1", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCB Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCS", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCS Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Backpressure", - "EventCode": "0xB", - "EventName": "UNC_R3_IOT_BACKPRESSURE.HUB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Backpressure", - "EventCode": "0xB", - "EventName": "UNC_R3_IOT_BACKPRESSURE.SAT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Hi", - "EventCode": "0xD", - "EventName": "UNC_R3_IOT_CTS_HI.CTS2", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Hi", - "EventCode": "0xD", - "EventName": "UNC_R3_IOT_CTS_HI.CTS3", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Lo", - "EventCode": "0xC", - "EventName": "UNC_R3_IOT_CTS_LO.CTS0", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Lo", - "EventCode": "0xC", - "EventName": "UNC_R3_IOT_CTS_LO.CTS1", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; All", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xf", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; All", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xf", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; All", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xf", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 IV Ring in Use; Any", - "EventCode": "0xA", - "EventName": "UNC_R3_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0xf", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 IV Ring in Use; Clockwise", - "EventCode": "0xA", - "EventName": "UNC_R3_RING_IV_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ring Stop Starved; AK", - "EventCode": "0xE", - "EventName": "UNC_R3_RING_SINK_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles the ringstop is in starvati= on (per ring)", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; HOM", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NDR", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; SNP", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; DRS", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; HOM", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; HOM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; NCB", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; NCS", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; NDR", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NDR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; SNP", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; SNP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; DRS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; DRS Ingress= Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; HOM", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; HOM Ingress= Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCB", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCB Ingress= Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCS Ingress= Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NDR", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NDR Ingress= Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; SNP", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; SNP Ingress= Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; DRS", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= RS Ingress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; HOM", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; NCB", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CB Ingress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; NCS", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CS Ingress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; NDR", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; SNP", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; DRS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.DRS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; HOM", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.HOM", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; HOM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCB", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; NDR", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NDR", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NDR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; SNP", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; SNP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For AD Ring", - "EventCode": "0x28", - "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For BL Ring", - "EventCode": "0x28", - "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", - "EventCode": "0x2A", - "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", - "EventCode": "0x2A", - "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Acquired; For AD Ring", - "EventCode": "0x29", - "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Acquired; For BL Ring", - "EventCode": "0x29", - "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Occupancy; For AD Ring", - "EventCode": "0x2B", - "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Occupancy; For BL Ring", - "EventCode": "0x2B", - "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; AD CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.DN_AD", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.DN_AK", - "PerPkg": "1", - "PublicDescription": "AK CounterClockwise Egress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.DN_BL", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.UP_AD", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; BL CW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.UP_AK", - "PerPkg": "1", - "PublicDescription": "AD Clockwise Egress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.UP_BL", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Data Response (DRS). DRS is generally used to transmit data with coher= ency. For example, remote reads and writes, or cache to cache transfers wi= ll transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for the Home (HOM) message class. HOM is generally used to send requests, = request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Broadcast (NCB). NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Standard (NCS). NCS is commonly used for ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; NDR pac= kets are used to transmit a variety of protocol flits including grants and = completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Snoop (SNP) message class. SNP is used for outgoing snoops. Note that= snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; DRS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; HOM Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCB Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NDR Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; SNP Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; DRS Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Data Response (DRS). DRS is generally used to transmit data with coherency= . For example, remote reads and writes, or cache to cache transfers will t= ransmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; HOM Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = the Home (HOM) message class. HOM is generally used to send requests, requ= est responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCB Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Broadcast (NCB). NCB is generally used to transmit data witho= ut coherency. For example, non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCS Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Standard (NCS). NCS is commonly used for ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NDR Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; NDR packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; SNP Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Snoop (SNP) message class. SNP is used for outgoing snoops. Note that sno= op responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; DRS Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; HOM Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCB Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCS Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NDR Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; SNP Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions; HOM Message Class", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions; HOM Message Class", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; DRS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Data Response (DRS). DRS = is generally used to transmit data with coherency. For example, remote rea= ds and writes, or cache to cache transfers will transmit their data using D= RS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; HOM Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for the Home (HOM) message cla= ss. HOM is generally used to send requests, request responses, and snoop r= esponses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCB Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Broadcast (NC= B). NCB is generally used to transmit data without coherency. For example= , non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Standard (NCS= ).", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NDR Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; NDR packets are used to transmit a va= riety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; SNP Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Snoop (SNP) message class.= SNP is used for outgoing snoops. Note that snoop responses flow on the H= OM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Bounce Control", - "EventCode": "0xA", - "EventName": "UNC_S_BOUNCE_CONTROL", - "PerPkg": "1", - "Unit": "SBO" - }, - { - "BriefDescription": "Uncore Clocks", - "EventName": "UNC_S_CLOCKTICKS", - "PerPkg": "1", - "Unit": "SBO" - }, - { - "BriefDescription": "FaST wire asserted", - "EventCode": "0x9", - "EventName": "UNC_S_FAST_ASSERTED", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; All", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", - "UMask": "0xf", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Down", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.DOWN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Down and Event", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.DOWN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Event ring polarity.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Down and Odd", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.DOWN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Up", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Up and Even", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Up and Odd", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; All", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0xf", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Down", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.DOWN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Down and Event", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.DOWN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Down and Odd", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.DOWN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Up", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Up and Even", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Up and Odd", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; All", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0xf", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Down", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.DOWN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Down and Event", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.DOWN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Down and Odd", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.DOWN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Up", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Up and Even", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Up and Odd", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in BDX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.AD_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Acknowledgements to core", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.AK_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Data Responses to core", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.BL_CORE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.IV_CORE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Any", - "EventCode": "0x1E", - "EventName": "UNC_S_RING_IV_USED.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Any", - "EventCode": "0x1E", - "EventName": "UNC_S_RING_IV_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.AD_CACHE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.AD_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.AK_CORE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.AK_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.BL_CORE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.BL_CORE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.IV_CORE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.IV_CORE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Bounces", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Credits", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Bounces", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Credits", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; AD - Bounces", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; AD - Credits", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; AK", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; BL - Bounces", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; BL - Credits", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; IV", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Bounces", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Credits", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AK", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Bounces", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Credits", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; IVF Credit", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x40", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; IV", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; AD - Bounces", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; AD - Credits", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; AK", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; BL - Bounces", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; BL - Credits", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; IV", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; AD - Bounces", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; AD - Credits", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; AK", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; BL - Bounces", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; BL - Credits", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; IV", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_TxR_ADS_USED.AD", - "EventCode": "0x4", - "EventName": "UNC_S_TxR_ADS_USED.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_TxR_ADS_USED.AK", - "EventCode": "0x4", - "EventName": "UNC_S_TxR_ADS_USED.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_TxR_ADS_USED.BL", - "EventCode": "0x4", - "EventName": "UNC_S_TxR_ADS_USED.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; AD - Bounces", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; AD - Credits", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; AK", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; BL - Bounces", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; BL - Credits", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; IV", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; AD - Bounces", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; AD - Credits", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; AK", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; BL - Bounces", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; BL - Credits", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; IV", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto AD Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.AD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto AK Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto BL Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.BL", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto IV Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", - "EventCode": "0xff", - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles. Filter from source CoreID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "Number outstanding register requests within = message channel tracker", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.CMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Livelock", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; LTError", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LTERROR", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T0", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T1", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Other", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.OTHER", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Trap", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.TRAP", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.UMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x20", - "Unit": "UBOX" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74E4BC77B61 for ; Thu, 13 Apr 2023 13:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231558AbjDMNcL (ORCPT ); Thu, 13 Apr 2023 09:32:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231545AbjDMNbX (ORCPT ); Thu, 13 Apr 2023 09:31:23 -0400 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 607A0B744 for ; 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bh=DcwSIadiYDW/uO6fh2E5xl5iuAvBI8F1Zqa3Xb2a7Bo=; b=mDcH4wZ4n9GKDhoim4ppjH3kzdI71ZHgnGCmyoziYwkAQi+C8UiWn7dk934x8zAxNj oduz51vi6wI7mBznRBSA81yMoxRHgVe67Rw+6H4I/Tx9hU4Eu85cpTRgDJcSqwWOUikz L6/NGCQvpxS0xkhKOfukT+o2PdbdR4Pr55JJ3gREOi0lt1Ew4JZ7APm2nNtIJU28CPT5 72lQwh01Hwo8jyMPzrlFc80XMQ9TYTEORXMDp2QUe854T9N8dYpFk7UGrZQdfwJCksZ3 wjYk71/dVRrzR3tNecDhboFxBpGWubHOmJnE+bQa4p+s+QJzOX95i6DI2KW1cD7tYJQj +2tg== X-Gm-Message-State: AAQBX9fuuSIXwz5ve2LskMQDkQZA3oEK1zlfvtop9F7IQeZXG1+lKl+8 ILBy9WNDyInA4hHkfAIw0tNx0l7UKkoM X-Google-Smtp-Source: AKy350YRrk+zzL9pzgj4yRs1+I0Q4nUyHSq0/47pERmEVzhpsFArcKsEYee8Wsx/jZUL9ukT3roC3+UraDTX X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a17:90a:a0c:b0:247:1120:78af with SMTP id o12-20020a17090a0a0c00b00247112078afmr497146pjo.8.1681392667394; Thu, 13 Apr 2023 06:31:07 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:36 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-9-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 08/21] perf vendor events intel: Fix uncore topics for cascadelakex From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect, io and memory. Signed-off-by: Ian Rogers --- .../arch/x86/cascadelakex/uncore-cache.json | 10764 +++++++ .../x86/cascadelakex/uncore-interconnect.json | 11334 +++++++ .../arch/x86/cascadelakex/uncore-io.json | 4250 +++ .../arch/x86/cascadelakex/uncore-memory.json | 2 +- .../arch/x86/cascadelakex/uncore-other.json | 26344 ---------------- 5 files changed, 26349 insertions(+), 26345 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cach= e.json create mode 100644 tools/perf/pmu-events/arch/x86/cascadelakex/uncore-inte= rconnect.json create mode 100644 tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.j= son delete mode 100644 tools/perf/pmu-events/arch/x86/cascadelakex/uncore-othe= r.json diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json = b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json new file mode 100644 index 000000000000..2c880535cc82 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json @@ -0,0 +1,10764 @@ +[ + { + "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.= ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_READ", + "Filter": "config1=3D0x40040e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts= .ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_WRITE", + "Filter": "config1=3D0x40041e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.UNCACHEABLE", + "Filter": "config1=3D0x40e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_FULL", + "Filter": "config1=3D0x41833", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "ScaleUnit": "64Bytes", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", + "Filter": "config1=3D0x41a33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "ScaleUnit": "64Bytes", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass; Intermediate bypass Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the intermediate bypass.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass; Not Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that could not take the bypass, and issues a read to memory.= Note that transactions that did not take the bypass but did not issue read= to memory will not be counted.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass; Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the full bypass.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Uncore cache clock ticks", + "EventName": "UNC_CHA_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts clockticks of the clock controlling t= he uncore caching and home agent (CHA).", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xC0", + "EventName": "UNC_CHA_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C1 State", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C1_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C1 Transition", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C1_TRANSITION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C6 State", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C6_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C6 Transition", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C6_TRANSITION", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; GV", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.GV", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Any Cycle with Mult= iple Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Any Single Snoop", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Any Snoop to Remote= Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Multiple Core Reque= sts", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Single Core Request= s", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Core Request to Rem= ote Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Multiple Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Single Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Eviction to Remote = Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Multiple External S= noops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Single External Sno= ops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; External Snoop to R= emote Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "Counter 0 Occupancy", + "EventCode": "0x1F", + "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Not Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", + "PerPkg": "1", + "PublicDescription": "Counts transactions that looked into the mul= ti-socket cacheline Directory state, and therefore did not send a snoop bec= ause the Directory indicated it was not needed", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.SNP", + "PerPkg": "1", + "PublicDescription": "Counts transactions that looked into the mu= lti-socket cacheline Directory state, and sent one or more snoops, because = the Directory indicated it was needed", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from the HA pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.HA", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline Directory= state updates memory writes issued from the HA pipe. This does not include= memory write requests which are for I (Invalid) or E (Exclusive) cacheline= s.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from TOR pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.TOR", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline Directory= state updates due to memory writes issued from the TOR pipe which are the = result of remote transaction hitting the SF/LLC and returning data Core2Cor= e. This does not include memory write requests which are for I (Invalid) or= E (Exclusive) cachelines.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", + "EventCode": "0xAE", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", + "EventCode": "0xAE", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "FaST wire asserted; Horizontal", + "EventCode": "0xA5", + "EventName": "UNC_CHA_FAST_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "FaST wire asserted; Vertical", + "EventCode": "0xA5", + "EventName": "UNC_CHA_FAST_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Read request from a remote socket which hit i= n the HitMe Cache to a line In the E state", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.EX_RDS", + "PerPkg": "1", + "PublicDescription": "Counts read requests from a remote socket wh= ich hit in the HitME cache (used to cache the multi-socket Directory state)= to a line in the E(Exclusive) state. This includes the following read opc= odes (RdCode, RdData, RdDataMigratory, RdCur, RdInv*, Inv*)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache; Shared = hit and op is RdInvOwn, RdInv, Inv*", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoE", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.WBMTOE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoI, WbPushMtoI, WbFlush, or WbMtoS", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*", + "EventCode": "0x5E", + "EventName": "UNC_CHA_HITME_LOOKUP.READ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS", + "EventCode": "0x5E", + "EventName": "UNC_CHA_HITME_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache; No SF= /LLC HitS/F and op is RdInvOwn", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache; op is= RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache; SF/LL= C HitS/F and op is RdInvOwn", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Deallocate HitME$ on Reads without RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a local request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "PerPkg": "1", + "PublicDescription": "Received RspFwdI* for a local request, but c= onverted HitME$ to SF entry", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache on RdInvOwn even if not RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a remote request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM", + "PerPkg": "1", + "PublicDescription": "Updated HitME$ on RspFwdI* or local HitM/E r= eceived for a remote request", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache to SHARed", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.SHARED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Even", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Even", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Even", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Even", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Even", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Even", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Left", + "EventCode": "0xAD", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Right", + "EventCode": "0xAD", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "HA to iMC Reads Issued; ISOCH", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "PublicDescription": "Count of the number of reads issued to any o= f the memory controller channels. This can be filtered by the priority of = the reads.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line= Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to the any of the memory controller chann= els.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; Full Line= MIG", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Ful= l Line", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; Partial N= on-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; Partial M= IG", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.; Filter for memory c= ontroller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Par= tial", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations", + "EventCode": "0x62", + "EventName": "UNC_CHA_IODC_ALLOC.INVITOM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations dropped due to IODC Full", + "EventCode": "0x62", + "EventName": "UNC_CHA_IODC_ALLOC.IODCFULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IDOC allocation dropped due to OSB gate", + "EventCode": "0x62", + "EventName": "UNC_CHA_IODC_ALLOC.OSBGATED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to any reason", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to conflicting transaction", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.SNPOUT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoE", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoI", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbPushMtoI", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", + "PerPkg": "1", + "PublicDescription": "Moved to Cbo section", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Read transactions", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Local", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Remote", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", + "UMask": "0x91", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; External Snoo= p Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for only snoop requests c= oming from the remote socket(s) through the IPQ.", + "UMask": "0x9", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Write Request= s", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Writeback transactions from L2 to= the LLC This includes all write transactions -- both Cacheable and UC.", + "UMask": "0x5", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.F_STATE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x2f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in F State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x8f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in F State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_F", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x88", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in E state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in F State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_F", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in M state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; CV0 Prefetch Miss", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; CV0 Prefetch Victim", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Number of times that an RFO hit in S state.", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RFO_HIT_S", + "PerPkg": "1", + "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; Silent Snoop Eviction", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; Write Combining Aliasing", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.WC_ALIASING", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB", + "PerPkg": "1", + "PublicDescription": "Count of OSB snoop broadcasts. Counts by 1 p= er request causing OSB snoops to be broadcast. Does not count all the snoop= s generated by OSB.", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in IODC", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.IODC", + "PerPkg": "1", + "PublicDescription": "2LM related events; Counts the number of tim= es CHA saw NM Set conflict in IODC", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in SF/LLC", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC", + "PerPkg": "1", + "PublicDescription": "NM evictions due to another read to the same= near memory set in the LLC.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in SF/LLC", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF", + "PerPkg": "1", + "PublicDescription": "NM evictions due to another read to the same= near memory set in the SF.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in TOR", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR", + "PerPkg": "1", + "PublicDescription": "No Reject in the CHA due to a pending read t= o the same near memory set in the TOR.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Memory mode related events; Counts the number= of times CHA saw NM Set conflict in TOR and the transaction was rejected", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR_REJECT", + "PerPkg": "1", + "PublicDescription": "Rejects in the CHA due to a pending read to = the same near memory set in the TOR.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC0_SMI2", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC1_SMI3", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC2_SMI4", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC3_SMI5", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC0_SMI0", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC1_SMI1", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a remote socket for exclusive ownership of a cache line without receivi= ng data (INVITOE) to the CHA.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS", + "PerPkg": "1", + "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests from a remote socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Write requests", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "Write Requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Read and Write Requests; Writes Remote", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AD", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AK", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; BL", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; IV", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; AD", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xA4", + "EventName": "UNC_CHA_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; IPQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; IRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; IRQ Rejected", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; RRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.RRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; WBQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.WBQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; AD REQ on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; AD RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Non UPI AK Reque= st", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL NCB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL NCS on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL WB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Non UPI IV Reque= st", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Allow Snoop", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; ANY0", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; HA", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Merging these tw= o together to make room for ANY_REJECT_*0", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; LLC Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; PhyAddr Match", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; SF Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Mer= ging these two together to make room for ANY_REJECT_*0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; AD REQ on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; AD RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; Non UPI AK Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL NCB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL NCS on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL WB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; Non UPI IV Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; AD REQ on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; AD RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; Non UPI AK Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL NCB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL NCS on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL WB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; Non UPI IV Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; ANY0", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; HA", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; ANY0", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; HA", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; IPQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; IRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; RRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.RRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; WBQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.WBQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; AD REQ on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; AD RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Non UPI AK Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL NCB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL NCS on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL WB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Non UPI IV Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Allow Snoop", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; ANY0", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; HA", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Merging these two together to = make room for ANY_REJECT_*0", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; LLC Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; PhyAddr Match", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; SF Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= OR SF Way", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; AD REQ on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; AD RSP on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Non UPI AK Request", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL NCB on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL NCS on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL RSP on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL WB on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Non UPI IV Request", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Allow Snoop", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; ANY0", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; HA", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Merging these two toge= ther to make room for ANY_REJECT_*0", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; LLC Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; PhyAddr Match", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; SF Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; AD REQ on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; AD RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Non UPI AK Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL NCB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL NCS on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL WB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Non UPI IV Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Allow Snoop", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; ANY0", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; HA", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; LLC Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; PhyAddr Match", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; SF Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; AD REQ on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; AD RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Non UPI AK Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL NCB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL NCS on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL WB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Non UPI IV Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Allow Snoop", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; ANY0", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; HA", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; LLC Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; PhyAddr Match", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; SF Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Credit", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Credit", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AK - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; IV - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Credit", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Credit", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.E_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores cache. Snoop filter capacity e= victions occur when the snoop filter is full and evicts an existing entry t= o track a new entry. Does not count clean evictions such as when a cores ca= che replaces a tracked cacheline with a new cacheline.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.M_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores cache. Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry. Does not count clean evictions such as when a cores cac= he replaces a tracked cacheline with a new cacheline.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.S_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores cache. Snoop filter capacity evic= tions occur when the snoop filter is full and evicts an existing entry to t= rack a new entry. Does not count clean evictions such as when a cores cache= replaces a tracked cacheline with a new cacheline.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; All", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast snoop for Local Reques= ts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA. This filter incl= udes only requests coming from local sockets.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast snoops for Remote Requ= ests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA.This filter inclu= des only requests coming from remote sockets.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Directed snoops for Local Reques= ts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from local sockets.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Directed snoops for Remote Reque= sts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from remote sockets.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Local Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the local socket.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Remote Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the remote socket.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RspCnflct* Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCTS", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspCnflct* Snoop Response was received. This is returned when a snoop = finds an existing outstanding transaction in a remote caching agent. This t= riggers conflict resolution hardware. This covers both the opcode RspCnflct= and RspCnflctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received; RspFwd", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Counts the total number of RspI snoop respon= ses received. Whenever a snoops are issued, one or more snoop responses wi= ll be returned depending on the topology of the system. In systems larger= than 2s, when multiple snoops are returned this will count all the snoops = that are received. For example, if 3 snoops were issued and returned RspI,= RspS, and RspSFwd; then each of these sub-events would increment by 1.; Fi= lters for a snoop response of RspFwd to a CA request. This snoop response = is only possible for RdCur when a snoop HITM/E in a remote caching agent an= d it directly forwards data to a requestor without changing the requestor's= cache line state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RspI Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPI", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe RspI Snoop Response was received which indicates the remote cache does n= ot have the data, or when the remote cache silently evicts data (such as wh= en an RFO: the Read for Ownership issued before a write hits non-modified d= ata).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RspIFwd Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspIFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data and the requesting agent is able to acquire the dat= a in E (Exclusive) or M (modified) states. This is commonly returned with = RFO (the Read for Ownership issued before a write) transactions. The snoop= could have either been to a cacheline in the M,E,F (Modified, Exclusive or= Forward) states.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspS", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPS", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : RspS : Counts the= total number of RspI snoop responses received. Whenever a snoops are issu= ed, one or more snoop responses will be returned depending on the topology = of the system. In systems larger than 2s, when multiple snoops are return= ed this will count all the snoops that are received. For example, if 3 sno= ops were issued and returned RspI, RspS, and RspSFwd; then each of these su= b-events would increment by 1. : Filters for snoop responses of RspS. RspS= is returned when a remote cache has data but is not forwarding it. It is = a way to let the requesting socket know that it cannot allocate the data in= E state. No data is sent with S RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RspSFwd Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspSFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data but held on to its current copy. This is common fo= r data and code reads that hit in a remote socket in E (Exclusive) or F (Fo= rward) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Rsp*Fwd*WB Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSP_FWD_WB", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*Fwd*WB Snoop Response was received which indicates the data was writ= ten back to its home socket, and the cacheline was forwarded to the request= or socket. This snoop response is only used in >=3D 4 socket systems. It = is used when a snoop HITM's in a remote caching agent and it directly forwa= rds data to a requestor, and simultaneously returns data to its home socket= to be written back to memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Rsp*WB Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSP_WBWB", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*WB Snoop Response was received which indicates which indicates the d= ata was written back to its home. This is returned when a non-RFO request = hits a cacheline in the Modified state. The Cache can either downgrade the = cacheline to a S (Shared) or I (Invalid) state depending on how the system = has been configured. This response will also be sent when a cache requests= E (Exclusive) ownership of a cache line without receiving data, because th= e cache must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspCnflct", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspConflict to local CA reques= ts. This is returned when a snoop finds an existing outstanding transactio= n in a remote caching agent when it CAMs that caching agent. This triggers= conflict resolution hardware. This covers both RspCnflct and RspCnflctWbI= .", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspFwd to local CA requests. = This snoop response is only possible for RdCur when a snoop HITM/E in a rem= ote caching agent and it directly forwards data to a requestor without chan= ging the requestor's cache line state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspI", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspI to local CA requests. Rs= pI is returned when the remote cache does not have the data, or when the re= mote cache silently evicts data (such as when an RFO hits non-modified data= ).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspIFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspIFwd to local CA requests. = This is returned when a remote caching agent forwards data and the requesti= ng agent is able to acquire the data in E or M states. This is commonly re= turned with RFO transactions. It can be either a HitM or a HitFE.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspS", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspS to local CA requests. Rsp= S is returned when a remote cache has data but is not forwarding it. It is= a way to let the requesting socket know that it cannot allocate the data i= n E state. No data is sent with S RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspSFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspSFwd to local CA requests. = This is returned when a remote caching agent forwards data but holds on to= its current copy. This is common for data and code reads that hit in a re= mote socket in E or F state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; Rsp*FWD*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of Rsp*Fwd*WB to local CA request= s. This snoop response is only used in 4s systems. It is used when a snoo= p HITM's in a remote caching agent and it directly forwards data to a reque= stor, and simultaneously returns data to the home to be written back to mem= ory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; Rsp*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspIWB or RspSWB to local CA r= equests. This is returned when a non-RFO request hits in M state. Data an= d Code Reads can return either RspIWB or RspSWB depending on how the system= has been configured. InvItoE transactions will also return RspIWB because= they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0xff", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from Local", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x15", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from Local iA and IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL_IO_IA", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests", + "UMask": "0x35", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Misses from Local", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x25", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; SF/LLC Evictions", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.EVICT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; T= OR allocation occurred as a result of SF/LLC evictions (came from the ISMQ)= ", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hit (Not a Miss)", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; H= ITs (hit is defined to be not a miss [see below], as a result for any reque= st allocated into the TOR, one of either HIT or MISS must be true)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests from iA Cores", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that hit the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that missed the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally generated IO traffic", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; ItoM misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", + "Filter": "config1=3D0x49033", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO ItoM requests that mis= s the LLC. An ItoM request is used by IIO to request a data write without f= irst reading the data for ownership.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RdCur misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RDCUR", + "Filter": "config1=3D0x43C33", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RdCur requests and mis= s the LLC. A RdCur request is used by IIO to read data without changing sta= te.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RFO requests that miss= the LLC. A read for ownership (RFO) requests a cache line to be cached in = E state with the intent to modify.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; IPQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; IRQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Miss", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; M= isses. (a miss is defined to be any transaction from the IRQ, PRQ, RRQ, IP= Q or (in the victim case) the ISMQ, that required the CHA to spawn a new UP= I/SMI3 request on the UPI fabric (including UPI snoops and/or any RD/WR to = a local memory controller, in the event that the CHA is the home node)). B= asically, if the LLC/SF/MLC complex were not able to service the request wi= thout involving another agent...it is a miss. If only IDI snoops were requ= ired, it is not a miss (that means the SF/MLC com", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; PRQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", + "PerPkg": "1", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.RRQ_HIT", + "PerPkg": "1", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS", + "PerPkg": "1", + "UMask": "0x60", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.WBQ_HIT", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.WBQ_MISS", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", + "UMask": "0xff", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from Local", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All remotely= generated requests", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from Local", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x17", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from Local", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x27", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; SF/LLC Evictions", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; TOR allocation occurred as a result of SF/LLC evictions (c= ame from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hit (Not a Miss)", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; HITs (hit is defined to be not a miss [see below], as a re= sult for any request allocated into the TOR, one of either HIT or MISS must= be true)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally initiated requests from iA Cores", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that hit the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that missed the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally generated IO traffic", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; ITOM Misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", + "Filter": "config1=3D0x49033", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO ItoM req= uests that miss the LLC. An ItoM is used by IIO to request a data write wit= hout first reading the data for ownership.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RDCUR misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RDCUR", + "Filter": "config1=3D0x43C33", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RdCur re= quests that miss the LLC. A RdCur request is used by IIO to read data witho= ut changing state.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RFO requ= ests that miss the LLC. A read for ownership (RFO) requests data to be cach= ed in E state with the intent to modify.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; IPQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; IRQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Miss", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; Misses. (a miss is defined to be any transaction from the= IRQ, PRQ, RRQ, IPQ or (in the victim case) the ISMQ, that required the CHA= to spawn a new UPI/SMI3 request on the UPI fabric (including UPI snoops an= d/or any RD/WR to a local memory controller, in the event that the CHA is t= he home node)). Basically, if the LLC/SF/MLC complex were not able to serv= ice the request without involving another agent...it is a miss. If only ID= I snoops were required, it is not a miss (that means the SF/MLC com", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; PRQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; IV", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; IV", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; IV", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.IV", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; IV", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; AD REQ Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; AD RSP VN0 Cr= edits", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL NCB Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL NCS Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL RSP Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL DRS Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; VN0 Credits", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; VNA Credits", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VNA", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; AD REQ VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_REQ", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; AD RSP VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCB VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCS VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL RSP VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL DRS VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_WB", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; AD VNA Cre= dits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_AD", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL VNA Cre= dits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_BL", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Even", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Odd", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Even", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Odd", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Even", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Odd", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Even", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Odd", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Even", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Odd", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Even", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Odd", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Down", + "EventCode": "0xAC", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Up", + "EventCode": "0xAC", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI; Pushed to LLC", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was able to pu= sh WbPushMToI to LLC", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI; Pushed to Memory", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was unable to = push WbPushMToI to LLC (hence pushed it to MEM)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC0_SMI2", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC1_SMI3", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC2_SMI4", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC3_SMI5", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC0_SMI0", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC1_SMI1", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspIFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd F/E", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd M", + "UMask": "0xf0", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd F/E", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd M", + "UMask": "0xe8", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspHitFSE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response any to Hit F/S/E= ", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd F/E", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd M", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd F/E", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd M", + "UMask": "0x48", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspHitFSE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response any to Hit F/S/= E", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd F/= E", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd M", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd F/= E", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd M", + "UMask": "0x88", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspHitFSE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response any to Hit = F/S/E", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspIFwdF= E", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd F/= E", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspIFwdM= ", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd M", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspSFwdF= E", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd F/= E", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspSFwdM= ", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd M", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspHitFS= E", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response any to Hit = F/S/E", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CLOCKTICKS", + "Deprecated": "1", + "EventName": "UNC_C_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_FAST_ASSERTED.HORZ", + "Deprecated": "1", + "EventCode": "0xA5", + "EventName": "UNC_C_FAST_ASSERTED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.ANY", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.ANY", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.LOCAL", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.REMOTE", + "PerPkg": "1", + "UMask": "0x91", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.REMOTE_SNOOP", + "PerPkg": "1", + "UMask": "0x9", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITE", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.F_STATE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.LOCAL", + "PerPkg": "1", + "UMask": "0x2f", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.REMOTE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SRC_THRTL", + "Deprecated": "1", + "EventCode": "0xA4", + "EventName": "UNC_C_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.EVICT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.EVICT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.HIT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.HIT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IPQ", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IPQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IRQ", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IRQ_HIT", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IRQ_MISS", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.LOC_IA", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.LOC_IO", + "PerPkg": "1", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.MISS", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.PRQ", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.PRQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_HIT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.PRQ_HIT", + "PerPkg": "1", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_MISS", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.PRQ_MISS", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.REM_ALL", + "PerPkg": "1", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.RRQ_HIT", + "PerPkg": "1", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.RRQ_MISS", + "PerPkg": "1", + "UMask": "0x60", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.WBQ_HIT", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.WBQ_MISS", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.EVICT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.HIT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IPQ", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IPQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IRQ", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_HIT", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_MISS", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IA", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IO", + "PerPkg": "1", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.MISS", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.PRQ", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_HIT", + "PerPkg": "1", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_MISS", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "Deprecated": "1", + "EventCode": "0x57", + "EventName": "UNC_H_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "Deprecated": "1", + "EventCode": "0x57", + "EventName": "UNC_H_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "Deprecated": "1", + "EventCode": "0x57", + "EventName": "UNC_H_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CMS_CLOCKTICKS", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_H_CLOCK", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_STATE", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C1_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_TRANSITION", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C1_TRANSITION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_STATE", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C6_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_TRANSITION", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C6_TRANSITION", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.GV", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.GV", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.ANY_REMOTE", + "PerPkg": "1", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.CORE_REMOTE", + "PerPkg": "1", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EVICT_REMOTE", + "PerPkg": "1", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EXT_REMOTE", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_COUNTER0_OCCUPANCY", + "Deprecated": "1", + "EventCode": "0x1F", + "EventName": "UNC_H_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.NO_SNP", + "Deprecated": "1", + "EventCode": "0x53", + "EventName": "UNC_H_DIR_LOOKUP.NO_SNP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.SNP", + "Deprecated": "1", + "EventCode": "0x53", + "EventName": "UNC_H_DIR_LOOKUP.SNP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.HA", + "Deprecated": "1", + "EventCode": "0x54", + "EventName": "UNC_H_DIR_UPDATE.HA", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.TOR", + "Deprecated": "1", + "EventCode": "0x54", + "EventName": "UNC_H_DIR_UPDATE.TOR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "Deprecated": "1", + "EventCode": "0xAE", + "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "Deprecated": "1", + "EventCode": "0xAE", + "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.EX_RDS", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.EX_RDS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.SHARED_OWNREQ", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.SHARED_OWNREQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOE", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.WBMTOE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOI_OR_S", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.WBMTOI_OR_S", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.READ", + "Deprecated": "1", + "EventCode": "0x5E", + "EventName": "UNC_H_HITME_LOOKUP.READ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.WRITE", + "Deprecated": "1", + "EventCode": "0x5E", + "EventName": "UNC_H_HITME_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", + "Deprecated": "1", + "EventCode": "0x60", + "EventName": "UNC_H_HITME_MISS.NOTSHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.READ_OR_INV", + "Deprecated": "1", + "EventCode": "0x60", + "EventName": "UNC_H_HITME_MISS.READ_OR_INV", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.SHARED_RDINVOWN", + "Deprecated": "1", + "EventCode": "0x60", + "EventName": "UNC_H_HITME_MISS.SHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RDINVOWN", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.RDINVOWN", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RSPFWDI_REM", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.RSPFWDI_REM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.SHARED", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.SHARED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", + "Deprecated": "1", + "EventCode": "0xAD", + "EventName": "UNC_H_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", + "Deprecated": "1", + "EventCode": "0xAD", + "EventName": "UNC_H_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.NORMAL", + "Deprecated": "1", + "EventCode": "0x59", + "EventName": "UNC_H_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.PRIORITY", + "Deprecated": "1", + "EventCode": "0x59", + "EventName": "UNC_H_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_MIG", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_MIG", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.INVITOM", + "Deprecated": "1", + "EventCode": "0x62", + "EventName": "UNC_H_IODC_ALLOC.INVITOM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.IODCFULL", + "Deprecated": "1", + "EventCode": "0x62", + "EventName": "UNC_H_IODC_ALLOC.IODCFULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.OSBGATED", + "Deprecated": "1", + "EventCode": "0x62", + "EventName": "UNC_H_IODC_ALLOC.OSBGATED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.ALL", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.SNPOUT", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.SNPOUT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOE", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.WBMTOE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOI", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.WBMTOI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.WBPUSHMTOI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_MISS", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_VIC", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RFO_HIT_S", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.RFO_HIT_S", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RSPI_WAS_FSE", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.WC_ALIASING", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.WC_ALIASING", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_OSB", + "Deprecated": "1", + "EventCode": "0x55", + "EventName": "UNC_H_OSB", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC0_SMI0", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC1_SMI1", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_LOCAL", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.INVITOE_LOCAL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_REMOTE", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.INVITOE_REMOTE", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "read requests from home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.READS", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "read requests from local home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.READS_LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "read requests from remote home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.READS_REMOTE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "write requests from home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.WRITES", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "write requests from local home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.WRITES_LOCAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "write requests from remote home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.WRITES_REMOTE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AD", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AK", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.BL", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.IV", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AD", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AK", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.BL", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.IV", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AD", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.BL", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.IV", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AD", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AK", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.BL", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.IV", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IPQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.IPQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.IRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ_REJ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.PRQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ_REJ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.RRQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.RRQ", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.WBQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.WBQ", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.ANY_IPQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.ANY_REJECT_IRQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x25", + "EventName": "UNC_H_RxC_ISMQ1_REJECT.ANY_ISMQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x25", + "EventName": "UNC_H_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "Deprecated": "1", + "EventCode": "0x2D", + "EventName": "UNC_H_RxC_ISMQ1_RETRY.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.HA", + "Deprecated": "1", + "EventCode": "0x2D", + "EventName": "UNC_H_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IPQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.IPQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IRQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.IRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.RRQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.RRQ", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.WBQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.WBQ", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.HA", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.ANY_PRQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.ANY_RRQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.ANY_WBQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IFV", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.E_STATE", + "Deprecated": "1", + "EventCode": "0x3D", + "EventName": "UNC_H_SF_EVICTION.E_STATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.M_STATE", + "Deprecated": "1", + "EventCode": "0x3D", + "EventName": "UNC_H_SF_EVICTION.M_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.S_STATE", + "Deprecated": "1", + "EventCode": "0x3D", + "EventName": "UNC_H_SF_EVICTION.S_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.ALL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.BCST_LOC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_REMOTE", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.BCST_REM", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.DIRECT_LOC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.DIRECT_REM", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.LOCAL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.REMOTE", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.REMOTE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPCNFLCTS", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPCNFLCT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPFWD", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPFWD", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPI", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPI", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPIFWD", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPIFWD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPS", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPSFWD", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPSFWD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_FWD_WB", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSP_FWD_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_WBWB", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSP_WB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPFWD", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPI", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPIFWD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPSFWD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_FWD_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_WB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_CRD", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AK_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_CRD", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.IV_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AD_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AK_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.BL_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.IV_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG0", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG1", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG0", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG1", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG0", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG1", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.IV", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.IV", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.IV", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG0", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG1", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG0", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG1", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG0", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG1", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.IV", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG0", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG1", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG0", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG1", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG0", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG1", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.IV", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.IV", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG0", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG1", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG0", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG1", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG0", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG1", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.IV", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.DN", + "Deprecated": "1", + "EventCode": "0xAC", + "EventName": "UNC_H_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.UP", + "Deprecated": "1", + "EventCode": "0xAC", + "EventName": "UNC_H_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.LLC", + "Deprecated": "1", + "EventCode": "0x56", + "EventName": "UNC_H_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.MEM", + "Deprecated": "1", + "EventCode": "0x56", + "EventName": "UNC_H_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0xf0", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0xe8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0x48", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0x88", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + } +] diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-interconnec= t.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-interconnect.js= on new file mode 100644 index 000000000000..725780fb3990 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-interconnect.json @@ -0,0 +1,11334 @@ +[ + { + "BriefDescription": "Total Write Cache Occupancy; Any Source", + "EventCode": "0xF", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy; Snoops", + "EventCode": "0xF", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Total IRP occupancy of inbound read and write= requests.", + "EventCode": "0xF", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", + "PerPkg": "1", + "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests. This is effectively the sum of read occupancy and write occupa= ncy.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "IRP Clocks", + "EventCode": "0x1", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CLFlush", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CRd", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.CRD", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; DRd", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.DRD", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; PCIDCAHin5t", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; PCIRdCur", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", + "PerPkg": "1", + "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.RFO", + "PerPkg": "1", + "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; WbMtoI", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF RF full", + "EventCode": "0x17", + "EventName": "UNC_I_FAF_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", + "EventCode": "0x18", + "EventName": "UNC_I_FAF_INSERTS", + "PerPkg": "1", + "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Occupancy of the IRP FAF queue.", + "EventCode": "0x19", + "EventName": "UNC_I_FAF_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF allocation -- sent to ADQ", + "EventCode": "0x16", + "EventName": "UNC_I_FAF_TRANSACTIONS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "All Inserts Inbound (p2p + faf + cset)", + "EventCode": "0x1E", + "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x1E", + "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.FAST_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Requests", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.FAST_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.FAST_XFER", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.UNKNOWN", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Lost Forward", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.LOST_FWD", + "PerPkg": "1", + "PublicDescription": "Snoop pulled away ownership before a write w= as committed", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Received Invalid", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Received Valid", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_E", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_M", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_S", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Requests", + "EventCode": "0x14", + "EventName": "UNC_I_P2P_INSERTS", + "PerPkg": "1", + "PublicDescription": "P2P requests from the ITC", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Occupancy", + "EventCode": "0x15", + "EventName": "UNC_I_P2P_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "P2P B & S Queue Occupancy", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P completions", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; match if local only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; match if local and target m= atches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P Message", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P reads", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.RD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; Match if remote only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; match if remote and target = matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P Writes", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.WR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", + "UMask": "0x7e", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", + "UMask": "0x74", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", + "UMask": "0x72", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", + "UMask": "0x78", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", + "UMask": "0x71", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit E or S", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit I", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit M", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Miss", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.MISS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpCode", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpData", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpInv", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Atomic", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Other", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Read Prefetches", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.RD_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Reads", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.READS", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Writes", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Egress Allocations", + "EventCode": "0xB", + "EventName": "UNC_I_TxC_AK_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Cycles Full", + "EventCode": "0x5", + "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Inserts", + "EventCode": "0x2", + "EventName": "UNC_I_TxC_BL_DRS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Occupancy", + "EventCode": "0x8", + "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Cycles Full", + "EventCode": "0x6", + "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Inserts", + "EventCode": "0x3", + "EventName": "UNC_I_TxC_BL_NCB_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Occupancy", + "EventCode": "0x9", + "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Cycles Full", + "EventCode": "0x7", + "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Inserts", + "EventCode": "0x4", + "EventName": "UNC_I_TxC_BL_NCS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Occupancy", + "EventCode": "0xA", + "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD Egress Credit Stalls", + "EventCode": "0x1A", + "EventName": "UNC_I_TxR2_AD_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x1B", + "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xD", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xE", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0xC", + "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Traffic in which the M2M to iMC Bypass was no= t taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_Egress.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts traffic in which the M2M (Mesh to Mem= ory) to iMC (Memory Controller) bypass was not taken", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass; Taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_Egress.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass; Not Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass; Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles - at UCLK", + "EventName": "UNC_M2M_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xC0", + "EventName": "UNC_M2M_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to core mode (which bypass= es the CHA) was disabled", + "EventCode": "0x24", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "PublicDescription": "Counts cycles when direct to core mode (whic= h bypasses the CHA) was disabled", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages sent direct to core (bypassing the C= HA)", + "EventCode": "0x23", + "EventName": "UNC_M2M_DIRECT2CORE_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts when messages were sent direct to cor= e (bypassing the CHA)", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action were overridden", + "EventCode": "0x25", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", + "PerPkg": "1", + "PublicDescription": "Counts reads in which direct to core transac= tions (which would have bypassed the CHA) were overridden", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to Intel(R) U= PI transactions were overridden", + "EventCode": "0x28", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", + "PerPkg": "1", + "PublicDescription": "Counts reads in which direct to Intel(R) Ult= ra Path Interconnect (UPI) transactions (which would have bypassed the CHA)= were overridden", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to Intel(R) UPI was disabl= ed", + "EventCode": "0x27", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the ability to send messa= ges direct to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was = disabled", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages sent direct to the Intel(R) UPI", + "EventCode": "0x26", + "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts when messages were sent direct to the= Intel(R) Ultra Path Interconnect (bypassing the CHA)", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads that a message sent direct2 I= ntel(R) UPI was overridden", + "EventCode": "0x29", + "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", + "PerPkg": "1", + "PublicDescription": "Counts when a read message that was sent dir= ect to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was overrid= den", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in A State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in I State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in L State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in S State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in A State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in I State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in L State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in S State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (any= state found)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in Any State (A, I, S or unused)", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (cac= heline found in A state)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in the A (SnoopAll) state, indicating the cacheline is stored in anothe= r socket in any state, and we must snoop the other sockets to make sure we = get the latest data. The data may be stored in any state in the local sock= et.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in I state)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the I (Invalid) state indicating the cacheline is not stored in ano= ther socket, and so there is no need to snoop the other sockets for the lat= est data. The data may be stored in any state in the local socket.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in S state)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the S (Shared) state indicating the cacheline is either stored in a= nother socket in the S(hared) state , and so there is no need to snoop the = other sockets for the latest data. The data may be stored in any state in = the local socket.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in A State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in I State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in L State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in S State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in A State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in I State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in L State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in S State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to I", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to I (Invalid= )", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to S", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to S (Shared)= ", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from/= to Any state", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory to a new state", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to A", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to A (SnoopAll= )", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to S", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to S (Shared)", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to A", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to A (SnoopAll)= ", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to I", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to I (Invalid)", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", + "EventCode": "0xAE", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", + "EventCode": "0xAE", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "FaST wire asserted; Horizontal", + "EventCode": "0xA5", + "EventName": "UNC_M2M_FAST_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "FaST wire asserted; Vertical", + "EventCode": "0xA5", + "EventName": "UNC_M2M_FAST_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Even", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Even", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Even", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Even", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Even", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Even", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Left", + "EventCode": "0xAD", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Right", + "EventCode": "0xAD", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Reads to iMC issued", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ALL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller).", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC; All, regardless of p= riority.", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.FROM_TRANSGRESS", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC; Critical Priority", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ISOCH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Reads to iMC issued at Normal Priority (Non-I= sochronous)", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller). It only counts normal priority non-= isochronous reads.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Read requests to Intel(R) Optane(TM) DC persi= stent memory issued to the iMC from M2M", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.TO_PMM", + "PerPkg": "1", + "PublicDescription": "M2M Reads Issued to iMC; All, regardless of = priority.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Writes to iMC issued", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.ALL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = writes to the iMC (Memory Controller).", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FROM_TRANSGRESS", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; Full Line Non-ISOCH= ", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; ISOCH Full Line", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.NI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Partial Non-Isochronous writes to the iMC", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = partial writes to the iMC (Memory Controller). It only counts normal prior= ity non-isochronous writes.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; ISOCH Partial", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write requests to Intel(R) Optane(TM) DC pers= istent memory issued to the iMC from M2M", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", + "PerPkg": "1", + "PublicDescription": "M2M Writes Issued to iMC; All, regardless of= priority.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches; MC Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches; Mesh Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MESH", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Chan= nel 0", + "EventCode": "0x4F", + "EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Chan= nel 1", + "EventCode": "0x4F", + "EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Chan= nel 2", + "EventCode": "0x4F", + "EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 0", + "EventCode": "0x51", + "EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 1", + "EventCode": "0x51", + "EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 2", + "EventCode": "0x51", + "EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full", + "EventCode": "0x53", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty", + "EventCode": "0x54", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch requests that got turn into a demand= request", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_DEMAND_PROMOTIONS", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) promote= s a outstanding request in the prefetch queue due to a subsequent demand re= ad request that entered the M2M with the same address. Explanatory Side No= te: The Prefetch queue is made of CAM (Content Addressable Memory)", + "Unit": "M2M" + }, + { + "BriefDescription": "Inserts into the Memory Controller Prefetch Q= ueue", + "EventCode": "0x57", + "EventName": "UNC_M2M_PREFCAM_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) receive= s a prefetch request and inserts it into its outstanding prefetch queue. E= xplanatory Side Note: the prefect queue is made from CAM: Content Addressab= le Memory", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AD", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AK", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; BL", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; IV", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; AD", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xA4", + "EventName": "UNC_M2M_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", + "Deprecated": "1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", + "Deprecated": "1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", + "Deprecated": "1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 0", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 1", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 2", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 0", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 2", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Full", + "EventCode": "0x4", + "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Not Empty", + "EventCode": "0x3", + "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Queue Inserts", + "EventCode": "0x1", + "EventName": "UNC_M2M_RxC_AD_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts when the a new entry is Received(RxC)= and then added to the AD (Address Ring) Ingress Queue from the CMS (Common= Mesh Stop). This is generally used for reads, and", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x2", + "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Full", + "EventCode": "0x8", + "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Not Empty", + "EventCode": "0x7", + "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Allocations", + "EventCode": "0x5", + "EventName": "UNC_M2M_RxC_BL_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Occupancy", + "EventCode": "0x6", + "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AK - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; IV - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Clean line read hits(Regular and RFO) to Near= Memory(DRAM cache) in Memory Mode and regular reads to DRAM in 1LM", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN", + "PerPkg": "1", + "PublicDescription": "Tag Hit; Read Hit from NearMem, Clean Line", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Dirty line read hits(Regular and RFO) to Near= Memory(DRAM cache) in Memory Mode", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY", + "PerPkg": "1", + "PublicDescription": "Tag Hit; Read Hit from NearMem, Dirty Line", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Clean line underfill read hits to Near Memory= (DRAM cache) in Memory Mode", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN", + "PerPkg": "1", + "PublicDescription": "Tag Hit; Underfill Rd Hit from NearMem, Clea= n Line", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Dirty line underfill read hits to Near Memory= (DRAM cache) in Memory Mode", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY", + "PerPkg": "1", + "PublicDescription": "Tag Hit; Underfill Rd Hit from NearMem, Dirt= y Line", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Number AD Ingress Credits", + "EventCode": "0x41", + "EventName": "UNC_M2M_TGR_AD_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number BL Ingress Credits", + "EventCode": "0x42", + "EventName": "UNC_M2M_TGR_BL_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full; Channel 0", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full; Channel 1", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full; Channel 2", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty; Channel 0", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty; Channel 1", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty; Channel 2", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts; Channel 0", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts; Channel 1", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts; Channel 2", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy; Channel 0", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy; Channel 1", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy; Channel 2", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Pending Occupancy", + "EventCode": "0x48", + "EventName": "UNC_M2M_TRACKER_PENDING_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credit Acquired", + "EventCode": "0xD", + "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credits Occupancy", + "EventCode": "0xE", + "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Full", + "EventCode": "0xC", + "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Not Empty", + "EventCode": "0xB", + "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Allocations", + "EventCode": "0x9", + "EventName": "UNC_M2M_TxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", + "EventCode": "0xF", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", + "EventCode": "0x10", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Occupancy", + "EventCode": "0xA", + "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK; CRD Transac= tions to Cbo", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.CRD_CBO", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK; NDR Transac= tions", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.NDR", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", + "EventCode": "0x1E", + "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", + "EventCode": "0x1E", + "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; All", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - N= ear Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - F= ar Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", + "PerPkg": "1", + "UMask": "0x88", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; All", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Read Credit Req= uest", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Write Compare R= equest", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Write Credit Re= quest", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; All", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Near Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Far Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Prefetch Read= Cam Hit", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Read Credit R= equest", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Write Compare= Request", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Write Credit = Request", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; All", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Read Credit Req= uest", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Write Compare R= equest", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Write Credit Re= quest", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Sideband", + "EventCode": "0x6B", + "EventName": "UNC_M2M_TxC_AK_SIDEBAND.RD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Sideband", + "EventCode": "0x6B", + "EventName": "UNC_M2M_TxC_AK_SIDEBAND.WR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Cache", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Core", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CORE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to QPI", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_UPI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", + "EventCode": "0x1A", + "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", + "EventCode": "0x1A", + "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full; All", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - N= ear Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - F= ar Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty; All", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations; All", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Near Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Far Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy; All", + "EventCode": "0x16", + "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", + "EventCode": "0x16", + "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", + "EventCode": "0x16", + "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; IV", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; IV", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; IV", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.IV", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; IV", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Even", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Even", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Even", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Even", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Even", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Even", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Down", + "EventCode": "0xAC", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Up", + "EventCode": "0xAC", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", + "Deprecated": "1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", + "Deprecated": "1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", + "Deprecated": "1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 0", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 2", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 0", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 1", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 2", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full; Channel 0", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full; Channel 1", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full; Channel 2", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty; Channel 0", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty; Channel 1", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty; Channel 2", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts; Channel 0", + "EventCode": "0x61", + "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts; Channel 1", + "EventCode": "0x61", + "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts; Channel 2", + "EventCode": "0x61", + "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy; Channel 0", + "EventCode": "0x60", + "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy; Channel 1", + "EventCode": "0x60", + "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy; Channel 2", + "EventCode": "0x60", + "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; Requests", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; Snoops", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; VNA Messages", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; Writebacks", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_M3UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the M3 uclk do= main. This could be slightly different than the count in the Ubox because = of enable/freeze delays. However, because the M3 is close to the Ubox, the= y generally should not diverge by more than a handful of cycles.", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xC0", + "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2C Sent", + "EventCode": "0x2B", + "EventName": "UNC_M3UPI_D2C_SENT", + "PerPkg": "1", + "PublicDescription": "Count cases BL sends direct to core", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2U Sent", + "EventCode": "0x2A", + "EventName": "UNC_M3UPI_D2U_SENT", + "PerPkg": "1", + "PublicDescription": "Cases where SMI3 sends D2U command", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", + "EventCode": "0xAE", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", + "EventCode": "0xAE", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "FaST wire asserted; Horizontal", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_FAST_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "FaST wire asserted; Vertical", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_FAST_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Even", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Even", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Even", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Even", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Even", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Even", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Left", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Right", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO0 and IIO1 share the = same ring destination. (1 VN0 credit only)", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO0_IIO1_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO2", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO3", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO4", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO5", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; All IIO targets for NCS = are in single mask. ORs them together", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; Selected M2p BL NCS cred= its", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AD - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AD - Slot 1", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AD - Slot 2", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AK - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AK - Slot 2", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; BL - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AD", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AK", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; BL", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; IV", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; AD", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; REQ on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; RSP on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; SNP on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; NCB on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; NCS on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; RSP on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; WB on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; REQ on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; RSP on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; SNP on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; NCB on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; NCS on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; RSP on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; WB on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; AD, BL Parallel Win", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN", + "PerPkg": "1", + "PublicDescription": "AD and BL messages won arbitration concurren= tly / in parallel", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn0 messages because slotting stage cannot accept new message", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn1 messages because slotting stage cannot accept new message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn0 messages because slotting stage cannot accept new message", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn1 messages because slotting stage cannot accept new message", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN0", + "PerPkg": "1", + "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn0, delaying vn1 win, because vn0 offered parallel ad/bl", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN1", + "PerPkg": "1", + "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn1, delaying vn0 win, because vn1 offered parallel ad/bl", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; REQ on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; RSP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; SNP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; NCB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; NCS on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; RSP on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; WB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; REQ on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; RSP on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; SNP on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; NCB on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; NCS on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; RSP on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; WB on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; REQ on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; RSP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; SNP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; NCB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; NCS on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; RSP on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; WB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; REQ on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; RSP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; SNP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; NCB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; NCS on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; RSP on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; WB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on BL Ar= b", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while b= l message is in arbitration", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on Idle", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while p= ipeline is idle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 1", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 1 while merging with bl = message in same flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 2", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 2 while merging with bl = message in same flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; REQ on AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; RSP on AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; SNP on AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; NCB on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; NCS on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; RSP on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; WB on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; REQ on AD", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; RSP on AD", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; SNP on AD", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; NCB on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; NCS on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; RSP on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; WB on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events; Any In BGF FIFO", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO", + "PerPkg": "1", + "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf (fifo only)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events; Any in BGF Path", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH", + "PerPkg": "1", + "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf path (i.e. pipe to fifo)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events; No D2K For Arb", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.NO_D2K_FOR_ARB", + "PerPkg": "1", + "PublicDescription": "VN0 or VN1 BL RSP message was blocked from a= rbitration request due to lack of D2K CMP credits", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; D2K Credits", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD", + "PerPkg": "1", + "PublicDescription": "D2K completion fifo credit occupancy (credit= s in use), accumulated across all cycles", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; Packets in BGF FIFO", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO", + "PerPkg": "1", + "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in fifo", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; Packets in BGF Path", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH", + "PerPkg": "1", + "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in path (i.e. pipe to fifo or fifo)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO", + "PerPkg": "1", + "PublicDescription": "count of bl messages in pump-1-pending state= , in completion fifo only", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL", + "PerPkg": "1", + "PublicDescription": "count of bl messages in pump-1-pending state= , in marker table and in fifo", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; Transmit Credits", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD", + "PerPkg": "1", + "PublicDescription": "Link layer transmit queue credit occupancy (= credits in use), accumulated across all cycles", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; VNA In Use", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE", + "PerPkg": "1", + "PublicDescription": "Remote UPI VNA credit occupancy (number of c= redits in use), accumulated across all cycles", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent; All", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent; No BGF Credits", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_BGF", + "PerPkg": "1", + "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent; No TxQ Credits", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_TXQ", + "PerPkg": "1", + "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 0", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT", + "PerPkg": "1", + "PublicDescription": "pump-1-pending logic is at capacity (pending= table plus completion fifo at limit)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY", + "PerPkg": "1", + "PublicDescription": "pump-1-pending logic is tracking at least on= e message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL", + "PerPkg": "1", + "PublicDescription": "pump-1-pending completion fifo is full", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0", + "PerPkg": "1", + "PublicDescription": "pump-1-pending logic is at or near capacity,= such that pump-0-only bl messages are getting stalled in slotting stage", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO", + "PerPkg": "1", + "PublicDescription": "a bl message finished but is in limbo and mo= ved to pump-1-pending logic", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 1", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; One Message", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG", + "PerPkg": "1", + "PublicDescription": "One message in flit; VNA or non-VNA flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; One Message in non-VNA", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG_VNX", + "PerPkg": "1", + "PublicDescription": "One message in flit; non-VNA flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; Two Messages", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.2_MSGS", + "PerPkg": "1", + "PublicDescription": "Two messages in flit; VNA flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; Three Messages", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.3_MSGS", + "PerPkg": "1", + "PublicDescription": "Three messages in flit; VNA flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_2", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_3", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; All", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Needs D= ata Flit", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA", + "PerPkg": "1", + "PublicDescription": "BL message requires data flit sequence", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 0", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "Waiting for header pump 0", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ", + "PerPkg": "1", + "PublicDescription": "Header pump 1 is not required for flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Bubble", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE", + "PerPkg": "1", + "PublicDescription": "Header pump 1 is not required for flit but f= lit transmission delayed", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Not Avail", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL", + "PerPkg": "1", + "PublicDescription": "Header pump 1 is not required for flit and n= ot available", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 1", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "Waiting for header pump 1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Accumulate", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting control state machine is in any accumulate state= ; multi-message flit may be assembled over multiple cycles", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Accumulate Ready", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; header flit slotting control state machine is in accum_ready state; f= lit is ready to send but transmission is blocked; more messages may be slot= ted into flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Accumulate Wasted", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Flit is being assembled over multiple cycles, but no additional messa= ge is being slotted into flit in current cycle; accumulate cycle is wasted", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Blocked", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting entered run-ahead state; new header flit is star= ted while transmission of prior, fully assembled flit is blocked", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Message", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting is in run-ahead to start new flit, and message i= s actually slotted into new flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Parallel Ok", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; New header flit construction may proceed in parallel with data flit s= equence", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Parallel Flit Finished", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_FLIT", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit finished assembly in parallel with data flit sequence", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Parallel Message", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_MSG", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Message is slotted into header flit in parallel with data flit sequen= ce", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate-matching stall injected", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall - No= Message", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate matching stall injected, but no additional message slotted durin= g stall cycle", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; All", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No BGF Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_CRD", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No BGF Credits + No Extra Me= ssage Slotted", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_NO_MSG", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available; no additional message slotted in= to flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No TxQ Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_CRD", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No TxQ Credits + No Extra Me= ssage Slotted", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_NO_MSG", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available; no additional message slotted in= to flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; Sent - One Slot Taken", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ONE_TAKEN", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only one slot taken (two slots fr= ee)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; Sent - Three Slots Taken", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.THREE_TAKEN", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with three slots taken (no slots free)= ", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; Sent - Two Slots Taken", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.TWO_TAKEN", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only two slots taken (one slots f= ree)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Can't Slot AD", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD", + "PerPkg": "1", + "PublicDescription": "some AD message could not be slotted (logica= l OR of all AD events under INGR_SLOT_CANT_MC_VN{0,1})", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Can't Slot BL", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL", + "PerPkg": "1", + "PublicDescription": "some BL message could not be slotted (logica= l OR of all BL events under INGR_SLOT_CANT_MC_VN{0,1})", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel AD Lost", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_AD_LOST", + "PerPkg": "1", + "PublicDescription": "some AD message lost contest for slot 0 (log= ical OR of all AD events under INGR_SLOT_LOST_MC_VN{0,1})", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel Attempt", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT", + "PerPkg": "1", + "PublicDescription": "ad and bl messages attempted to slot into th= e same flit in parallel", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel BL Lost", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_BL_LOST", + "PerPkg": "1", + "PublicDescription": "some BL message lost contest for slot 0 (log= ical OR of all BL events under INGR_SLOT_LOST_MC_VN{0,1})", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel Success", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS", + "PerPkg": "1", + "PublicDescription": "ad and bl messages were actually slotted int= o the same flit in paralle", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; VN0", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.VN0", + "PerPkg": "1", + "PublicDescription": "vn0 message(s) that couldn't be slotted into= last vn0 flit are held in slotting stage while processing vn1 flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; VN1", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.VN1", + "PerPkg": "1", + "PublicDescription": "vn1 message(s) that couldn't be slotted into= last vn1 flit are held in slotting stage while processing vn0 flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; REQ o= n AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Home (REQ) = messages on AD. REQ is generally used to send requests, request responses,= and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on AD. RSP packets are used to transmit a variety of protocol= flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; SNP o= n AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Snoops (SNP= ) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCB o= n BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Broadcast (NCB) messages on BL. NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCS o= n BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on BL. RSP packets are used to transmit a variety of protocol = flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; WB on= BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Data Respon= se (WB) messages on BL. WB is generally used to transmit data with coheren= cy. For example, remote reads and writes, or cache to cache transfers will= transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; REQ o= n AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; SNP o= n AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCB o= n BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCS o= n BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; WB on= BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; REQ= on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; SNP= on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCB= on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCS= on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; WB = on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; REQ= on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; SNP= on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCB= on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCS= on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; WB = on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; REQ on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; RSP on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; SNP on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; NCB on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; NCS on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; RSP on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; WB on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; REQ on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; RSP on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; SNP on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; NCB on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; NCS on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; RSP on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; WB on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Lost Arbitration", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARB_LOST", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Arrived", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARRIVED", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Dropped - Old", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_OLD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Dropped - Wrap", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_WRAP", + "PerPkg": "1", + "PublicDescription": "Dropped because it was overwritten by new me= ssage while prefetch queue was full", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Slotted", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.SLOTTED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Any In Use", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE", + "PerPkg": "1", + "PublicDescription": "At least one remote vna credit is in use", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Corrected", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED", + "PerPkg": "1", + "PublicDescription": "Number of remote vna credits corrected (loca= l return) per cycle", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Level < 1", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1", + "PerPkg": "1", + "PublicDescription": "Remote vna credit level is less than 1 (i.e.= no vna credits available)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Level < 4", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4", + "PerPkg": "1", + "PublicDescription": "Remote vna credit level is less than 4; bl (= or ad requiring 4 vna) cannot arb on vna", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Level < 5", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5", + "PerPkg": "1", + "PublicDescription": "Remote vna credit level is less than 5; para= llel ad/bl arb on vna not possible", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Used", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.USED", + "PerPkg": "1", + "PublicDescription": "Number of remote vna credits consumed per cy= cle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AK - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; IV - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 REQ Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 RSP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 SNP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 WB Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN1 REQ Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN1 RSP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN1 SNP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 REQ Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 RSP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 SNP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_SNP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 WB Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN1 REQ Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_REQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN1 RSP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN1 SNP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_SNP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; CHA on VN0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_CHA", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to CHA", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_NON_IDLE", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn0 Snpf", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI0", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI1", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; CHA on VN1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_CHA", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to CHA", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_NON_IDLE", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn1 Snpf", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI0", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI0", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI1", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_NONSNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_VN2SNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n0 SnpF issued when SnpF pending on Vn1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_NONSNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_VN0SNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n1 SnpF issued when SnpF pending on Vn0", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 REQ Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 SNP Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 WB Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 REQ Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 SNP Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 WB Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN0 RE= Q Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN0 SN= P Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN0 WB= Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN1 RE= Q Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN1 SN= P Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN1 WB= Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 REQ = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 RSP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 SNP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 WB M= essages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 REQ = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 RSP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 SNP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 WB M= essages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Inserts", + "EventCode": "0x2F", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Occupancy", + "EventCode": "0x1E", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_OCCUPANCY", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 RSP Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 WB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 NCS Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 NCB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1 RSP Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1 WB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1_NCB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1_NCS Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 NCB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 NCS Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 RSP Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 WB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1_NCS Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1_NCB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1 RSP Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1 WB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN0 NC= S Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN1 WB= Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN1 NC= B Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN1 RS= P Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCS Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 RSP Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 WB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCS Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 RSP Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 WB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; IV", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; IV", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; IV", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.IV", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; IV", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN0 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN0 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN0 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN1 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN1 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN1 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VNA", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN0 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN0 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN0 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN1 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN1 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN1 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VNA", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Prefetches generated by the flow control queu= e of the M3UPI unit.", + "EventCode": "0x29", + "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", + "PerPkg": "1", + "PublicDescription": "Count cases where flow control queue that si= ts between the Intel(R) Ultra Path Interconnect (UPI) and the mesh spawns a= prefetch to the iMC (Memory Controller)", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Even", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Even", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Even", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Even", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Even", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Even", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Down", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Up", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; WB on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Data Response (WB) messages on BL. WB is generally used to tran= smit data with coherency. For example, remote reads and writes, or cache t= o cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCB on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally u= sed to transmit data without coherency. For example, non-coherent read dat= a returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; REQ on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Home (REQ) messages on AD. REQ is generally used to send reques= ts, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; RSP on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on AD. RSP packets are used to transmit= a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; SNP on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; RSP on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on BL. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; WB on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; NCB on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; REQ on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; RSP on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; SNP on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; RSP on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; WB on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Data Response (WB) messages on BL. WB is generally used to trans= mit data with coherency. For example, remote reads and writes, or cache to= cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; NCB on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally us= ed to transmit data without coherency. For example, non-coherent read data= returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; REQ on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Home (REQ) messages on AD. REQ is generally used to send request= s, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; RSP on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on AD. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; SNP on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; RSP on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on BL. RSP packets are used to transmit a= variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; WB on BL", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; NCB on BL", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; REQ on AD", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; RSP on AD", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; SNP on AD", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; RSP on BL", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_TxC_BL.DRS_UPI", + "Deprecated": "1", + "EventCode": "0x40", + "EventName": "UNC_NoUnit_TxC_BL.DRS_UPI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Clocks of the Intel(R) Ultra Path Interconnec= t (UPI)", + "EventCode": "0x1", + "EventName": "UNC_UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts clockticks of the fixed frequency clo= ck controlling the Intel(R) Ultra Path Interconnect (UPI). This clock runs= at1/8th the 'GT/s' speed of the UPI link. For example, a 9.6GT/s link w= ill have a fixed Frequency of 1.2 Ghz.", + "Unit": "UPI" + }, + { + "BriefDescription": "Data Response packets that go direct to core", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", + "PerPkg": "1", + "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to core bypassing the CHA.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_DIRECT_ATTEMPTS.D2U", + "Deprecated": "1", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Data Response packets that go direct to Intel= (R) UPI", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2U", + "PerPkg": "1", + "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to Intel(R) Ultra Path Interconnect (UPI) bypassing the = CHA .", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles Intel(R) UPI is in L1 power mode (shut= down)", + "EventCode": "0x21", + "EventName": "UNC_UPI_L1_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the Intel(R) Ultra Path I= nterconnect (UPI) is in L1 power mode. L1 is a mode that totally shuts dow= n the UPI link. Link power states are per link and per direction, so for e= xample the Tx direction could be in one state while Rx was in another, this= event only coutns when both links are shutdown.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "EventCode": "0x16", + "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1", + "EventCode": "0x20", + "EventName": "UNC_UPI_PHY_INIT_CYCLES", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req Nack", + "EventCode": "0x23", + "EventName": "UNC_UPI_POWER_L1_NACK", + "PerPkg": "1", + "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqNAck. When the UPI links would like to change power state, t= he Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wi= th an Ack, the power mode will change. If it replies with NAck, no change = will take place. This can be filtered based on Rx and Tx. An Rx LinkReqNA= ck refers to receiving an NAck (meaning this agent's Tx originally requeste= d the power change). A Tx LinkReqNAck refers to sending this command (mean= ing the peer agent's Tx originally requested the power change and this agen= t accepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req (same as L1 Ack).", + "EventCode": "0x22", + "EventName": "UNC_UPI_POWER_L1_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqAck. When the UPI links would like to change power state, th= e Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wit= h an Ack, the power mode will change. If it replies with NAck, no change w= ill take place. This can be filtered based on Rx and Tx. An Rx LinkReqAck= refers to receiving an Ack (meaning this agent's Tx originally requested t= he power change). A Tx LinkReqAck refers to sending this command (meaning = the peer agent's Tx originally requested the power change and this agent ac= cepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles the Rx of the Intel(R) UPI is in L0p p= ower mode", + "EventCode": "0x25", + "EventName": "UNC_UPI_RxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the receive side (Rx) of = the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a mo= de where we disable 60% of the UPI lanes, decreasing our bandwidth in order= to save power.", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0. Receive side.", + "EventCode": "0x24", + "EventName": "UNC_UPI_RxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", + "PerPkg": "1", + "PublicDescription": "REQ Message Class", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t Opcode", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC", + "PerPkg": "1", + "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", + "UMask": "0x108", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Conflict", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT", + "PerPkg": "1", + "UMask": "0x1aa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Invalid", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI", + "PerPkg": "1", + "UMask": "0x12a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10c", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0x10a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Snoop", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", + "PerPkg": "1", + "PublicDescription": "SNP Message Class", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Snoop = Opcode", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC", + "PerPkg": "1", + "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", + "UMask": "0x109", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10d", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot0 RxQ buffer (Receive Queue) and passed directly to t= he Egress. This is a latency optimization, and should generally be the com= mon case. If this value is less than the number of FLITs transferred, it i= mplies that there was queueing getting onto the ring, and thus the transact= ions saw higher latency.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot1 RxQ buffer (Receive Queue) and passed directly acr= oss the BGF and into the Egress. This is a latency optimization, and shoul= d generally be the common case. If this value is less than the number of F= LITs transferred, it implies that there was queueing getting onto the ring,= and thus the transactions saw higher latency.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot2 RxQ buffer (Receive Queue) and passed directly to = the Egress. This is a latency optimization, and should generally be the co= mmon case. If this value is less than the number of FLITs transferred, it = implies that there was queueing getting onto the ring, and thus the transac= tions saw higher latency.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "VN0 Credit Consumed", + "EventCode": "0x39", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "UPI" + }, + { + "BriefDescription": "VN1 Credit Consumed", + "EventCode": "0x3A", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credit Consumed", + "EventCode": "0x38", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid data FLITs received from any slot", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Counts valid data FLITs (80 bit FLow contro= l unITs: 64bits of data) received from any of the 3 Intel(R) Ultra Path Int= erconnect (UPI) Receive Queue slots on this UPI unit.", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Null FLITs received from any slot", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", + "PerPkg": "1", + "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) received from any of the 3 Intel(R) Ultra Path Interconnect (UPI) Receive= Queue slots on this UPI unit.", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Data", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Idle", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; LLCRD Not Empty", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; LLCTRL", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Protocol header and credit FLITs received fro= m any slot", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Counts protocol header and credit FLITs (80= bit FLow control unITs) received from any of the 3 UPI slots on this UPI u= nit.", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.ALL_NULL", + "Deprecated": "1", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.NULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Protocol Header", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.PROTHDR", + "Deprecated": "1", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.PROT_HDR", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Slot 0", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Slot 1", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Slot 2", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.NCB", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.NCS", + "PerPkg": "1", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.RSP", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.SNP", + "PerPkg": "1", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.WB", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.WB", + "PerPkg": "1", + "UMask": "0xb", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations; Slot 0", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations; Slot 1", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations; Slot 2", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets; Slot 0", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets; Slot 1", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets; Slot 2", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in which the Tx of the Intel(R) Ultra = Path Interconnect (UPI) is in L0p power mode", + "EventCode": "0x27", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the transmit side (Tx) of= the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a m= ode where we disable 60% of the UPI lanes, decreasing our bandwidth in orde= r to save power.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "EventCode": "0x28", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "EventCode": "0x29", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0. Transmit side.", + "EventCode": "0x26", + "EventName": "UNC_UPI_TxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", + "PerPkg": "1", + "PublicDescription": "REQ Message Class", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st Opcode", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC", + "PerPkg": "1", + "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", + "UMask": "0x108", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Conflict", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT", + "PerPkg": "1", + "UMask": "0x1aa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Invalid", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI", + "PerPkg": "1", + "UMask": "0x12a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10c", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0x10a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= ", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", + "PerPkg": "1", + "PublicDescription": "SNP Message Class", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= Opcode", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC", + "PerPkg": "1", + "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", + "UMask": "0x109", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10d", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs that bypassed the TxL Buffer", + "EventCode": "0x41", + "EventName": "UNC_UPI_TxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the TxL(transmit) FLIT buffer and pass directly out the UPI L= ink. Generally, when data is transmitted across the Intel(R) Ultra Path Int= erconnect (UPI), it will bypass the TxQ and pass directly to the link. How= ever, the TxQ will be used in L0p (Low Power) mode and (Link Layer Retry) L= LR mode, increasing latency to transfer out to the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid data FLITs transmitted via any slot", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Null FLITs transmitted from any slot", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", + "PerPkg": "1", + "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) transmitted via any of the 3 Intel(R) Ulra Path Interconnect (UPI) slots = on this UPI unit.", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Data", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Idle FLITs transmitted", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Counts when the Intel Ultra Path Interconnec= t(UPI) transmits an idle FLIT(80 bit FLow control unITs). Every UPI cycle = must be sending either data FLITs, protocol/credit FLITs or idle FLITs.", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; LLCRD Not Empty", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; LLCTRL", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Protocol header and credit FLITs transmitted = across any slot", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Counts protocol header and credit FLITs (80 = bit FLow control unITs) transmitted across any of the 3 UPI (Ultra Path Int= erconnect) slots on this UPI unit.", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.ALL_NULL", + "Deprecated": "1", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.NULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Protocol Header", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.PROTHDR", + "Deprecated": "1", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.PROT_HDR", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Slot 0", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Slot 1", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Slot 2", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.DATA_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.DUAL_SLOT_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.LOC", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.NCB", + "PerPkg": "1", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.NCS", + "PerPkg": "1", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.NON_DATA_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.REM", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.SGL_SLOT_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.SNP", + "PerPkg": "1", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.WB", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.WB", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Allocations", + "EventCode": "0x40", + "EventName": "UNC_UPI_TxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Tx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Occupancy", + "EventCode": "0x42", + "EventName": "UNC_UPI_TxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across UPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "EventCode": "0x45", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credits Pending Return - Occupancy", + "EventCode": "0x44", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", + "EventCode": "0xff", + "EventName": "UNC_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received; IPI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Inter Processor Interrupts", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received; MSI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Message Signaled Interrupts - interrupts sent by devi= ces (including PCIe via IOxAPIC) (Socket Mode only)", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received; VLW", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "IDI Lock/SplitLock Cycles", + "EventCode": "0x44", + "EventName": "UNC_U_LOCK_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "PHOLD cycles.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDRAND", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDSEED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "PublicDescription": "Number outstanding register requests within = message channel tracker", + "Unit": "UBOX" + }, + { + "BriefDescription": "UPI interconnect send bandwidth for payload. = Derived from unc_upi_txl_flits.all_data", + "EventCode": "0x2", + "EventName": "UPI_DATA_BANDWIDTH_TX", + "PerPkg": "1", + "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", + "ScaleUnit": "7.11E-06Bytes", + "UMask": "0xf", + "Unit": "UPI" + } +] diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json b/t= ools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json new file mode 100644 index 000000000000..743c91f3d2f0 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json @@ -0,0 +1,4250 @@ +[ + { + "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_READ", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "MetricName": "LLC_MISSES.PCIE_READ", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "ScaleUnit": "4Bytes", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_WRITE", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "MetricName": "LLC_MISSES.PCIE_WRITE", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "ScaleUnit": "4Bytes", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Clockticks of the IIO Traffic Controller", + "EventCode": "0x1", + "EventName": "UNC_IIO_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts clockticks of the 1GHz traffic contro= ller clock in the IIO unit.", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-3", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x0f", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x01", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x02", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x04", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x08", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 0", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x01", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 1", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x02", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 2", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x04", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 3", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x08", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0-3", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0xf", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 1", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 2", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 3", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part0", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part0. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part1. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part2", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part2. In the general case, Part2 refers= to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, = but it could refer to any x4 or x8 device attached to the IIO unit and usin= g lanes starting at lane 8 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part3", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part3. In the general case, Part3 refers= to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but i= t could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part0 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part0 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part1 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part1 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part2 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part2 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part2 refer= s to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card,= but it could refer to any x4 or x8 device attached to the IIO unit and usi= ng lanes starting at lane 8 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part3 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part3 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part3 refer= s to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but = it could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part0. Does not include requests made by the same IIO unit. In the gener= al case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that = is plugged directly into one of the PCIe slots. Part0 could also refer to a= ny device plugged into the first slot of a PCIe riser card or to a device a= ttached to the IIO unit which starts its use of the bus using lane 0 of the= 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part1. Does not include requests made by the same IIO unit. In the gener= al case, Part1 refers to a x4 PCIe card plugged into the second slot of a P= CIe riser card, but it could refer to any x4 device attached to the IIO uni= t using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part2", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part2. Does not include requests made by the same IIO unit. In the gener= al case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot o= f a PCIe riser card, but it could refer to any x4 or x8 device attached to = the IIO unit and using lanes starting at lane 8 of the 16 lanes supported b= y the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part3", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part3. Does not include requests made by the same IIO unit. In the gener= al case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a P= CIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part0 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gen= eral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) tha= t is plugged directly into one of the PCIe slots. Part0 could also refer to= any device plugged into the first slot of a PCIe riser card or to a device= attached to the IIO unit which starts its use of the bus using lane 0 of t= he 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part1 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part1 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part1 refers to a x4 PCIe card plugged into the second slot of a = PCIe riser card, but it could refer to any x4 device attached to the IIO un= it using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part2 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part2 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot = of a PCIe riser card, but it could refer to any x4 or x8 device attached to= the IIO unit and using lanes starting at lane 8 of the 16 lanes supported = by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part3 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part3 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a = PCIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part1 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part2 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part3 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the IIO= unit using the lanes starting at lane 12 of the 16 lanes supported by the = bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the II= O unit using the lanes starting at lane 12 of the 16 lanes supported by the= bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Num Link Correctable Errors", + "EventCode": "0xF", + "EventName": "UNC_IIO_LINK_NUM_CORR_ERR", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num Link Retries", + "EventCode": "0xE", + "EventName": "UNC_IIO_LINK_NUM_RETRIES", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number packets that passed the Mask/Match Fil= ter", + "EventCode": "0x21", + "EventName": "UNC_IIO_MASK_MATCH", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d !(PCIE bus)", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; !(Non-PCIE bus)= and PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= !(PCIE bus)", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and !(PCIE bus)", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Counting disabled", + "EventName": "UNC_IIO_NOTHING", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Symbol Times on Link", + "EventCode": "0x82", + "EventName": "UNC_IIO_SYMBOL_TIMES", + "PerPkg": "1", + "PublicDescription": "Gen1 - increment once every 4nS, Gen2 - incr= ement once every 2nS, Gen3 - increment once every 1nS", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part0", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part0. In the genera= l case, part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part1. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part2", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part2. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part3", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part3. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part0 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part0 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part1 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part1 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part2 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part2 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part3 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part3 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part0", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part0. Does not include requests made by the same I= IO unit. In the general case, part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part1. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part2", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part2. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part3", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part3. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part0 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part0 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part1 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part1 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part2 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part2 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part3 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part3 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part0 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part0 to the MMIO space of an IIO tar= get. In the general case, Part0 refers to a standard PCIe card of any size = (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 coul= d also refer to any device plugged into the first slot of a PCIe riser card= or to a device attached to the IIO unit which starts its use of the bus us= ing lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part1 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part1 to the MMIO space of an IIO tar= get. In the general case, Part1 refers to a x4 PCIe card plugged into the s= econd slot of a PCIe riser card, but it could refer to any x4 device attach= ed to the IIO unit using lanes starting at lane 4 of the 16 lanes supported= by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part2 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part2 to the MMIO space of an IIO tar= get. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into= the third slot of a PCIe riser card, but it could refer to any x4 or x8 de= vice attached to the IIO unit and using lanes starting at lane 8 of the 16 = lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part3 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part3 to the MMIO space of an IIO tar= get. In the general case, Part3 refers to a x4 PCIe card plugged into the f= ourth slot of a PCIe riser card, but it could brefer to any device attached= to the IIO unit using the lanes starting at lane 12 of the 16 lanes suppor= ted by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part0 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part0 to the MMIO space of a= n IIO target. In the general case, Part0 refers to a standard PCIe card of = any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. P= art0 could also refer to any device plugged into the first slot of a PCIe r= iser card or to a device attached to the IIO unit which starts its use of t= he bus using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part1 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part1 to the MMIO space of a= n IIO target.In the general case, Part1 refers to a x4 PCIe card plugged in= to the second slot of a PCIe riser card, but it could refer to any x4 devic= e attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s= upported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part2 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part2 to the MMIO space of a= n IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plu= gged into the third slot of a PCIe riser card, but it could refer to any x4= or x8 device attached to the IIO unit and using lanes starting at lane 8 o= f the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part3 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part3 to the MMIO space of a= n IIO target. In the general case, Part3 refers to a x4 PCIe card plugged i= nto the fourth slot of a PCIe riser card, but it could brefer to any devic= e attached to the IIO unit using the lanes starting at lane 12 of the 16 la= nes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; context cache miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.CTXT_MISS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; L1 miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L1_MISS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; L2 miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L2_MISS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; L3 miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L3_MISS", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; Vtd hit", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L4_PAGE_HIT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; TLB miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.TLB1_MISS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; TLB is full", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.TLB_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; TLB miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.TLB_MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Occupancy", + "EventCode": "0x40", + "EventName": "UNC_IIO_VTD_OCCUPANCY", + "PerPkg": "1", + "Unit": "IIO" + } +] diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json= b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json index aafd2c9b813b..f761856d738e 100644 --- a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json +++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json @@ -2735,7 +2735,7 @@ "EventCode": "0x81", "EventName": "UNC_M_WPQ_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of entries in the Write Pe= nding Queue (WPQ) at each cycle. This can then be used to calculate both t= he average queue occupancy (in conjunction with the number of cycles not em= pty) and the average latency (in conjunction with the number of allocations= ). The WPQ is used to schedule writes out to the memory controller and to = track the requests. Requests allocate into the WPQ soon after they enter t= he memory controller, and need credits for an entry in this buffer before b= eing sent from the CHA to the iMC (memory controller). They deallocate aft= er being issued to DRAM. Write requests themselves are able to complete (f= rom the perspective of the rest of the system) as soon they have 'posted' t= o the iMC. This is not to be confused with actually performing the write t= o DRAM. Therefore, the average latency for this queue is actually not usef= ul for deconstruction intermediate write latencies. So, we provide filteri= ng based on if the request has posted or not. By using the 'not posted' fi= lter, we can track how long writes spent in the iMC before completions were= sent to the HA. The 'posted' filter, on the other hand, provides informat= ion about how much queueing is actually happening in the iMC for writes bef= ore they are actually issued to memory. High average occupancies will gene= rally coincide with high write major mode counts. Is there a filter of sort= s???", + "PublicDescription": "Counts the number of entries in the Write Pe= nding Queue (WPQ) at each cycle. This can then be used to calculate both t= he average queue occupancy (in conjunction with the number of cycles not em= pty) and the average latency (in conjunction with the number of allocations= ). The WPQ is used to schedule writes out to the memory controller and to = track the requests. Requests allocate into the WPQ soon after they enter t= he memory controller, and need credits for an entry in this buffer before b= eing sent from the CHA to the iMC (memory controller). They deallocate aft= er being issued to DRAM. Write requests themselves are able to complete (f= rom the perspective of the rest of the system) as soon they have 'posted' t= o the iMC. This is not to be confused with actually performing the write t= o DRAM. Therefore, the average latency for this queue is actually not usef= ul for deconstruction intermediate write latencies. So, we provide filteri= ng based on if the request has posted or not. By using the 'not posted' fi= lter, we can track how long writes spent in the iMC before completions were= sent to the HA. The 'posted' filter, on the other hand, provides informat= ion about how much queueing is actually happening in the iMC for writes bef= ore they are actually issued to memory. High average occupancies will gene= rally coincide with high write major mode counts. Is there a filter of sort= s?", "Unit": "iMC" }, { diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-other.json = b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-other.json deleted file mode 100644 index 5f3ed5e843b9..000000000000 --- a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-other.json +++ /dev/null @@ -1,26344 +0,0 @@ -[ - { - "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.= ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.MMIO_READ", - "Filter": "config1=3D0x40040e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts= .ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.MMIO_WRITE", - "Filter": "config1=3D0x40041e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_READ", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "MetricName": "LLC_MISSES.PCIE_READ", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "ScaleUnit": "4Bytes", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_WRITE", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "MetricName": "LLC_MISSES.PCIE_WRITE", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "ScaleUnit": "4Bytes", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.UNCACHEABLE", - "Filter": "config1=3D0x40e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_REFERENCES.STREAMING_FULL", - "Filter": "config1=3D0x41833", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "ScaleUnit": "64Bytes", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", - "Filter": "config1=3D0x41a33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "ScaleUnit": "64Bytes", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass; Intermediate bypass Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the intermediate bypass.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass; Not Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that could not take the bypass, and issues a read to memory.= Note that transactions that did not take the bypass but did not issue read= to memory will not be counted.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass; Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the full bypass.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Uncore cache clock ticks", - "EventName": "UNC_CHA_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts clockticks of the clock controlling t= he uncore caching and home agent (CHA).", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xC0", - "EventName": "UNC_CHA_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C1 State", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C1_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C1 Transition", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C1_TRANSITION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C6 State", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C6_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C6 Transition", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C6_TRANSITION", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; GV", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.GV", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Any Cycle with Mult= iple Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Any Single Snoop", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Any Snoop to Remote= Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Multiple Core Reque= sts", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Single Core Request= s", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Core Request to Rem= ote Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Multiple Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Single Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Eviction to Remote = Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Multiple External S= noops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Single External Sno= ops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; External Snoop to R= emote Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "Counter 0 Occupancy", - "EventCode": "0x1F", - "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Not Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", - "PerPkg": "1", - "PublicDescription": "Counts transactions that looked into the mul= ti-socket cacheline Directory state, and therefore did not send a snoop bec= ause the Directory indicated it was not needed", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.SNP", - "PerPkg": "1", - "PublicDescription": "Counts transactions that looked into the mu= lti-socket cacheline Directory state, and sent one or more snoops, because = the Directory indicated it was needed", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from the HA pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.HA", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline Directory= state updates memory writes issued from the HA pipe. This does not include= memory write requests which are for I (Invalid) or E (Exclusive) cacheline= s.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from TOR pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.TOR", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline Directory= state updates due to memory writes issued from the TOR pipe which are the = result of remote transaction hitting the SF/LLC and returning data Core2Cor= e. This does not include memory write requests which are for I (Invalid) or= E (Exclusive) cachelines.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", - "EventCode": "0xAE", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", - "EventCode": "0xAE", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "FaST wire asserted; Horizontal", - "EventCode": "0xA5", - "EventName": "UNC_CHA_FAST_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "FaST wire asserted; Vertical", - "EventCode": "0xA5", - "EventName": "UNC_CHA_FAST_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Read request from a remote socket which hit i= n the HitMe Cache to a line In the E state", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.EX_RDS", - "PerPkg": "1", - "PublicDescription": "Counts read requests from a remote socket wh= ich hit in the HitME cache (used to cache the multi-socket Directory state)= to a line in the E(Exclusive) state. This includes the following read opc= odes (RdCode, RdData, RdDataMigratory, RdCur, RdInv*, Inv*)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache; Shared = hit and op is RdInvOwn, RdInv, Inv*", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoE", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.WBMTOE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoI, WbPushMtoI, WbFlush, or WbMtoS", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*", - "EventCode": "0x5E", - "EventName": "UNC_CHA_HITME_LOOKUP.READ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS", - "EventCode": "0x5E", - "EventName": "UNC_CHA_HITME_LOOKUP.WRITE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache; No SF= /LLC HitS/F and op is RdInvOwn", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache; op is= RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache; SF/LL= C HitS/F and op is RdInvOwn", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Deallocate HitME$ on Reads without RspFwdI*", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a local request", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", - "PerPkg": "1", - "PublicDescription": "Received RspFwdI* for a local request, but c= onverted HitME$ to SF entry", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache on RdInvOwn even if not RspFwdI*", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a remote request", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM", - "PerPkg": "1", - "PublicDescription": "Updated HitME$ on RspFwdI* or local HitM/E r= eceived for a remote request", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache to SHARed", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.SHARED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Even", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Even", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Even", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Even", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Even", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Even", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Left", - "EventCode": "0xAD", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Right", - "EventCode": "0xAD", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "HA to iMC Reads Issued; ISOCH", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", - "PerPkg": "1", - "PublicDescription": "Count of the number of reads issued to any o= f the memory controller channels. This can be filtered by the priority of = the reads.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line= Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to the any of the memory controller chann= els.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; Full Line= MIG", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Ful= l Line", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; Partial N= on-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; Partial M= IG", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.; Filter for memory c= ontroller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Par= tial", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations", - "EventCode": "0x62", - "EventName": "UNC_CHA_IODC_ALLOC.INVITOM", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations dropped due to IODC Full", - "EventCode": "0x62", - "EventName": "UNC_CHA_IODC_ALLOC.IODCFULL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IDOC allocation dropped due to OSB gate", - "EventCode": "0x62", - "EventName": "UNC_CHA_IODC_ALLOC.OSBGATED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to any reason", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to conflicting transaction", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.SNPOUT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoE", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoI", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOI", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbPushMtoI", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", - "PerPkg": "1", - "PublicDescription": "Moved to Cbo section", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Read transactions", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Local", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Remote", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", - "UMask": "0x91", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; External Snoo= p Request", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for only snoop requests c= oming from the remote socket(s) through the IPQ.", - "UMask": "0x9", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Write Request= s", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITE", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Writeback transactions from L2 to= the LLC This includes all write transactions -- both Cacheable and UC.", - "UMask": "0x5", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.F_STATE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x2f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in F State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x8f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in F State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_F", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x88", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in E state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in F State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_F", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in M state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; CV0 Prefetch Miss", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; CV0 Prefetch Victim", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Number of times that an RFO hit in S state.", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RFO_HIT_S", - "PerPkg": "1", - "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; Silent Snoop Eviction", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; Write Combining Aliasing", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.WC_ALIASING", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB", - "PerPkg": "1", - "PublicDescription": "Count of OSB snoop broadcasts. Counts by 1 p= er request causing OSB snoops to be broadcast. Does not count all the snoop= s generated by OSB.", - "Unit": "CHA" - }, - { - "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in IODC", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.IODC", - "PerPkg": "1", - "PublicDescription": "2LM related events; Counts the number of tim= es CHA saw NM Set conflict in IODC", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in SF/LLC", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC", - "PerPkg": "1", - "PublicDescription": "NM evictions due to another read to the same= near memory set in the LLC.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in SF/LLC", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF", - "PerPkg": "1", - "PublicDescription": "NM evictions due to another read to the same= near memory set in the SF.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Memory Mode related events; Counts the number= of times CHA saw NM Set conflict in TOR", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR", - "PerPkg": "1", - "PublicDescription": "No Reject in the CHA due to a pending read t= o the same near memory set in the TOR.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Memory mode related events; Counts the number= of times CHA saw NM Set conflict in TOR and the transaction was rejected", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR_REJECT", - "PerPkg": "1", - "PublicDescription": "Rejects in the CHA due to a pending read to = the same near memory set in the TOR.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC0_SMI2", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC1_SMI3", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC2_SMI4", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC3_SMI5", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC0_SMI0", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC1_SMI1", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a remote socket for exclusive ownership of a cache line without receivi= ng data (INVITOE) to the CHA.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS", - "PerPkg": "1", - "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests from a unit on this socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests from a remote socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Write requests", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "Write Requests from a unit on this socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Read and Write Requests; Writes Remote", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AD", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AK", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; BL", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; IV", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; AD", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xA4", - "EventName": "UNC_CHA_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; IPQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IPQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; IRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; IRQ Rejected", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; RRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.RRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; WBQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.WBQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; AD REQ on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; AD RSP on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Non UPI AK Reque= st", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL NCB on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL NCS on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL RSP on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL WB on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Non UPI IV Reque= st", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Allow Snoop", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; ANY0", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; HA", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Merging these tw= o together to make room for ANY_REJECT_*0", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; LLC Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; PhyAddr Match", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; SF Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Mer= ging these two together to make room for ANY_REJECT_*0", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; AD REQ on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; AD RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; Non UPI AK Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL NCB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL NCS on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL WB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; Non UPI IV Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; AD REQ on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; AD RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; Non UPI AK Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL NCB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL NCS on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL WB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; Non UPI IV Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; ANY0", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; HA", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; ANY0", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; HA", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; IPQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IPQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; IRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; RRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.RRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; WBQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.WBQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; AD REQ on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; AD RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Non UPI AK Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL NCB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL NCS on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL WB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Non UPI IV Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Allow Snoop", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; ANY0", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; HA", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Merging these two together to = make room for ANY_REJECT_*0", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; LLC Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; PhyAddr Match", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; SF Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= OR SF Way", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; AD REQ on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; AD RSP on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Non UPI AK Request", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL NCB on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL NCS on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL RSP on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL WB on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Non UPI IV Request", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Allow Snoop", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; ANY0", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; HA", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Merging these two toge= ther to make room for ANY_REJECT_*0", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; LLC Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; PhyAddr Match", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; SF Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; AD REQ on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; AD RSP on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Non UPI AK Request", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL NCB on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL NCS on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL RSP on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL WB on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Non UPI IV Request", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Allow Snoop", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; ANY0", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; HA", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; LLC Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; PhyAddr Match", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; SF Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; AD REQ on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; AD RSP on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Non UPI AK Request", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL NCB on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL NCS on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL RSP on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL WB on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Non UPI IV Request", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Allow Snoop", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; ANY0", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; HA", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; LLC Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; PhyAddr Match", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; SF Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Credit", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Credit", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AK - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; IV - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Credit", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Credit", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.E_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores cache. Snoop filter capacity e= victions occur when the snoop filter is full and evicts an existing entry t= o track a new entry. Does not count clean evictions such as when a cores ca= che replaces a tracked cacheline with a new cacheline.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.M_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores cache. Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry. Does not count clean evictions such as when a cores cac= he replaces a tracked cacheline with a new cacheline.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.S_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores cache. Snoop filter capacity evic= tions occur when the snoop filter is full and evicts an existing entry to t= rack a new entry. Does not count clean evictions such as when a cores cache= replaces a tracked cacheline with a new cacheline.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; All", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast snoop for Local Reques= ts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA. This filter incl= udes only requests coming from local sockets.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast snoops for Remote Requ= ests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA.This filter inclu= des only requests coming from remote sockets.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Directed snoops for Local Reques= ts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from local sockets.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Directed snoops for Remote Reque= sts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from remote sockets.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Local Requests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the local socket.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Remote Requests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the remote socket.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RspCnflct* Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCTS", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspCnflct* Snoop Response was received. This is returned when a snoop = finds an existing outstanding transaction in a remote caching agent. This t= riggers conflict resolution hardware. This covers both the opcode RspCnflct= and RspCnflctWbI.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received; RspFwd", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Counts the total number of RspI snoop respon= ses received. Whenever a snoops are issued, one or more snoop responses wi= ll be returned depending on the topology of the system. In systems larger= than 2s, when multiple snoops are returned this will count all the snoops = that are received. For example, if 3 snoops were issued and returned RspI,= RspS, and RspSFwd; then each of these sub-events would increment by 1.; Fi= lters for a snoop response of RspFwd to a CA request. This snoop response = is only possible for RdCur when a snoop HITM/E in a remote caching agent an= d it directly forwards data to a requestor without changing the requestor's= cache line state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RspI Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPI", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe RspI Snoop Response was received which indicates the remote cache does n= ot have the data, or when the remote cache silently evicts data (such as wh= en an RFO: the Read for Ownership issued before a write hits non-modified d= ata).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RspIFwd Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspIFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data and the requesting agent is able to acquire the dat= a in E (Exclusive) or M (modified) states. This is commonly returned with = RFO (the Read for Ownership issued before a write) transactions. The snoop= could have either been to a cacheline in the M,E,F (Modified, Exclusive or= Forward) states.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RspS", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received : RspS : Counts the= total number of RspI snoop responses received. Whenever a snoops are issu= ed, one or more snoop responses will be returned depending on the topology = of the system. In systems larger than 2s, when multiple snoops are return= ed this will count all the snoops that are received. For example, if 3 sno= ops were issued and returned RspI, RspS, and RspSFwd; then each of these su= b-events would increment by 1. : Filters for snoop responses of RspS. RspS= is returned when a remote cache has data but is not forwarding it. It is = a way to let the requesting socket know that it cannot allocate the data in= E state. No data is sent with S RspS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RspSFwd Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspSFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data but held on to its current copy. This is common fo= r data and code reads that hit in a remote socket in E (Exclusive) or F (Fo= rward) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Rsp*Fwd*WB Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSP_FWD_WB", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*Fwd*WB Snoop Response was received which indicates the data was writ= ten back to its home socket, and the cacheline was forwarded to the request= or socket. This snoop response is only used in >=3D 4 socket systems. It = is used when a snoop HITM's in a remote caching agent and it directly forwa= rds data to a requestor, and simultaneously returns data to its home socket= to be written back to memory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Rsp*WB Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSP_WBWB", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*WB Snoop Response was received which indicates which indicates the d= ata was written back to its home. This is returned when a non-RFO request = hits a cacheline in the Modified state. The Cache can either downgrade the = cacheline to a S (Shared) or I (Invalid) state depending on how the system = has been configured. This response will also be sent when a cache requests= E (Exclusive) ownership of a cache line without receiving data, because th= e cache must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspCnflct", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspConflict to local CA reques= ts. This is returned when a snoop finds an existing outstanding transactio= n in a remote caching agent when it CAMs that caching agent. This triggers= conflict resolution hardware. This covers both RspCnflct and RspCnflctWbI= .", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspFwd to local CA requests. = This snoop response is only possible for RdCur when a snoop HITM/E in a rem= ote caching agent and it directly forwards data to a requestor without chan= ging the requestor's cache line state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspI", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspI to local CA requests. Rs= pI is returned when the remote cache does not have the data, or when the re= mote cache silently evicts data (such as when an RFO hits non-modified data= ).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspIFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspIFwd to local CA requests. = This is returned when a remote caching agent forwards data and the requesti= ng agent is able to acquire the data in E or M states. This is commonly re= turned with RFO transactions. It can be either a HitM or a HitFE.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspS", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspS to local CA requests. Rsp= S is returned when a remote cache has data but is not forwarding it. It is= a way to let the requesting socket know that it cannot allocate the data i= n E state. No data is sent with S RspS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspSFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspSFwd to local CA requests. = This is returned when a remote caching agent forwards data but holds on to= its current copy. This is common for data and code reads that hit in a re= mote socket in E or F state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; Rsp*FWD*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of Rsp*Fwd*WB to local CA request= s. This snoop response is only used in 4s systems. It is used when a snoo= p HITM's in a remote caching agent and it directly forwards data to a reque= stor, and simultaneously returns data to the home to be written back to mem= ory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; Rsp*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspIWB or RspSWB to local CA r= equests. This is returned when a non-RFO request hits in M state. Data an= d Code Reads can return either RspIWB or RspSWB depending on how the system= has been configured. InvItoE transactions will also return RspIWB because= they must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0xff", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from Local", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x15", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from Local iA and IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL_IO_IA", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests", - "UMask": "0x35", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Misses from Local", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x25", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; SF/LLC Evictions", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.EVICT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; T= OR allocation occurred as a result of SF/LLC evictions (came from the ISMQ)= ", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hit (Not a Miss)", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; H= ITs (hit is defined to be not a miss [see below], as a result for any reque= st allocated into the TOR, one of either HIT or MISS must be true)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests from iA Cores", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that hit the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that missed the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally generated IO traffic", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; ItoM misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", - "Filter": "config1=3D0x49033", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO ItoM requests that mis= s the LLC. An ItoM request is used by IIO to request a data write without f= irst reading the data for ownership.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RdCur misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RDCUR", - "Filter": "config1=3D0x43C33", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RdCur requests and mis= s the LLC. A RdCur request is used by IIO to read data without changing sta= te.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RFO requests that miss= the LLC. A read for ownership (RFO) requests a cache line to be cached in = E state with the intent to modify.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; IPQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; IRQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Miss", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MISS", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; M= isses. (a miss is defined to be any transaction from the IRQ, PRQ, RRQ, IP= Q or (in the victim case) the ISMQ, that required the CHA to spawn a new UP= I/SMI3 request on the UPI fabric (including UPI snoops and/or any RD/WR to = a local memory controller, in the event that the CHA is the home node)). B= asically, if the LLC/SF/MLC complex were not able to service the request wi= thout involving another agent...it is a miss. If only IDI snoops were requ= ired, it is not a miss (that means the SF/MLC com", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; PRQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", - "PerPkg": "1", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.RRQ_HIT", - "PerPkg": "1", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS", - "PerPkg": "1", - "UMask": "0x60", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.WBQ_HIT", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.WBQ_MISS", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", - "UMask": "0xff", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from Local", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All remotely= generated requests", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from Local", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x17", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from Local", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x27", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; SF/LLC Evictions", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; TOR allocation occurred as a result of SF/LLC evictions (c= ame from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hit (Not a Miss)", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; HITs (hit is defined to be not a miss [see below], as a re= sult for any request allocated into the TOR, one of either HIT or MISS must= be true)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally initiated requests from iA Cores", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that hit the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that missed the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally generated IO traffic", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; ITOM Misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", - "Filter": "config1=3D0x49033", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO ItoM req= uests that miss the LLC. An ItoM is used by IIO to request a data write wit= hout first reading the data for ownership.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RDCUR misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RDCUR", - "Filter": "config1=3D0x43C33", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RdCur re= quests that miss the LLC. A RdCur request is used by IIO to read data witho= ut changing state.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RFO requ= ests that miss the LLC. A read for ownership (RFO) requests data to be cach= ed in E state with the intent to modify.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; IPQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; IRQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Miss", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; Misses. (a miss is defined to be any transaction from the= IRQ, PRQ, RRQ, IPQ or (in the victim case) the ISMQ, that required the CHA= to spawn a new UPI/SMI3 request on the UPI fabric (including UPI snoops an= d/or any RD/WR to a local memory controller, in the event that the CHA is t= he home node)). Basically, if the LLC/SF/MLC complex were not able to serv= ice the request without involving another agent...it is a miss. If only ID= I snoops were required, it is not a miss (that means the SF/MLC com", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; PRQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; IV", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; IV", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; IV", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.IV", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; IV", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; AD REQ Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; AD RSP VN0 Cr= edits", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL NCB Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL NCS Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL RSP Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL DRS Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; VN0 Credits", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VN0", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; VNA Credits", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VNA", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; AD REQ VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_REQ", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; AD RSP VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCB VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCS VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL RSP VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL DRS VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_WB", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; AD VNA Cre= dits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_AD", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL VNA Cre= dits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_BL", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Even", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Odd", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Even", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Odd", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Even", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Odd", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Even", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Odd", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Even", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Odd", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Even", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Odd", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Down", - "EventCode": "0xAC", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Up", - "EventCode": "0xAC", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI; Pushed to LLC", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was able to pu= sh WbPushMToI to LLC", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI; Pushed to Memory", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was unable to = push WbPushMToI to LLC (hence pushed it to MEM)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC0_SMI2", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC1_SMI3", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC2_SMI4", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC3_SMI5", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC0_SMI0", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC1_SMI1", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspIFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd F/E", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd M", - "UMask": "0xf0", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd F/E", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd M", - "UMask": "0xe8", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspHitFSE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response any to Hit F/S/E= ", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd F/E", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd M", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd F/E", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd M", - "UMask": "0x48", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspHitFSE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response any to Hit F/S/= E", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd F/= E", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd M", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd F/= E", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd M", - "UMask": "0x88", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspHitFSE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response any to Hit = F/S/E", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspIFwdF= E", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd F/= E", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspIFwdM= ", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd M", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspSFwdF= E", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd F/= E", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspSFwdM= ", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd M", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspHitFS= E", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response any to Hit = F/S/E", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CLOCKTICKS", - "Deprecated": "1", - "EventName": "UNC_C_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_FAST_ASSERTED.HORZ", - "Deprecated": "1", - "EventCode": "0xA5", - "EventName": "UNC_C_FAST_ASSERTED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.ANY", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.ANY", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.DATA_READ", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.LOCAL", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.REMOTE", - "PerPkg": "1", - "UMask": "0x91", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.REMOTE_SNOOP", - "PerPkg": "1", - "UMask": "0x9", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITE", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.WRITE", - "PerPkg": "1", - "UMask": "0x5", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.E_STATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.F_STATE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.LOCAL_ALL", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.LOCAL", - "PerPkg": "1", - "UMask": "0x2f", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.M_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.REMOTE", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.S_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SRC_THRTL", - "Deprecated": "1", - "EventCode": "0xA4", - "EventName": "UNC_C_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.EVICT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.EVICT", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.HIT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.HIT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IPQ", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IPQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IRQ", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IRQ_HIT", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IRQ_MISS", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.LOC_IA", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.LOC_IO", - "PerPkg": "1", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.MISS", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.PRQ", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.PRQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_HIT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.PRQ_HIT", - "PerPkg": "1", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_MISS", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.PRQ_MISS", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.REM_ALL", - "PerPkg": "1", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.RRQ_HIT", - "PerPkg": "1", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.RRQ_MISS", - "PerPkg": "1", - "UMask": "0x60", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.WBQ_HIT", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.WBQ_MISS", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.EVICT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.HIT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IPQ", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IPQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IRQ", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_HIT", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_MISS", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IA", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IO", - "PerPkg": "1", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.MISS", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.PRQ", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_HIT", - "PerPkg": "1", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_MISS", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", - "Deprecated": "1", - "EventCode": "0x57", - "EventName": "UNC_H_BYPASS_CHA_IMC.INTERMEDIATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", - "Deprecated": "1", - "EventCode": "0x57", - "EventName": "UNC_H_BYPASS_CHA_IMC.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.TAKEN", - "Deprecated": "1", - "EventCode": "0x57", - "EventName": "UNC_H_BYPASS_CHA_IMC.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CMS_CLOCKTICKS", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_H_CLOCK", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_STATE", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C1_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_TRANSITION", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C1_TRANSITION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_STATE", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C6_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_TRANSITION", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C6_TRANSITION", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.GV", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.GV", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.ANY_GTONE", - "PerPkg": "1", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.ANY_ONE", - "PerPkg": "1", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.ANY_REMOTE", - "PerPkg": "1", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.CORE_GTONE", - "PerPkg": "1", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.CORE_ONE", - "PerPkg": "1", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.CORE_REMOTE", - "PerPkg": "1", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EVICT_GTONE", - "PerPkg": "1", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EVICT_ONE", - "PerPkg": "1", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EVICT_REMOTE", - "PerPkg": "1", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EXT_GTONE", - "PerPkg": "1", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EXT_ONE", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EXT_REMOTE", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_COUNTER0_OCCUPANCY", - "Deprecated": "1", - "EventCode": "0x1F", - "EventName": "UNC_H_COUNTER0_OCCUPANCY", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.NO_SNP", - "Deprecated": "1", - "EventCode": "0x53", - "EventName": "UNC_H_DIR_LOOKUP.NO_SNP", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.SNP", - "Deprecated": "1", - "EventCode": "0x53", - "EventName": "UNC_H_DIR_LOOKUP.SNP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.HA", - "Deprecated": "1", - "EventCode": "0x54", - "EventName": "UNC_H_DIR_UPDATE.HA", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.TOR", - "Deprecated": "1", - "EventCode": "0x54", - "EventName": "UNC_H_DIR_UPDATE.TOR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", - "Deprecated": "1", - "EventCode": "0xAE", - "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", - "Deprecated": "1", - "EventCode": "0xAE", - "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.EX_RDS", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.EX_RDS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.SHARED_OWNREQ", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.SHARED_OWNREQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOE", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.WBMTOE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOI_OR_S", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.WBMTOI_OR_S", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.READ", - "Deprecated": "1", - "EventCode": "0x5E", - "EventName": "UNC_H_HITME_LOOKUP.READ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.WRITE", - "Deprecated": "1", - "EventCode": "0x5E", - "EventName": "UNC_H_HITME_LOOKUP.WRITE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", - "Deprecated": "1", - "EventCode": "0x60", - "EventName": "UNC_H_HITME_MISS.NOTSHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.READ_OR_INV", - "Deprecated": "1", - "EventCode": "0x60", - "EventName": "UNC_H_HITME_MISS.READ_OR_INV", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.SHARED_RDINVOWN", - "Deprecated": "1", - "EventCode": "0x60", - "EventName": "UNC_H_HITME_MISS.SHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RDINVOWN", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.RDINVOWN", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RSPFWDI_REM", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.RSPFWDI_REM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.SHARED", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.SHARED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", - "Deprecated": "1", - "EventCode": "0xAD", - "EventName": "UNC_H_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", - "Deprecated": "1", - "EventCode": "0xAD", - "EventName": "UNC_H_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.NORMAL", - "Deprecated": "1", - "EventCode": "0x59", - "EventName": "UNC_H_IMC_READS_COUNT.NORMAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.PRIORITY", - "Deprecated": "1", - "EventCode": "0x59", - "EventName": "UNC_H_IMC_READS_COUNT.PRIORITY", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.FULL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_MIG", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_PRIORITY", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_MIG", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.INVITOM", - "Deprecated": "1", - "EventCode": "0x62", - "EventName": "UNC_H_IODC_ALLOC.INVITOM", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.IODCFULL", - "Deprecated": "1", - "EventCode": "0x62", - "EventName": "UNC_H_IODC_ALLOC.IODCFULL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.OSBGATED", - "Deprecated": "1", - "EventCode": "0x62", - "EventName": "UNC_H_IODC_ALLOC.OSBGATED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.ALL", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.SNPOUT", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.SNPOUT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOE", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.WBMTOE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOI", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.WBMTOI", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.WBPUSHMTOI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_MISS", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.CV0_PREF_MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_VIC", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.CV0_PREF_VIC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RFO_HIT_S", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.RFO_HIT_S", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RSPI_WAS_FSE", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.RSPI_WAS_FSE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.WC_ALIASING", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.WC_ALIASING", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_OSB", - "Deprecated": "1", - "EventCode": "0x55", - "EventName": "UNC_H_OSB", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC0_SMI0", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC1_SMI1", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_LOCAL", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.INVITOE_LOCAL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_REMOTE", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.INVITOE_REMOTE", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "read requests from home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.READS", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "read requests from local home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.READS_LOCAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "read requests from remote home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.READS_REMOTE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "write requests from home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.WRITES", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "write requests from local home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.WRITES_LOCAL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "write requests from remote home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.WRITES_REMOTE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AD", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AK", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.BL", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.IV", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AD", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AK", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.BL", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.IV", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AD", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.BL", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.IV", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AD", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AK", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.BL", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.IV", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IPQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.IPQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.IRQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ_REJ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.IRQ_REJ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.PRQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ_REJ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.PRQ_REJ", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.RRQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.RRQ", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.WBQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.WBQ", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.ANY_IPQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.ANY_REJECT_IRQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x25", - "EventName": "UNC_H_RxC_ISMQ1_REJECT.ANY_ISMQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x25", - "EventName": "UNC_H_RxC_ISMQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.ANY0", - "Deprecated": "1", - "EventCode": "0x2D", - "EventName": "UNC_H_RxC_ISMQ1_RETRY.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.HA", - "Deprecated": "1", - "EventCode": "0x2D", - "EventName": "UNC_H_RxC_ISMQ1_RETRY.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IPQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.IPQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IRQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.IRQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.RRQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.RRQ", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.WBQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.WBQ", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ANY0", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.HA", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.VICTIM", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.ANY_PRQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.HA", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.ANY_RRQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.ANY_WBQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IFV", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.E_STATE", - "Deprecated": "1", - "EventCode": "0x3D", - "EventName": "UNC_H_SF_EVICTION.E_STATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.M_STATE", - "Deprecated": "1", - "EventCode": "0x3D", - "EventName": "UNC_H_SF_EVICTION.M_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.S_STATE", - "Deprecated": "1", - "EventCode": "0x3D", - "EventName": "UNC_H_SF_EVICTION.S_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.ALL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_LOCAL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.BCST_LOC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_REMOTE", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.BCST_REM", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.DIRECT_LOC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.DIRECT_REM", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.LOCAL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.LOCAL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.REMOTE", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.REMOTE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPCNFLCTS", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPCNFLCT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPFWD", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPFWD", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPI", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPI", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPIFWD", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPIFWD", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPS", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPSFWD", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPSFWD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_FWD_WB", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSP_FWD_WB", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_WBWB", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSP_WB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPCNFLCT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPFWD", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPI", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPI", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPIFWD", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPS", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPSFWD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_FWD_WB", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_WB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_CRD", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AK_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_CRD", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.IV_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AD_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AK_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.BL_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.IV_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG0", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG1", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG0", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG1", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG0", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG1", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.IV", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.IV", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.IV", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG0", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG1", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG0", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG1", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG0", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG1", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.IV", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG0", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG1", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG0", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG1", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG0", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG1", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.IV", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.IV", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG0", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG1", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG0", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG1", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG0", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG1", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.IV", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.DN", - "Deprecated": "1", - "EventCode": "0xAC", - "EventName": "UNC_H_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.UP", - "Deprecated": "1", - "EventCode": "0xAC", - "EventName": "UNC_H_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.LLC", - "Deprecated": "1", - "EventCode": "0x56", - "EventName": "UNC_H_WB_PUSH_MTOI.LLC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.MEM", - "Deprecated": "1", - "EventCode": "0x56", - "EventName": "UNC_H_WB_PUSH_MTOI.MEM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0xf0", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0xe8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0x48", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0x88", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Clockticks of the IIO Traffic Controller", - "EventCode": "0x1", - "EventName": "UNC_IIO_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts clockticks of the 1GHz traffic contro= ller clock in the IIO unit.", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-3", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x0f", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x01", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x02", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x04", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x08", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 0", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x01", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 1", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x02", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 2", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x04", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 3", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x08", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0-3", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0xf", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 1", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 2", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 3", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part0", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part0. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part1. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part2", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part2. In the general case, Part2 refers= to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, = but it could refer to any x4 or x8 device attached to the IIO unit and usin= g lanes starting at lane 8 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part3", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part3. In the general case, Part3 refers= to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but i= t could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part0 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part0 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part1 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part1 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part2 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part2 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part2 refer= s to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card,= but it could refer to any x4 or x8 device attached to the IIO unit and usi= ng lanes starting at lane 8 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part3 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part3 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part3 refer= s to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but = it could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part0. Does not include requests made by the same IIO unit. In the gener= al case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that = is plugged directly into one of the PCIe slots. Part0 could also refer to a= ny device plugged into the first slot of a PCIe riser card or to a device a= ttached to the IIO unit which starts its use of the bus using lane 0 of the= 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part1. Does not include requests made by the same IIO unit. In the gener= al case, Part1 refers to a x4 PCIe card plugged into the second slot of a P= CIe riser card, but it could refer to any x4 device attached to the IIO uni= t using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part2", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part2. Does not include requests made by the same IIO unit. In the gener= al case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot o= f a PCIe riser card, but it could refer to any x4 or x8 device attached to = the IIO unit and using lanes starting at lane 8 of the 16 lanes supported b= y the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part3", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part3. Does not include requests made by the same IIO unit. In the gener= al case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a P= CIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part0 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gen= eral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) tha= t is plugged directly into one of the PCIe slots. Part0 could also refer to= any device plugged into the first slot of a PCIe riser card or to a device= attached to the IIO unit which starts its use of the bus using lane 0 of t= he 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part1 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part1 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part1 refers to a x4 PCIe card plugged into the second slot of a = PCIe riser card, but it could refer to any x4 device attached to the IIO un= it using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part2 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part2 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot = of a PCIe riser card, but it could refer to any x4 or x8 device attached to= the IIO unit and using lanes starting at lane 8 of the 16 lanes supported = by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part3 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part3 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a = PCIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part1 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part2 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part3 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the IIO= unit using the lanes starting at lane 12 of the 16 lanes supported by the = bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the II= O unit using the lanes starting at lane 12 of the 16 lanes supported by the= bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Num Link Correctable Errors", - "EventCode": "0xF", - "EventName": "UNC_IIO_LINK_NUM_CORR_ERR", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num Link Retries", - "EventCode": "0xE", - "EventName": "UNC_IIO_LINK_NUM_RETRIES", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number packets that passed the Mask/Match Fil= ter", - "EventCode": "0x21", - "EventName": "UNC_IIO_MASK_MATCH", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d !(PCIE bus)", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; !(Non-PCIE bus)= and PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= !(PCIE bus)", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and !(PCIE bus)", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Counting disabled", - "EventName": "UNC_IIO_NOTHING", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Symbol Times on Link", - "EventCode": "0x82", - "EventName": "UNC_IIO_SYMBOL_TIMES", - "PerPkg": "1", - "PublicDescription": "Gen1 - increment once every 4nS, Gen2 - incr= ement once every 2nS, Gen3 - increment once every 1nS", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part0", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part0. In the genera= l case, part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part1. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part2", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part2. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part3", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part3. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part0 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part0 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part1 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part1 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part2 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part2 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part3 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part3 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part0", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part0. Does not include requests made by the same I= IO unit. In the general case, part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part1. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part2", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part2. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part3", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part3. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part0 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part0 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part1 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part1 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part2 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part2 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part3 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part3 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part0 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part1 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part2 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part3 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part0 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part1 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part2 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part3 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part0 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part0 to the MMIO space of an IIO tar= get. In the general case, Part0 refers to a standard PCIe card of any size = (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 coul= d also refer to any device plugged into the first slot of a PCIe riser card= or to a device attached to the IIO unit which starts its use of the bus us= ing lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part1 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part1 to the MMIO space of an IIO tar= get. In the general case, Part1 refers to a x4 PCIe card plugged into the s= econd slot of a PCIe riser card, but it could refer to any x4 device attach= ed to the IIO unit using lanes starting at lane 4 of the 16 lanes supported= by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part2 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part2 to the MMIO space of an IIO tar= get. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into= the third slot of a PCIe riser card, but it could refer to any x4 or x8 de= vice attached to the IIO unit and using lanes starting at lane 8 of the 16 = lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part3 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part3 to the MMIO space of an IIO tar= get. In the general case, Part3 refers to a x4 PCIe card plugged into the f= ourth slot of a PCIe riser card, but it could brefer to any device attached= to the IIO unit using the lanes starting at lane 12 of the 16 lanes suppor= ted by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part0 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part0 to the MMIO space of a= n IIO target. In the general case, Part0 refers to a standard PCIe card of = any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. P= art0 could also refer to any device plugged into the first slot of a PCIe r= iser card or to a device attached to the IIO unit which starts its use of t= he bus using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part1 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part1 to the MMIO space of a= n IIO target.In the general case, Part1 refers to a x4 PCIe card plugged in= to the second slot of a PCIe riser card, but it could refer to any x4 devic= e attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s= upported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part2 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part2 to the MMIO space of a= n IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plu= gged into the third slot of a PCIe riser card, but it could refer to any x4= or x8 device attached to the IIO unit and using lanes starting at lane 8 o= f the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part3 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part3 to the MMIO space of a= n IIO target. In the general case, Part3 refers to a x4 PCIe card plugged i= nto the fourth slot of a PCIe riser card, but it could brefer to any devic= e attached to the IIO unit using the lanes starting at lane 12 of the 16 la= nes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; context cache miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.CTXT_MISS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; L1 miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L1_MISS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; L2 miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L2_MISS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; L3 miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L3_MISS", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; Vtd hit", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L4_PAGE_HIT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; TLB miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.TLB1_MISS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; TLB is full", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.TLB_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; TLB miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.TLB_MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Occupancy", - "EventCode": "0x40", - "EventName": "UNC_IIO_VTD_OCCUPANCY", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Any Source", - "EventCode": "0xF", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Snoops", - "EventCode": "0xF", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Total IRP occupancy of inbound read and write= requests.", - "EventCode": "0xF", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", - "PerPkg": "1", - "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests. This is effectively the sum of read occupancy and write occupa= ncy.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "IRP Clocks", - "EventCode": "0x1", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CLFlush", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CRd", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.CRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; DRd", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.DRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIDCAHin5t", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIRdCur", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; WbMtoI", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF RF full", - "EventCode": "0x17", - "EventName": "UNC_I_FAF_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", - "EventCode": "0x18", - "EventName": "UNC_I_FAF_INSERTS", - "PerPkg": "1", - "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Occupancy of the IRP FAF queue.", - "EventCode": "0x19", - "EventName": "UNC_I_FAF_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF allocation -- sent to ADQ", - "EventCode": "0x16", - "EventName": "UNC_I_FAF_TRANSACTIONS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "All Inserts Inbound (p2p + faf + cset)", - "EventCode": "0x1E", - "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x1E", - "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Requests", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.UNKNOWN", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Lost Forward", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Snoop pulled away ownership before a write w= as committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Invalid", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Valid", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Requests", - "EventCode": "0x14", - "EventName": "UNC_I_P2P_INSERTS", - "PerPkg": "1", - "PublicDescription": "P2P requests from the ITC", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Occupancy", - "EventCode": "0x15", - "EventName": "UNC_I_P2P_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "P2P B & S Queue Occupancy", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P completions", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; match if local only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; match if local and target m= atches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P Message", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P reads", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.RD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; Match if remote only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; match if remote and target = matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P Writes", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.WR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", - "UMask": "0x7e", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", - "UMask": "0x74", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", - "UMask": "0x72", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", - "UMask": "0x78", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", - "UMask": "0x71", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit E or S", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit I", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit M", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Miss", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpCode", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpData", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpInv", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Atomic", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Other", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Read Prefetches", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.RD_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Reads", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.READS", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Writes", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Egress Allocations", - "EventCode": "0xB", - "EventName": "UNC_I_TxC_AK_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Cycles Full", - "EventCode": "0x5", - "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Inserts", - "EventCode": "0x2", - "EventName": "UNC_I_TxC_BL_DRS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Occupancy", - "EventCode": "0x8", - "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Cycles Full", - "EventCode": "0x6", - "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Inserts", - "EventCode": "0x3", - "EventName": "UNC_I_TxC_BL_NCB_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Occupancy", - "EventCode": "0x9", - "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Cycles Full", - "EventCode": "0x7", - "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Inserts", - "EventCode": "0x4", - "EventName": "UNC_I_TxC_BL_NCS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Occupancy", - "EventCode": "0xA", - "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD Egress Credit Stalls", - "EventCode": "0x1A", - "EventName": "UNC_I_TxR2_AD_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x1B", - "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xD", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xE", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0xC", - "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Traffic in which the M2M to iMC Bypass was no= t taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_Egress.NOT_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts traffic in which the M2M (Mesh to Mem= ory) to iMC (Memory Controller) bypass was not taken", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass; Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_Egress.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass; Not Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass; Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles - at UCLK", - "EventName": "UNC_M2M_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xC0", - "EventName": "UNC_M2M_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to core mode (which bypass= es the CHA) was disabled", - "EventCode": "0x24", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "PublicDescription": "Counts cycles when direct to core mode (whic= h bypasses the CHA) was disabled", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages sent direct to core (bypassing the C= HA)", - "EventCode": "0x23", - "EventName": "UNC_M2M_DIRECT2CORE_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts when messages were sent direct to cor= e (bypassing the CHA)", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to core trans= action were overridden", - "EventCode": "0x25", - "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", - "PerPkg": "1", - "PublicDescription": "Counts reads in which direct to core transac= tions (which would have bypassed the CHA) were overridden", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to Intel(R) U= PI transactions were overridden", - "EventCode": "0x28", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", - "PerPkg": "1", - "PublicDescription": "Counts reads in which direct to Intel(R) Ult= ra Path Interconnect (UPI) transactions (which would have bypassed the CHA)= were overridden", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to Intel(R) UPI was disabl= ed", - "EventCode": "0x27", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the ability to send messa= ges direct to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was = disabled", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages sent direct to the Intel(R) UPI", - "EventCode": "0x26", - "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts when messages were sent direct to the= Intel(R) Ultra Path Interconnect (bypassing the CHA)", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads that a message sent direct2 I= ntel(R) UPI was overridden", - "EventCode": "0x29", - "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", - "PerPkg": "1", - "PublicDescription": "Counts when a read message that was sent dir= ect to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was overrid= den", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in A State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in I State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in L State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in S State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in A State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in I State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in L State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in S State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookups (any= state found)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in Any State (A, I, S or unused)", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookups (cac= heline found in A state)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in the A (SnoopAll) state, indicating the cacheline is stored in anothe= r socket in any state, and we must snoop the other sockets to make sure we = get the latest data. The data may be stored in any state in the local sock= et.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in I state)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the I (Invalid) state indicating the cacheline is not stored in ano= ther socket, and so there is no need to snoop the other sockets for the lat= est data. The data may be stored in any state in the local socket.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in S state)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the S (Shared) state indicating the cacheline is either stored in a= nother socket in the S(hared) state , and so there is no need to snoop the = other sockets for the latest data. The data may be stored in any state in = the local socket.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in A State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in I State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in L State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in S State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in A State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in I State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in L State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in S State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = A to I", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to I (Invalid= )", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = A to S", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to S (Shared)= ", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from/= to Any state", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory to a new state", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = I to A", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to A (SnoopAll= )", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = I to S", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to S (Shared)", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = S to A", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to A (SnoopAll)= ", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = S to I", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to I (Invalid)", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", - "EventCode": "0xAE", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", - "EventCode": "0xAE", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "FaST wire asserted; Horizontal", - "EventCode": "0xA5", - "EventName": "UNC_M2M_FAST_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "FaST wire asserted; Vertical", - "EventCode": "0xA5", - "EventName": "UNC_M2M_FAST_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Even", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Even", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Even", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Even", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Even", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Even", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Left", - "EventCode": "0xAD", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Right", - "EventCode": "0xAD", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Reads to iMC issued", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ALL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller).", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC; All, regardless of p= riority.", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.FROM_TRANSGRESS", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC; Critical Priority", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ISOCH", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Reads to iMC issued at Normal Priority (Non-I= sochronous)", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.NORMAL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller). It only counts normal priority non-= isochronous reads.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Read requests to Intel(R) Optane(TM) DC persi= stent memory issued to the iMC from M2M", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.TO_PMM", - "PerPkg": "1", - "PublicDescription": "M2M Reads Issued to iMC; All, regardless of = priority.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Writes to iMC issued", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.ALL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = writes to the iMC (Memory Controller).", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FROM_TRANSGRESS", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; Full Line Non-ISOCH= ", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; ISOCH Full Line", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.NI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Partial Non-Isochronous writes to the iMC", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = partial writes to the iMC (Memory Controller). It only counts normal prior= ity non-isochronous writes.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; ISOCH Partial", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write requests to Intel(R) Optane(TM) DC pers= istent memory issued to the iMC from M2M", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", - "PerPkg": "1", - "PublicDescription": "M2M Writes Issued to iMC; All, regardless of= priority.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches; MC Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches; Mesh Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MESH", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Chan= nel 0", - "EventCode": "0x4F", - "EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Chan= nel 1", - "EventCode": "0x4F", - "EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Chan= nel 2", - "EventCode": "0x4F", - "EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 0", - "EventCode": "0x51", - "EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 1", - "EventCode": "0x51", - "EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 2", - "EventCode": "0x51", - "EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full", - "EventCode": "0x53", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty", - "EventCode": "0x54", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch requests that got turn into a demand= request", - "EventCode": "0x56", - "EventName": "UNC_M2M_PREFCAM_DEMAND_PROMOTIONS", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) promote= s a outstanding request in the prefetch queue due to a subsequent demand re= ad request that entered the M2M with the same address. Explanatory Side No= te: The Prefetch queue is made of CAM (Content Addressable Memory)", - "Unit": "M2M" - }, - { - "BriefDescription": "Inserts into the Memory Controller Prefetch Q= ueue", - "EventCode": "0x57", - "EventName": "UNC_M2M_PREFCAM_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) receive= s a prefetch request and inserts it into its outstanding prefetch queue. E= xplanatory Side Note: the prefect queue is made from CAM: Content Addressab= le Memory", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy", - "EventCode": "0x55", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AD", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AK", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; BL", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; IV", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; AD", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xA4", - "EventName": "UNC_M2M_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", - "Deprecated": "1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", - "Deprecated": "1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", - "Deprecated": "1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 0", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 1", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 2", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 0", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 2", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Full", - "EventCode": "0x4", - "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Not Empty", - "EventCode": "0x3", - "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Queue Inserts", - "EventCode": "0x1", - "EventName": "UNC_M2M_RxC_AD_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts when the a new entry is Received(RxC)= and then added to the AD (Address Ring) Ingress Queue from the CMS (Common= Mesh Stop). This is generally used for reads, and", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy", - "EventCode": "0x2", - "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Full", - "EventCode": "0x8", - "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Not Empty", - "EventCode": "0x7", - "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Allocations", - "EventCode": "0x5", - "EventName": "UNC_M2M_RxC_BL_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Occupancy", - "EventCode": "0x6", - "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AK - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; IV - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Clean line read hits(Regular and RFO) to Near= Memory(DRAM cache) in Memory Mode and regular reads to DRAM in 1LM", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN", - "PerPkg": "1", - "PublicDescription": "Tag Hit; Read Hit from NearMem, Clean Line", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Dirty line read hits(Regular and RFO) to Near= Memory(DRAM cache) in Memory Mode", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY", - "PerPkg": "1", - "PublicDescription": "Tag Hit; Read Hit from NearMem, Dirty Line", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Clean line underfill read hits to Near Memory= (DRAM cache) in Memory Mode", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN", - "PerPkg": "1", - "PublicDescription": "Tag Hit; Underfill Rd Hit from NearMem, Clea= n Line", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Dirty line underfill read hits to Near Memory= (DRAM cache) in Memory Mode", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY", - "PerPkg": "1", - "PublicDescription": "Tag Hit; Underfill Rd Hit from NearMem, Dirt= y Line", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Number AD Ingress Credits", - "EventCode": "0x41", - "EventName": "UNC_M2M_TGR_AD_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number BL Ingress Credits", - "EventCode": "0x42", - "EventName": "UNC_M2M_TGR_BL_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full; Channel 0", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full; Channel 1", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full; Channel 2", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty; Channel 0", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty; Channel 1", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty; Channel 2", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts; Channel 0", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts; Channel 1", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts; Channel 2", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy; Channel 0", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy; Channel 1", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy; Channel 2", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Pending Occupancy", - "EventCode": "0x48", - "EventName": "UNC_M2M_TRACKER_PENDING_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credit Acquired", - "EventCode": "0xD", - "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credits Occupancy", - "EventCode": "0xE", - "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Full", - "EventCode": "0xC", - "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Not Empty", - "EventCode": "0xB", - "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Allocations", - "EventCode": "0x9", - "EventName": "UNC_M2M_TxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", - "EventCode": "0xF", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", - "EventCode": "0x10", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Occupancy", - "EventCode": "0xA", - "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK; CRD Transac= tions to Cbo", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.CRD_CBO", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK; NDR Transac= tions", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.NDR", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", - "EventCode": "0x1E", - "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", - "EventCode": "0x1E", - "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; All", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - N= ear Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - F= ar Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", - "PerPkg": "1", - "UMask": "0x88", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; All", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Read Credit Req= uest", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Write Compare R= equest", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Write Credit Re= quest", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; All", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Near Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Far Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Prefetch Read= Cam Hit", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Read Credit R= equest", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Write Compare= Request", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Write Credit = Request", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; All", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Read Credit Req= uest", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Write Compare R= equest", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Write Credit Re= quest", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Sideband", - "EventCode": "0x6B", - "EventName": "UNC_M2M_TxC_AK_SIDEBAND.RD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Sideband", - "EventCode": "0x6B", - "EventName": "UNC_M2M_TxC_AK_SIDEBAND.WR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Cache", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Core", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to QPI", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_UPI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", - "EventCode": "0x1A", - "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", - "EventCode": "0x1A", - "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full; All", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - N= ear Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - F= ar Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty; All", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations; All", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Near Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Far Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Occupancy; All", - "EventCode": "0x16", - "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", - "EventCode": "0x16", - "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", - "EventCode": "0x16", - "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; IV", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; IV", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; IV", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.IV", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; IV", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Even", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Even", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Even", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Even", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Even", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Even", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Down", - "EventCode": "0xAC", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Up", - "EventCode": "0xAC", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", - "Deprecated": "1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", - "Deprecated": "1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", - "Deprecated": "1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 0", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 2", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 0", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 1", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 2", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full; Channel 0", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full; Channel 1", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full; Channel 2", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty; Channel 0", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty; Channel 1", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty; Channel 2", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts; Channel 0", - "EventCode": "0x61", - "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts; Channel 1", - "EventCode": "0x61", - "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts; Channel 2", - "EventCode": "0x61", - "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy; Channel 0", - "EventCode": "0x60", - "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy; Channel 1", - "EventCode": "0x60", - "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy; Channel 2", - "EventCode": "0x60", - "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; Requests", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; Snoops", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; VNA Messages", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; Writebacks", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_M3UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the M3 uclk do= main. This could be slightly different than the count in the Ubox because = of enable/freeze delays. However, because the M3 is close to the Ubox, the= y generally should not diverge by more than a handful of cycles.", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xC0", - "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2C Sent", - "EventCode": "0x2B", - "EventName": "UNC_M3UPI_D2C_SENT", - "PerPkg": "1", - "PublicDescription": "Count cases BL sends direct to core", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2U Sent", - "EventCode": "0x2A", - "EventName": "UNC_M3UPI_D2U_SENT", - "PerPkg": "1", - "PublicDescription": "Cases where SMI3 sends D2U command", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", - "EventCode": "0xAE", - "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", - "EventCode": "0xAE", - "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "FaST wire asserted; Horizontal", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_FAST_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "FaST wire asserted; Vertical", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_FAST_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Even", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Even", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Even", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Even", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Even", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Even", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Left", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Right", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO0 and IIO1 share the = same ring destination. (1 VN0 credit only)", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO0_IIO1_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO2", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO3", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO4", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO5", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; All IIO targets for NCS = are in single mask. ORs them together", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; Selected M2p BL NCS cred= its", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AD - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AD - Slot 1", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AD - Slot 2", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AK - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AK - Slot 2", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; BL - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AD", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AK", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; BL", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; IV", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; AD", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; REQ on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; RSP on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; SNP on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; NCB on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; NCS on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; RSP on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; WB on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; REQ on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; RSP on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; SNP on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; NCB on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; NCS on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; RSP on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; WB on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; AD, BL Parallel Win", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN", - "PerPkg": "1", - "PublicDescription": "AD and BL messages won arbitration concurren= tly / in parallel", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn0 messages because slotting stage cannot accept new message", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn1 messages because slotting stage cannot accept new message", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn0 messages because slotting stage cannot accept new message", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn1 messages because slotting stage cannot accept new message", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN0", - "PerPkg": "1", - "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn0, delaying vn1 win, because vn0 offered parallel ad/bl", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN1", - "PerPkg": "1", - "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn1, delaying vn0 win, because vn1 offered parallel ad/bl", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; REQ on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; RSP on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; SNP on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; NCB on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; NCS on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; RSP on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; WB on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; REQ on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; RSP on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; SNP on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; NCB on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; NCS on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; RSP on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; WB on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; REQ on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; RSP on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; SNP on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; NCB on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; NCS on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; RSP on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; WB on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; REQ on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; RSP on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; SNP on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; NCB on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; NCS on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; RSP on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; WB on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on BL Ar= b", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while b= l message is in arbitration", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on Idle", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while p= ipeline is idle", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 1", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 1 while merging with bl = message in same flit", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 2", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 2 while merging with bl = message in same flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; REQ on AD", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; RSP on AD", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; SNP on AD", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; NCB on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; NCS on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; RSP on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; WB on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; REQ on AD", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; RSP on AD", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; SNP on AD", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; NCB on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; NCS on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; RSP on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; WB on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events; Any In BGF FIFO", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO", - "PerPkg": "1", - "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf (fifo only)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events; Any in BGF Path", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH", - "PerPkg": "1", - "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf path (i.e. pipe to fifo)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events; No D2K For Arb", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.NO_D2K_FOR_ARB", - "PerPkg": "1", - "PublicDescription": "VN0 or VN1 BL RSP message was blocked from a= rbitration request due to lack of D2K CMP credits", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; D2K Credits", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD", - "PerPkg": "1", - "PublicDescription": "D2K completion fifo credit occupancy (credit= s in use), accumulated across all cycles", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; Packets in BGF FIFO", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO", - "PerPkg": "1", - "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in fifo", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; Packets in BGF Path", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH", - "PerPkg": "1", - "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in path (i.e. pipe to fifo or fifo)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO", - "PerPkg": "1", - "PublicDescription": "count of bl messages in pump-1-pending state= , in completion fifo only", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL", - "PerPkg": "1", - "PublicDescription": "count of bl messages in pump-1-pending state= , in marker table and in fifo", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; Transmit Credits", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD", - "PerPkg": "1", - "PublicDescription": "Link layer transmit queue credit occupancy (= credits in use), accumulated across all cycles", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; VNA In Use", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE", - "PerPkg": "1", - "PublicDescription": "Remote UPI VNA credit occupancy (number of c= redits in use), accumulated across all cycles", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent; All", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent; No BGF Credits", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_BGF", - "PerPkg": "1", - "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent; No TxQ Credits", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_TXQ", - "PerPkg": "1", - "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 0", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT", - "PerPkg": "1", - "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 0", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT", - "PerPkg": "1", - "PublicDescription": "pump-1-pending logic is at capacity (pending= table plus completion fifo at limit)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY", - "PerPkg": "1", - "PublicDescription": "pump-1-pending logic is tracking at least on= e message", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL", - "PerPkg": "1", - "PublicDescription": "pump-1-pending completion fifo is full", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0", - "PerPkg": "1", - "PublicDescription": "pump-1-pending logic is at or near capacity,= such that pump-0-only bl messages are getting stalled in slotting stage", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO", - "PerPkg": "1", - "PublicDescription": "a bl message finished but is in limbo and mo= ved to pump-1-pending logic", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 1", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT", - "PerPkg": "1", - "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_FLITS_MISC", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; One Message", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG", - "PerPkg": "1", - "PublicDescription": "One message in flit; VNA or non-VNA flit", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; One Message in non-VNA", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG_VNX", - "PerPkg": "1", - "PublicDescription": "One message in flit; non-VNA flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; Two Messages", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.2_MSGS", - "PerPkg": "1", - "PublicDescription": "Two messages in flit; VNA flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; Three Messages", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.3_MSGS", - "PerPkg": "1", - "PublicDescription": "Three messages in flit; VNA flit", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_2", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_3", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; All", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Needs D= ata Flit", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA", - "PerPkg": "1", - "PublicDescription": "BL message requires data flit sequence", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 0", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT", - "PerPkg": "1", - "PublicDescription": "Waiting for header pump 0", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ", - "PerPkg": "1", - "PublicDescription": "Header pump 1 is not required for flit", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Bubble", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE", - "PerPkg": "1", - "PublicDescription": "Header pump 1 is not required for flit but f= lit transmission delayed", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Not Avail", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL", - "PerPkg": "1", - "PublicDescription": "Header pump 1 is not required for flit and n= ot available", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 1", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT", - "PerPkg": "1", - "PublicDescription": "Waiting for header pump 1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Accumulate", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting control state machine is in any accumulate state= ; multi-message flit may be assembled over multiple cycles", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Accumulate Ready", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; header flit slotting control state machine is in accum_ready state; f= lit is ready to send but transmission is blocked; more messages may be slot= ted into flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Accumulate Wasted", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Flit is being assembled over multiple cycles, but no additional messa= ge is being slotted into flit in current cycle; accumulate cycle is wasted", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Blocked", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting entered run-ahead state; new header flit is star= ted while transmission of prior, fully assembled flit is blocked", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Message", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting is in run-ahead to start new flit, and message i= s actually slotted into new flit", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Parallel Ok", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; New header flit construction may proceed in parallel with data flit s= equence", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Parallel Flit Finished", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_FLIT", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit finished assembly in parallel with data flit sequence", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Parallel Message", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_MSG", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Message is slotted into header flit in parallel with data flit sequen= ce", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate-matching stall injected", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall - No= Message", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate matching stall injected, but no additional message slotted durin= g stall cycle", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; All", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No BGF Credits", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_CRD", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No BGF Credits + No Extra Me= ssage Slotted", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_NO_MSG", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available; no additional message slotted in= to flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No TxQ Credits", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_CRD", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No TxQ Credits + No Extra Me= ssage Slotted", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_NO_MSG", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available; no additional message slotted in= to flit", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; Sent - One Slot Taken", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ONE_TAKEN", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only one slot taken (two slots fr= ee)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; Sent - Three Slots Taken", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.THREE_TAKEN", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with three slots taken (no slots free)= ", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; Sent - Two Slots Taken", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.TWO_TAKEN", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only two slots taken (one slots f= ree)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Can't Slot AD", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD", - "PerPkg": "1", - "PublicDescription": "some AD message could not be slotted (logica= l OR of all AD events under INGR_SLOT_CANT_MC_VN{0,1})", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Can't Slot BL", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL", - "PerPkg": "1", - "PublicDescription": "some BL message could not be slotted (logica= l OR of all BL events under INGR_SLOT_CANT_MC_VN{0,1})", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel AD Lost", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_AD_LOST", - "PerPkg": "1", - "PublicDescription": "some AD message lost contest for slot 0 (log= ical OR of all AD events under INGR_SLOT_LOST_MC_VN{0,1})", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel Attempt", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT", - "PerPkg": "1", - "PublicDescription": "ad and bl messages attempted to slot into th= e same flit in parallel", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel BL Lost", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_BL_LOST", - "PerPkg": "1", - "PublicDescription": "some BL message lost contest for slot 0 (log= ical OR of all BL events under INGR_SLOT_LOST_MC_VN{0,1})", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel Success", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS", - "PerPkg": "1", - "PublicDescription": "ad and bl messages were actually slotted int= o the same flit in paralle", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; VN0", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.VN0", - "PerPkg": "1", - "PublicDescription": "vn0 message(s) that couldn't be slotted into= last vn0 flit are held in slotting stage while processing vn1 flit", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; VN1", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.VN1", - "PerPkg": "1", - "PublicDescription": "vn1 message(s) that couldn't be slotted into= last vn1 flit are held in slotting stage while processing vn0 flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; REQ o= n AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Home (REQ) = messages on AD. REQ is generally used to send requests, request responses,= and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on AD. RSP packets are used to transmit a variety of protocol= flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; SNP o= n AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Snoops (SNP= ) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCB o= n BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Broadcast (NCB) messages on BL. NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCS o= n BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on BL. RSP packets are used to transmit a variety of protocol = flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; WB on= BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Data Respon= se (WB) messages on BL. WB is generally used to transmit data with coheren= cy. For example, remote reads and writes, or cache to cache transfers will= transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; REQ o= n AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; SNP o= n AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCB o= n BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCS o= n BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; WB on= BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; REQ= on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; SNP= on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCB= on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCS= on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; WB = on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; REQ= on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; SNP= on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCB= on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCS= on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; WB = on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; REQ on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; RSP on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; SNP on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; NCB on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; NCS on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; RSP on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; WB on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; REQ on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; RSP on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; SNP on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; NCB on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; NCS on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; RSP on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; WB on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Lost Arbitration", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARB_LOST", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Arrived", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARRIVED", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Dropped - Old", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_OLD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Dropped - Wrap", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_WRAP", - "PerPkg": "1", - "PublicDescription": "Dropped because it was overwritten by new me= ssage while prefetch queue was full", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Slotted", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.SLOTTED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Any In Use", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE", - "PerPkg": "1", - "PublicDescription": "At least one remote vna credit is in use", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Corrected", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED", - "PerPkg": "1", - "PublicDescription": "Number of remote vna credits corrected (loca= l return) per cycle", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Level < 1", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1", - "PerPkg": "1", - "PublicDescription": "Remote vna credit level is less than 1 (i.e.= no vna credits available)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Level < 4", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4", - "PerPkg": "1", - "PublicDescription": "Remote vna credit level is less than 4; bl (= or ad requiring 4 vna) cannot arb on vna", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Level < 5", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5", - "PerPkg": "1", - "PublicDescription": "Remote vna credit level is less than 5; para= llel ad/bl arb on vna not possible", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Used", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.USED", - "PerPkg": "1", - "PublicDescription": "Number of remote vna credits consumed per cy= cle", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AK - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; IV - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 REQ Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 RSP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 SNP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 WB Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 REQ Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 RSP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 SNP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 WB Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 REQ Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 RSP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 SNP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 WB Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 REQ Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 RSP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 SNP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 WB Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 REQ Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 RSP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 SNP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 WB Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN1 REQ Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN1 RSP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN1 SNP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 REQ Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 RSP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_RSP", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 SNP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_SNP", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 WB Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_WB", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN1 REQ Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_REQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN1 RSP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_RSP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN1 SNP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_SNP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; CHA on VN0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_CHA", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to CHA", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_NON_IDLE", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn0 Snpf", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI0", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI0", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI1", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; CHA on VN1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_CHA", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to CHA", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_NON_IDLE", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn1 Snpf", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI0", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI0", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI1", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_NONSNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn0", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_VN2SNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n0 SnpF issued when SnpF pending on Vn1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_NONSNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_VN0SNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n1 SnpF issued when SnpF pending on Vn0", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 REQ Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 SNP Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 WB Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 REQ Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 SNP Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 WB Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN0 RE= Q Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN0 SN= P Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN0 WB= Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN1 RE= Q Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN1 SN= P Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN1 WB= Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 REQ = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 RSP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 SNP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 WB M= essages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 REQ = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 RSP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 SNP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 WB M= essages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AK Flow Q Inserts", - "EventCode": "0x2F", - "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AK Flow Q Occupancy", - "EventCode": "0x1E", - "EventName": "UNC_M3UPI_TxC_AK_FLQ_OCCUPANCY", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 NCB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 NCS Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 RSP Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 WB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 NCS Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 NCB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 RSP Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 WB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 REQ Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 RSP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 SNP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 WB Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 REQ Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 RSP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 SNP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 WB Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 RSP Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 WB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 NCS Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 NCB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1 RSP Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1 WB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1_NCB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1_NCS Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 NCB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 NCS Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 RSP Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_RSP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 WB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_WB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1_NCS Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1_NCB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1 RSP Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_RSP", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1 WB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_WB", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN0 NC= S Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN1 WB= Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN1 NC= B Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN1 RS= P Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCS Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 RSP Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 WB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCS Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 RSP Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 WB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; IV", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; IV", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; IV", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.IV", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; IV", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN0 REQ Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN0 RSP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN0 SNP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN1 REQ Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN1 RSP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN1 SNP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VNA", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN0 RSP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN0 REQ Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN0 SNP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN1 RSP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN1 REQ Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN1 SNP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VNA", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Prefetches generated by the flow control queu= e of the M3UPI unit.", - "EventCode": "0x29", - "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", - "PerPkg": "1", - "PublicDescription": "Count cases where flow control queue that si= ts between the Intel(R) Ultra Path Interconnect (UPI) and the mesh spawns a= prefetch to the iMC (Memory Controller)", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Even", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Even", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Even", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Even", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Even", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Even", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Down", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Up", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; WB on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Data Response (WB) messages on BL. WB is generally used to tran= smit data with coherency. For example, remote reads and writes, or cache t= o cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCB on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally u= sed to transmit data without coherency. For example, non-coherent read dat= a returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; REQ on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Home (REQ) messages on AD. REQ is generally used to send reques= ts, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; RSP on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on AD. RSP packets are used to transmit= a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; SNP on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; RSP on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on BL. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; WB on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; NCB on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; REQ on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; RSP on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; SNP on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; RSP on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; WB on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Data Response (WB) messages on BL. WB is generally used to trans= mit data with coherency. For example, remote reads and writes, or cache to= cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCB on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally us= ed to transmit data without coherency. For example, non-coherent read data= returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; REQ on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Home (REQ) messages on AD. REQ is generally used to send request= s, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; RSP on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on AD. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; SNP on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; RSP on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on BL. RSP packets are used to transmit a= variety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; WB on BL", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; NCB on BL", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; REQ on AD", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; RSP on AD", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; SNP on AD", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; RSP on BL", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_TxC_BL.DRS_UPI", - "Deprecated": "1", - "EventCode": "0x40", - "EventName": "UNC_NoUnit_TxC_BL.DRS_UPI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Clocks of the Intel(R) Ultra Path Interconnec= t (UPI)", - "EventCode": "0x1", - "EventName": "UNC_UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts clockticks of the fixed frequency clo= ck controlling the Intel(R) Ultra Path Interconnect (UPI). This clock runs= at1/8th the 'GT/s' speed of the UPI link. For example, a 9.6GT/s link w= ill have a fixed Frequency of 1.2 Ghz.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Data Response packets that go direct to core", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", - "PerPkg": "1", - "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to core bypassing the CHA.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_DIRECT_ATTEMPTS.D2U", - "Deprecated": "1", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Data Response packets that go direct to Intel= (R) UPI", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2U", - "PerPkg": "1", - "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to Intel(R) Ultra Path Interconnect (UPI) bypassing the = CHA .", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles Intel(R) UPI is in L1 power mode (shut= down)", - "EventCode": "0x21", - "EventName": "UNC_UPI_L1_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the Intel(R) Ultra Path I= nterconnect (UPI) is in L1 power mode. L1 is a mode that totally shuts dow= n the UPI link. Link power states are per link and per direction, so for e= xample the Tx direction could be in one state while Rx was in another, this= event only coutns when both links are shutdown.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED", - "EventCode": "0x16", - "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THR= ESH", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THR= ESH", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1", - "EventCode": "0x20", - "EventName": "UNC_UPI_PHY_INIT_CYCLES", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "L1 Req Nack", - "EventCode": "0x23", - "EventName": "UNC_UPI_POWER_L1_NACK", - "PerPkg": "1", - "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqNAck. When the UPI links would like to change power state, t= he Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wi= th an Ack, the power mode will change. If it replies with NAck, no change = will take place. This can be filtered based on Rx and Tx. An Rx LinkReqNA= ck refers to receiving an NAck (meaning this agent's Tx originally requeste= d the power change). A Tx LinkReqNAck refers to sending this command (mean= ing the peer agent's Tx originally requested the power change and this agen= t accepted it).", - "Unit": "UPI LL" - }, - { - "BriefDescription": "L1 Req (same as L1 Ack).", - "EventCode": "0x22", - "EventName": "UNC_UPI_POWER_L1_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqAck. When the UPI links would like to change power state, th= e Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wit= h an Ack, the power mode will change. If it replies with NAck, no change w= ill take place. This can be filtered based on Rx and Tx. An Rx LinkReqAck= refers to receiving an Ack (meaning this agent's Tx originally requested t= he power change). A Tx LinkReqAck refers to sending this command (meaning = the peer agent's Tx originally requested the power change and this agent ac= cepted it).", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles the Rx of the Intel(R) UPI is in L0p p= ower mode", - "EventCode": "0x25", - "EventName": "UNC_UPI_RxL0P_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the receive side (Rx) of = the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a mo= de where we disable 60% of the UPI lanes, decreasing our bandwidth in order= to save power.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0. Receive side.", - "EventCode": "0x24", - "EventName": "UNC_UPI_RxL0_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", - "PerPkg": "1", - "PublicDescription": "REQ Message Class", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t Opcode", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC", - "PerPkg": "1", - "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", - "UMask": "0x108", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Conflict", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT", - "PerPkg": "1", - "UMask": "0x1aa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Invalid", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI", - "PerPkg": "1", - "UMask": "0x12a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10c", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0x10a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Snoop", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", - "PerPkg": "1", - "PublicDescription": "SNP Message Class", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Snoop = Opcode", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC", - "PerPkg": "1", - "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", - "UMask": "0x109", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10d", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot0 RxQ buffer (Receive Queue) and passed directly to t= he Egress. This is a latency optimization, and should generally be the com= mon case. If this value is less than the number of FLITs transferred, it i= mplies that there was queueing getting onto the ring, and thus the transact= ions saw higher latency.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot1 RxQ buffer (Receive Queue) and passed directly acr= oss the BGF and into the Egress. This is a latency optimization, and shoul= d generally be the common case. If this value is less than the number of F= LITs transferred, it implies that there was queueing getting onto the ring,= and thus the transactions saw higher latency.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot2 RxQ buffer (Receive Queue) and passed directly to = the Egress. This is a latency optimization, and should generally be the co= mmon case. If this value is less than the number of FLITs transferred, it = implies that there was queueing getting onto the ring, and thus the transac= tions saw higher latency.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VN0 Credit Consumed", - "EventCode": "0x39", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VN1 Credit Consumed", - "EventCode": "0x3A", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VNA Credit Consumed", - "EventCode": "0x38", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid data FLITs received from any slot", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Counts valid data FLITs (80 bit FLow contro= l unITs: 64bits of data) received from any of the 3 Intel(R) Ultra Path Int= erconnect (UPI) Receive Queue slots on this UPI unit.", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Null FLITs received from any slot", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", - "PerPkg": "1", - "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) received from any of the 3 Intel(R) Ultra Path Interconnect (UPI) Receive= Queue slots on this UPI unit.", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Data", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Idle", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; LLCRD Not Empty", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; LLCTRL", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Protocol header and credit FLITs received fro= m any slot", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Counts protocol header and credit FLITs (80= bit FLow control unITs) received from any of the 3 UPI slots on this UPI u= nit.", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.ALL_NULL", - "Deprecated": "1", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.NULL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Protocol Header", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.PROTHDR", - "Deprecated": "1", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.PROT_HDR", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Slot 0", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Slot 1", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Slot 2", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.NCB", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.NCS", - "PerPkg": "1", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.REQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.RSP", - "PerPkg": "1", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.SNP", - "PerPkg": "1", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.WB", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.WB", - "PerPkg": "1", - "UMask": "0xb", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations; Slot 0", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations; Slot 1", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations; Slot 2", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets; Slot 0", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets; Slot 1", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets; Slot 2", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in which the Tx of the Intel(R) Ultra = Path Interconnect (UPI) is in L0p power mode", - "EventCode": "0x27", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the transmit side (Tx) of= the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a m= ode where we disable 60% of the UPI lanes, decreasing our bandwidth in orde= r to save power.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", - "EventCode": "0x28", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", - "EventCode": "0x29", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0. Transmit side.", - "EventCode": "0x26", - "EventName": "UNC_UPI_TxL0_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", - "PerPkg": "1", - "PublicDescription": "REQ Message Class", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st Opcode", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC", - "PerPkg": "1", - "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", - "UMask": "0x108", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Conflict", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT", - "PerPkg": "1", - "UMask": "0x1aa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Invalid", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI", - "PerPkg": "1", - "UMask": "0x12a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10c", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0x10a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= ", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", - "PerPkg": "1", - "PublicDescription": "SNP Message Class", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= Opcode", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC", - "PerPkg": "1", - "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", - "UMask": "0x109", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10d", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs that bypassed the TxL Buffer", - "EventCode": "0x41", - "EventName": "UNC_UPI_TxL_BYPASSED", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the TxL(transmit) FLIT buffer and pass directly out the UPI L= ink. Generally, when data is transmitted across the Intel(R) Ultra Path Int= erconnect (UPI), it will bypass the TxQ and pass directly to the link. How= ever, the TxQ will be used in L0p (Low Power) mode and (Link Layer Retry) L= LR mode, increasing latency to transfer out to the link.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid data FLITs transmitted via any slot", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Null FLITs transmitted from any slot", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", - "PerPkg": "1", - "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) transmitted via any of the 3 Intel(R) Ulra Path Interconnect (UPI) slots = on this UPI unit.", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Data", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Idle FLITs transmitted", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Counts when the Intel Ultra Path Interconnec= t(UPI) transmits an idle FLIT(80 bit FLow control unITs). Every UPI cycle = must be sending either data FLITs, protocol/credit FLITs or idle FLITs.", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; LLCRD Not Empty", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; LLCTRL", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Protocol header and credit FLITs transmitted = across any slot", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Counts protocol header and credit FLITs (80 = bit FLow control unITs) transmitted across any of the 3 UPI (Ultra Path Int= erconnect) slots on this UPI unit.", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.ALL_NULL", - "Deprecated": "1", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.NULL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Protocol Header", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.PROTHDR", - "Deprecated": "1", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.PROT_HDR", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Slot 0", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Slot 1", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Slot 2", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.DATA_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.DUAL_SLOT_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.LOC", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.NCB", - "PerPkg": "1", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.NCS", - "PerPkg": "1", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.NON_DATA_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.REM", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.REQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.SGL_SLOT_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.SNP", - "PerPkg": "1", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.WB", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.WB", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Allocations", - "EventCode": "0x40", - "EventName": "UNC_UPI_TxL_INSERTS", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Tx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Occupancy", - "EventCode": "0x42", - "EventName": "UNC_UPI_TxL_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across UPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", - "EventCode": "0x45", - "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VNA Credits Pending Return - Occupancy", - "EventCode": "0x44", - "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", - "EventCode": "0xff", - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.INT_PRIO", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received; IPI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Inter Processor Interrupts", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received; MSI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Message Signaled Interrupts - interrupts sent by devi= ces (including PCIe via IOxAPIC) (Socket Mode only)", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received; VLW", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "IDI Lock/SplitLock Cycles", - "EventCode": "0x44", - "EventName": "UNC_U_LOCK_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDRAND", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDSEED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "Number outstanding register requests within = message channel tracker", - "Unit": "UBOX" - }, - { - "BriefDescription": "UPI interconnect send bandwidth for payload. = Derived from unc_upi_txl_flits.all_data", - "EventCode": "0x2", - "EventName": "UPI_DATA_BANDWIDTH_TX", - "PerPkg": "1", - "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", - "ScaleUnit": "7.11E-06Bytes", - "UMask": "0xf", - "Unit": "UPI LL" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39876C77B6E for ; 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Thu, 13 Apr 2023 06:31:15 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:37 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-10-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 09/21] perf vendor events intel: Fix uncore topics for haswell From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move events from 'uncore-other' topic classification to cache and interconnect. Signed-off-by: Ian Rogers --- .../arch/x86/haswell/uncore-cache.json | 50 +++++++++--------- .../arch/x86/haswell/uncore-interconnect.json | 52 +++++++++++++++++++ .../arch/x86/haswell/uncore-other.json | 50 ------------------ 3 files changed, 77 insertions(+), 75 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/haswell/uncore-interconn= ect.json diff --git a/tools/perf/pmu-events/arch/x86/haswell/uncore-cache.json b/too= ls/perf/pmu-events/arch/x86/haswell/uncore-cache.json index c538557ba4c0..be9a3ed1a940 100644 --- a/tools/perf/pmu-events/arch/x86/haswell/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/haswell/uncore-cache.json @@ -5,7 +5,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_ES", "PerPkg": "1", "UMask": "0x86", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in I-state.", @@ -13,7 +13,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_I", "PerPkg": "1", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in M-state.", @@ -21,7 +21,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_M", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in MESI-state.", @@ -29,7 +29,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_MESI", "PerPkg": "1", "UMask": "0x8f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in E or S-state.", @@ -37,7 +37,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_ES", "PerPkg": "1", "UMask": "0x46", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in I-state.", @@ -45,7 +45,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_I", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in M-state.", @@ -53,7 +53,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_M", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in MESI-state.", @@ -61,7 +61,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_MESI", "PerPkg": "1", "UMask": "0x4f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in E or S-state.", @@ -69,7 +69,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_ES", "PerPkg": "1", "UMask": "0x16", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in I-state.", @@ -77,7 +77,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_I", "PerPkg": "1", "UMask": "0x18", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in M-state.", @@ -85,7 +85,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_M", "PerPkg": "1", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in any MESI-state.", @@ -93,7 +93,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_MESI", "PerPkg": "1", "UMask": "0x1f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in E or S-state.", @@ -101,7 +101,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_ES", "PerPkg": "1", "UMask": "0x26", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in I-state.", @@ -109,7 +109,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_I", "PerPkg": "1", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in M-state.", @@ -117,7 +117,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_M", "PerPkg": "1", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in MESI-state.", @@ -125,7 +125,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_MESI", "PerPkg": "1", "UMask": "0x2f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which hits a modified line in some processor core.", @@ -133,7 +133,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EVICTION", "PerPkg": "1", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop hits a modified line in som= e processor core.", @@ -141,7 +141,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EXTERNAL", "PerPkg": "1", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a modified line in some proces= sor core.", @@ -149,7 +149,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which hits a non-modified line in some processor core.", @@ -157,7 +157,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EVICTION", "PerPkg": "1", "UMask": "0x84", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop hits a non-modified line in= some processor core.", @@ -165,7 +165,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EXTERNAL", "PerPkg": "1", "UMask": "0x24", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a non-modified line in some pr= ocessor core.", @@ -173,7 +173,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE", "PerPkg": "1", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which misses in some processor core.", @@ -181,7 +181,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EVICTION", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop misses in some processor co= re.", @@ -189,7 +189,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EXTERNAL", "PerPkg": "1", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which misses in some processor core.", @@ -197,6 +197,6 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/haswell/uncore-interconnect.jso= n b/tools/perf/pmu-events/arch/x86/haswell/uncore-interconnect.json new file mode 100644 index 000000000000..8da28239ebf9 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/haswell/uncore-interconnect.json @@ -0,0 +1,52 @@ +[ + { + "BriefDescription": "Each cycle count number of valid entries in C= oherency Tracker queue from allocation till deallocation. Aperture requests= (snoops) appear as NC decoded internally and become coherent (snoop L3, ac= cess memory)", + "EventCode": "0x83", + "EventName": "UNC_ARB_COH_TRK_OCCUPANCY.All", + "PerPkg": "1", + "PublicDescription": "Each cycle count number of valid entries in = Coherency Tracker queue from allocation till deallocation. Aperture request= s (snoops) appear as NC decoded internally and become coherent (snoop L3, a= ccess memory).", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, Core aperture, etc.", + "EventCode": "0x84", + "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of all Core outgoing= valid entries. Such entry is defined as valid from its allocation till fir= st of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-cohe= rent traffic.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Cycles with at least one request outstanding = is waiting for data return from memory controller. Account for coherent and= non-coherent requests initiated by IA Cores, Processor Graphics Unit, or L= LC.", + "CounterMask": "1", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Total number of Core outgoing entries allocat= ed. Accounts for Coherent and non-coherent traffic.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of Writes allocated - any write transa= ctions: full/partials writes and evictions.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "ARB" + } +] diff --git a/tools/perf/pmu-events/arch/x86/haswell/uncore-other.json b/too= ls/perf/pmu-events/arch/x86/haswell/uncore-other.json index 84cc2536de69..2af92e43b28a 100644 --- a/tools/perf/pmu-events/arch/x86/haswell/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/haswell/uncore-other.json @@ -1,54 +1,4 @@ [ - { - "BriefDescription": "Each cycle count number of valid entries in C= oherency Tracker queue from allocation till deallocation. Aperture requests= (snoops) appear as NC decoded internally and become coherent (snoop L3, ac= cess memory)", - "EventCode": "0x83", - "EventName": "UNC_ARB_COH_TRK_OCCUPANCY.All", - "PerPkg": "1", - "PublicDescription": "Each cycle count number of valid entries in = Coherency Tracker queue from allocation till deallocation. Aperture request= s (snoops) appear as NC decoded internally and become coherent (snoop L3, a= ccess memory).", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, Core aperture, etc.", - "EventCode": "0x84", - "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of all Core outgoing= valid entries. Such entry is defined as valid from its allocation till fir= st of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-cohe= rent traffic.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Cycles with at least one request outstanding = is waiting for data return from memory controller. Account for coherent and= non-coherent requests initiated by IA Cores, Processor Graphics Unit, or L= LC.", - "CounterMask": "1", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Total number of Core outgoing entries allocat= ed. Accounts for Coherent and non-coherent traffic.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of Writes allocated - any write transa= ctions: full/partials writes and evictions.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "ARB" - }, { "BriefDescription": "This 48-bit fixed counter counts the UCLK cyc= les.", "EventCode": "0xff", --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30731C77B6E for ; Thu, 13 Apr 2023 13:32:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231563AbjDMNcc (ORCPT ); Thu, 13 Apr 2023 09:32:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231421AbjDMNcD (ORCPT ); Thu, 13 Apr 2023 09:32:03 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4595BBB83 for ; Thu, 13 Apr 2023 06:31:25 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 186-20020a2510c3000000b00b880000325bso32111924ybq.3 for ; Thu, 13 Apr 2023 06:31:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392683; x=1683984683; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=2B/JSpPekMzrfLl6ZUHW1X61H+TLYVU25aC5zOYPEV8=; b=0Lm9ZsWUgjDB3hcIj8ZFduHk7Wl+HyamjlNA8XLTw6wc6IGjmNQl902n9DJKSVUJQG +iWQeoUXIdRNXykG2zwdDgFs8c54nRkTen6lxzrPcsRjYJLCGvzzv9goJAoXxY+GhFhg +V7XLao9s1sEW5XuaxjCgrXAieVLEDKyXl/npBZIX1WGLWsIQL4sXe+S8xnKnzn7UyKb /Au4sGuDKzZinZGT7H/Smq27cMM6JITB8eU8gK+GDX7fDeMARj4b7rxnTsADgnyUce3e PDzLb8v025S6jcpfiHaz12ttGnOoPy3JnW3JdZgAoPmLCGX0g8/YTiVTUnefm9PZzYKi L9YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392683; x=1683984683; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=2B/JSpPekMzrfLl6ZUHW1X61H+TLYVU25aC5zOYPEV8=; b=exGYvPd/nCNpD5XcYt1lYdU/4T3eJmINA2es3r6zhOWQE3MgTzauJhAmaIFtknqh/+ uAI0dDvjGECfQ41aspgyPqqjZozLJmJjoS8OFmmow8ctDZDUFQ6rbENrhyEYat7hEI08 VCsl8o76uWC69gzsszo66PcTPuqmV8weva+74ktd/YqlGdpwXLePBpFKK/lhdDq49Zn+ GqCEi+htydfRjdJwbVf0Z3psvqI4RqIgO1SXT0Wb7WQsIwmf20GXHNLoRdm/CZ+nHjiq k8Lycw7irUAxen1Ng3xpl/zJukFHB6dwudlRbMp1EF2iXerHN7EFVr8sJgXLTBt5YyRd T5SQ== X-Gm-Message-State: AAQBX9eMXbjun9oB4OtXbhoL2/XwzO28HJZrc4mkwB2LaDI+UODzkU2K EwfPxvY9fZYMMnwX8rTdiVBWuQ90M4Wo X-Google-Smtp-Source: AKy350azzVdIIZkuGhYGHevPfjUR7ygqxANWfXNx9G0kkltTq1nU4EWg/iImUbXH5ZvH773TKiLY4vLkjoLm X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a05:690c:b85:b0:54f:6aa5:7c4f with SMTP id ck5-20020a05690c0b8500b0054f6aa57c4fmr4816929ywb.3.1681392683468; Thu, 13 Apr 2023 06:31:23 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:38 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-11-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 10/21] perf vendor events intel: Fix uncore topics for haswellx From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/haswellx/uncore-cache.json | 360 +- .../x86/haswellx/uncore-interconnect.json | 4242 +++++++++++++---- .../arch/x86/haswellx/uncore-io.json | 528 ++ .../arch/x86/haswellx/uncore-other.json | 3160 ------------ 4 files changed, 4145 insertions(+), 4145 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/haswellx/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/haswellx/uncore-other.js= on diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json b/to= ols/perf/pmu-events/arch/x86/haswellx/uncore-cache.json index e969dc71bea1..9227cc226002 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json @@ -8,7 +8,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC prefetch misses for data reads. Derived f= rom unc_c_tor_inserts.miss_opcode", @@ -19,7 +19,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC misses - demand and prefetch data reads -= excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode", @@ -30,7 +30,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "MMIO reads. Derived from unc_c_tor_inserts.mi= ss_opcode", @@ -41,7 +41,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "MMIO writes. Derived from unc_c_tor_inserts.m= iss_opcode", @@ -52,7 +52,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe write misses (full cache line). Derived = from unc_c_tor_inserts.miss_opcode", @@ -63,7 +63,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC misses for PCIe read current. Derived fro= m unc_c_tor_inserts.miss_opcode", @@ -74,7 +74,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ItoM write misses (as part of fast string mem= cpy stores) + PCIe full line writes. Derived from unc_c_tor_inserts.miss_op= code", @@ -85,7 +85,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC prefetch misses for RFO. Derived from unc= _c_tor_inserts.miss_opcode", @@ -96,7 +96,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_c_tor_inserts.miss_opcode", @@ -107,7 +107,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "ScaleUnit": "64Bytes", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L2 demand and L2 prefetch code references to = LLC. Derived from unc_c_tor_inserts.opcode", @@ -118,7 +118,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe writes (partial cache line). Derived fro= m unc_c_tor_inserts.opcode", @@ -128,7 +128,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe read current. Derived from unc_c_tor_ins= erts.opcode", @@ -139,7 +139,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "PCIe write references (full cache line). Deri= ved from unc_c_tor_inserts.opcode", @@ -150,7 +150,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_c_tor_inserts.opcode", @@ -161,7 +161,7 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_c_tor_inserts.opcode", @@ -172,20 +172,20 @@ "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Bounce Control", "EventCode": "0xA", "EventName": "UNC_C_BOUNCE_CONTROL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Uncore Clocks", "EventName": "UNC_C_CLOCKTICKS", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Counter 0 Occupancy", @@ -193,7 +193,7 @@ "EventName": "UNC_C_COUNTER0_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "FaST wire asserted", @@ -201,7 +201,7 @@ "EventName": "UNC_C_FAST_ASSERTED", "PerPkg": "1", "PublicDescription": "Counts the number of cycles either the local= distress or incoming distress signals are asserted. Incoming distress inc= ludes both up and dn.", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "All LLC Misses (code+ data rd + data wr - inc= luding demand and prefetch)", @@ -212,7 +212,7 @@ "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Filters for any transaction originati= ng from the IPQ or IRQ. This does not include lookups originating from the= ISMQ.", "ScaleUnit": "64Bytes", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Data Read Request", @@ -221,7 +221,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Read transactions", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Lookups that Match NID", @@ -230,7 +230,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Qualify one of the other subevents by= the Target NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER.nid. In= conjunction with STATE =3D I, it is possible to monitor misses to specific= NIDs in the system.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Any Read Request", @@ -239,7 +239,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Read transactions", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; External Snoop Request", @@ -248,7 +248,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Filters for only snoop requests comin= g from the remote socket(s) through the IPQ.", "UMask": "0x9", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Write Requests", @@ -257,7 +257,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:1= 8] bits correspond to [FMESI] state.; Writeback transactions from L2 to the= LLC This includes all write transactions -- both Cacheable and UC.", "UMask": "0x5", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in E state", @@ -266,7 +266,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -275,7 +275,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in S State", @@ -284,7 +284,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -293,7 +293,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "M line evictions from LLC (writebacks to memo= ry)", @@ -303,7 +303,7 @@ "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "ScaleUnit": "64Bytes", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Victimized Lines that Match= NID", @@ -312,7 +312,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.; Qu= alify one of the other subevents by the Target NID. The NID is programmed = in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it is pos= sible to monitor misses to specific NIDs in the system.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines in S State", @@ -321,7 +321,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; DRd hitting non-M with raw CV=3D0", @@ -330,7 +330,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Clean Victim with raw CV=3D0", @@ -339,7 +339,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; RFO HitS", @@ -348,7 +348,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Number of = times that an RFO hit in S state. This is useful for determining if it mig= ht be good for a workload to use RspIWB instead of RspSWB.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Silent Snoop Eviction", @@ -357,7 +357,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc", @@ -366,7 +366,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Write Combining Aliasing", @@ -375,7 +375,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 0", @@ -384,7 +384,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 0", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 1", @@ -393,7 +393,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 2", @@ -402,7 +402,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 2", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 3", @@ -411,7 +411,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 3", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Bits Decremented", @@ -420,7 +420,7 @@ "PerPkg": "1", "PublicDescription": "How often all LRU bits were decremented by 1= ", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; Non-0 Aged Victim", @@ -429,7 +429,7 @@ "PerPkg": "1", "PublicDescription": "How often we picked a victim that had a non-= zero age", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; All", @@ -438,7 +438,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down", @@ -447,7 +447,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Even", @@ -456,7 +456,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Odd", @@ -465,7 +465,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up", @@ -474,7 +474,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Even", @@ -483,7 +483,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Odd", @@ -492,7 +492,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; All", @@ -501,7 +501,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down", @@ -510,7 +510,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Even", @@ -519,7 +519,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Odd", @@ -528,7 +528,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up", @@ -537,7 +537,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Even", @@ -546,7 +546,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Odd", @@ -555,7 +555,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -564,7 +564,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -573,7 +573,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Even", @@ -582,7 +582,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Odd", @@ -591,7 +591,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up", @@ -600,7 +600,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Even", @@ -609,7 +609,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Odd", @@ -618,7 +618,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in HSX -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; AD", @@ -626,7 +626,7 @@ "EventName": "UNC_C_RING_BOUNCES.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; AK", @@ -634,7 +634,7 @@ "EventName": "UNC_C_RING_BOUNCES.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; BL", @@ -642,7 +642,7 @@ "EventName": "UNC_C_RING_BOUNCES.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", @@ -650,7 +650,7 @@ "EventName": "UNC_C_RING_BOUNCES.IV", "PerPkg": "1", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -659,7 +659,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in HSX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -668,7 +668,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in HSX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -677,7 +677,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in HSX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters for Down polarity", "UMask": "0xcc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -686,7 +686,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in HSX Therefore, if= one wants to monitor the Even ring, they should select both UP_EVEN and DN= _EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD.= ; Filters any polarity", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "UNC_C_RING_SINK_STARVED.AD", @@ -694,7 +694,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "UNC_C_RING_SINK_STARVED.AK", @@ -702,7 +702,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "UNC_C_RING_SINK_STARVED.BL", @@ -710,7 +710,7 @@ "EventName": "UNC_C_RING_SINK_STARVED.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "UNC_C_RING_SINK_STARVED.IV", @@ -718,14 +718,14 @@ "EventName": "UNC_C_RING_SINK_STARVED.IV", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of cycles the Cbo is actively throttli= ng traffic onto the Ring in order to limit bounce traffic.", "EventCode": "0x7", "EventName": "UNC_C_RING_SRC_THRTL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IRQ", @@ -734,7 +734,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IPQ is externally startved and therefore we are blocking the IRQ.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IPQ", @@ -743,7 +743,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IRQ is externally starved and therefore we are blocking the IPQ.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; ISMQ_BID", @@ -752,7 +752,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; Number of times that the ISMQ Bid.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; PRQ", @@ -761,7 +761,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IPQ", @@ -770,7 +770,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ", @@ -779,7 +779,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ Rejected", @@ -788,7 +788,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; PRQ", @@ -797,7 +797,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; PRQ", @@ -806,7 +806,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IPQ", @@ -815,7 +815,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IPQ in Internal S= tarvation.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IRQ", @@ -824,7 +824,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IRQ in Internal S= tarvation.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; ISMQ", @@ -833,7 +833,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the ISMQ in Internal = Starvation.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; PRQ", @@ -842,7 +842,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Address Conflict", @@ -851,7 +851,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from an address conflicts. Address conflicts out of the IPQ shou= ld be rare. They will generally only occur if two different sockets are se= nding requests to the same address at the same time. This is a true confli= ct case, unlike the IPQ Address Conflict which is commonly caused by prefet= ching characteristics.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Any Reject", @@ -860,7 +860,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject. TOR rejects from the IPQ can be caused by the Egress being full= or Address Conflicts.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No Egress Credits", @@ -869,7 +869,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from the Egress being full. IPQ requests make use of the AD Egre= ss for regular responses, the BL egress to forward data, and the AK egress = to return credits.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No QPI Credits", @@ -878,7 +878,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No AD Sbo Credits", @@ -887,7 +887,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request from the IPQ was retried because of it = lacked credits to send an AD packet to the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Target Node Filter", @@ -896,7 +896,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request from the IPQ was retried filtered by th= e Target NodeID as specified in the Cbox's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Address Confli= ct", @@ -905,7 +905,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because of an address match in the TOR. In order to= maintain coherency, requests to the same address are not allowed to pass e= ach other up in the Cbo. Therefore, if there is an outstanding request to = a given address, one cannot issue another request to that address until it = is complete. This comes up most commonly with prefetches. Outstanding pre= fetches occasionally will not complete their memory fetch and a demand requ= est to the same address will then sit in the IRQ and get retried until the = prefetch fills the data into the LLC. Therefore, it will not be uncommon t= o see this case in high bandwidth streaming workloads when the LLC Prefetch= er in the core is enabled.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Any Reject", @@ -914,7 +914,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of IRQ retries that occur.= Requests from the IRQ are retried if they are rejected from the TOR pipel= ine for a variety of reasons. Some of the most common reasons include if t= he Egress is full, there are no RTIDs, or there is a Physical Address match= to another outstanding request.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No Egress Cred= its", @@ -923,7 +923,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because it failed to acquire an entry in the Egress.= The egress is the buffer that queues up for allocating onto the ring. IR= Q requests can make use of all four rings and all four Egresses. If any of= the queues that a given request needs to make use of are full, the request= will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No IIO Credits= ", @@ -932,7 +932,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a request attempted to acqui= re the NCS/NCB credit for sending messages on BL to the IIO. There is a si= ngle credit in each CBo that is shared between the NCS and NCB message clas= ses for sending transactions on the BL ring (such as read data) to the IIO.= ", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects", @@ -941,7 +941,7 @@ "PerPkg": "1", "PublicDescription": "Qualify one of the other subevents by a give= n RTID destination NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER1.n= id.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No QPI Credits= ", @@ -950,7 +950,7 @@ "PerPkg": "1", "PublicDescription": "Number of requests rejects because of lack o= f QPI Ingress credits. These credits are required in order to send transac= tions to the QPI agent. Please see the QPI_IGR_CREDITS events for more inf= ormation.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No RTIDs", @@ -959,7 +959,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that requests fro= m the IRQ were retried because there were no RTIDs available. RTIDs are re= quired after a request misses the LLC and needs to send snoops and/or reque= sts to memory. If there are no RTIDs available, requests will queue up in = the IRQ and retry until one becomes available. Note that there are multipl= e RTID pools for the different sockets. There may be cases where the local= RTIDs are all used, but requests destined for remote memory can still acqu= ire an RTID because there are remote RTIDs available. This event does not = provide any filtering for this case.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No AD Sbo Cred= its", @@ -968,7 +968,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried because of it lacked credits to send an AD packet to= the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No BL Sbo Cred= its", @@ -977,7 +977,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried because of it lacked credits to send an BL packet to= the Sbo.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Target Node Fi= lter", @@ -986,7 +986,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IPQ was retried filtered by the Target NodeID as specified in the Cb= ox's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; Any Reject", @@ -995,7 +995,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = total number of times that a request from the ISMQ retried because of a TOR= reject. ISMQ requests generally will not need to retry (or at least ISMQ = retries are less common than IRQ retries). ISMQ requests will retry if the= y are not able to acquire a needed Egress credit to get onto the ring, or f= or cache evictions that need to acquire an RTID. Most ISMQ requests alread= y have an RTID, so eviction retries will be less common here.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No Egress Credits", @@ -1004,7 +1004,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by a lack of Egress credits. The egress is the buffer that queues = up for allocating onto the ring. If any of the Egress queues that a given = request needs to make use of are full, the request will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No IIO Credits", @@ -1013,7 +1013,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Number of t= imes a request attempted to acquire the NCS/NCB credit for sending messages= on BL to the IIO. There is a single credit in each CBo that is shared bet= ween the NCS and NCB message classes for sending transactions on the BL rin= g (such as read data) to the IIO.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries", @@ -1022,7 +1022,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Qualify one= of the other subevents by a given RTID destination NID. The NID is progra= mmed in Cn_MSR_PMON_BOX_FILTER1.nid.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No QPI Credits", @@ -1031,7 +1031,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No RTIDs", @@ -1040,7 +1040,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by no RTIDs. M-state cache evictions are serviced through the ISM= Q, and must acquire an RTID in order to write back to memory. If no RTIDs = are available, they will be retried.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries", @@ -1049,7 +1049,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Qualify one= of the other subevents by a given RTID destination NID. The NID is progra= mmed in Cn_MSR_PMON_BOX_FILTER1.nid.", "UMask": "0x80", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; No AD Sbo Credits= ", @@ -1058,7 +1058,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried because of it lacked credits to send an AD packet t= o the Sbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; No BL Sbo Credits= ", @@ -1067,7 +1067,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried because of it lacked credits to send an BL packet t= o the Sbo.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Request Queue Rejects; Target Node Filte= r", @@ -1076,7 +1076,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the ISMQ was retried filtered by the Target NodeID as specified in the C= box's Filter register.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IPQ", @@ -1085,7 +1085,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ", @@ -1094,7 +1094,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ Rejected", @@ -1103,7 +1103,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; PRQ Rejects", @@ -1112,7 +1112,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Acquired; For AD Ring", @@ -1121,7 +1121,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits acquired in a given cy= cle, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Acquired; For BL Ring", @@ -1130,7 +1130,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits acquired in a given cy= cle, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Occupancy; For AD Ring", @@ -1139,7 +1139,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits in use in a given cycl= e, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "SBo Credits Occupancy; For BL Ring", @@ -1148,7 +1148,7 @@ "PerPkg": "1", "PublicDescription": "Number of Sbo credits in use in a given cycl= e, per ring. Each Cbo is assigned an Sbo it can communicate with.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; All", @@ -1157,7 +1157,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR. This includes requests that reside in the TOR for a shor= t time, such as LLC Hits that do not need to snoop cores or requests that g= et rejected and have to be retried through one of the ingress queues. The = TOR is more commonly a bottleneck in skews with smaller core counts, where = the ratio of RTIDs to TOR entries is larger. Note that there are reserved = TOR entries for various request types, so it is possible that a given reque= st type be blocked with an occupancy that is less than 20. Also note that = generally requests will not be able to arbitrate into the TOR pipeline if t= here are no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Evictions", @@ -1166,7 +1166,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Eviction transactions in= serted into the TOR. Evictions can be quick, such as when the line is in t= he F, S, or E states and no core valid bits are set. They can also be long= er if either CV bits are set (so the cores need to be snooped) and/or if th= ere is a HitM (in which case it is necessary to write the request out to me= mory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory", @@ -1175,7 +1175,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory - Opcode Matched", @@ -1184,7 +1184,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. Th= ere are a number of subevent 'filters' but only a subset of the subevent co= mbinations are valid. Subevents that require an opcode or NID match requir= e the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example, = one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH and = set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisfie= d by an opcode, inserted into the TOR that are satisfied by locally HOMed = memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory", @@ -1193,7 +1193,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory - Opcode = Matched", @@ -1202,7 +1202,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by locally HOMe= d memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Miss Opcode Match", @@ -1211,7 +1211,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory", @@ -1220,7 +1220,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory - Opcode= Matched", @@ -1229,7 +1229,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by remote cach= es or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched", @@ -1238,7 +1238,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched (matches= an RTID destination) transactions inserted into the TOR. The NID is progr= ammed in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it i= s possible to monitor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Evictions", @@ -1247,7 +1247,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched eviction tra= nsactions inserted into the TOR.", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Miss All", @@ -1256,7 +1256,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched miss req= uests that were inserted into the TOR.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched Miss", @@ -1265,7 +1265,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched", @@ -1274,7 +1274,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Writebacks", @@ -1283,7 +1283,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched write transa= ctions inserted into the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Opcode Match", @@ -1292,7 +1292,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory", @@ -1301,7 +1301,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory - Opcode Matched", @@ -1310,7 +1310,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisf= ied by an opcode, inserted into the TOR that are satisfied by remote cache= s or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Writebacks", @@ -1319,7 +1319,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Write transactions inser= ted into the TOR. This does not include RFO, but actual operations that c= ontain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Any", @@ -1328,7 +1328,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All valid TO= R entries. This includes requests that reside in the TOR for a short time,= such as LLC Hits that do not need to snoop cores or requests that get reje= cted and have to be retried through one of the ingress queues. The TOR is = more commonly a bottleneck in skews with smaller core counts, where the rat= io of RTIDs to TOR entries is larger. Note that there are reserved TOR ent= ries for various request types, so it is possible that a given request type= be blocked with an occupancy that is less than 20. Also note that general= ly requests will not be able to arbitrate into the TOR pipeline if there ar= e no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Evictions", @@ -1337,7 +1337,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding eviction transactions in the TOR. Evictions can be quick, such a= s when the line is in the F, S, or E states and no core valid bits are set.= They can also be longer if either CV bits are set (so the cores need to b= e snooped) and/or if there is a HitM (in which case it is necessary to writ= e the request out to memory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Occupancy counter for LLC data reads (demand = and L2 prefetch). Derived from unc_c_tor_occupancy.miss_opcode", @@ -1347,7 +1347,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = for miss transactions that match an opcode. This generally means that the r= equest was sent to memory or MMIO.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1356,7 +1356,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Local Memory - Opcode Matched", @@ -1365,7 +1365,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by locally HOMed memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss All", @@ -1374,7 +1374,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding miss requests in the TOR. 'Miss' means the allocation requires a= n RTID. This generally means that the request was sent to memory or MMIO.", "UMask": "0xa", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1383,7 +1383,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Local Memory - Opcod= e Matched", @@ -1392,7 +1392,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by locally HOMed memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss Opcode Match", @@ -1401,7 +1401,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = for miss transactions that match an opcode. This generally means that the r= equest was sent to memory or MMIO.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1410,7 +1410,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Remote Memory - Opco= de Matched", @@ -1419,7 +1419,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by remote caches or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1428,7 +1428,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of NI= D matched outstanding requests in the TOR. The NID is programmed in Cn_MSR= _PMON_BOX_FILTER.nid.In conjunction with STATE =3D I, it is possible to mon= itor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Evictions", @@ -1437,7 +1437,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding NID matched eviction transactions in the TOR .", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1446,7 +1446,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched Miss", @@ -1455,7 +1455,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched", @@ -1464,7 +1464,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Writebacks", @@ -1473,7 +1473,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); NID matched = write transactions int the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Opcode Match", @@ -1482,7 +1482,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc).", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1491,7 +1491,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Remote Memory - Opcode Matched= ", @@ -1500,7 +1500,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by remote caches or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Writebacks", @@ -1509,7 +1509,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Write transa= ctions in the TOR. This does not include RFO, but actual operations that = contain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AD Ring", @@ -1517,7 +1517,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AK Ring", @@ -1525,7 +1525,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto BL Ring", @@ -1533,7 +1533,7 @@ "EventName": "UNC_C_TxR_ADS_USED.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Cachebo", @@ -1542,7 +1542,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AD ring. Some example include out= bound requests, snoop requests, and snoop responses.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Corebo", @@ -1551,7 +1551,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AD ring. This is commonly used for= outbound requests.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Cachebo", @@ -1560,7 +1560,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AK ring. This is commonly used fo= r credit returns and GO responses.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Corebo", @@ -1569,7 +1569,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AK ring. This is commonly used for= snoop responses coming from the core and destined for a Cachebo.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Cacheno", @@ -1578,7 +1578,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the BL ring. This is commonly used to= send data from the cache to various destinations.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Corebo", @@ -1587,7 +1587,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the BL ring. This is commonly used for= transferring writeback data to the cache.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; IV - Cachebo", @@ -1596,7 +1596,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the IV ring. This is commonly used fo= r snoops to the cores.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AD Ring (to core)", @@ -1605,7 +1605,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the core AD egress spent in starvation", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AK Ring", @@ -1614,7 +1614,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that both AK egresses spent in starvation", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto BL Ring", @@ -1623,7 +1623,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that both BL egresses spent in starvation", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto IV Ring", @@ -1632,7 +1632,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the cachebo IV egress spent in starvati= on", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BT Cycles Not Empty", diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.js= on b/tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json index 15059b17cd19..954e8198c7a5 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json @@ -6,7 +6,7 @@ "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL= non-data flits transmitted across QPI. This basically tracks the protocol= overhead on the QPI link. One can get a good picture of the QPI-link char= acteristics by evaluating the protocol flits, data flits, and idle/null fli= ts. This includes the header flits for data packets.", "ScaleUnit": "8Bytes", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Number of data flits transmitted . Derived fr= om unc_q_txl_flits_g0.data", @@ -15,1318 +15,3950 @@ "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data fli= ts transmitted over QPI. Each flit contains 64b of data. This includes bo= th DRS and NCB data flits (coherent and non-coherent). This can be used to= calculate the data bandwidth of the QPI link. One can get a good picture = of the QPI-link characteristics by evaluating the protocol flits, data flit= s, and idle/null flits. This does not include the header flits that go in = data packets.", "ScaleUnit": "8Bytes", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { - "BriefDescription": "Number of qfclks", - "EventCode": "0x14", - "EventName": "UNC_Q_CLOCKTICKS", + "BriefDescription": "Total Write Cache Occupancy; Any Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", "PerPkg": "1", - "PublicDescription": "Counts the number of clocks in the QPI LL. = This clock runs at 1/4th the GT/s speed of the QPI link. For example, a 4G= T/s link will have qfclk or 1GHz. HSX does not support dynamic link speeds= , so this frequency is fixed.", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", + "UMask": "0x1", + "Unit": "IRP" }, { - "BriefDescription": "Count of CTO Events", - "EventCode": "0x38", - "EventName": "UNC_Q_CTO_COUNT", + "BriefDescription": "Total Write Cache Occupancy; Select Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", "PerPkg": "1", - "PublicDescription": "Counts the number of CTO (cluster trigger ou= ts) events that were asserted across the two slots. If both slots trigger = in a given cycle, the event will increment by 2. You can use edge detect t= o count the number of cases when both events triggered.", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s Credits", + "BriefDescription": "Clocks in the IRP", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of clocks in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CLFlush", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits. Had there been enough credits, the spawn would have worked as th= e RBT bit was set and the RBT tag matched.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss", + "BriefDescription": "Coherent Ops; CRd", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_MISS", + "EventName": "UNC_I_COHERENT_OPS.CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d there weren't enough Egress credits. The valid bit was set.", - "UMask": "0x20", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Invalid", + "BriefDescription": "Coherent Ops; DRd", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT", + "EventName": "UNC_I_COHERENT_OPS.DRD", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits AND the RBT bit was not set, but the RBT tag matched.", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x4", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss, Invalid", + "BriefDescription": "Coherent Ops; PCIDCAHin5t", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT_MISS", + "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match, t= he valid bit was not set and there weren't enough Egress credits.", - "UMask": "0x80", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x20", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss", + "BriefDescription": "Coherent Ops; PCIRdCur", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_MISS", + "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match al= though the valid bit was set and there were enough Egress credits.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x1", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT I= nvalid", + "BriefDescription": "Coherent Ops; PCIItoM", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_HIT", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the route-back table (RBT) s= pecified that the transaction should not trigger a direct2core transaction.= This is common for IO transactions. There were enough Egress credits and= the RBT tag matched but the valid bit was not set.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss and Invalid", + "BriefDescription": "Coherent Ops; RFO", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_MISS", + "EventName": "UNC_I_COHERENT_OPS.RFO", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d the valid bit was not set although there were enough Egress credits.", - "UMask": "0x40", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x8", + "Unit": "IRP" }, { - "BriefDescription": "Direct 2 Core Spawning; Spawn Success", + "BriefDescription": "Coherent Ops; WbMtoI", "EventCode": "0x13", - "EventName": "UNC_Q_DIRECT2CORE.SUCCESS_RBT_HIT", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", "PerPkg": "1", - "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn was successful. There were sufficient cred= its, the RBT valid bit was set and there was an RBT tag match. The message= was marked to spawn direct2core.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" }, { - "BriefDescription": "Cycles in L1", - "EventCode": "0x12", - "EventName": "UNC_Q_L1_POWER_CYCLES", + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L1 power= mode. L1 is a mode that totally shuts down a QPI link. Use edge detect t= o count the number of instances when the QPI link entered L1. Link power s= tates are per link and per direction, so for example the Tx direction could= be in one state while Rx was in another. Because L1 totally shuts down the= link, it takes a good amount of time to exit this mode.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of A= tomic Transactions as Secondary", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "Cycles in L0p", - "EventCode": "0x10", - "EventName": "UNC_Q_RxL0P_POWER_CYCLES", + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of R= ead Transactions as Secondary", + "UMask": "0x4", + "Unit": "IRP" }, { - "BriefDescription": "Cycles in L0", - "EventCode": "0xF", - "EventName": "UNC_Q_RxL0_POWER_CYCLES", + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of W= rite Transactions as Secondary", + "UMask": "0x8", + "Unit": "IRP" }, { - "BriefDescription": "Rx Flit Buffer Bypassed", - "EventCode": "0x9", - "EventName": "UNC_Q_RxL_BYPASSED", + "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_REJ", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the flit buffer and pass directly across the BGF an= d into the Egress. This is a latency optimization, and should generally be= the common case. If this value is less than the number of flits transferr= ed, it implies that there was queueing getting onto the ring, and thus the = transactions saw higher latency.", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "CRC Errors Detected; LinkInit", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_CRC_ERRORS.LINK_INIT", + "BriefDescription": "Misc Events - Set 0; Fastpath Requests", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_REQ", "PerPkg": "1", - "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during link initialization.", + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Requests", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "CRC Errors Detected; Normal Operations", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_CRC_ERRORS.NORMAL_OP", + "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.FAST_XFER", "PerPkg": "1", - "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during normal operation.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Transfers= From Primary to Secondary", + "UMask": "0x20", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; DRS", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.DRS", + "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the DRS message class.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints= From Primary to Secondary", + "UMask": "0x40", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; HOM", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.HOM", + "BriefDescription": "Misc Events - Set 0; Prefetch TimeOut", + "EventCode": "0x14", + "EventName": "UNC_I_MISC0.PF_TIMEOUT", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the HOM message class.", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Indicates the fetch for a previous prefetch = wasn't accepted by the prefetch. This happens in the case of a prefetch T= imeOut", + "UMask": "0x80", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; NCB", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCB", + "BriefDescription": "Misc Events - Set 1; Data Throttled", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.DATA_THROTTLE", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCB message class.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "IRP throttled switch data", + "UMask": "0x80", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; NCS", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCS", + "BriefDescription": "Misc Events - Set 1", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.LOST_FWD", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCS message class.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; NDR", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NDR", + "BriefDescription": "Misc Events - Set 1; Received Invalid", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NDR message class.", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN0 Credit Consumed; SNP", - "EventCode": "0x1E", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.SNP", + "BriefDescription": "Misc Events - Set 1; Received Valid", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the SNP message class.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; DRS", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.DRS", + "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_E", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the DRS message class.", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; HOM", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.HOM", + "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_M", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the HOM message class.", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; NCB", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCB", + "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", + "EventCode": "0x15", + "EventName": "UNC_I_MISC1.SLOW_S", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCB message class.", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; NCS", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCS", + "BriefDescription": "AK Ingress Occupancy", + "EventCode": "0xA", + "EventName": "UNC_I_RxR_AK_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCS message class.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; NDR", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NDR", + "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL", + "EventCode": "0x4", + "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NDR message class.", - "UMask": "0x20", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" }, { - "BriefDescription": "VN1 Credit Consumed; SNP", - "EventCode": "0x39", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.SNP", + "BriefDescription": "BL Ingress Occupancy - DRS", + "EventCode": "0x1", + "EventName": "UNC_I_RxR_BL_DRS_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the SNP message class.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" }, { - "BriefDescription": "VNA Credit Consumed", - "EventCode": "0x1D", - "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VNA", + "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY", + "EventCode": "0x7", + "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty", - "EventCode": "0xA", - "EventName": "UNC_Q_RxL_CYCLES_NE", + "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL", + "EventCode": "0x5", + "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy.", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN0", - "EventCode": "0xF", - "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN0", + "BriefDescription": "BL Ingress Occupancy - NCB", + "EventCode": "0x2", + "EventName": "UNC_I_RxR_BL_NCB_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN1", - "EventCode": "0xF", - "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN1", + "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY", + "EventCode": "0x8", + "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN0", - "EventCode": "0x12", - "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN0", + "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL", + "EventCode": "0x6", + "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN1", - "EventCode": "0x12", - "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN1", + "BriefDescription": "BL Ingress Occupancy - NCS", + "EventCode": "0x3", + "EventName": "UNC_I_RxR_BL_NCS_INSERTS", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN0", - "EventCode": "0x10", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN0", + "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY", + "EventCode": "0x9", + "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN1", - "EventCode": "0x10", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN1", + "BriefDescription": "Snoop Responses; Hit E or S", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : Hit E or S", + "UMask": "0x4", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN0", - "EventCode": "0x11", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN0", + "BriefDescription": "Snoop Responses; Hit I", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : Hit I", + "UMask": "0x2", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN1", - "EventCode": "0x11", - "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN1", + "BriefDescription": "Snoop Responses; Hit M", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : Hit M", + "UMask": "0x8", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN0", - "EventCode": "0x14", - "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN0", + "BriefDescription": "Snoop Responses; Miss", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.MISS", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", + "PublicDescription": "Snoop Responses : Miss", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN1", - "EventCode": "0x14", - "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN1", + "BriefDescription": "Snoop Responses; SnpCode", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : SnpCode", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN0", - "EventCode": "0x13", - "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN0", + "BriefDescription": "Snoop Responses; SnpData", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : SnpData", + "UMask": "0x20", + "Unit": "IRP" }, { - "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN1", - "EventCode": "0x13", - "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN1", + "BriefDescription": "Snoop Responses; SnpInv", + "EventCode": "0x17", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Snoop Responses : SnpInv", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Atomic", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Other", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Read Prefetches", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.RD_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Reads", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.READS", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Writes", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Write Prefetches", + "EventCode": "0x16", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of write p= refetches.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD Egress Credit Stalls", + "EventCode": "0x18", + "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x19", + "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xE", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xF", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0xD", + "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "Number of qfclks", + "EventCode": "0x14", + "EventName": "UNC_Q_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of clocks in the QPI LL. = This clock runs at 1/4th the GT/s speed of the QPI link. For example, a 4G= T/s link will have qfclk or 1GHz. HSX does not support dynamic link speeds= , so this frequency is fixed.", + "Unit": "QPI" + }, + { + "BriefDescription": "Count of CTO Events", + "EventCode": "0x38", + "EventName": "UNC_Q_CTO_COUNT", + "PerPkg": "1", + "PublicDescription": "Counts the number of CTO (cluster trigger ou= ts) events that were asserted across the two slots. If both slots trigger = in a given cycle, the event will increment by 2. You can use edge detect t= o count the number of cases when both events triggered.", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s Credits", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits. Had there been enough credits, the spawn would have worked as th= e RBT bit was set and the RBT tag matched.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d there weren't enough Egress credits. The valid bit was set.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Invalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits AND the RBT bit was not set, but the RBT tag matched.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss, Invalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match, t= he valid bit was not set and there weren't enough Egress credits.", + "UMask": "0x80", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match al= though the valid bit was set and there were enough Egress credits.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT I= nvalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the route-back table (RBT) s= pecified that the transaction should not trigger a direct2core transaction.= This is common for IO transactions. There were enough Egress credits and= the RBT tag matched but the valid bit was not set.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss and Invalid", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d the valid bit was not set although there were enough Egress credits.", + "UMask": "0x40", + "Unit": "QPI" + }, + { + "BriefDescription": "Direct 2 Core Spawning; Spawn Success", + "EventCode": "0x13", + "EventName": "UNC_Q_DIRECT2CORE.SUCCESS_RBT_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn was successful. There were sufficient cred= its, the RBT valid bit was set and there was an RBT tag match. The message= was marked to spawn direct2core.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L1", + "EventCode": "0x12", + "EventName": "UNC_Q_L1_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L1 power= mode. L1 is a mode that totally shuts down a QPI link. Use edge detect t= o count the number of instances when the QPI link entered L1. Link power s= tates are per link and per direction, so for example the Tx direction could= be in one state while Rx was in another. Because L1 totally shuts down the= link, it takes a good amount of time to exit this mode.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0x10", + "EventName": "UNC_Q_RxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0xF", + "EventName": "UNC_Q_RxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Bypassed", + "EventCode": "0x9", + "EventName": "UNC_Q_RxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the flit buffer and pass directly across the BGF an= d into the Egress. This is a latency optimization, and should generally be= the common case. If this value is less than the number of flits transferr= ed, it implies that there was queueing getting onto the ring, and thus the = transactions saw higher latency.", + "Unit": "QPI" + }, + { + "BriefDescription": "CRC Errors Detected; LinkInit", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_CRC_ERRORS.LINK_INIT", + "PerPkg": "1", + "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during link initialization.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "CRC Errors Detected; Normal Operations", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_CRC_ERRORS.NORMAL_OP", + "PerPkg": "1", + "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during normal operation.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; DRS", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the DRS message class.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; HOM", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the HOM message class.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; NCB", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCB message class.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; NCS", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCS message class.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; NDR", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NDR message class.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "VN0 Credit Consumed; SNP", + "EventCode": "0x1E", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the SNP message class.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; DRS", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the DRS message class.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; HOM", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the HOM message class.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; NCB", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCB message class.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; NCS", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCS message class.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; NDR", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NDR message class.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "VN1 Credit Consumed; SNP", + "EventCode": "0x39", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the SNP message class.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "VNA Credit Consumed", + "EventCode": "0x1D", + "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VNA", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty", + "EventCode": "0xA", + "EventName": "UNC_Q_RxL_CYCLES_NE", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy.", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN0", + "EventCode": "0xF", + "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN1", + "EventCode": "0xF", + "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN0", + "EventCode": "0x12", + "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN1", + "EventCode": "0x12", + "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN0", + "EventCode": "0x10", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN1", + "EventCode": "0x10", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN0", + "EventCode": "0x11", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN1", + "EventCode": "0x11", + "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN0", + "EventCode": "0x14", + "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN1", + "EventCode": "0x14", + "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN0", + "EventCode": "0x13", + "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN1", + "EventCode": "0x13", + "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", + "UMask": "0x2", + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 0; Idle and Null Flits= ", "EventCode": "0x1", - "EventName": "UNC_Q_RxL_FLITS_G0.IDLE", + "EventName": "UNC_Q_RxL_FLITS_G0.IDLE", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each f= lit is made up of 80 bits of information (in addition to some ECC data). I= n full-width (L0) mode, flits are made up of four fits, each of which conta= ins 20 bits of data (along with some additional ECC data). In half-width = (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many= fits to transmit a flit. When one talks about QPI speed (for example, 8.0= GT/s), the transfers here refer to fits. Therefore, in L0, the system wil= l transfer 1 flit at the rate of 1/4th the QPI speed. One can calculate th= e bandwidth of the link by taking: flits*80b/time. Note that this is not t= he same as data bandwidth. For example, when we are transferring a 64B cac= heline across QPI, we will break it into 9 flits -- 1 with header informati= on and 8 with 64 bits of actual data and an additional 16 bits of other inf= ormation. To calculate data bandwidth, one should therefore do: data flits= * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of flits receive= d over QPI that do not hold protocol payload. When QPI is not in a power s= aving state, it continuously transmits flits across the link. When there a= re no protocol flits to send, it will send IDLE and NULL flits across. Th= ese flits sometimes do carry a payload, such as credit returns, but are gen= erally not considered part of the QPI bandwidth.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; DRS Flits (both Hea= der and Data)", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over QPI on the DRS (Data Respo= nse) channel. DRS flits are used to transmit data with coherency. This do= es not count data flits received over the NCB channel which transmits non-c= oherent data.", + "UMask": "0x18", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; DRS Data Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.DRS_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of data flits received over QPI on the DRS (Data = Response) channel. DRS flits are used to transmit data with coherency. Th= is does not count data flits received over the NCB channel which transmits = non-coherent data. This includes only the data flits (not the header).", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; DRS Header Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.DRS_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of protocol flits received over QPI on the DRS (D= ata Response) channel. DRS flits are used to transmit data with coherency.= This does not count data flits received over the NCB channel which transm= its non-coherent data. This includes only the header flits (not the data).= This includes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; HOM Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of flits received over QPI on the home channel.", + "UMask": "0x6", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; HOM Non-Request Fli= ts", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.HOM_NONREQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of non-request flits received over QPI on the home chan= nel. These are most commonly snoop responses, and this event can be used a= s a proxy for that.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; HOM Request Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.HOM_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of data request received over QPI on the home channel. = This basically counts the number of remote memory requests received over Q= PI. In conjunction with the local read count in the Home Agent, one can ca= lculate the number of LLC Misses.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 1; SNP Flits", + "EventCode": "0x2", + "EventName": "UNC_Q_RxL_FLITS_G1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of snoop request flits received over QPI. These reques= ts are contained in the snoop channel. This does not include snoop respons= es, which are received on the home channel.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent Rx Fli= ts", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass flits. These packets are generally used to= transmit non-coherent data across QPI.", + "UMask": "0xc", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent data R= x Flits", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCB_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass data flits. These flits are generally used= to transmit non-coherent data across QPI. This does not include a count o= f the DRS (coherent) data flits. This only counts the data flits, not the = NCB headers.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent non-da= ta Rx Flits", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCB_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass non-data flits. These packets are generall= y used to transmit non-coherent data across QPI, and the flits counted here= are for headers and other non-data flits. This includes extended headers.= ", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Coherent standa= rd Rx Flits", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of NCS (non-coherent standard) flits received over QPI. This in= cludes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AD", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets to the local sock= et which use the AK ring.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AK", + "EventCode": "0x3", + "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets destined for Rout= e-thru to a remote socket.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations", + "EventCode": "0x8", + "EventName": "UNC_Q_RxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN0", + "EventCode": "0x9", + "EventName": "UNC_Q_RxL_INSERTS_DRS.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN1", + "EventCode": "0x9", + "EventName": "UNC_Q_RxL_INSERTS_DRS.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN0", + "EventCode": "0xC", + "EventName": "UNC_Q_RxL_INSERTS_HOM.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN1", + "EventCode": "0xC", + "EventName": "UNC_Q_RxL_INSERTS_HOM.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN0", + "EventCode": "0xA", + "EventName": "UNC_Q_RxL_INSERTS_NCB.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN1", + "EventCode": "0xA", + "EventName": "UNC_Q_RxL_INSERTS_NCB.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN0", + "EventCode": "0xB", + "EventName": "UNC_Q_RxL_INSERTS_NCS.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN1", + "EventCode": "0xB", + "EventName": "UNC_Q_RxL_INSERTS_NCS.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN0", + "EventCode": "0xE", + "EventName": "UNC_Q_RxL_INSERTS_NDR.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN1", + "EventCode": "0xE", + "EventName": "UNC_Q_RxL_INSERTS_NDR.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN0", + "EventCode": "0xD", + "EventName": "UNC_Q_RxL_INSERTS_SNP.VN0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN1", + "EventCode": "0xD", + "EventName": "UNC_Q_RxL_INSERTS_SNP.VN1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets", + "EventCode": "0xB", + "EventName": "UNC_Q_RxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - DRS; for VN0", + "EventCode": "0x15", + "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - DRS; for VN1", + "EventCode": "0x15", + "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - HOM; for VN0", + "EventCode": "0x18", + "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - HOM; for VN1", + "EventCode": "0x18", + "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCB; for VN0", + "EventCode": "0x16", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCB; for VN1", + "EventCode": "0x16", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCS; for VN0", + "EventCode": "0x17", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NCS; for VN1", + "EventCode": "0x17", + "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NDR; for VN0", + "EventCode": "0x1A", + "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - NDR; for VN1", + "EventCode": "0x1A", + "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - SNP; for VN0", + "EventCode": "0x19", + "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "RxQ Occupancy - SNP; for VN1", + "EventCode": "0x19", + "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - H= OM", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_DRS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the HOM message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - D= RS", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_HOM", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the DRS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - S= NP", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCB", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the SNP message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= DR", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NDR message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CS", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NDR", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CB", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_SNP", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCB message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; Egress Credit= s", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.EGRESS_CREDITS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet because there were insufficient BGF cre= dits. For details on a message class granularity, use the Egress Credit Oc= cupancy events.", + "UMask": "0x40", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN0; GV", + "EventCode": "0x35", + "EventName": "UNC_Q_RxL_STALLS_VN0.GV", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled because a GV transition (frequency transition) w= as taking place.", + "UMask": "0x80", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - H= OM", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_DRS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the HOM message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - D= RS", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_HOM", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the DRS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - S= NP", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCB", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the SNP message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= DR", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCS", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NDR message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CS", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NDR", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x20", + "Unit": "QPI" + }, + { + "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CB", + "EventCode": "0x3A", + "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_SNP", + "PerPkg": "1", + "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCB message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0xD", + "EventName": "UNC_Q_TxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0xC", + "EventName": "UNC_Q_TxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Bypassed", + "EventCode": "0x5", + "EventName": "UNC_Q_TxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the Tx flit buffer and pass directly out the QPI Li= nk. Generally, when data is transmitted across QPI, it will bypass the TxQ = and pass directly to the link. However, the TxQ will be used with L0p and = when LLR occurs, increasing latency to transfer out to the link.", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is al= most full", + "EventCode": "0x2", + "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.ALMOST_FULL", + "PerPkg": "1", + "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is almost ful= l, we block some but not all packets.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is fu= ll", + "EventCode": "0x2", + "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.FULL", + "PerPkg": "1", + "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is totally fu= ll, we are not allowed to send any packets.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Cycles not Empty", + "EventCode": "0x6", + "EventName": "UNC_Q_TxL_CYCLES_NE", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the TxQ is = not empty. Generally, when data is transmitted across QPI, it will bypass t= he TxQ and pass directly to the link. However, the TxQ will be used with L= 0p and when LLR occurs, increasing latency to transfer out to the link.", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 0; Data Tx Flits", + "EventName": "UNC_Q_TxL_FLITS_G0.DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data fli= ts transmitted over QPI. Each flit contains 64b of data. This includes bo= th DRS and NCB data flits (coherent and non-coherent). This can be used to= calculate the data bandwidth of the QPI link. One can get a good picture = of the QPI-link characteristics by evaluating the protocol flits, data flit= s, and idle/null flits. This does not include the header flits that go in = data packets.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 0; Non-Data protoco= l Tx Flits", + "EventName": "UNC_Q_TxL_FLITS_G0.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL= non-data flits transmitted across QPI. This basically tracks the protocol= overhead on the QPI link. One can get a good picture of the QPI-link char= acteristics by evaluating the protocol flits, data flits, and idle/null fli= ts. This includes the header flits for data packets.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; DRS Flits (both = Header and Data)", + "EventName": "UNC_Q_TxL_FLITS_G1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over QPI on the DRS (Da= ta Response) channel. DRS flits are used to transmit data with coherency.", + "UMask": "0x18", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; DRS Data Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.DRS_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of data flits transmitted over QPI on the DR= S (Data Response) channel. DRS flits are used to transmit data with cohere= ncy. This does not count data flits transmitted over the NCB channel which= transmits non-coherent data. This includes only the data flits (not the h= eader).", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; DRS Header Flits= ", + "EventName": "UNC_Q_TxL_FLITS_G1.DRS_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of protocol flits transmitted over QPI on th= e DRS (Data Response) channel. DRS flits are used to transmit data with co= herency. This does not count data flits transmitted over the NCB channel w= hich transmits non-coherent data. This includes only the header flits (not= the data). This includes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; HOM Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of flits transmitted over QPI on the home channel.= ", + "UMask": "0x6", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; HOM Non-Request = Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.HOM_NONREQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of non-request flits transmitted over QPI on the h= ome channel. These are most commonly snoop responses, and this event can b= e used as a proxy for that.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; HOM Request Flit= s", + "EventName": "UNC_Q_TxL_FLITS_G1.HOM_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of data request transmitted over QPI on the home c= hannel. This basically counts the number of remote memory requests transmi= tted over QPI. In conjunction with the local read count in the Home Agent,= one can calculate the number of LLC Misses.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 1; SNP Flits", + "EventName": "UNC_Q_TxL_FLITS_G1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of snoop request flits transmitted over QPI. Thes= e requests are contained in the snoop channel. This does not include snoop= responses, which are transmitted on the home channel.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent Byp= ass Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass flits. These packets are generally us= ed to transmit non-coherent data across QPI.", + "UMask": "0xc", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent dat= a Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCB_DATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass data flits. These flits are generally= used to transmit non-coherent data across QPI. This does not include a co= unt of the DRS (coherent) data flits. This only counts the data flits, not= the NCB headers.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent non= -data Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCB_NONDATA", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass non-data flits. These packets are gen= erally used to transmit non-coherent data across QPI, and the flits counted= here are for headers and other non-data flits. This includes extended hea= ders.", + "UMask": "0x8", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Coherent sta= ndard Tx Flits", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of NCS (non-coherent standard) flits transmitted over QPI. = This includes extended headers.", + "UMask": "0x10", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AD", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets to the lo= cal socket which use the AK ring.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AK", + "EventCode": "0x1", + "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets destined = for Route-thru to a remote socket.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Allocations", + "EventCode": "0x4", + "EventName": "UNC_Q_TxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the QPI Tx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", + "Unit": "QPI" + }, + { + "BriefDescription": "Tx Flit Buffer Occupancy", + "EventCode": "0x7", + "EventName": "UNC_Q_TxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across QPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN0", + "EventCode": "0x26", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN1", + "EventCode": "0x26", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N0", + "EventCode": "0x22", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N1", + "EventCode": "0x22", + "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", + "EventCode": "0x28", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", + "EventCode": "0x28", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", + "EventCode": "0x24", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", + "EventCode": "0x24", + "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN0", + "EventCode": "0x27", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN1", + "EventCode": "0x27", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N0", + "EventCode": "0x23", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N1", + "EventCode": "0x23", + "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", + "EventCode": "0x29", + "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. Local NDR message class to AK Egre= ss.", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", + "EventCode": "0x25", + "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . Local NDR message class to AK Egress.", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN0", + "EventCode": "0x2A", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN1", + "EventCode": "0x2A", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for Shar= ed VN", + "EventCode": "0x2A", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN_SHR", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N0", + "EventCode": "0x1F", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N1", + "EventCode": "0x1F", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for S= hared VN", + "EventCode": "0x1F", + "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN_SHR", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "UMask": "0x4", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN0", + "EventCode": "0x2B", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN1", + "EventCode": "0x2B", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N0", + "EventCode": "0x20", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N1", + "EventCode": "0x20", + "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN0", + "EventCode": "0x2C", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN1", + "EventCode": "0x2C", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN1", + "PerPkg": "1", + "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N0", + "EventCode": "0x21", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN0", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", + "UMask": "0x1", + "Unit": "QPI" + }, + { + "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N1", + "EventCode": "0x21", + "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN1", + "PerPkg": "1", + "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", + "UMask": "0x2", + "Unit": "QPI" + }, + { + "BriefDescription": "VNA Credits Returned", + "EventCode": "0x1C", + "EventName": "UNC_Q_VNA_CREDIT_RETURNS", + "PerPkg": "1", + "PublicDescription": "Number of VNA credits returned.", + "Unit": "QPI" + }, + { + "BriefDescription": "VNA Credits Pending Return - Occupancy", + "EventCode": "0x1B", + "EventName": "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", + "Unit": "QPI" + }, + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_R3_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO10", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 10", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO11", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 11", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO12", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 12", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO13", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 13", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO14_16", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 14&16", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO8", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 8", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO9", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 9", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x1F", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO_15_17", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 15&17", + "UMask": "0x80", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO0", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 0", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO1", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO2", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 2", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO3", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 3", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO4", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 4", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO5", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 5", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO6", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 6", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x22", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO7", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 7", + "UMask": "0x80", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA0", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA0", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA1", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCB Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2D", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCS", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCS Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Backpressure", + "EventCode": "0xB", + "EventName": "UNC_R3_IOT_BACKPRESSURE.HUB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Backpressure", + "EventCode": "0xB", + "EventName": "UNC_R3_IOT_BACKPRESSURE.SAT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Hi", + "EventCode": "0xD", + "EventName": "UNC_R3_IOT_CTS_HI.CTS2", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Hi", + "EventCode": "0xD", + "EventName": "UNC_R3_IOT_CTS_HI.CTS3", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Lo", + "EventCode": "0xC", + "EventName": "UNC_R3_IOT_CTS_LO.CTS0", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "IOT Common Trigger Sequencer - Lo", + "EventCode": "0xC", + "EventName": "UNC_R3_IOT_CTS_LO.CTS1", + "PerPkg": "1", + "PublicDescription": "Debug Mask/Match Tie-Ins", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x20", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x21", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2E", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2F", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 IV Ring in Use; Any", + "EventCode": "0xA", + "EventName": "UNC_R3_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0xf", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 IV Ring in Use; Clockwise", + "EventCode": "0xA", + "EventName": "UNC_R3_RING_IV_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x3", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ring Stop Starved; AK", + "EventCode": "0xE", + "EventName": "UNC_R3_RING_SINK_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles the ringstop is in starvati= on (per ring)", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; HOM", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NDR", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; SNP", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; DRS", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; HOM", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; HOM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; NCB", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; NCS", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; NDR", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NDR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Cycles Not Empty; SNP", + "EventCode": "0x14", + "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; SNP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; DRS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; DRS Ingress= Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; HOM", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; HOM Ingress= Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCB", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCB Ingress= Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCS Ingress= Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NDR", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NDR Ingress= Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; SNP", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; SNP Ingress= Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; DRS", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= RS Ingress Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; HOM", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; NCB", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CB Ingress Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; NCS", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CS Ingress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; NDR", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Allocations; SNP", + "EventCode": "0x15", + "EventName": "UNC_R3_RxR_INSERTS_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; DRS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.DRS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; HOM", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.HOM", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; HOM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCB", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; NDR", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NDR", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NDR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Ingress Occupancy Accumulator; SNP", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; SNP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For AD Ring", + "EventCode": "0x28", + "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.AD", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For BL Ring", + "EventCode": "0x28", + "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.BL", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", + "EventCode": "0x2A", + "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each f= lit is made up of 80 bits of information (in addition to some ECC data). I= n full-width (L0) mode, flits are made up of four fits, each of which conta= ins 20 bits of data (along with some additional ECC data). In half-width = (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many= fits to transmit a flit. When one talks about QPI speed (for example, 8.0= GT/s), the transfers here refer to fits. Therefore, in L0, the system wil= l transfer 1 flit at the rate of 1/4th the QPI speed. One can calculate th= e bandwidth of the link by taking: flits*80b/time. Note that this is not t= he same as data bandwidth. For example, when we are transferring a 64B cac= heline across QPI, we will break it into 9 flits -- 1 with header informati= on and 8 with 64 bits of actual data and an additional 16 bits of other inf= ormation. To calculate data bandwidth, one should therefore do: data flits= * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of flits receive= d over QPI that do not hold protocol payload. When QPI is not in a power s= aving state, it continuously transmits flits across the link. When there a= re no protocol flits to send, it will send IDLE and NULL flits across. Th= ese flits sometimes do carry a payload, such as credit returns, but are gen= erally not considered part of the QPI bandwidth.", + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; DRS Flits (both Hea= der and Data)", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.DRS", + "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", + "EventCode": "0x2A", + "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over QPI on the DRS (Data Respo= nse) channel. DRS flits are used to transmit data with coherency. This do= es not count data flits received over the NCB channel which transmits non-c= oherent data.", - "UMask": "0x18", - "Unit": "QPI LL" + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; DRS Data Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.DRS_DATA", + "BriefDescription": "SBo1 Credits Acquired; For AD Ring", + "EventCode": "0x29", + "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of data flits received over QPI on the DRS (Data = Response) channel. DRS flits are used to transmit data with coherency. Th= is does not count data flits received over the NCB channel which transmits = non-coherent data. This includes only the data flits (not the header).", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", + "UMask": "0x1", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; DRS Header Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.DRS_NONDATA", + "BriefDescription": "SBo1 Credits Acquired; For BL Ring", + "EventCode": "0x29", + "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of protocol flits received over QPI on the DRS (D= ata Response) channel. DRS flits are used to transmit data with coherency.= This does not count data flits received over the NCB channel which transm= its non-coherent data. This includes only the header flits (not the data).= This includes extended headers.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; HOM Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.HOM", + "BriefDescription": "SBo1 Credits Occupancy; For AD Ring", + "EventCode": "0x2B", + "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of flits received over QPI on the home channel.", - "UMask": "0x6", - "Unit": "QPI LL" + "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", + "UMask": "0x1", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; HOM Non-Request Fli= ts", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.HOM_NONREQ", + "BriefDescription": "SBo1 Credits Occupancy; For BL Ring", + "EventCode": "0x2B", + "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of non-request flits received over QPI on the home chan= nel. These are most commonly snoop responses, and this event can be used a= s a proxy for that.", + "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; HOM Request Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.HOM_REQ", + "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of data request received over QPI on the home channel. = This basically counts the number of remote memory requests received over Q= PI. In conjunction with the local read count in the Home Agent, one can ca= lculate the number of LLC Misses.", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 1; SNP Flits", - "EventCode": "0x2", - "EventName": "UNC_Q_RxL_FLITS_G1.SNP", + "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of snoop request flits received over QPI. These reques= ts are contained in the snoop channel. This does not include snoop respons= es, which are received on the home channel.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x8", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent Rx Fli= ts", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCB", + "BriefDescription": "Egress CCW NACK; AD CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.DN_AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass flits. These packets are generally used to= transmit non-coherent data across QPI.", - "UMask": "0xc", - "Unit": "QPI LL" + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x1", + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent data R= x Flits", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCB_DATA", + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.DN_AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass data flits. These flits are generally used= to transmit non-coherent data across QPI. This does not include a count o= f the DRS (coherent) data flits. This only counts the data flits, not the = NCB headers.", + "PublicDescription": "AK CounterClockwise Egress Queue", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent non-da= ta Rx Flits", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCB_NONDATA", + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.DN_BL", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass non-data flits. These packets are generall= y used to transmit non-coherent data across QPI, and the flits counted here= are for headers and other non-data flits. This includes extended headers.= ", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.UP_AD", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Coherent standa= rd Rx Flits", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NCS", + "BriefDescription": "Egress CCW NACK; BL CW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.UP_AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of NCS (non-coherent standard) flits received over QPI. This in= cludes extended headers.", + "PublicDescription": "AD Clockwise Egress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK.UP_BL", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AD", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AD", + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets to the local sock= et which use the AK ring.", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Data Response (DRS). DRS is generally used to transmit data with coher= ency. For example, remote reads and writes, or cache to cache transfers wi= ll transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for the Home (HOM) message class. HOM is generally used to send requests, = request responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AK", - "EventCode": "0x3", - "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AK", + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", "PerPkg": "1", - "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets destined for Rout= e-thru to a remote socket.", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Broadcast (NCB). NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Standard (NCS). NCS is commonly used for ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; NDR pac= kets are used to transmit a variety of protocol flits including grants and = completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Snoop (SNP) message class. SNP is used for outgoing snoops. Note that= snoop responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations", - "EventCode": "0x8", - "EventName": "UNC_Q_RxL_INSERTS", + "BriefDescription": "VN0 Credit Used; DRS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "Unit": "QPI LL" + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN0", - "EventCode": "0x9", - "EventName": "UNC_Q_RxL_INSERTS_DRS.VN0", + "BriefDescription": "VN0 Credit Used; HOM Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN1", - "EventCode": "0x9", - "EventName": "UNC_Q_RxL_INSERTS_DRS.VN1", + "BriefDescription": "VN0 Credit Used; NCB Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NDR Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; SNP Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN0", - "EventCode": "0xC", - "EventName": "UNC_Q_RxL_INSERTS_HOM.VN0", + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; DRS Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.DRS", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Data Response (DRS). DRS is generally used to transmit data with coherency= . For example, remote reads and writes, or cache to cache transfers will t= ransmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; HOM Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = the Home (HOM) message class. HOM is generally used to send requests, requ= est responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN1", - "EventCode": "0xC", - "EventName": "UNC_Q_RxL_INSERTS_HOM.VN1", + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCB Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCB", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Broadcast (NCB). NCB is generally used to transmit data witho= ut coherency. For example, non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCS Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Standard (NCS). NCS is commonly used for ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NDR Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; NDR packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; SNP Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Snoop (SNP) message class. SNP is used for outgoing snoops. Note that sno= op responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN0", - "EventCode": "0xA", - "EventName": "UNC_Q_RxL_INSERTS_NCB.VN0", + "BriefDescription": "VN1 Credit Used; DRS Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.DRS", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; HOM Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN1", - "EventCode": "0xA", - "EventName": "UNC_Q_RxL_INSERTS_NCB.VN1", + "BriefDescription": "VN1 Credit Used; NCB Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NCB", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; NCS Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; NDR Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; SNP Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN0", - "EventCode": "0xB", - "EventName": "UNC_Q_RxL_INSERTS_NCS.VN0", + "BriefDescription": "VNA credit Acquisitions; HOM Message Class", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.AD", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN1", - "EventCode": "0xB", - "EventName": "UNC_Q_RxL_INSERTS_NCS.VN1", + "BriefDescription": "VNA credit Acquisitions; HOM Message Class", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.BL", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; DRS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Data Response (DRS). DRS = is generally used to transmit data with coherency. For example, remote rea= ds and writes, or cache to cache transfers will transmit their data using D= RS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; HOM Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for the Home (HOM) message cla= ss. HOM is generally used to send requests, request responses, and snoop r= esponses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCB Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Broadcast (NC= B). NCB is generally used to transmit data without coherency. For example= , non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Standard (NCS= ).", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NDR Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; NDR packets are used to transmit a va= riety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; SNP Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Snoop (SNP) message class.= SNP is used for outgoing snoops. Note that snoop responses flow on the H= OM message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "R3QPI" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN0", - "EventCode": "0xE", - "EventName": "UNC_Q_RxL_INSERTS_NDR.VN0", + "BriefDescription": "Bounce Control", + "EventCode": "0xA", + "EventName": "UNC_S_BOUNCE_CONTROL", + "PerPkg": "1", + "Unit": "SBOX" + }, + { + "BriefDescription": "Uncore Clocks", + "EventName": "UNC_S_CLOCKTICKS", + "PerPkg": "1", + "Unit": "SBOX" + }, + { + "BriefDescription": "FaST wire asserted", + "EventCode": "0x9", + "EventName": "UNC_S_FAST_ASSERTED", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Down", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.DOWN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", + "UMask": "0xc", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Down and Event", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.DOWN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Event ring polarity.", + "UMask": "0x4", + "Unit": "SBOX" + }, + { + "BriefDescription": "AD Ring In Use; Down and Odd", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.DOWN_ODD", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN1", - "EventCode": "0xE", - "EventName": "UNC_Q_RxL_INSERTS_NDR.VN1", + "BriefDescription": "AD Ring In Use; Up", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.UP", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", + "UMask": "0x3", + "Unit": "SBOX" }, { - "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN0", - "EventCode": "0xD", - "EventName": "UNC_Q_RxL_INSERTS_SNP.VN0", + "BriefDescription": "AD Ring In Use; Up and Even", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.UP_EVEN", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN1", - "EventCode": "0xD", - "EventName": "UNC_Q_RxL_INSERTS_SNP.VN1", + "BriefDescription": "AD Ring In Use; Up and Odd", + "EventCode": "0x1B", + "EventName": "UNC_S_RING_AD_USED.UP_ODD", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - All Packets", - "EventCode": "0xB", - "EventName": "UNC_Q_RxL_OCCUPANCY", + "BriefDescription": "AK Ring In Use; Down", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.DOWN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0xc", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - DRS; for VN0", - "EventCode": "0x15", - "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN0", + "BriefDescription": "AK Ring In Use; Down and Event", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.DOWN_EVEN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - DRS; for VN1", - "EventCode": "0x15", - "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN1", + "BriefDescription": "AK Ring In Use; Down and Odd", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.DOWN_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - HOM; for VN0", - "EventCode": "0x18", - "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN0", + "BriefDescription": "AK Ring In Use; Up", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.UP", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0x3", + "Unit": "SBOX" + }, + { + "BriefDescription": "AK Ring In Use; Up and Even", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - HOM; for VN1", - "EventCode": "0x18", - "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN1", + "BriefDescription": "AK Ring In Use; Up and Odd", + "EventCode": "0x1C", + "EventName": "UNC_S_RING_AK_USED.UP_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCB; for VN0", - "EventCode": "0x16", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN0", + "BriefDescription": "BL Ring in Use; Down", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.DOWN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0xc", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCB; for VN1", - "EventCode": "0x16", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN1", + "BriefDescription": "BL Ring in Use; Down and Event", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.DOWN_EVEN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCS; for VN0", - "EventCode": "0x17", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN0", + "BriefDescription": "BL Ring in Use; Down and Odd", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.DOWN_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NCS; for VN1", - "EventCode": "0x17", - "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN1", + "BriefDescription": "BL Ring in Use; Up", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.UP", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", + "UMask": "0x3", + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NDR; for VN0", - "EventCode": "0x1A", - "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN0", + "BriefDescription": "BL Ring in Use; Up and Even", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.UP_EVEN", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - NDR; for VN1", - "EventCode": "0x1A", - "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN1", + "BriefDescription": "BL Ring in Use; Up and Odd", + "EventCode": "0x1D", + "EventName": "UNC_S_RING_BL_USED.UP_ODD", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - SNP; for VN0", - "EventCode": "0x19", - "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN0", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.AD_CACHE", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "RxQ Occupancy - SNP; for VN1", - "EventCode": "0x19", - "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN1", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Acknowledgements to core", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.AK_CORE", "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - H= OM", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_DRS", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Data Responses to core", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.BL_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the HOM message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x1", - "Unit": "QPI LL" + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - D= RS", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_HOM", + "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", + "EventCode": "0x5", + "EventName": "UNC_S_RING_BOUNCES.IV_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the DRS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - S= NP", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCB", + "BriefDescription": "BL Ring in Use; Any", + "EventCode": "0x1E", + "EventName": "UNC_S_RING_IV_USED.DN", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the SNP message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", + "UMask": "0xc", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= DR", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCS", + "BriefDescription": "BL Ring in Use; Any", + "EventCode": "0x1E", + "EventName": "UNC_S_RING_IV_USED.UP", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NDR message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", + "UMask": "0x3", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CS", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NDR", + "BriefDescription": "UNC_S_RING_SINK_STARVED.AD_CACHE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.AD_CACHE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x20", - "Unit": "QPI LL" + "UMask": "0x1", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CB", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_SNP", + "BriefDescription": "UNC_S_RING_SINK_STARVED.AK_CORE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.AK_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCB message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x10", - "Unit": "QPI LL" + "UMask": "0x2", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; Egress Credit= s", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.EGRESS_CREDITS", + "BriefDescription": "UNC_S_RING_SINK_STARVED.BL_CORE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.BL_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet because there were insufficient BGF cre= dits. For details on a message class granularity, use the Egress Credit Oc= cupancy events.", - "UMask": "0x40", - "Unit": "QPI LL" + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN0; GV", - "EventCode": "0x35", - "EventName": "UNC_Q_RxL_STALLS_VN0.GV", + "BriefDescription": "UNC_S_RING_SINK_STARVED.IV_CORE", + "EventCode": "0x6", + "EventName": "UNC_S_RING_SINK_STARVED.IV_CORE", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled because a GV transition (frequency transition) w= as taking place.", - "UMask": "0x80", - "Unit": "QPI LL" + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - H= OM", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_DRS", + "BriefDescription": "Injection Starvation; AD - Bounces", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the HOM message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", + "UMask": "0x2", + "Unit": "SBOX" + }, + { + "BriefDescription": "Injection Starvation; AD - Credits", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - D= RS", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_HOM", + "BriefDescription": "Injection Starvation; BL - Bounces", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.BL_BNC", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the DRS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - S= NP", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCB", + "BriefDescription": "Injection Starvation; BL - Credits", + "EventCode": "0x15", + "EventName": "UNC_S_RxR_BUSY_STARVED.BL_CRD", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the SNP message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= DR", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCS", + "BriefDescription": "Bypass; AD - Bounces", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NDR message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x2", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CS", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NDR", + "BriefDescription": "Bypass; AD - Credits", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.AD_CRD", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", - "UMask": "0x20", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x1", + "Unit": "SBOX" }, { - "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CB", - "EventCode": "0x3A", - "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_SNP", + "BriefDescription": "Bypass; AK", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.AK", "PerPkg": "1", - "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCB message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", + "PublicDescription": "Bypass the Sbo Ingress.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Cycles in L0p", - "EventCode": "0xD", - "EventName": "UNC_Q_TxL0P_POWER_CYCLES", + "BriefDescription": "Bypass; BL - Bounces", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.BL_BNC", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Cycles in L0", - "EventCode": "0xC", - "EventName": "UNC_Q_TxL0_POWER_CYCLES", + "BriefDescription": "Bypass; BL - Credits", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.BL_CRD", "PerPkg": "1", - "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Bypassed", - "EventCode": "0x5", - "EventName": "UNC_Q_TxL_BYPASSED", + "BriefDescription": "Bypass; IV", + "EventCode": "0x12", + "EventName": "UNC_S_RxR_BYPASS.IV", "PerPkg": "1", - "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the Tx flit buffer and pass directly out the QPI Li= nk. Generally, when data is transmitted across QPI, it will bypass the TxQ = and pass directly to the link. However, the TxQ will be used with L0p and = when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "PublicDescription": "Bypass the Sbo Ingress.", + "UMask": "0x20", + "Unit": "SBOX" }, { - "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is al= most full", - "EventCode": "0x2", - "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.ALMOST_FULL", + "BriefDescription": "Injection Starvation; AD - Bounces", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is almost ful= l, we block some but not all packets.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is fu= ll", - "EventCode": "0x2", - "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.FULL", + "BriefDescription": "Injection Starvation; AD - Credits", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.AD_CRD", "PerPkg": "1", - "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is totally fu= ll, we are not allowed to send any packets.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Cycles not Empty", - "EventCode": "0x6", - "EventName": "UNC_Q_TxL_CYCLES_NE", + "BriefDescription": "Injection Starvation; AK", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the TxQ is = not empty. Generally, when data is transmitted across QPI, it will bypass t= he TxQ and pass directly to the link. However, the TxQ will be used with L= 0p and when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 0; Data Tx Flits", - "EventName": "UNC_Q_TxL_FLITS_G0.DATA", + "BriefDescription": "Injection Starvation; BL - Bounces", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.BL_BNC", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data fli= ts transmitted over QPI. Each flit contains 64b of data. This includes bo= th DRS and NCB data flits (coherent and non-coherent). This can be used to= calculate the data bandwidth of the QPI link. One can get a good picture = of the QPI-link characteristics by evaluating the protocol flits, data flit= s, and idle/null flits. This does not include the header flits that go in = data packets.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 0; Non-Data protoco= l Tx Flits", - "EventName": "UNC_Q_TxL_FLITS_G0.NON_DATA", + "BriefDescription": "Injection Starvation; BL - Credits", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.BL_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL= non-data flits transmitted across QPI. This basically tracks the protocol= overhead on the QPI link. One can get a good picture of the QPI-link char= acteristics by evaluating the protocol flits, data flits, and idle/null fli= ts. This includes the header flits for data packets.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; DRS Flits (both = Header and Data)", - "EventName": "UNC_Q_TxL_FLITS_G1.DRS", + "BriefDescription": "Injection Starvation; IVF Credit", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.IFV", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over QPI on the DRS (Da= ta Response) channel. DRS flits are used to transmit data with coherency.", - "UMask": "0x18", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x40", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; DRS Data Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.DRS_DATA", + "BriefDescription": "Injection Starvation; IV", + "EventCode": "0x14", + "EventName": "UNC_S_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", + "UMask": "0x20", + "Unit": "SBOX" + }, + { + "BriefDescription": "Ingress Allocations; AD - Bounces", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x2", + "Unit": "SBOX" + }, + { + "BriefDescription": "Ingress Allocations; AD - Credits", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.AD_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of data flits transmitted over QPI on the DR= S (Data Response) channel. DRS flits are used to transmit data with cohere= ncy. This does not count data flits transmitted over the NCB channel which= transmits non-coherent data. This includes only the data flits (not the h= eader).", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x1", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; DRS Header Flits= ", - "EventName": "UNC_Q_TxL_FLITS_G1.DRS_NONDATA", + "BriefDescription": "Ingress Allocations; AK", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of protocol flits transmitted over QPI on th= e DRS (Data Response) channel. DRS flits are used to transmit data with co= herency. This does not count data flits transmitted over the NCB channel w= hich transmits non-coherent data. This includes only the header flits (not= the data). This includes extended headers.", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; HOM Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.HOM", + "BriefDescription": "Ingress Allocations; BL - Bounces", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.BL_BNC", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of flits transmitted over QPI on the home channel.= ", - "UMask": "0x6", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; HOM Non-Request = Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.HOM_NONREQ", + "BriefDescription": "Ingress Allocations; BL - Credits", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.BL_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of non-request flits transmitted over QPI on the h= ome channel. These are most commonly snoop responses, and this event can b= e used as a proxy for that.", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; HOM Request Flit= s", - "EventName": "UNC_Q_TxL_FLITS_G1.HOM_REQ", + "BriefDescription": "Ingress Allocations; IV", + "EventCode": "0x13", + "EventName": "UNC_S_RxR_INSERTS.IV", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of data request transmitted over QPI on the home c= hannel. This basically counts the number of remote memory requests transmi= tted over QPI. In conjunction with the local read count in the Home Agent,= one can calculate the number of LLC Misses.", + "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", + "UMask": "0x20", + "Unit": "SBOX" + }, + { + "BriefDescription": "Ingress Occupancy; AD - Bounces", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 1; SNP Flits", - "EventName": "UNC_Q_TxL_FLITS_G1.SNP", + "BriefDescription": "Ingress Occupancy; AD - Credits", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.AD_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of snoop request flits transmitted over QPI. Thes= e requests are contained in the snoop channel. This does not include snoop= responses, which are transmitted on the home channel.", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent Byp= ass Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCB", + "BriefDescription": "Ingress Occupancy; AK", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass flits. These packets are generally us= ed to transmit non-coherent data across QPI.", - "UMask": "0xc", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent dat= a Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCB_DATA", + "BriefDescription": "Ingress Occupancy; BL - Bounces", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.BL_BNC", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass data flits. These flits are generally= used to transmit non-coherent data across QPI. This does not include a co= unt of the DRS (coherent) data flits. This only counts the data flits, not= the NCB headers.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent non= -data Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCB_NONDATA", + "BriefDescription": "Ingress Occupancy; BL - Credits", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.BL_CRD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass non-data flits. These packets are gen= erally used to transmit non-coherent data across QPI, and the flits counted= here are for headers and other non-data flits. This includes extended hea= ders.", - "UMask": "0x8", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Coherent sta= ndard Tx Flits", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NCS", + "BriefDescription": "Ingress Occupancy; IV", + "EventCode": "0x11", + "EventName": "UNC_S_RxR_OCCUPANCY.IV", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of NCS (non-coherent standard) flits transmitted over QPI. = This includes extended headers.", - "UMask": "0x10", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", + "UMask": "0x20", + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AD", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AD", + "BriefDescription": "UNC_S_TxR_ADS_USED.AD", + "EventCode": "0x4", + "EventName": "UNC_S_TxR_ADS_USED.AD", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets to the lo= cal socket which use the AK ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AK", - "EventCode": "0x1", - "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AK", + "BriefDescription": "UNC_S_TxR_ADS_USED.AK", + "EventCode": "0x4", + "EventName": "UNC_S_TxR_ADS_USED.AK", "PerPkg": "1", - "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets destined = for Route-thru to a remote socket.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Allocations", + "BriefDescription": "UNC_S_TxR_ADS_USED.BL", "EventCode": "0x4", - "EventName": "UNC_Q_TxL_INSERTS", + "EventName": "UNC_S_TxR_ADS_USED.BL", "PerPkg": "1", - "PublicDescription": "Number of allocations into the QPI Tx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", - "Unit": "QPI LL" + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "Tx Flit Buffer Occupancy", - "EventCode": "0x7", - "EventName": "UNC_Q_TxL_OCCUPANCY", + "BriefDescription": "Egress Allocations; AD - Bounces", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.AD_BNC", "PerPkg": "1", - "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across QPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x2", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN0", - "EventCode": "0x26", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Egress Allocations; AD - Credits", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.AD_CRD", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN1", - "EventCode": "0x26", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Egress Allocations; AK", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.AK", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N0", - "EventCode": "0x22", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Egress Allocations; BL - Bounces", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.BL_BNC", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N1", - "EventCode": "0x22", - "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Egress Allocations; BL - Credits", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.BL_CRD", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", - "EventCode": "0x28", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Egress Allocations; IV", + "EventCode": "0x2", + "EventName": "UNC_S_TxR_INSERTS.IV", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", + "UMask": "0x20", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", - "EventCode": "0x28", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Egress Occupancy; AD - Bounces", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.AD_BNC", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", - "EventCode": "0x24", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Egress Occupancy; AD - Credits", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.AD_CRD", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", - "EventCode": "0x24", - "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Egress Occupancy; AK", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.AK", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x10", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN0", - "EventCode": "0x27", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Egress Occupancy; BL - Bounces", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.BL_BNC", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN1", - "EventCode": "0x27", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Egress Occupancy; BL - Credits", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.BL_CRD", "PerPkg": "1", - "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N0", - "EventCode": "0x23", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Egress Occupancy; IV", + "EventCode": "0x1", + "EventName": "UNC_S_TxR_OCCUPANCY.IV", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", + "UMask": "0x20", + "Unit": "SBOX" + }, + { + "BriefDescription": "Injection Starvation; Onto AD Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.AD", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N1", - "EventCode": "0x23", - "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Injection Starvation; Onto AK Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.AK", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", - "EventCode": "0x29", - "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED", + "BriefDescription": "Injection Starvation; Onto BL Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.BL", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. Local NDR message class to AK Egre= ss.", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", + "UMask": "0x4", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", - "EventCode": "0x25", - "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY", + "BriefDescription": "Injection Starvation; Onto IV Ring", + "EventCode": "0x3", + "EventName": "UNC_S_TxR_STARVED.IV", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . Local NDR message class to AK Egress.", - "Unit": "QPI LL" + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", + "UMask": "0x8", + "Unit": "SBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN0", - "EventCode": "0x2A", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN0", + "BriefDescription": "UNC_U_CLOCKTICKS", + "EventName": "UNC_U_CLOCKTICKS", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN1", - "EventCode": "0x2A", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN1", + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for Shar= ed VN", - "EventCode": "0x2A", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN_SHR", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.DISABLE", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", - "UMask": "0x4", - "Unit": "QPI LL" + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x2", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N0", - "EventCode": "0x1F", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.ENABLE", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N1", - "EventCode": "0x1F", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for S= hared VN", - "EventCode": "0x1F", - "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN_SHR", + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN0", - "EventCode": "0x2B", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", + "PublicDescription": "PHOLD cycles. Filter from source CoreID.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN1", - "EventCode": "0x2B", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN1", + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Number outstanding register requests within = message channel tracker", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N0", - "EventCode": "0x20", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.CMC", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x10", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N1", - "EventCode": "0x20", - "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Monitor Sent to T0; Livelock", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x4", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN0", - "EventCode": "0x2C", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN0", + "BriefDescription": "Monitor Sent to T0; LTError", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LTERROR", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x8", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN1", - "EventCode": "0x2C", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN1", + "BriefDescription": "Monitor Sent to T0; Monitor T0", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", "PerPkg": "1", - "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x1", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N0", - "EventCode": "0x21", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN0", + "BriefDescription": "Monitor Sent to T0; Monitor T1", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", - "UMask": "0x1", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x2", + "Unit": "UBOX" }, { - "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N1", - "EventCode": "0x21", - "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN1", + "BriefDescription": "Monitor Sent to T0; Other", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.OTHER", "PerPkg": "1", - "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", - "UMask": "0x2", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", + "UMask": "0x80", + "Unit": "UBOX" }, { - "BriefDescription": "VNA Credits Returned", - "EventCode": "0x1C", - "EventName": "UNC_Q_VNA_CREDIT_RETURNS", + "BriefDescription": "Monitor Sent to T0; Trap", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.TRAP", "PerPkg": "1", - "PublicDescription": "Number of VNA credits returned.", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x40", + "Unit": "UBOX" }, { - "BriefDescription": "VNA Credits Pending Return - Occupancy", - "EventCode": "0x1B", - "EventName": "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY", + "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.UMC", "PerPkg": "1", - "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", - "Unit": "QPI LL" + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x20", + "Unit": "UBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-io.json b/tools= /perf/pmu-events/arch/x86/haswellx/uncore-io.json new file mode 100644 index 000000000000..bd64a8a1625f --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-io.json @@ -0,0 +1,528 @@ +[ + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_R2_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI0", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI1", + "EventCode": "0x2D", + "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the DRS message class.= ", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCB message class.= ", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCS message class.= ", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; DRS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the DRS message = class.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCB", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCB message = class.", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCS message = class.", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced; Dn", + "EventCode": "0x12", + "EventName": "UNC_R2_RING_AK_BOUNCES.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced; Up", + "EventCode": "0x12", + "EventName": "UNC_R2_RING_AK_BOUNCES.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Any", + "EventCode": "0xA", + "EventName": "UNC_R2_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0xf", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Counterclockwise", + "EventCode": "0xA", + "EventName": "UNC_R2_RING_IV_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0xc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Clockwise", + "EventCode": "0xA", + "EventName": "UNC_R2_RING_IV_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x3", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCB", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCS", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Allocations; NCB", + "EventCode": "0x11", + "EventName": "UNC_R2_RxR_INSERTS.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= B Ingress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Allocations; NCS", + "EventCode": "0x11", + "EventName": "UNC_R2_RxR_INSERTS.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= S Ingress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; DRS", + "EventCode": "0x13", + "EventName": "UNC_R2_RxR_OCCUPANCY.DRS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given R2PCIe = Ingress queue in each cycles. This tracks one of the three ring Ingress bu= ffers. This can be used with the R2PCIe Ingress Not Empty event to calcula= te average occupancy or the R2PCIe Ingress Allocations event in order to ca= lculate average queuing latency.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For AD Ring", + "EventCode": "0x28", + "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.AD", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Acquired; For BL Ring", + "EventCode": "0x28", + "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.BL", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", + "EventCode": "0x2A", + "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.AD", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", + "EventCode": "0x2A", + "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.BL", + "PerPkg": "1", + "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", + "EventCode": "0x2C", + "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AD", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AD Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AK", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AK Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; BL", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; BL Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AD", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AD Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AK", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AK Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; BL", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; BL Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AD CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.DN_AD", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.DN_AK", + "PerPkg": "1", + "PublicDescription": "AK CounterClockwise Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.DN_BL", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.UP_AD", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; BL CW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.UP_AK", + "PerPkg": "1", + "PublicDescription": "AD Clockwise Egress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.UP_BL", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-other.json b/to= ols/perf/pmu-events/arch/x86/haswellx/uncore-other.json deleted file mode 100644 index d30e3b16c1af..000000000000 --- a/tools/perf/pmu-events/arch/x86/haswellx/uncore-other.json +++ /dev/null @@ -1,3160 +0,0 @@ -[ - { - "BriefDescription": "Total Write Cache Occupancy; Any Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Select Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Clocks in the IRP", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of clocks in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CLFlush", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CRd", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.CRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; DRd", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.DRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIDCAHin5t", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIRdCur", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIItoM", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; RFO", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; WbMtoI", - "EventCode": "0x13", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of A= tomic Transactions as Secondary", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of R= ead Transactions as Secondary", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of W= rite Transactions as Secondary", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Requests", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Requests", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Transfers= From Primary to Secondary", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "PublicDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints= From Primary to Secondary", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch TimeOut", - "EventCode": "0x14", - "EventName": "UNC_I_MISC0.PF_TIMEOUT", - "PerPkg": "1", - "PublicDescription": "Indicates the fetch for a previous prefetch = wasn't accepted by the prefetch. This happens in the case of a prefetch T= imeOut", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Data Throttled", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.DATA_THROTTLE", - "PerPkg": "1", - "PublicDescription": "IRP throttled switch data", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Invalid", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Valid", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", - "EventCode": "0x15", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Ingress Occupancy", - "EventCode": "0xA", - "EventName": "UNC_I_RxR_AK_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "EventCode": "0x4", - "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - DRS", - "EventCode": "0x1", - "EventName": "UNC_I_RxR_BL_DRS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "EventCode": "0x7", - "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "EventCode": "0x5", - "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCB", - "EventCode": "0x2", - "EventName": "UNC_I_RxR_BL_NCB_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "EventCode": "0x8", - "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "EventCode": "0x6", - "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCS", - "EventCode": "0x3", - "EventName": "UNC_I_RxR_BL_NCS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "EventCode": "0x9", - "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit E or S", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit E or S", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit I", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit I", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit M", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Hit M", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Miss", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : Miss", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpCode", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpCode", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpData", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpData", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpInv", - "EventCode": "0x17", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "PublicDescription": "Snoop Responses : SnpInv", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Atomic", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Other", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Read Prefetches", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.RD_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Reads", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.READS", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Writes", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Write Prefetches", - "EventCode": "0x16", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of write p= refetches.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD Egress Credit Stalls", - "EventCode": "0x18", - "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x19", - "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xE", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xF", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0xD", - "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R2_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.ISOCH_QPI1", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI0", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "UNC_R2_IIO_CREDIT.PRQ_QPI1", - "EventCode": "0x2D", - "EventName": "UNC_R2_IIO_CREDIT.PRQ_QPI1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the DRS message class.= ", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCB message class.= ", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCS message class.= ", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; DRS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the DRS message = class.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCB", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCB message = class.", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCS message = class.", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced; Dn", - "EventCode": "0x12", - "EventName": "UNC_R2_RING_AK_BOUNCES.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced; Up", - "EventCode": "0x12", - "EventName": "UNC_R2_RING_AK_BOUNCES.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Any", - "EventCode": "0xA", - "EventName": "UNC_R2_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0xf", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Counterclockwise", - "EventCode": "0xA", - "EventName": "UNC_R2_RING_IV_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0xc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Clockwise", - "EventCode": "0xA", - "EventName": "UNC_R2_RING_IV_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x3", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCB", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCS", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Allocations; NCB", - "EventCode": "0x11", - "EventName": "UNC_R2_RxR_INSERTS.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= B Ingress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Allocations; NCS", - "EventCode": "0x11", - "EventName": "UNC_R2_RxR_INSERTS.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= S Ingress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; DRS", - "EventCode": "0x13", - "EventName": "UNC_R2_RxR_OCCUPANCY.DRS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given R2PCIe = Ingress queue in each cycles. This tracks one of the three ring Ingress bu= ffers. This can be used with the R2PCIe Ingress Not Empty event to calcula= te average occupancy or the R2PCIe Ingress Allocations event in order to ca= lculate average queuing latency.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For AD Ring", - "EventCode": "0x28", - "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For BL Ring", - "EventCode": "0x28", - "EventName": "UNC_R2_SBO0_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", - "EventCode": "0x2A", - "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", - "EventCode": "0x2A", - "EventName": "UNC_R2_SBO0_CREDIT_OCCUPANCY.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO0_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R2_STALL_NO_SBO_CREDIT.SBO1_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AD", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AD Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AK", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AK Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; BL", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; BL Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AD", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AD Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AK", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AK Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; BL", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; BL Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AD CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.DN_AD", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.DN_AK", - "PerPkg": "1", - "PublicDescription": "AK CounterClockwise Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.DN_BL", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.UP_AD", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; BL CW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.UP_AK", - "PerPkg": "1", - "PublicDescription": "AD Clockwise Egress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.UP_BL", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R3_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO10", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 10", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO11", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 11", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO12", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 12", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO13", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 13", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO14_16", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 14&16", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO8", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 8", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO9", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 9", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x1F", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO_15_17", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 15&17", - "UMask": "0x80", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO0", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 0", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO1", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO2", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 2", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO3", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 3", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO4", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 4", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO5", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 5", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO6", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 6", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x22", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO7", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 7", - "UMask": "0x80", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA0", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA0", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA1", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCB Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2D", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCS", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCS Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Backpressure", - "EventCode": "0xB", - "EventName": "UNC_R3_IOT_BACKPRESSURE.HUB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Backpressure", - "EventCode": "0xB", - "EventName": "UNC_R3_IOT_BACKPRESSURE.SAT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Hi", - "EventCode": "0xD", - "EventName": "UNC_R3_IOT_CTS_HI.CTS2", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Hi", - "EventCode": "0xD", - "EventName": "UNC_R3_IOT_CTS_HI.CTS3", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Lo", - "EventCode": "0xC", - "EventName": "UNC_R3_IOT_CTS_LO.CTS0", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "IOT Common Trigger Sequencer - Lo", - "EventCode": "0xC", - "EventName": "UNC_R3_IOT_CTS_LO.CTS1", - "PerPkg": "1", - "PublicDescription": "Debug Mask/Match Tie-Ins", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x20", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x21", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2E", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2F", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 IV Ring in Use; Any", - "EventCode": "0xA", - "EventName": "UNC_R3_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0xf", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 IV Ring in Use; Clockwise", - "EventCode": "0xA", - "EventName": "UNC_R3_RING_IV_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x3", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ring Stop Starved; AK", - "EventCode": "0xE", - "EventName": "UNC_R3_RING_SINK_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles the ringstop is in starvati= on (per ring)", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; HOM", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NDR", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; SNP", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; DRS", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; HOM", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; HOM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; NCB", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; NCS", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; NDR", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; NDR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Cycles Not Empty; SNP", - "EventCode": "0x14", - "EventName": "UNC_R3_RxR_CYCLES_NE_VN1.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI VN1= Ingress is not empty. This tracks one of the three rings that are used b= y the QPI agent. This can be used in conjunction with the QPI VN1 Ingress= Occupancy Accumulator event in order to calculate average queue occupancy.= Multiple ingress buffers can be tracked at a given time using multiple co= unters.; SNP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; DRS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; DRS Ingress= Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; HOM", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; HOM Ingress= Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCB", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCB Ingress= Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCS Ingress= Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NDR", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NDR Ingress= Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; SNP", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; SNP Ingress= Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; DRS", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= RS Ingress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; HOM", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; NCB", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CB Ingress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; NCS", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= CS Ingress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; NDR", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Allocations; SNP", - "EventCode": "0x15", - "EventName": "UNC_R3_RxR_INSERTS_VN1.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I VN1 Ingress. This tracks one of the three rings that are used by the QP= I agent. This can be used in conjunction with the QPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; DRS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.DRS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; HOM", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.HOM", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; HOM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCB", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; NCS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; NDR", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.NDR", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; NDR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Ingress Occupancy Accumulator; SNP", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY_VN1.SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI VN1= Ingress queue in each cycles. This tracks one of the three ring Ingress = buffers. This can be used with the QPI VN1 Ingress Not Empty event to cal= culate average occupancy or the QPI VN1 Ingress Allocations event in order= to calculate average queuing latency.; SNP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For AD Ring", - "EventCode": "0x28", - "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Acquired; For BL Ring", - "EventCode": "0x28", - "EventName": "UNC_R3_SBO0_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits acquired in a given = cycle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For AD Ring", - "EventCode": "0x2A", - "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo0 Credits Occupancy; For BL Ring", - "EventCode": "0x2A", - "EventName": "UNC_R3_SBO0_CREDIT_OCCUPANCY.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 0 credits in use in a given cy= cle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Acquired; For AD Ring", - "EventCode": "0x29", - "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Acquired; For BL Ring", - "EventCode": "0x29", - "EventName": "UNC_R3_SBO1_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits acquired in a given = cycle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Occupancy; For AD Ring", - "EventCode": "0x2B", - "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.AD", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "SBo1 Credits Occupancy; For BL Ring", - "EventCode": "0x2B", - "EventName": "UNC_R3_SBO1_CREDIT_OCCUPANCY.BL", - "PerPkg": "1", - "PublicDescription": "Number of Sbo 1 credits in use in a given cy= cle, per ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo0, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO0_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, AD Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Stall on No Sbo Credits; For SBo1, BL Ring", - "EventCode": "0x2C", - "EventName": "UNC_R3_STALL_NO_SBO_CREDIT.SBO1_BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles Egress is stalled waiting f= or an Sbo credit to become available. Per Sbo, per Ring.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; AD CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.DN_AD", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.DN_AK", - "PerPkg": "1", - "PublicDescription": "AK CounterClockwise Egress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.DN_BL", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.UP_AD", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; BL CW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.UP_AK", - "PerPkg": "1", - "PublicDescription": "AD Clockwise Egress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK.UP_BL", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Data Response (DRS). DRS is generally used to transmit data with coher= ency. For example, remote reads and writes, or cache to cache transfers wi= ll transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for the Home (HOM) message class. HOM is generally used to send requests, = request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Broadcast (NCB). NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Standard (NCS). NCS is commonly used for ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; NDR pac= kets are used to transmit a variety of protocol flits including grants and = completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Snoop (SNP) message class. SNP is used for outgoing snoops. Note that= snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; DRS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; HOM Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCB Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NDR Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; SNP Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; DRS Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Data Response (DRS). DRS is generally used to transmit data with coherency= . For example, remote reads and writes, or cache to cache transfers will t= ransmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; HOM Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = the Home (HOM) message class. HOM is generally used to send requests, requ= est responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCB Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Broadcast (NCB). NCB is generally used to transmit data witho= ut coherency. For example, non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCS Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Standard (NCS). NCS is commonly used for ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NDR Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; NDR packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; SNP Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Snoop (SNP) message class. SNP is used for outgoing snoops. Note that sno= op responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; DRS Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; HOM Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCB Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCS Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NDR Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; SNP Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions; HOM Message Class", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions; HOM Message Class", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; DRS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Data Response (DRS). DRS = is generally used to transmit data with coherency. For example, remote rea= ds and writes, or cache to cache transfers will transmit their data using D= RS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; HOM Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for the Home (HOM) message cla= ss. HOM is generally used to send requests, request responses, and snoop r= esponses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCB Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Broadcast (NC= B). NCB is generally used to transmit data without coherency. For example= , non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Standard (NCS= ).", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NDR Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; NDR packets are used to transmit a va= riety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; SNP Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Snoop (SNP) message class.= SNP is used for outgoing snoops. Note that snoop responses flow on the H= OM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Bounce Control", - "EventCode": "0xA", - "EventName": "UNC_S_BOUNCE_CONTROL", - "PerPkg": "1", - "Unit": "SBO" - }, - { - "BriefDescription": "Uncore Clocks", - "EventName": "UNC_S_CLOCKTICKS", - "PerPkg": "1", - "Unit": "SBO" - }, - { - "BriefDescription": "FaST wire asserted", - "EventCode": "0x9", - "EventName": "UNC_S_FAST_ASSERTED", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Down", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.DOWN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Down and Event", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.DOWN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Event ring polarity.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Down and Odd", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.DOWN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Up", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Up and Even", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "AD Ring In Use; Up and Odd", - "EventCode": "0x1B", - "EventName": "UNC_S_RING_AD_USED.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Down", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.DOWN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Down and Event", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.DOWN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Down and Odd", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.DOWN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Up", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Up and Even", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "AK Ring In Use; Up and Odd", - "EventCode": "0x1C", - "EventName": "UNC_S_RING_AK_USED.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Down", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.DOWN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Down and Event", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.DOWN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Event ring polarity.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Down and Odd", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.DOWN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Down and Odd ring polarity.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Up", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Up and Even", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Even ring polarity.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Up and Odd", - "EventCode": "0x1D", - "EventName": "UNC_S_RING_BL_USED.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. We really have two rings in HSX -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the UP d= irection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CB= os are on the left side of the ring, and the 2nd half are on the right side= of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is N= OT the same ring as CBo 2 UP AD because they are on opposite sides of the r= ing.; Filters for the Up and Odd ring polarity.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.AD_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Acknowledgements to core", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.AK_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Data Responses to core", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.BL_CORE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", - "EventCode": "0x5", - "EventName": "UNC_S_RING_BOUNCES.IV_CORE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Any", - "EventCode": "0x1E", - "EventName": "UNC_S_RING_IV_USED.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", - "UMask": "0xc", - "Unit": "SBO" - }, - { - "BriefDescription": "BL Ring in Use; Any", - "EventCode": "0x1E", - "EventName": "UNC_S_RING_IV_USED.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. There is only 1 IV ring in HSX. Therefore, i= f one wants to monitor the Even ring, they should select both UP_EVEN and D= N_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_ODD= .; Filters any polarity", - "UMask": "0x3", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.AD_CACHE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.AD_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.AK_CORE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.AK_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.BL_CORE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.BL_CORE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_RING_SINK_STARVED.IV_CORE", - "EventCode": "0x6", - "EventName": "UNC_S_RING_SINK_STARVED.IV_CORE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Bounces", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Credits", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Bounces", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Credits", - "EventCode": "0x15", - "EventName": "UNC_S_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress because a message (credited/bounceable) is being sent.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; AD - Bounces", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; AD - Credits", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; AK", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; BL - Bounces", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; BL - Credits", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Bypass; IV", - "EventCode": "0x12", - "EventName": "UNC_S_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Bypass the Sbo Ingress.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Bounces", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AD - Credits", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; AK", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Bounces", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; BL - Credits", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; IVF Credit", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x40", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; IV", - "EventCode": "0x14", - "EventName": "UNC_S_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Ingress cannot send a transaction onto the ring for= a long period of time. In this case, the Ingress but unable to forward to= Egress due to lack of credit.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; AD - Bounces", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; AD - Credits", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; AK", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; BL - Bounces", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; BL - Credits", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Allocations; IV", - "EventCode": "0x13", - "EventName": "UNC_S_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Ingress = The Ingress is used to queue up requests received from the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; AD - Bounces", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; AD - Credits", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; AK", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; BL - Bounces", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; BL - Credits", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Ingress Occupancy; IV", - "EventCode": "0x11", - "EventName": "UNC_S_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he Sbo. The Ingress is used to queue up requests received from the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_TxR_ADS_USED.AD", - "EventCode": "0x4", - "EventName": "UNC_S_TxR_ADS_USED.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_TxR_ADS_USED.AK", - "EventCode": "0x4", - "EventName": "UNC_S_TxR_ADS_USED.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_S_TxR_ADS_USED.BL", - "EventCode": "0x4", - "EventName": "UNC_S_TxR_ADS_USED.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; AD - Bounces", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; AD - Credits", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; AK", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; BL - Bounces", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; BL - Credits", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Allocations; IV", - "EventCode": "0x2", - "EventName": "UNC_S_TxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Sbo Egress. = The Egress is used to queue up requests destined for the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; AD - Bounces", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; AD - Credits", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; AK", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x10", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; BL - Bounces", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; BL - Credits", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Egress Occupancy; IV", - "EventCode": "0x1", - "EventName": "UNC_S_TxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Sbo. The egress is used to queue up requests destined for the ring.", - "UMask": "0x20", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto AD Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.AD", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x1", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto AK Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x2", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto BL Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.BL", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x4", - "Unit": "SBO" - }, - { - "BriefDescription": "Injection Starvation; Onto IV Ring", - "EventCode": "0x3", - "EventName": "UNC_S_TxR_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", - "UMask": "0x8", - "Unit": "SBO" - }, - { - "BriefDescription": "UNC_U_CLOCKTICKS", - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles. Filter from source CoreID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "Number outstanding register requests within = message channel tracker", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.CMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Livelock", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; LTError", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LTERROR", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T0", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T1", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Other", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.OTHER", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Trap", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.TRAP", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.UMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x20", - "Unit": "UBOX" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76518C77B6E for ; Thu, 13 Apr 2023 13:33:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229996AbjDMNdY (ORCPT ); Thu, 13 Apr 2023 09:33:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231567AbjDMNct (ORCPT ); Thu, 13 Apr 2023 09:32:49 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1337BBA4 for ; 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bh=g6L0/on0u5NMowuDk77nSJEhKTRaml/Cx+QEJI6a3/w=; b=aLeibrFklA+V9zLsHz/pxGlcPaqksP8KptP6zSVL4tUA2WYj8Sp2EFJv+avGBOkHhM Gzkc5U1O8xbEOHBRxf8fyyE6zi8rllT1oUQu+f6nQN2+1PTppy8o+mhAtjzlYDbtx/P/ HzowM5xhLPTFUKYQJTzt5X+NiV0rA6NhoavGr5KEvstnm3BNfIIcdzHNVf0sPw2QdNyq fbzKYchDAv4LJtzJ0PLfnPJg98mDOWzGlyNu7SfPMLWfQwqTttrwLpsNC6c+UjqfflpC 6iUzVZ0xhcuA5VccJ17bu3DctDzv4A++tz2wYphu1L0Leuu+KA5VCK0u5owKt7g0lw0u rdhw== X-Gm-Message-State: AAQBX9dzQuRl/qnpFK69cfGLjreuGcqD67f4GuAHceVy3Y6/SACiQqxk 24jN1StPZz5kH57B+OiN2qpGZ90FRM8F X-Google-Smtp-Source: AKy350ZKr/lxge0/zHGOmAQbbyRdLpuebKK1S/SCnvM7V1gNcyzdwIv+Jp/dTs6DlwxlgkiC3UQ5MlObIne+ X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a05:690c:706:b0:545:5f92:f7ee with SMTP id bs6-20020a05690c070600b005455f92f7eemr1435008ywb.2.1681392691349; Thu, 13 Apr 2023 06:31:31 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:39 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-12-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 11/21] perf vendor events intel: Fix uncore topics for icelake From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Move events from 'uncore-other' topic classification to interconnect. Signed-off-by: Ian Rogers --- .../arch/x86/icelake/uncore-interconnect.json | 74 +++++++++++++++++++ .../arch/x86/icelake/uncore-other.json | 72 ------------------ 2 files changed, 74 insertions(+), 72 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/icelake/uncore-interconn= ect.json diff --git a/tools/perf/pmu-events/arch/x86/icelake/uncore-interconnect.jso= n b/tools/perf/pmu-events/arch/x86/icelake/uncore-interconnect.json new file mode 100644 index 000000000000..8027590f1776 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/icelake/uncore-interconnect.json @@ -0,0 +1,74 @@ +[ + { + "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, etc.", + "EventCode": "0x84", + "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of any coherent requ= est at memory controller that were issued by any core. This event is not su= pported on ICL products but is supported on RKL products.", + "EventCode": "0x85", + "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of coherent reads pe= nding on data return from memory controller that were issued by any core. T= his event is not supported on ICL products but is supported on RKL products= .", + "EventCode": "0x85", + "EventName": "UNC_ARB_DAT_OCCUPANCY.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches. This event is not supported on I= CL products but is supported on RKL products.", + "EventCode": "0x80", + "EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches", + "EventCode": "0x81", + "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of all outgoing vali= d entries in ReqTrk. Such entry is defined as valid from its allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic. T= his event is not supported on ICL products but is supported on RKL products= .", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches. This event is not supported on I= CL products but is supported on RKL products.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Total number of all outgoing entries allocate= d. Accounts for Coherent and non-coherent traffic.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches. This event is not supported on ICL products but is= supported on RKL products.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + } +] diff --git a/tools/perf/pmu-events/arch/x86/icelake/uncore-other.json b/too= ls/perf/pmu-events/arch/x86/icelake/uncore-other.json index b27d95b2c857..c6596ba09195 100644 --- a/tools/perf/pmu-events/arch/x86/icelake/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/icelake/uncore-other.json @@ -1,76 +1,4 @@ [ - { - "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, etc.", - "EventCode": "0x84", - "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of any coherent requ= est at memory controller that were issued by any core. This event is not su= pported on ICL products but is supported on RKL products.", - "EventCode": "0x85", - "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of coherent reads pe= nding on data return from memory controller that were issued by any core. T= his event is not supported on ICL products but is supported on RKL products= .", - "EventCode": "0x85", - "EventName": "UNC_ARB_DAT_OCCUPANCY.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches. This event is not supported on I= CL products but is supported on RKL products.", - "EventCode": "0x80", - "EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches", - "EventCode": "0x81", - "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of all outgoing vali= d entries in ReqTrk. Such entry is defined as valid from its allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic. T= his event is not supported on ICL products but is supported on RKL products= .", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches. This event is not supported on I= CL products but is supported on RKL products.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Total number of all outgoing entries allocate= d. Accounts for Coherent and non-coherent traffic.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches. This event is not supported on ICL products but is= supported on RKL products.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, { "BriefDescription": "UNC_CLOCK.SOCKET", "EventCode": "0xff", --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:23 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 805CDC77B6E for ; Thu, 13 Apr 2023 13:32:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231489AbjDMNc5 (ORCPT ); Thu, 13 Apr 2023 09:32:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231286AbjDMNca (ORCPT ); Thu, 13 Apr 2023 09:32:30 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1ADB9BB8F for ; Thu, 13 Apr 2023 06:31:43 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id o9-20020a170902d4c900b001a2bef29d53so17185563plg.7 for ; Thu, 13 Apr 2023 06:31:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392701; x=1683984701; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=+eY6psQFy1BQ0T1k4hWrr4G3kElYN56hQp3y3qgAniM=; b=0HELH3plU5Ogsa25cqg4NL+lVSy6as5JXjdZfFgLOdyu+9WRIMmswjwPxOFpYwSK/2 FzGciCswLengYVHecKFxmzjla7FsM9anx+ASdnHFTQJwli1oYN5XidtTyp4pS8Y5YiZJ NzkISON1XdWegPKZmgkAclSg4NY3WOJNcnQ4lDi7AXfwMBsixGWfppUlifPblIvSzGfa dzrHbqyMVUKxrrr+xuO3Ky6r/L5rFV2nyk8q7ZBrGByo6Qw6hejdUNqU/hiVr9zErYhI Fkat9qr1C2VgH/ggZSOBwZqyt4g7cfTLAXMt0QE943Y5rqWV0h3GNwyYJbDUBoZZtzH2 KX3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392701; x=1683984701; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=+eY6psQFy1BQ0T1k4hWrr4G3kElYN56hQp3y3qgAniM=; b=ImNrTGmyqMUAt7HnjWxNfdQzHlXa2V/qXq/QmPApkshdWY7mSc05TGnKkdBjXUhw/Q 4Mhh2V3x7Eto7e7lsqHc+mxhWxdK1QuJ59wtQm7ktXAti76o1YBwhVvwi5E4h9SJMTse tVR/HyonXQTvwjMgv3zLeH/2JeOkoYd+sa/dZnPC5RsD1rngW32LOc8bF+YNLKw2lm8n F2XvatTX7gtYJrmBBQ7LuDAgbGtUM/q8e9J+nZS5Uw6v11hcOAXt+ehLG1FYwJjeLX9V o/t9yiqiTuR1wlfEk8968Hbk+QTuXvJv2s89VLyk1I++nG2KLtRx8O9Q2B/E5a+UnMfT yCuQ== X-Gm-Message-State: AAQBX9e6AKcGB/6WES3i20s+2KBP2FVx6nU2CXXpwJkLL5QF7MUDRk65 2rxv39Zs+gcUzrSWrK1YFuJXN6VZ97Xf X-Google-Smtp-Source: AKy350ZBhlVgXARmOIsYffgNRoHLDIrn4M2Qdm71Z43cl8LCQKyiIQ5EDGPBZZFpF3JKJ90kus23DCcdewOs X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a17:90a:1101:b0:246:d412:c19b with SMTP id d1-20020a17090a110100b00246d412c19bmr518676pja.5.1681392700722; Thu, 13 Apr 2023 06:31:40 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:40 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-13-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 12/21] perf vendor events intel: Fix uncore topics for icelakex From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/icelakex/uncore-cache.json | 9860 +++++ .../x86/icelakex/uncore-interconnect.json | 14571 +++++++ .../arch/x86/icelakex/uncore-io.json | 9270 +++++ .../arch/x86/icelakex/uncore-other.json | 33697 ---------------- 4 files changed, 33701 insertions(+), 33697 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.js= on create mode 100644 tools/perf/pmu-events/arch/x86/icelakex/uncore-intercon= nect.json create mode 100644 tools/perf/pmu-events/arch/x86/icelakex/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/icelakex/uncore-other.js= on diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json b/to= ols/perf/pmu-events/arch/x86/icelakex/uncore-cache.json new file mode 100644 index 000000000000..b6ce14ebf844 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json @@ -0,0 +1,9860 @@ +[ + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", + "Deprecated": "1", + "EventCode": "0x65", + "EventName": "UNC_CHA_2LM_NM_INVITOX.LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", + "Deprecated": "1", + "EventCode": "0x65", + "EventName": "UNC_CHA_2LM_NM_INVITOX.REMOTE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", + "Deprecated": "1", + "EventCode": "0x65", + "EventName": "UNC_CHA_2LM_NM_INVITOX.SETCONFLICT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC", + "Deprecated": "1", + "EventCode": "0x64", + "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.LLC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF", + "Deprecated": "1", + "EventCode": "0x64", + "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.SF", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR", + "Deprecated": "1", + "EventCode": "0x64", + "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.TOR", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", + "Deprecated": "1", + "EventCode": "0x70", + "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS2.MEMWR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", + "Deprecated": "1", + "EventCode": "0x70", + "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS2.MEMWRNI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": 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CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken= ", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Intermediate bypass Take= n : Counts the number of times when the CHA was able to bypass HA pipe on t= he way to iMC. This is a latency optimization for situations when there is= light loadings on the memory subsystem. This can be filtered by when the = bypass was taken and when it was not. : Filter for transactions that succee= ded in taking the intermediate bypass.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Not Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Not Taken : Counts the n= umber of times when the CHA was able to bypass HA pipe on the way to iMC. = This is a latency optimization for situations when there is light loadings = on the memory subsystem. This can be filtered by when the bypass was taken= and when it was not. : Filter for transactions that could not take the byp= ass, and issues a read to memory. Note that transactions that did not take = the bypass but did not issue read to memory will not be counted.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Taken : Counts the numbe= r of times when the CHA was able to bypass HA pipe on the way to iMC. This= is a latency optimization for situations when there is light loadings on t= he memory subsystem. This can be filtered by when the bypass was taken and= when it was not. : Filter for transactions that succeeded in taking the fu= ll bypass.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Clockticks of the uncore caching and home age= nt (CHA)", + "EventName": "UNC_CHA_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_CHA_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Mul= tiple Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Mu= ltiple Snoops : Counts the number of transactions that trigger a configurab= le number of cross snoops. Cores are snooped if the transaction looks up t= he cache and determines that it is necessary based on the operation type an= d what CoreValid bits are set. For example, if 2 CV bits are set on a data= read, the cores must have the data in S state so it is not necessary to sn= oop them. However, if only 1 CV bit is set the core my have modified the d= ata. If the transaction was an RFO, it would need to invalidate the lines.= This event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop = : Counts the number of transactions that trigger a configurable number of c= ross snoops. Cores are snooped if the transaction looks up the cache and d= etermines that it is necessary based on the operation type and what CoreVal= id bits are set. For example, if 2 CV bits are set on a data read, the cor= es must have the data in S state so it is not necessary to snoop them. How= ever, if only 1 CV bit is set the core my have modified the data. If the t= ransaction was an RFO, it would need to invalidate the lines. This event c= an be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requ= ests", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Core Req= uests : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Core Reques= ts", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Core Reque= sts : Counts the number of transactions that trigger a configurable number = of cross snoops. Cores are snooped if the transaction looks up the cache a= nd determines that it is necessary based on the operation type and what Cor= eValid bits are set. For example, if 2 CV bits are set on a data read, the= cores must have the data in S state so it is not necessary to snoop them. = However, if only 1 CV bit is set the core my have modified the data. If t= he transaction was an RFO, it would need to invalidate the lines. This eve= nt can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Eviction= : Counts the number of transactions that trigger a configurable number of = cross snoops. Cores are snooped if the transaction looks up the cache and = determines that it is necessary based on the operation type and what CoreVa= lid bits are set. For example, if 2 CV bits are set on a data read, the co= res must have the data in S state so it is not necessary to snoop them. Ho= wever, if only 1 CV bit is set the core my have modified the data. If the = transaction was an RFO, it would need to invalidate the lines. This event = can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Eviction := Counts the number of transactions that trigger a configurable number of cr= oss snoops. Cores are snooped if the transaction looks up the cache and de= termines that it is necessary based on the operation type and what CoreVali= d bits are set. For example, if 2 CV bits are set on a data read, the core= s must have the data in S state so it is not necessary to snoop them. Howe= ver, if only 1 CV bit is set the core my have modified the data. If the tr= ansaction was an RFO, it would need to invalidate the lines. This event ca= n be filtered based on who triggered the initial snoop(s).", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple External = Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple External= Snoops : Counts the number of transactions that trigger a configurable num= ber of cross snoops. Cores are snooped if the transaction looks up the cac= he and determines that it is necessary based on the operation type and what= CoreValid bits are set. For example, if 2 CV bits are set on a data read,= the cores must have the data in S state so it is not necessary to snoop th= em. However, if only 1 CV bit is set the core my have modified the data. = If the transaction was an RFO, it would need to invalidate the lines. This= event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single External Sn= oops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single External S= noops : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Snoop Tar= gets from Remote", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.REMOTE_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Snoop Ta= rgets from Remote : Counts the number of transactions that trigger a config= urable number of cross snoops. Cores are snooped if the transaction looks = up the cache and determines that it is necessary based on the operation typ= e and what CoreValid bits are set. For example, if 2 CV bits are set on a = data read, the cores must have the data in S state so it is not necessary t= o snoop them. However, if only 1 CV bit is set the core my have modified t= he data. If the transaction was an RFO, it would need to invalidate the li= nes. This event can be filtered based on who triggered the initial snoop(s= ).", + "UMask": "0x12", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Snoop Targe= t from Remote", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.REMOTE_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Snoop Targ= et from Remote : Counts the number of transactions that trigger a configura= ble number of cross snoops. Cores are snooped if the transaction looks up = the cache and determines that it is necessary based on the operation type a= nd what CoreValid bits are set. For example, if 2 CV bits are set on a dat= a read, the cores must have the data in S state so it is not necessary to s= noop them. However, if only 1 CV bit is set the core my have modified the = data. If the transaction was an RFO, it would need to invalidate the lines= . This event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Counter 0 Occupancy", + "EventCode": "0x1F", + "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Counter 0 Occupancy : Since occupancy counts= can only be captured in the Cbo's 0 counter, this event allows a user to c= apture occupancy related information by filtering the Cb0 occupancy count c= aptured in Counter 0. The filtering available is found in the control reg= ister - threshold, invert and edge detect. E.g. setting threshold to 1 ca= n effectively monitor how many cycles the monitored queue has an entry.", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline directory state lookup= s : Snoop Not Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", + "PerPkg": "1", + "PublicDescription": "Multi-socket cacheline directory state looku= ps : Snoop Not Needed : Counts the number of transactions that looked up th= e directory. Can be filtered by requests that had to snoop and those that = did not have to. : Filters for transactions that did not have to send any s= noops because the directory was clean.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline directory state lookup= s : Snoop Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.SNP", + "PerPkg": "1", + "PublicDescription": "Multi-socket cacheline directory state looku= ps : Snoop Needed : Counts the number of transactions that looked up the di= rectory. Can be filtered by requests that had to snoop and those that did = not have to. : Filters for transactions that had to send one or more snoops= because the directory was not clean.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline directory state update= s; memory write due to directory update from the home agent (HA) pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.HA", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline directory= state updates memory writes issued from the home agent (HA) pipe. This doe= s not include memory write requests which are for I (Invalid) or E (Exclusi= ve) cachelines.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline directory state update= s; memory write due to directory update from (table of requests) TOR pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.TOR", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline directory= state updates due to memory writes issued from the table of requests (TOR)= pipe which are the result of remote transaction hitting the SF/LLC and ret= urning data Core2Core. This does not include memory write requests which ar= e for I (Invalid) or E (Exclusive) cachelines.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : PMM Local", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.PMM_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : PMM Remote", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.PMM_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xBA", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xBA", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Read request from a remote socket which hit i= n the HitMe Cache to a line In the E state", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.EX_RDS", + "PerPkg": "1", + "PublicDescription": "Counts read requests from a remote socket wh= ich hit in the HitME cache (used to cache the multi-socket Directory state)= to a line in the E(Exclusive) state. This includes the following read opc= odes (RdCode, RdData, RdDataMigratory, RdCur, RdInv*, Inv*).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache : Remote= socket ownership read requests that hit in S state.", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ", + "PerPkg": "1", + "PublicDescription": "Counts Number of Hits in HitMe Cache : Remot= e socket ownership read requests that hit in S state. : Shared hit and op i= s RdInvOwn, RdInv, Inv*", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache : Remote= socket WBMtoE requests", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.WBMTOE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache : Remote= socket writeback to I or S requests", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S", + "PerPkg": "1", + "PublicDescription": "Counts Number of Hits in HitMe Cache : Remot= e socket writeback to I or S requests : op is WbMtoI, WbPushMtoI, WbFlush, = or WbMtoS", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d : Remote socket read requests", + "EventCode": "0x5E", + "EventName": "UNC_CHA_HITME_LOOKUP.READ", + "PerPkg": "1", + "PublicDescription": "Counts Number of times HitMe Cache is access= ed : Remote socket read requests : op is RdCode, RdData, RdDataMigratory, R= dCur, RdInvOwn, RdInv, Inv*", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d : Remote socket write (i.e. writeback) requests", + "EventCode": "0x5E", + "EventName": "UNC_CHA_HITME_LOOKUP.WRITE", + "PerPkg": "1", + "PublicDescription": "Counts Number of times HitMe Cache is access= ed : Remote socket write (i.e. writeback) requests : op is WbMtoE, WbMtoI, = WbPushMtoI, WbFlush, or WbMtoS", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache : Remo= te socket RdInvOwn requests that are not to shared line", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", + "PerPkg": "1", + "PublicDescription": "Counts Number of Misses in HitMe Cache : Rem= ote socket RdInvOwn requests that are not to shared line : No SF/LLC HitS/F= and op is RdInvOwn", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache : Remo= te socket read or invalidate requests", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV", + "PerPkg": "1", + "PublicDescription": "Counts Number of Misses in HitMe Cache : Rem= ote socket read or invalidate requests : op is RdCode, RdData, RdDataMigrat= ory, RdCur, RdInv, Inv*", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache : Remo= te socket RdInvOwn requests to shared line", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN", + "PerPkg": "1", + "PublicDescription": "Counts Number of Misses in HitMe Cache : Rem= ote socket RdInvOwn requests to shared line : SF/LLC HitS/F and op is RdInv= Own", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Deallocate HitME$ on Reads without RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : op is RspIFwd or RspIFwdWb for a local request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "PerPkg": "1", + "PublicDescription": "Counts the number of Allocate/Update to HitM= e Cache : op is RspIFwd or RspIFwdWb for a local request : Received RspFwdI= * for a local request, but converted HitME$ to SF entry", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Update HitMe Cache on RdInvOwn even if not RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : op is RspIFwd or RspIFwdWb for a remote request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM", + "PerPkg": "1", + "PublicDescription": "Counts the number of Allocate/Update to HitM= e Cache : op is RspIFwd or RspIFwdWb for a remote request : Updated HitME$ = on RspFwdI* or local HitM/E received for a remote request", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Update HitMe Cache to SHARed", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.SHARED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xB9", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xB9", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "HA to iMC Reads Issued : ISOCH", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "PublicDescription": "HA to iMC Reads Issued : ISOCH : Count of th= e number of reads issued to any of the memory controller channels. This ca= n be filtered by the priority of the reads.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Lin= e Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to any of the memory controller channels.= ", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Fu= ll Line", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH F= ull Line : Counts the total number of full line writes issued from the HA i= nto the memory controller.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial = Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : Partial= Non-ISOCH : Counts the total number of full line writes issued from the HA= into the memory controller.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Pa= rtial", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH P= artial : Counts the total number of full line writes issued from the HA int= o the memory controller.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x1fffff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All transactions from Remote = Agents", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ALL_REMOTE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All transactions from Remote= Agents : Counts the number of times the LLC was accessed - this includes c= ode, data, prefetches and hints coming from L2. This has numerous filters = available. Note the non-standard filtering equation. This event will coun= t requests that lookup the cache multiple times with multiple increments. = One must ALWAYS select a state or states (in the umask field) to match. Ot= herwise, the event will count nothing.", + "UMask": "0x1e20ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Any local or remote transaction to the LLC, includi= ng prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE", + "PerPkg": "1", + "UMask": "0x1bd0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_LOCAL", + "PerPkg": "1", + "UMask": "0x19d0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Code Reads", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Code Reads : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1bd0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote CRd transactions to the LLC. This = includes CRd prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Requests that come from t= he local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_LOCAL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "UMask": "0x19d0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Code Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Code Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", + "UMask": "0x1bd001", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Requests that come from a= Remote socket.", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_REMOTE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", + "UMask": "0x1a10ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ_REMOTE", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_REMOTE", + "PerPkg": "1", + "UMask": "0x1a10ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Local request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Local request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Any local transaction to the LLC, including prefe= tches from the Core", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", + "PerPkg": "1", + "UMask": "0x1bc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1bc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL", + "PerPkg": "1", + "UMask": "0x1fc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Request Filter : C= ounts the number of times the LLC was accessed - this includes code, data, = prefetches and hints coming from L2. This has numerous filters available. = Note the non-standard filtering equation. This event will count requests = that lookup the cache multiple times with multiple increments. One must AL= WAYS select a state or states (in the umask field) to match. Otherwise, th= e event will count nothing. : Read transactions.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x19c1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", + "UMask": "0x1bc101", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uests that come from a Remote socket", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1a01ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DMND_READ_LOCAL", + "PerPkg": "1", + "UMask": "0x841ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : E State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Exclusive State", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : F State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : F State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Forward State", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1a44ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Requests = that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV_LOCAL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1844ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate requests = that come from a Remote socket.", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV_REMOTE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1a04ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush or Invalidate Filter := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : I State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.I", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : I State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Miss", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Prefetch requ= ests to the LLC that come from the local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x189dff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Local LLC prefetch requests (= from LLC) Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Local LLC prefetch requests = (from LLC) Filter : Counts the number of times the LLC was accessed - this = includes code, data, prefetches and hints coming from L2. This has numerou= s filters available. Note the non-standard filtering equation. This event= will count requests that lookup the cache multiple times with multiple inc= rements. One must ALWAYS select a state or states (in the umask field) to = match. Otherwise, the event will count nothing. : Any local LLC prefetch t= o the LLC", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LLC_PF_LOCAL", + "PerPkg": "1", + "UMask": "0x189dff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LOC_HOM", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCALLY_HOMED_ADDRESS", + "PerPkg": "1", + "UMask": "0xbdfff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed locally Fi= lter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed locally F= ilter : Counts the number of times the LLC was accessed - this includes cod= e, data, prefetches and hints coming from L2. This has numerous filters av= ailable. Note the non-standard filtering equation. This event will count = requests that lookup the cache multiple times with multiple increments. On= e must ALWAYS select a state or states (in the umask field) to match. Othe= rwise, the event will count nothing. : Transaction whose address resides in= the local MC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed locally", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed locally := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS set umask bit 0 and select a state or states to match. Otherwise, t= he event will count nothing. : Transaction whose address resides in the loc= al MC.", + "UMask": "0xbdfff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : M State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.M", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : M State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Modified State", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1fe001", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Write Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Writeback transactions to the LLC This includes = all write transactions -- both Cacheable and UC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remote non-snoop request Filt= er", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.PREF_OR_DMND_REMOTE_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remote non-snoop request Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing. : Non-snoop transactions to the LLC from= remote agent", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Reads", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Reads : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS select a state= or states (in the umask field) to match. Otherwise, the event will count = nothing.", + "UMask": "0x1bd9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Locally HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Locally HOMed : Counts the number of times the LLC was accessed - this= includes code, data, prefetches and hints coming from L2. This has numero= us filters available. Note the non-standard filtering equation. This even= t will count requests that lookup the cache multiple times with multiple in= crements. One must ALWAYS select a state or states (in the umask field) to= match. Otherwise, the event will count nothing.", + "UMask": "0x9d9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Remotely HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_REM_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Remotely HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", + "UMask": "0x11d9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Read Misses : Counts the num= ber of times the LLC was accessed - this includes code, data, prefetches an= d hints coming from L2. This has numerous filters available. Note the non= -standard filtering equation. This event will count requests that lookup t= he cache multiple times with multiple increments. One must ALWAYS select a= state or states (in the umask field) to match. Otherwise, the event will = count nothing.", + "UMask": "0x1bd901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally HOMed Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally HOMed Read Misses : = Counts the number of times the LLC was accessed - this includes code, data,= prefetches and hints coming from L2. This has numerous filters available.= Note the non-standard filtering equation. This event will count requests= that lookup the cache multiple times with multiple increments. One must A= LWAYS select a state or states (in the umask field) to match. Otherwise, t= he event will count nothing.", + "UMask": "0xbd901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely HOMed Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_REM_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely HOMed Read Misses := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", + "UMask": "0x13d901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely requested Read or Sn= oop Misses that are Remotely HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_OR_SNOOP_REMOTE_MISS_REM_HOM= ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely requested Read or S= noop Misses that are Remotely HOMed : Counts the number of times the LLC wa= s accessed - this includes code, data, prefetches and hints coming from L2.= This has numerous filters available. Note the non-standard filtering equ= ation. This event will count requests that lookup the cache multiple times= with multiple increments. One must ALWAYS select a state or states (in th= e umask field) to match. Otherwise, the event will count nothing.", + "UMask": "0x161901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely Requested Reads that= are Locally HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_REMOTE_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely Requested Reads tha= t are Locally HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", + "UMask": "0xa19ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Reads that Hit the Snoop Filt= er", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_SF_HIT", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Reads that Hit the Snoop Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing.", + "UMask": "0x1bd90e", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REM_HOM", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTELY_HOMED_ADDRESS", + "PerPkg": "1", + "UMask": "0x15dfff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed remotely F= ilter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed remotely = Filter : Counts the number of times the LLC was accessed - this includes co= de, data, prefetches and hints coming from L2. This has numerous filters a= vailable. Note the non-standard filtering equation. This event will count= requests that lookup the cache multiple times with multiple increments. O= ne must ALWAYS select a state or states (in the umask field) to match. Oth= erwise, the event will count nothing. : Transaction whose address resides i= n a remote MC", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remote snoop request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remote snoop request Filter = : Counts the number of times the LLC was accessed - this includes code, dat= a, prefetches and hints coming from L2. This has numerous filters availabl= e. Note the non-standard filtering equation. This event will count reques= ts that lookup the cache multiple times with multiple increments. One must= ALWAYS select a state or states (in the umask field) to match. Otherwise,= the event will count nothing. : Snoop transactions to the LLC from remote = agent", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Snoop Request= s from a Remote Socket", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x1c19ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed remotely", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REM_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed remotely = : Counts the number of times the LLC was accessed - this includes code, dat= a, prefetches and hints coming from L2. This has numerous filters availabl= e. Note the non-standard filtering equation. This event will count reques= ts that lookup the cache multiple times with multiple increments. One must= ALWAYS set umask bit 0 and select a state or states to match. Otherwise, = the event will count nothing. : Transaction whose address resides in a remo= te MC", + "UMask": "0x15dfff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1bc8ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote RFO transactions to the LLC. This = includes RFO prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests that come from t= he local socket (usually the core)", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_LOCAL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x19c8ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1bc801", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.RFO_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_PREF_LOCAL", + "PerPkg": "1", + "UMask": "0x888ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests that come from a= Remote socket.", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_REMOTE", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1a08ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : S State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Shared State", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - E State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Exclusive State", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - H State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_H", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - H State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit HitMe State", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - S State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Shared State", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Filters Requests for those th= at write info into the cache", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", + "UMask": "0x1a42ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL", + "PerPkg": "1", + "UMask": "0x842ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_REMOTE", + "PerPkg": "1", + "UMask": "0x17c2ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : All Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.ALL", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : All Lines Victimized : Co= unts the number of lines that were victimized on a fill. This can be filte= red by the state that the line was in.", + "UMask": "0xf", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in E state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in E state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - All Lines : Count= s the number of lines that were victimized on a fill. This can be filtered= by the state that the line was in.", + "UMask": "0x200f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in E State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2002", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in M State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2001", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local Only", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local Only : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in S State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2004", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in M state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in M state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Remote - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Remote - All Lines : Coun= ts the number of lines that were victimized on a fill. This can be filtere= d by the state that the line was in.", + "UMask": "0x800f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Remote - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Remote - Lines in E State= : Counts the number of lines that were victimized on a fill. This can be = filtered by the state that the line was in.", + "UMask": "0x8002", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Remote - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Remote - Lines in M State= : Counts the number of lines that were victimized on a fill. This can be = filtered by the state that the line was in.", + "UMask": "0x8001", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Remote Only", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ONLY", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Remote Only : Counts the = number of lines that were victimized on a fill. This can be filtered by th= e state that the line was in.", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Remote - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Remote - Lines in S State= : Counts the number of lines that were victimized on a fill. This can be = filtered by the state that the line was in.", + "UMask": "0x8004", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in S State : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Miss", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Miss : Miscellaneous= events in the Cbo.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Victim", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Victim : Miscellaneo= us events in the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Number of times that an RFO hit in S state.", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RFO_HIT_S", + "PerPkg": "1", + "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Silent Snoop Eviction", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Silent Snoop Eviction : Miscellan= eous events in the Cbo. : Counts the number of times when a Snoop hit in FS= E states and triggered a silent eviction. This is useful because this info= rmation is lost in the PRE encodings.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Write Combining Aliasing", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.WC_ALIASING", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Write Combining Aliasing : Miscel= laneous events in the Cbo. : Counts the number of times that a USWC write (= WCIL(F)) transaction hit in the LLC in M state, triggering a WBMtoI followe= d by the USWC write. This occurs when there is WC aliasing.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xE6", + "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xE6", + "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Local InvItoE", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.LOCAL_INVITOE", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Local InvItoE : Count = of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to be b= roadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Local Rd", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.LOCAL_READ", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Local Rd : Count of OS= B snoop broadcasts. Counts by 1 per request causing OSB snoops to be broadc= ast. Does not count all the snoops generated by OSB.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Off", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.OFF_PWRHEURISTIC", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Off : Count of OSB sno= op broadcasts. Counts by 1 per request causing OSB snoops to be broadcast. = Does not count all the snoops generated by OSB.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Remote Rd", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.REMOTE_READ", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Remote Rd : Count of O= SB snoop broadcasts. Counts by 1 per request causing OSB snoops to be broad= cast. Does not count all the snoops generated by OSB.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : Remote Rd InvItoE", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.REMOTE_READINVITOE", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : Remote Rd InvItoE : Co= unt of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to = be broadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadcas= t", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.RFO_HITS_SNP_BCAST", + "PerPkg": "1", + "PublicDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadca= st : Count of OSB snoop broadcasts. Counts by 1 per request causing OSB sno= ops to be broadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ADEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.AKEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ALLRSFWAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.BLEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.FSF_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLOWSNP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLWAYRSV", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_PAMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_WAYMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.HACREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IDX_INPIPE", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IPQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IRQ_PMM", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IRQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ISMQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IVEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.LLC_WAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.NOTALLOWSNOOP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ONE_FSF_VIC", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ONE_RSP_CON", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.PMM_MEMMODE_TORMATCH_MULTI", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.PMM_MEMMODE_TOR_MATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.PRQ_PMM", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.PTL_INPIPE", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.RMW_SETMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.RRQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.SETMATCHENTRYWSCT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.SF_WAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.TOPA_MATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.TORID_MATCH_GO_P", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_REQ", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_RSP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCB", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCS", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_RSP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_WB", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.WAY_MATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", + "EventCode": "0x65", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", + "EventCode": "0x65", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", + "EventCode": "0x65", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PMM Memory Mode related events : Counts the n= umber of times CHA saw NM Set conflict in SF/LLC", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC", + "PerPkg": "1", + "PublicDescription": "PMM Memory Mode related events : Counts the = number of times CHA saw NM Set conflict in SF/LLC : NM evictions due to ano= ther read to the same near memory set in the LLC.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PMM Memory Mode related events : Counts the n= umber of times CHA saw NM Set conflict in SF/LLC", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF", + "PerPkg": "1", + "PublicDescription": "PMM Memory Mode related events : Counts the = number of times CHA saw NM Set conflict in SF/LLC : NM evictions due to ano= ther read to the same near memory set in the SF.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PMM Memory Mode related events : Counts the n= umber of times CHA saw NM Set conflict in TOR", + "EventCode": "0x64", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR", + "PerPkg": "1", + "PublicDescription": "PMM Memory Mode related events : Counts the = number of times CHA saw NM Set conflict in TOR : No Reject in the CHA due t= o a pending read to the same near memory set in the TOR.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC", + "EventCode": "0x70", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", + "EventCode": "0x70", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", + "EventCode": "0x70", + "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.REJ_IRQ", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.REJ_IRQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.SLOW_INSERT", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.SLOW_INSERT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.THROTTLE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_IRQ", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.THROTTLE_IRQ", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_PRQ", + "EventCode": "0x66", + "EventName": "UNC_CHA_PMM_QOS.THROTTLE_PRQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO", + "EventCode": "0x67", + "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO", + "PerPkg": "1", + "PublicDescription": ": count # of FAST TOR Request inserted to ha= _tor_req_fifo", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO", + "EventCode": "0x67", + "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO", + "PerPkg": "1", + "PublicDescription": ": count # of SLOW TOR Request inserted to ha= _pmm_tor_req_fifo", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC0 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC10", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC10", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC10 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 10 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC11", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC11", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC11 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 11 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC12", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC12", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC12 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 12 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC13", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC13", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC13 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 13 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC2 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC3 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC4 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC5 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC6", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC6", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC6 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 6 only.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC7", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC7", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC7 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 7 only.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC8", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC8", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC8 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 8 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC9", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC9", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC9 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 9 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and remote INVI= TOE requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and are sent to= the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Remote INVITOE requests (exclusive ownership = of a cache line without receiving data) sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a remote socket for exclusive ownership of a cache line without receivi= ng data (INVITOE) to the CHA.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Local read requests that miss the SF/LLC and = remote read requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS", + "PerPkg": "1", + "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Local read requests that miss the SF/LLC and = are sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Remote read requests sent to the CHA's home a= gent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Local write requests that miss the SF/LLC and= remote write requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "Local write requests that miss the SF/LLC and= are sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Remote write requests sent to the CHA's home = agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_CHA_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IPQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IPQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected= ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ Rejecte= d : Counts number of allocations per cycle into the specified Ingress queue= .", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : RRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.RRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : RRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : WBQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.WBQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : WBQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IPQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C or SF Way", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : L= LC or SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : ANY0", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : HA", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : ANY0", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : HA", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : IPQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : IPQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : IRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : IRQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : RRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.RRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : RRQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : WBQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.WBQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : WBQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD REQ on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI AK Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject AK ring me= ssage", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCB on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCS on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for generat= ing a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL WB on VN0 : Retry= Queue Inserts of Transactions that were already in another Retry Q (sub-ev= ents encode the reason for the next reject) : No BL VN0 credit for generati= ng a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI IV Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject IV ring me= ssage", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Allow Snoop", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Allow Snoop : Retry = Queue Inserts of Transactions that were already in another Retry Q (sub-eve= nts encode the reason for the next reject)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : ANY0", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : ANY0 : Retry Queue I= nserts of Transactions that were already in another Retry Q (sub-events enc= ode the reason for the next reject) : Any condition listed in the Other0 Re= ject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : HA", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : HA : Retry Queue Ins= erts of Transactions that were already in another Retry Q (sub-events encod= e the reason for the next reject)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC OR SF Way : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Way conflict with another re= quest that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC Victim : Retry Q= ueue Inserts of Transactions that were already in another Retry Q (sub-even= ts encode the reason for the next reject)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : PhyAddr Match", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : PhyAddr Match : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Address match with an outsta= nding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : SF Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : SF Victim : Retry Qu= eue Inserts of Transactions that were already in another Retry Q (sub-event= s encode the reason for the next reject) : Requests did not generate Snoop = filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Victim : Retry Queue= Inserts of Transactions that were already in another Retry Q (sub-events e= ncode the reason for the next reject)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the PRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD REQ on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Re= quest", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI AK R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCB on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCS on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL WB on VN0= : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)= : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Re= quest", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI IV R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Allow Snoop = : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : ANY0", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : ANY0 : REQUE= STQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : Any c= ondition listed in the WBQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : HA", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : HA : REQUEST= Q includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way= ", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC OR SF Wa= y : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC Victim := REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match= ", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : PhyAddr Matc= h : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : SF Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : SF Victim : = REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : = Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Victim : REQ= UESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : AD REQ on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : AD RSP on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : Non UPI AK Request : N= umber of times a transaction flowing through the RRQ (Remote Response Queue= ) had to retry. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL NCB on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL NCS on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL RSP on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : BL WB on VN0 : Number = of times a transaction flowing through the RRQ (Remote Response Queue) had = to retry. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 0 : Non UPI IV Request : N= umber of times a transaction flowing through the RRQ (Remote Response Queue= ) had to retry. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : Allow Snoop", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : Allow Snoop : Number o= f times a transaction flowing through the RRQ (Remote Response Queue) had t= o retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : ANY0", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : ANY0 : Number of times= a transaction flowing through the RRQ (Remote Response Queue) had to retry= . : Any condition listed in the RRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : HA", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : HA : Number of times a= transaction flowing through the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : LLC OR SF Way", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : LLC OR SF Way : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : LLC Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : LLC Victim : Number of= times a transaction flowing through the RRQ (Remote Response Queue) had to= retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : PhyAddr Match", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : PhyAddr Match : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : SF Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : SF Victim : Number of = times a transaction flowing through the RRQ (Remote Response Queue) had to = retry. : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects - Set 1 : Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "RRQ Rejects - Set 1 : Victim : Number of tim= es a transaction flowing through the RRQ (Remote Response Queue) had to ret= ry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : AD REQ on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : AD RSP on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : Non UPI AK Request : N= umber of times a transaction flowing through the WBQ (Writeback Queue) had = to retry. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL NCB on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL NCS on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL RSP on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : BL WB on VN0 : Number = of times a transaction flowing through the WBQ (Writeback Queue) had to ret= ry. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 0 : Non UPI IV Request : N= umber of times a transaction flowing through the WBQ (Writeback Queue) had = to retry. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : Allow Snoop", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : Allow Snoop : Number o= f times a transaction flowing through the WBQ (Writeback Queue) had to retr= y.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : ANY0", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : ANY0 : Number of times= a transaction flowing through the WBQ (Writeback Queue) had to retry. : An= y condition listed in the WBQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : HA", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : HA : Number of times a= transaction flowing through the WBQ (Writeback Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : LLC OR SF Way", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : LLC OR SF Way : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : LLC Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : LLC Victim : Number of= times a transaction flowing through the WBQ (Writeback Queue) had to retry= .", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : PhyAddr Match", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : PhyAddr Match : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : SF Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : SF Victim : Number of = times a transaction flowing through the WBQ (Writeback Queue) had to retry.= : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects - Set 1 : Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "WBQ Rejects - Set 1 : Victim : Number of tim= es a transaction flowing through the WBQ (Writeback Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_CHA_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.E_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores? cache.? Snoop filter capacity= evictions occur when the snoop filter is full and evicts an existing entry= to track a new entry.? Does not count clean evictions such as when a core?= s cache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.M_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores? cache.? Snoop filter capacity = evictions occur when the snoop filter is full and evicts an existing entry = to track a new entry.? Does not count clean evictions such as when a core?s= cache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.S_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores? cache.? Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry.? Does not count clean evictions such as when a core?s c= ache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : All", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : All : Counts the number of sno= ops issued by the HA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast snoops for Local Requ= ests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast snoops for Local Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f broadcast snoops issued by the HA responding to local requests", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast snoops for Remote Req= uests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast snoops for Remote Re= quests : Counts the number of snoops issued by the HA. : Counts the number = of broadcast snoops issued by the HA responding to remote requests", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Directed snoops for Local Reque= sts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Directed snoops for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= directed snoops issued by the HA responding to local requests", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Directed snoops for Remote Requ= ests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Directed snoops for Remote Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f directed snoops issued by the HA responding to remote requests", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Snoops sent for Local Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Snoops sent for Local Requests= : Counts the number of snoops issued by the HA. : Counts the number of bro= adcast or directed snoops issued by the HA responding to local requests", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Snoops sent for Remote Requests= ", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Snoops sent for Remote Request= s : Counts the number of snoops issued by the HA. : Counts the number of br= oadcast or directed snoops issued by the HA responding to remote requests", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RSPCNFLCT*", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : RSPCNFLCT* : Coun= ts the total number of RspI snoop responses received. Whenever a snoops ar= e issued, one or more snoop responses will be returned depending on the top= ology of the system. In systems larger than 2s, when multiple snoops are = returned this will count all the snoops that are received. For example, if= 3 snoops were issued and returned RspI, RspS, and RspSFwd; then each of th= ese sub-events would increment by 1. : Filters for snoops responses of RspC= onflict. This is returned when a snoop finds an existing outstanding trans= action in a remote caching agent when it CAMs that caching agent. This tri= ggers conflict resolution hardware. This covers both RspCnflct and RspCnfl= ctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspFwd", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : RspFwd : Counts t= he total number of RspI snoop responses received. Whenever a snoops are is= sued, one or more snoop responses will be returned depending on the topolog= y of the system. In systems larger than 2s, when multiple snoops are retu= rned this will count all the snoops that are received. For example, if 3 s= noops were issued and returned RspI, RspS, and RspSFwd; then each of these = sub-events would increment by 1. : Filters for a snoop response of RspFwd t= o a CA request. This snoop response is only possible for RdCur when a snoo= p HITM/E in a remote caching agent and it directly forwards data to a reque= stor without changing the requestor's cache line state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : Rsp*Fwd*WB", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPFWDWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : Rsp*Fwd*WB : Coun= ts the total number of RspI snoop responses received. Whenever a snoops ar= e issued, one or more snoop responses will be returned depending on the top= ology of the system. In systems larger than 2s, when multiple snoops are = returned this will count all the snoops that are received. For example, if= 3 snoops were issued and returned RspI, RspS, and RspSFwd; then each of th= ese sub-events would increment by 1. : Filters for a snoop response of Rsp*= Fwd*WB. This snoop response is only used in 4s systems. It is used when a= snoop HITM's in a remote caching agent and it directly forwards data to a = requestor, and simultaneously returns data to the home to be written back t= o memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspI", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPI", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe RspI Snoop Response was received which indicates the remote cache does n= ot have the data, or when the remote cache silently evicts data (such as wh= en an RFO: the Read for Ownership issued before a write hits non-modified d= ata).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspIFwd", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspIFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data and the requesting agent is able to acquire the dat= a in E (Exclusive) or M (modified) states. This is commonly returned with = RFO (the Read for Ownership issued before a write) transactions. The snoop= could have either been to a cacheline in the M,E,F (Modified, Exclusive or= Forward) states.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspS", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPS", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe RspS Snoop Response was received which indicates when a remote cache has= data but is not forwarding it. It is a way to let the requesting socket k= now that it cannot allocate the data in E state. No data is sent with S Rs= pS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspSFwd", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspSFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data but held on to its current copy. This is common fo= r data and code reads that hit in a remote socket in E (Exclusive) or F (Fo= rward) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : Rsp*WB", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : Rsp*WB : Counts t= he total number of RspI snoop responses received. Whenever a snoops are is= sued, one or more snoop responses will be returned depending on the topolog= y of the system. In systems larger than 2s, when multiple snoops are retu= rned this will count all the snoops that are received. For example, if 3 s= noops were issued and returned RspI, RspS, and RspSFwd; then each of these = sub-events would increment by 1. : Filters for a snoop response of RspIWB o= r RspSWB. This is returned when a non-RFO request hits in M state. Data a= nd Code Reads can return either RspIWB or RspSWB depending on how the syste= m has been configured. InvItoE transactions will also return RspIWB becaus= e they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspCnflct", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspCnflct := Number of snoop responses received for a Local request : Filters for snoo= ps responses of RspConflict to local CA requests. This is returned when a = snoop finds an existing outstanding transaction in a remote caching agent w= hen it CAMs that caching agent. This triggers conflict resolution hardware= . This covers both RspCnflct and RspCnflctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspFwd : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspFwd to local CA requests. This snoop response is only poss= ible for RdCur when a snoop HITM/E in a remote caching agent and it directl= y forwards data to a requestor without changing the requestor's cache line = state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*FWD*WB = : Number of snoop responses received for a Local request : Filters for a s= noop response of Rsp*Fwd*WB to local CA requests. This snoop response is o= nly used in 4s systems. It is used when a snoop HITM's in a remote caching= agent and it directly forwards data to a requestor, and simultaneously ret= urns data to the home to be written back to memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspI", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspI : Numb= er of snoop responses received for a Local request : Filters for snoops re= sponses of RspI to local CA requests. RspI is returned when the remote cac= he does not have the data, or when the remote cache silently evicts data (s= uch as when an RFO hits non-modified data).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspIFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspIFwd : N= umber of snoop responses received for a Local request : Filters for snoop = responses of RspIFwd to local CA requests. This is returned when a remote = caching agent forwards data and the requesting agent is able to acquire the= data in E or M states. This is commonly returned with RFO transactions. = It can be either a HitM or a HitFE.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspS", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspS : Numb= er of snoop responses received for a Local request : Filters for snoop res= ponses of RspS to local CA requests. RspS is returned when a remote cache = has data but is not forwarding it. It is a way to let the requesting socke= t know that it cannot allocate the data in E state. No data is sent with S= RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspSFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspSFwd : N= umber of snoop responses received for a Local request : Filters for a snoo= p response of RspSFwd to local CA requests. This is returned when a remote= caching agent forwards data but holds on to its currently copy. This is c= ommon for data and code reads that hit in a remote socket in E or F state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*WB : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspIWB or RspSWB to local CA requests. This is returned when = a non-RFO request hits in M state. Data and Code Reads can return either R= spIWB or RspSWB depending on how the system has been configured. InvItoE t= ransactions will also return RspIWB because they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIData= M", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM= ", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit LLC", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit SF", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t LLC", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t SF", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0xc001ffff", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DDR4 Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DDR4 Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR4", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : SF/LLC Evictions", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts. : TOR allocation occurred as a result of SF/LLC e= victions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Hits", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushes issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushOpts issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushOpts issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRDs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRDs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", + "UMask": "0xc817ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores : = Counts the number of entries successfully inserted into the TOR that match = qualifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es : Counts the number of entries successfully inserted into the TOR that m= atch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc897ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xc817fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores tha= t hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores th= at hit the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that hit the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores th= at Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc897fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that H= it LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by iA Cores that = Hit LLC : Counts the number of entries successfully inserted into the TOR t= hat match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", + "UMask": "0xcc47fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores = that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefCode issued by iA Cores= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", + "UMask": "0xcccffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCRD", + "PerPkg": "1", + "UMask": "0xcccffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores = that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefData issued by iA Cores= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", + "UMask": "0xccd7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDRD", + "PerPkg": "1", + "UMask": "0xccd7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that hit the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xccc7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores th= at hit in the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_SPECITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : SpecItoMs issued by iA Cores t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xcc57fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", + "UMask": "0xcc47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cor= es", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears issued by iA Co= res : Counts the number of entries successfully inserted into the TOR that = match qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", + "UMask": "0xcd47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefCode issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xcccfff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefData issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xccd7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = : Counts the number of entries successfully inserted into the TOR that matc= h qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", + "UMask": "0xccc7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd issued by iA Cores that Mi= ssed the LLC - HOMed locally : Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC - HOMed locally : Counts the number of entries successfu= lly inserted into the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC - HOMed remotely : Counts the number of entries successf= ully inserted into the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd issued by iA Cores that Mi= ssed the LLC - HOMed remotely : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc817fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing DDR Mem that Missed the LLC : Counts the number of entries successfully= inserted into the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8178601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC - HOMed locally : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc816fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing DDR Mem that Missed the LLC - HOMed locally : Counts the number of entr= ies successfully inserted into the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc8168601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing PMM Mem that Missed the LLC - HOMed locally : Counts the number of entr= ies successfully inserted into the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc8168a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt issued by iA Cores that= missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt issued by iA Cores tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that missed the LLC : Counts the number of entries successfully inserted= into the TOR that match qualifications specified by the subevent. Does n= ot include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing PMM Mem that Missed the LLC : Counts the number of entries successfully= inserted into the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8178a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores th= at Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc897fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting DDR Mem that Missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc8978601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read prefetch from local I= A that misses in the snoop filter", + "UMask": "0xc896fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting DDR Mem that Missed the LLC - HOMed locally : Counts the number of= entries successfully inserted into the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc8968601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting PMM Mem that Missed the LLC - HOMed locally : Counts the number of= entries successfully inserted into the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc8968a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting PMM Mem that Missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc8978a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; DRd Pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read prefetch from remote = IA that misses in the snoop filter", + "UMask": "0xc8977e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting DDR Mem that Missed the LLC - HOMed remotely : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts.", + "UMask": "0xc8970601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting PMM Mem that Missed the LLC - HOMed remotely : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts.", + "UMask": "0xc8970a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC - HOMed remotely : Counts the number of entries successfully = inserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8177e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing DDR Mem that Missed the LLC - HOMed remotely : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0xc8170601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing PMM Mem that Missed the LLC - HOMed remotely : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0xc8170a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc8678601", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_DRAM", + "PerPkg": "1", + "UMask": "0xc8678601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_= DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc8668601", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_= DRAM", + "PerPkg": "1", + "UMask": "0xc8668601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_= PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc8668a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc8678a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE= _DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc8670601", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE= _DRAM", + "PerPkg": "1", + "UMask": "0xc8670601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE= _PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc8670a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that M= issed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by iA Cores that = Missed LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xcc47fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores = that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefCode issued by iA Cores= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xcccffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores = that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefData issued by iA Cores= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xccd7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that missed the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", + "UMask": "0xccc7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting DDR that missed the LLC - HOMed locally : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", + "UMask": "0xc8668601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting PMM that missed the LLC - HOMed locally : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", + "UMask": "0xc8668a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting DDR that missed the LLC - HOMed locally : Counts the number of entries= successfully inserted into the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and int= errupts.", + "UMask": "0xc86e8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting PMM that missed the LLC - HOMed locally : Counts the number of entries= successfully inserted into the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and int= errupts.", + "UMask": "0xc86e8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_DDR= ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86f8601", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_DRA= M", + "PerPkg": "1", + "UMask": "0xc86f8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOC= AL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86e8601", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOC= AL_DRAM", + "PerPkg": "1", + "UMask": "0xc86e8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOC= AL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86e8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_PMM= ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86f8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REM= OTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86f0601", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REM= OTE_DRAM", + "PerPkg": "1", + "UMask": "0xc86f0601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REM= OTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86f0a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting DDR that missed the LLC - HOMed remotely : Counts the number of entri= es successfully inserted into the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc8670601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed remote memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting PMM that missed the LLC - HOMed remotely : Counts the number of entri= es successfully inserted into the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc8670a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting DDR that missed the LLC - HOMed remotely : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", + "UMask": "0xc86f0601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting PMM that missed the LLC - HOMed remotely : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", + "UMask": "0xc86f0a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC - HOMed locally : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc806fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC - HOMed locally : Counts the number of entries successfu= lly inserted into the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc886fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC - HOMed remotely : Counts the number of entries successf= ully inserted into the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8877e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC - HOMed remotely : Counts the number of entries successfully = inserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8077e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores th= at missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_SPECITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : SpecItoMs issued by iA Cores t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xcc57fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : UCRdFs issued by iA Cores that= Missed LLC : Counts the number of entries successfully inserted into the T= OR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting DDR that missed the LLC : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting PMM that missed the LLC : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting DDR that missed the LLC : Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting PMM that missed the LLC : Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WiLs issued by iA Cores that M= issed LLC : Counts the number of entries successfully inserted into the TOR= that match qualifications specified by the subevent. Does not include ad= dressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : SpecItoMs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xcc57ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", + "PerPkg": "1", + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc3fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoIs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI", + "PerPkg": "1", + "PublicDescription": "WbEFtoIs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc37ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBMtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE", + "PerPkg": "1", + "PublicDescription": "WbMtoEs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xcc2fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBStoIs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI", + "PerPkg": "1", + "PublicDescription": "WbStoIs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xcc67ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushes issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices th= at hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= hit the LLC : Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices to locally HOMed memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xcd42ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices to remotely HOMed memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xcd437f04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to l= ocally HOMed memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xcc42ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to r= emotely HOMed memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xcc437f04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices th= at missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WbMtoIs issued by IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IPQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IPQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - Non iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just ISOC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Local Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA and IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts. : All locally initiated requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally initiated requests from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally generated IO traffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent. Do= es not include addressless requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Misses", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : MMCFG Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NearMem : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NonCoherent", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NotNearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NotNearMem : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests such = as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PMM Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PMM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PMM Access : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - Non IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent. Does not include addressless requests such a= s locks and interrupts.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Remote Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Remote Targets : Counts t= he number of entries successfully inserted into the TOR that match qualific= ations specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RRQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.RRQ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RRQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.WBQ", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WBQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DDR4 Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DDR4 Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : SF/LLC Evictions", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts. : TOR allocation occurred as a = result of SF/LLC evictions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Hits", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRDs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRDs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc817ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = : For each cycle, this event accumulates the number of valid entries in the= TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores : For each cycle, this event accumulates the number of valid entries i= n the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc897ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc817fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that hit the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores t= hat hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = that hit the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that hit the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = that Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc897fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Hit LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Hit LLC : For each cycle, this event accumulates the number of valid entr= ies in the TOR that match qualifications specified by the subevent. Doe= s not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefCode issued by iA Core= s that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefCode issued by iA Cor= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcccffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefData issued by iA Core= s that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefData issued by iA Cor= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xccd7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that hit the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xccc7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears issued by iA C= ores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears issued by iA = Cores : For each cycle, this event accumulates the number of valid entries = in the TOR that match qualifications specified by the subevent. Does no= t include addressless requests such as locks and interrupts.", + "UMask": "0xcd47ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefCode issued by iA Core= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefCode issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xcccfff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefData issued by iA Core= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefData issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xccd7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s : For each cycle, this event accumulates the number of valid entries in t= he TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", + "UMask": "0xccc7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed locally : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc80efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed locally : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc88efe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed remotely : For each cycle, this event accumula= tes the number of valid entries in the TOR that match qualifications specif= ied by the subevent. Does not include addressless requests such as lock= s and interrupts.", + "UMask": "0xc88f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed remotely : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc80f7e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc817fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that missed the LLC : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", + "UMask": "0xc8178601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC - HOMed locally : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc816fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", + "UMask": "0xc8168601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", + "UMask": "0xc8168a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt issued by iA Cores th= at missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt issued by iA Cores t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that missed the LLC : For each cycle, this event accumulates the numbe= r of valid entries in the TOR that match qualifications specified by the su= bevent. Does not include addressless requests such as locks and interru= pts.", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", + "UMask": "0xc8178a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc897fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xc8978601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc896fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc8968601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc8968a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xc8978a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc8977e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xc8970601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xc8970a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC - HOMed remotely : For each cycle, this event accumulates t= he number of valid entries in the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0xc8177e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", + "UMask": "0xc8170601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", + "UMask": "0xc8170a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc8678601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_LOCA= L_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc8668601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_LOCA= L_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc8668a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc8678a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_REMO= TE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc8670601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_REMO= TE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc8670a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Missed LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefCode issued by iA Core= s that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFCODE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefCode issued by iA Cor= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", + "UMask": "0xcccffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefData issued by iA Core= s that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefData issued by iA Cor= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", + "UMask": "0xccd7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that missed the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xccc7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc8668601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc8668a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", + "UMask": "0xc86e8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", + "UMask": "0xc86e8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_D= DR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86f8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_L= OCAL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86e8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_L= OCAL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86e8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_P= MM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86f8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_R= EMOTE_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86f0601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_R= EMOTE_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86f0a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", + "UMask": "0xc8670601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", + "UMask": "0xc8670a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc86f0601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "UMask": "0xc86f0a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC - HOMed locally : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc806fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_LOCAL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC - HOMed locally : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc886fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC - HOMed remotely : For each cycle, this event accumula= tes the number of valid entries in the TOR that match qualifications specif= ied by the subevent. Does not include addressless requests such as lock= s and interrupts.", + "UMask": "0xc8877e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_REMOTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC - HOMed remotely : For each cycle, this event accumulates t= he number of valid entries in the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0xc8077e01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores = that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_SPECITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : SpecItoMs issued by iA Cores= that missed the LLC: For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc57fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc8678601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", + "UMask": "0xc8678a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc86f8601", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", + "UMask": "0xc86f8a01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_SPECITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : SpecItoMs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc57ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices = that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices = that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IPQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IPQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - Non iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just ISOC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Local Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. Does not include addre= ssless requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA and IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts. : All locally initiated= requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally initiated reques= ts from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally generated IO tra= ffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. Does not include addressless requests such as locks and int= errupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Misses", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : MMCFG Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NearMem : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NonCoherent", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NotNearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NotNearMem : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PMM Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PMM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PMM Access : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Remote Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.REMOTE_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Remote Targets : For ea= ch cycle, this event accumulates the number of valid entries in the TOR tha= t match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xB3", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xB3", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to LLC", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to LLC : Counts the numb= er of times when the CHA was received WbPushMtoI : Counts the number of tim= es when the CHA was able to push WbPushMToI to LLC", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to Memory", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to Memory : Counts the n= umber of times when the CHA was received WbPushMtoI : Counts the number of = times when the CHA was unable to push WbPushMToI to LLC (hence pushed it to= MEM)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC0 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC10", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC10", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC10 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 10 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC11", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC11", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC11 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 11 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC12", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC12", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC12 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 12 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC13", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC13", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC13 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 13 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC2 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC3 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC4 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC5 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC6", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC6", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC6 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 6 only.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC7", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC7", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC7 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 7 only.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC8", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC8", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC8 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 8 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC9", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC9", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC9 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 9 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 0?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT0", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 0?) : Number of XP= T prefetches sent", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 1?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT1", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 1?) : Number of XP= T prefetches sent", + "UMask": "0x10", + "Unit": "CHA" + } +] diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-interconnect.js= on b/tools/perf/pmu-events/arch/x86/icelakex/uncore-interconnect.json new file mode 100644 index 000000000000..8ac5907762e1 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-interconnect.json @@ -0,0 +1,14571 @@ +[ + { + "BriefDescription": "Total Write Cache Occupancy : Any Source", + "EventCode": "0x0F", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Total Write Cache Occupancy : Any Source : A= ccumulates the number of reads and writes that are outstanding in the uncor= e in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRI= TE_OCCUPANCY events. : Tracks all requests from any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy : Snoops", + "EventCode": "0x0F", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", + "PerPkg": "1", + "PublicDescription": "Total Write Cache Occupancy : Snoops : Accum= ulates the number of reads and writes that are outstanding in the uncore in= each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_O= CCUPANCY events.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Total IRP occupancy of inbound read and write= requests to coherent memory.", + "EventCode": "0x0f", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", + "PerPkg": "1", + "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests to coherent memory. This is effectively the sum of read occupan= cy and write occupancy.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", + "EventCode": "0x01", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops : CLFlush", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Coherent Ops : CLFlush : Counts the number o= f coherency related operations servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", + "PerPkg": "1", + "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.RFO", + "PerPkg": "1", + "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops : WbMtoI", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", + "PerPkg": "1", + "PublicDescription": "Coherent Ops : WbMtoI : Counts the number of= coherency related operations servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF RF full", + "EventCode": "0x17", + "EventName": "UNC_I_FAF_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", + "EventCode": "0x18", + "EventName": "UNC_I_FAF_INSERTS", + "PerPkg": "1", + "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Occupancy of the IRP FAF queue.", + "EventCode": "0x19", + "EventName": "UNC_I_FAF_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF allocation -- sent to ADQ", + "EventCode": "0x16", + "EventName": "UNC_I_FAF_TRANSACTIONS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.EVICTS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of At= omic Transactions as Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Re= ad Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Wr= ite Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.FAST_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.FAST_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers = From Primary to Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.FAST_XFER", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints = From Primary to Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn= 't find prefetch", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Lost Forward", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.LOST_FWD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Invalid", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Invalid : Sec= ondary received a transfer that did not have sufficient MESI state", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Valid", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Valid : Secon= dary received a transfer that did have sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_E", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of E Lin= e : Secondary received a transfer that did have sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of I Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_M", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of M Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_S", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of S Lin= e : Secondary received a transfer that did not have sufficient MESI state", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Requests", + "EventCode": "0x14", + "EventName": "UNC_I_P2P_INSERTS", + "PerPkg": "1", + "PublicDescription": "P2P Requests : P2P requests from the ITC", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Occupancy", + "EventCode": "0x15", + "EventName": "UNC_I_P2P_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "P2P Occupancy : P2P B & S Queue Occupancy", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P completions", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if local only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if local and target = matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P Message", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P reads", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.RD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : Match if remote only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if remote and target= matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P Writes", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.WR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", + "UMask": "0x7e", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", + "UMask": "0x74", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", + "UMask": "0x72", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", + "UMask": "0x78", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", + "UMask": "0x71", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit E or S", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit I", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit M", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Miss", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.MISS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpCode", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpData", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpInv", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Atomic", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Atomic : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Tracks the number of atomic transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Other", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Other : Counts t= he number of Inbound transactions from the IRP to the Uncore. This can be = filtered based on request type in addition to the source queue. Note the s= pecial filtering equation. We do OR-reduction on the request type. If the= SOURCE bit is set, then we also do AND qualification based on the source p= ortID. : Tracks the number of 'other' kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Writes", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Writes : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Trackes only write requests. Each write request should have a pr= efetch, so there is no need to explicitly track these requests. For writes= that are tickled and have to retry, the counter will be incremented for ea= ch retry.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Egress Allocations", + "EventCode": "0x0B", + "EventName": "UNC_I_TxC_AK_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Cycles Full", + "EventCode": "0x05", + "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Inserts", + "EventCode": "0x02", + "EventName": "UNC_I_TxC_BL_DRS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Occupancy", + "EventCode": "0x08", + "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Cycles Full", + "EventCode": "0x06", + "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Inserts", + "EventCode": "0x03", + "EventName": "UNC_I_TxC_BL_NCB_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Occupancy", + "EventCode": "0x09", + "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Cycles Full", + "EventCode": "0x07", + "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Inserts", + "EventCode": "0x04", + "EventName": "UNC_I_TxC_BL_NCS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Occupancy", + "EventCode": "0x0A", + "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "EventCode": "0x1C", + "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": ": Counts the number times when it is not pos= sible to issue a request to the M2PCIe because there are no Egress Credits = available on AD0, A1 or AD0&AD1 both. Stalls on both AD0 and AD1 will count= as 2", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD0 Egress Credits Stalls", + "EventCode": "0x1A", + "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD0 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD0 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD1 Egress Credits Stalls", + "EventCode": "0x1B", + "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD1 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD1 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x1D", + "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No BL Egress Credit Stalls : Counts the numb= er times when it is not possible to issue data to the R2PCIe because there = are no BL Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0D", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0E", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0x0C", + "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Outbound Request Queue Occupancy : Accumulat= es the number of outstanding outbound requests from the IRP to the switch (= towards the devices). This can be used in conjunction with the allocations= event in order to calculate average latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", + 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sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8F", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS 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direct to core mode, which bypass= es the CHA, was disabled", + "EventCode": "0x24", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "EventCode": "0x60", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action was overridden", + "EventCode": "0x25", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to Intel UPI = transactions were overridden", + "EventCode": "0x28", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when Direct2UPI was Disabled", + "EventCode": "0x27", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads that a message sent direct2 I= ntel UPI was overridden", + "EventCode": "0x29", + "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", + "PerPkg": "1", + "PublicDescription": "Clockticks of the mesh to PCI (M2P)", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in A State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in I State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in L State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On NonDirty Line in S State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in A State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in I State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in L State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit : On Dirty Line in S State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in any state", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in A state", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in I state", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in S state", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in A State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in I State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in L State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On NonDirty Line in S State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in A State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in I State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in L State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss : On Dirty Line in S State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory Updates : Fr= om/to any state. Note: event counts are incorrect in 2LM mode.", + "EventCode": "0x2e", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : PMM Local", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.PMM_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : PMM Remote", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.PMM_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_DISTRESS_PMM", + "EventCode": "0xF2", + "EventName": "UNC_M2M_DISTRESS_PMM", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_DISTRESS_PMM_MEMMODE", + "EventCode": "0xF1", + "EventName": "UNC_M2M_DISTRESS_PMM_MEMMODE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xBA", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xBA", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xB9", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xB9", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ALL", + "PerPkg": "1", + "UMask": "0x704", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_ALL", + "PerPkg": "1", + "UMask": "0x104", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR", + "PerPkg": "1", + "UMask": "0x140", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH", + "PerPkg": "1", + "UMask": "0x102", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL", + "PerPkg": "1", + "UMask": "0x101", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cach= e - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x110", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : DDR - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x108", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : PMM - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_TO_PMM", + "PerPkg": "1", + "PublicDescription": "M2M Reads Issued to iMC : PMM - Ch0 : Counts= all PMM dimm read requests(full line) sent from M2M to iMC", + "UMask": "0x120", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_ALL", + "PerPkg": "1", + "UMask": "0x204", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR", + "PerPkg": "1", + "UMask": "0x240", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH", + "PerPkg": "1", + "UMask": "0x202", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL", + "PerPkg": "1", + "UMask": "0x201", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cach= e - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x210", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : DDR - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x208", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : PMM - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_TO_PMM", + "PerPkg": "1", + "PublicDescription": "M2M Reads Issued to iMC : PMM - Ch1 : Counts= all PMM dimm read requests(full line) sent from M2M to iMC", + "UMask": "0x220", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch2", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH2_FROM_TGR", + "PerPkg": "1", + "UMask": "0x440", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - All Chan= nels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.FROM_TGR", + "PerPkg": "1", + "UMask": "0x740", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ISOCH", + "PerPkg": "1", + "UMask": "0x702", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - A= ll Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.NORMAL", + "PerPkg": "1", + "UMask": "0x701", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cach= e - All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x710", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : DDR - All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x708", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : PMM - All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.TO_PMM", + "PerPkg": "1", + "UMask": "0x720", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - All C= hannels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.ALL", + "PerPkg": "1", + "UMask": "0x1c10", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL", + "PerPkg": "1", + "UMask": "0x410", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL", + "PerPkg": "1", + "UMask": "0x401", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x404", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Ch= 0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", + "PerPkg": "1", + "UMask": "0x402", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x408", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cac= he - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x440", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : DDR - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x420", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : PMM - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_PMM", + "PerPkg": "1", + "PublicDescription": "M2M Writes Issued to iMC : PMM - Ch0 : Count= s all PMM dimm writes requests(full line and partial) sent from M2M to iMC", + "UMask": "0x480", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL", + "PerPkg": "1", + "UMask": "0x810", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL", + "PerPkg": "1", + "UMask": "0x801", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x804", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Ch= 1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL", + "PerPkg": "1", + "UMask": "0x802", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x808", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cac= he - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x840", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : DDR - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x820", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : PMM - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_PMM", + "PerPkg": "1", + "PublicDescription": "M2M Writes Issued to iMC : PMM - Ch1 : Count= s all PMM dimm writes requests(full line and partial) sent from M2M to iMC", + "UMask": "0x880", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - All Cha= nnels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL", + "PerPkg": "1", + "UMask": "0x1c01", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x1c04", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Al= l Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.NI", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", + "PerPkg": "1", + "UMask": "0x1c02", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Al= l Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x1c08", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cac= he - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_CACHE", + "PerPkg": "1", + "UMask": "0x1c40", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : DDR - All Channels= ", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_MEM", + "PerPkg": "1", + "UMask": "0x1c20", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : PMM - All Channels= ", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", + "PerPkg": "1", + "UMask": "0x1c80", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts", + "EventCode": "0x64", + "EventName": "UNC_M2M_MIRR_WRQ_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x65", + "EventName": "UNC_M2M_MIRR_WRQ_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xE6", + "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xE6", + "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches : MC Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches : Mesh Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MESH", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS", + "EventCode": "0x73", + "EventName": "UNC_M2M_PREFCAM_CIS_DROPS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : All Channels", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : Channel 0", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : Channel 1", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : Channel 2", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : All Channels", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 0", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 1", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 2", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA0_INVAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA1_INVAL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_MISS_INVAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_RSP_PDRESET", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA0_INVAL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA1_INVAL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_MISS_INVAL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_RSP_PDRESET", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_HITA0_INVAL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_HITA1_INVAL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_MISS_INVAL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_RSP_PDRESET", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : UPI - Ch 0", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - Ch 0", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : UPI - Ch 1", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - Ch 1", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : UPI - Ch 2", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH2_UPI", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - Ch 2", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH2_XPT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : UPI - All Channels", + "EventCode": "0x6f", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0x2a", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - All Channels", + "EventCode": "0x6f", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 0", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 0", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI - Ch 1", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI- Ch 1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 2", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH2_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 2", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- All Channels", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPTUPI_ALLCH", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - All Channels", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 0", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 0", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 1", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 2", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH2_XPTUPI", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - All Channels", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPTUPI_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.ERRORBLK_RxC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.NOT_PF_SAD_REGION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_HIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_SECURE_DROP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.RPQ_PROXY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.STOP_B2B", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.UPI_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.WPQ_PROXY", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.XPT_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.ERRORBLK_RxC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.NOT_PF_SAD_REGION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_HIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_SECURE_DROP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.RPQ_PROXY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.STOP_B2B", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.UPI_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.WPQ_PROXY", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.XPT_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.ERRORBLK_RxC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.NOT_PF_SAD_REGION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_CAM_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_CAM_HIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_SECURE_DROP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.RPQ_PROXY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.STOP_B2B", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.UPI_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.WPQ_PROXY", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", + "EventCode": "0x72", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.XPT_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_UPI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_UPI", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 2", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH2_UPI", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 2", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH2_XPT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels", + "EventCode": "0x6d", + "EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH", + "PerPkg": "1", + "UMask": "0x2a", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : All Channels", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 0", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 1", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 2", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": ": All Channels", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 0", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 1", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 2", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", + "EventCode": "0x79", + "EventName": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCE= PT", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_INSERTS", + "EventCode": "0x78", + "EventName": "UNC_M2M_PREFCAM_RxC_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", + "EventCode": "0x77", + "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_M2M_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 0", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 1", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 2", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel= 0", + "EventCode": "0x4F", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel= 1", + "EventCode": "0x4F", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel= 2", + "EventCode": "0x4F", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 0", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 2", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Full", + "EventCode": "0x04", + "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Not Empty", + "EventCode": "0x03", + "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Allocations", + "EventCode": "0x01", + "EventName": "UNC_M2M_RxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x02", + "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches", + "EventCode": "0x77", + "EventName": "UNC_M2M_RxC_AD_PREF_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x5C", + "EventName": "UNC_M2M_RxC_AK_WR_CMP", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Full", + "EventCode": "0x08", + "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Not Empty", + "EventCode": "0x07", + "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Allocations", + "EventCode": "0x05", + "EventName": "UNC_M2M_RxC_BL_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Occupancy", + "EventCode": "0x06", + "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_M2M_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_SCOREBOARD_AD_RETRY_ACCEPTS", + "EventCode": "0x33", + "EventName": "UNC_M2M_SCOREBOARD_AD_RETRY_ACCEPTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_SCOREBOARD_AD_RETRY_REJECTS", + "EventCode": "0x34", + "EventName": "UNC_M2M_SCOREBOARD_AD_RETRY_REJECTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Retry - Mem Mirroring Mode", + "EventCode": "0x35", + "EventName": "UNC_M2M_SCOREBOARD_BL_RETRY_ACCEPTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Retry - Mem Mirroring Mode", + "EventCode": "0x36", + "EventName": "UNC_M2M_SCOREBOARD_BL_RETRY_REJECTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Scoreboard Accepts", + "EventCode": "0x2F", + "EventName": "UNC_M2M_SCOREBOARD_RD_ACCEPTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Scoreboard Rejects", + "EventCode": "0x30", + "EventName": "UNC_M2M_SCOREBOARD_RD_REJECTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Scoreboard Accepts", + "EventCode": "0x31", + "EventName": "UNC_M2M_SCOREBOARD_WR_ACCEPTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Scoreboard Rejects", + "EventCode": "0x32", + "EventName": "UNC_M2M_SCOREBOARD_WR_REJECTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tag Hit : Clean NearMem Read Hit", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN", + "PerPkg": "1", + "PublicDescription": "Tag Hit : Clean NearMem Read Hit : Tag Hit i= ndicates when a request sent to the iMC hit in Near Memory. : Counts clean = full line read hits (reads and RFOs).", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tag Hit : Dirty NearMem Read Hit", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY", + "PerPkg": "1", + "PublicDescription": "Tag Hit : Dirty NearMem Read Hit : Tag Hit i= ndicates when a request sent to the iMC hit in Near Memory. : Counts dirty = full line read hits (reads and RFOs).", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tag Hit : Clean NearMem Underfill Hit", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN", + "PerPkg": "1", + "PublicDescription": "Tag Hit : Clean NearMem Underfill Hit : Tag = Hit indicates when a request sent to the iMC hit in Near Memory. : Counts c= lean underfill hits due to a partial write", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tag Hit : Dirty NearMem Underfill Hit", + "EventCode": "0x2C", + "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY", + "PerPkg": "1", + "PublicDescription": "Tag Hit : Dirty NearMem Underfill Hit : Tag = Hit indicates when a request sent to the iMC hit in Near Memory. : Counts d= irty underfill read hits due to a partial write", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Tag Miss", + "EventCode": "0x61", + "EventName": "UNC_M2M_TAG_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number AD Ingress Credits", + "EventCode": "0x41", + "EventName": "UNC_M2M_TGR_AD_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number BL Ingress Credits", + "EventCode": "0x42", + "EventName": "UNC_M2M_TGR_BL_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full : Channel 0", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full : Channel 1", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full : Channel 2", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_FULL.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 0", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 1", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 2", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty : Channel 0", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty : Channel 1", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty : Channel 2", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_NE.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 0", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 1", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 2", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credit Acquired", + "EventCode": "0x0d", + "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credits Occupancy", + "EventCode": "0x0e", + "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Full", + "EventCode": "0x0c", + "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Not Empty", + "EventCode": "0x0b", + "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Allocations", + "EventCode": "0x09", + "EventName": "UNC_M2M_TxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", + "EventCode": "0x0f", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", + "EventCode": "0x10", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Occupancy", + "EventCode": "0x0A", + "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK : CRD Transa= ctions to Cbo", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.CRD_CBO", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK : NDR Transa= ctions", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.NDR", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AKC Credits", + "EventCode": "0x5F", + "EventName": "UNC_M2M_TxC_AKC_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : All", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Near Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Far Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", + "PerPkg": "1", + "UMask": "0x88", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : All", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : All", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : All", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Near Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Far Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Cache", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Core", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CORE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to QPI", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_UPI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : All", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Near Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Far Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : All", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : All", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. 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This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. 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Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xB3", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xB3", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 0", + "EventCode": "0x58", + "EventName": "UNC_M2M_WPQ_FLUSH.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 1", + "EventCode": "0x58", + "EventName": "UNC_M2M_WPQ_FLUSH.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 2", + "EventCode": "0x58", + "EventName": "UNC_M2M_WPQ_FLUSH.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 0", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 2", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel= 0", + "EventCode": "0x51", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel= 1", + "EventCode": "0x51", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel= 2", + "EventCode": "0x51", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 0", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 1", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 2", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Channel 0", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Channel 1", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Channel 2", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Mirror", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 0", + "EventCode": "0x56", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 1", + "EventCode": "0x56", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 2", + "EventCode": "0x56", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 1", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 2", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Mirror", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", + "EventCode": "0x63", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", + "EventCode": "0x63", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 2", + "EventCode": "0x63", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", + "EventCode": "0x62", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", + "EventCode": "0x62", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 2", + "EventCode": "0x62", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Channel 0", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Channel 1", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Channel 2", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Mirror", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_NONTGR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_PWR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 0", + "EventCode": "0x5E", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 1", + "EventCode": "0x5E", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 2", + "EventCode": "0x5E", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", + "EventCode": "0x5D", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", + "EventCode": "0x5D", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 2", + "EventCode": "0x5D", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= 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Acquired : For Transgre= ss 1", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x8D", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x8D", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x8D", + "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8F", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8F", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8F", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty : Requests", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : Requests : No credit= s available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty : Snoops", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : Snoops : No credits = available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty : VNA Messages", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : VNA Messages : No cr= edits available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty : Writebacks", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB", + "PerPkg": "1", + "PublicDescription": "CBox AD Credits Empty : Writebacks : No cred= its available to send to Cbox on the AD Ring (covers higher CBoxes)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Clockticks of the mesh to UPI (M3UPI)", + "EventCode": "0x01", + "EventName": "UNC_M3UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Clockticks of the mesh to UPI (M3UPI) : Coun= ts the number of uclks in the M3 uclk domain. This could be slightly diffe= rent than the count in the Ubox because of enable/freeze delays. However, = because the M3 is close to the Ubox, they generally should not diverge by m= ore than a handful of cycles.", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2C Sent", + "EventCode": "0x2B", + "EventName": "UNC_M3UPI_D2C_SENT", + "PerPkg": "1", + "PublicDescription": "D2C Sent : Count cases BL sends direct to co= re", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2U Sent", + "EventCode": "0x2A", + "EventName": "UNC_M3UPI_D2U_SENT", + "PerPkg": "1", + "PublicDescription": "D2U Sent : Cases where SMI3 sends D2U comman= d", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : PMM Local", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.PMM_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : PMM Remote", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.PMM_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xAF", + "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xBA", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xBA", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xB6", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xB6", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xBB", + "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xBB", + "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xB7", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xB7", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xB8", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xB8", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xB9", + "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xB9", + "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO0 and IIO1 share the= same ring destination. (1 VN0 credit only)", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO1_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO0 and IIO1 share th= e same ring destination. (1 VN0 credit only) : No vn0 and vna credits avail= able to send to M2", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO2", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO2 : No vn0 and vna = credits available to send to M2", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO3", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO3 : No vn0 and vna = credits available to send to M2", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO4", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO4 : No vn0 and vna = credits available to send to M2", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO5", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO5 : No vn0 and vna = credits available to send to M2", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : All IIO targets for NCS= are in single mask. ORs them together", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : All IIO targets for NC= S are in single mask. ORs them together : No vn0 and vna credits available = to send to M2", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : Selected M2p BL NCS cre= dits", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : Selected M2p BL NCS cr= edits : No vn0 and vna credits available to send to M2", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty : IIO5", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.UBOX_NCB", + "PerPkg": "1", + "PublicDescription": "M2 BL Credits Empty : IIO5 : No vn0 and vna = credits available to send to M2", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xE6", + "EventName": "UNC_M3UPI_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xE6", + "EventName": "UNC_M3UPI_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AD - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AD - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AD - Slot 1", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AD - Slot 1 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AD - Slot 2", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AD - Slot 2 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AK - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AK - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : AK - Slot 2", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : AK - Slot 2 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received : BL - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi Slot Flit Received : BL - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_M3UPI_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : REQ on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : REQ on AD : VN0 message r= equested but lost arbitration : Home (REQ) messages on AD. REQ is generall= y used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : RSP on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : RSP on AD : VN0 message r= equested but lost arbitration : Response (RSP) messages on AD. RSP packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : SNP on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : SNP on AD : VN0 message r= equested but lost arbitration : Snoops (SNP) messages on AD. SNP is used f= or outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : NCB on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : NCB on BL : VN0 message r= equested but lost arbitration : Non-Coherent Broadcast (NCB) messages on BL= . NCB is generally used to transmit data without coherency. For example, = non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : NCS on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : NCS on BL : VN0 message r= equested but lost arbitration : Non-Coherent Standard (NCS) messages on BL.= ", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : RSP on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : RSP on BL : VN0 message r= equested but lost arbitration : Response (RSP) messages on BL. RSP packets = are used to transmit a variety of protocol flits including grants and compl= etions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0 : WB on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN0 : WB on BL : VN0 message re= quested but lost arbitration : Data Response (WB) messages on BL. WB is ge= nerally used to transmit data with coherency. For example, remote reads an= d writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : REQ on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : REQ on AD : VN1 message r= equested but lost arbitration : Home (REQ) messages on AD. REQ is generall= y used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : RSP on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : RSP on AD : VN1 message r= equested but lost arbitration : Response (RSP) messages on AD. RSP packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : SNP on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : SNP on AD : VN1 message r= equested but lost arbitration : Snoops (SNP) messages on AD. SNP is used f= or outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : NCB on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : NCB on BL : VN1 message r= equested but lost arbitration : Non-Coherent Broadcast (NCB) messages on BL= . NCB is generally used to transmit data without coherency. For example, = non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : NCS on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : NCS on BL : VN1 message r= equested but lost arbitration : Non-Coherent Standard (NCS) messages on BL.= ", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : RSP on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : RSP on BL : VN1 message r= equested but lost arbitration : Response (RSP) messages on BL. RSP packets = are used to transmit a variety of protocol flits including grants and compl= etions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1 : WB on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Lost Arb for VN1 : WB on BL : VN1 message re= quested but lost arbitration : Data Response (WB) messages on BL. WB is ge= nerally used to transmit data with coherency. For example, remote reads an= d writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN0", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : AD, BL Parallel Win VN0 = : AD and BL messages won arbitration concurrently / in parallel", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN1", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : AD, BL Parallel Win VN1 = : AD and BL messages won arbitration concurrently / in parallel", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : Max Parallel Win", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ALL_PARALLEL_WIN", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : Max Parallel Win : VN0 a= nd VN1 arbitration sub-pipelines both produced AD and BL winners (maximum p= ossible parallel winners)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending AD= VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending A= D VN0 : Arbitration stage made no progress on pending ad vn0 messages becau= se slotting stage cannot accept new message", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending AD= VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending A= D VN1 : Arbitration stage made no progress on pending ad vn1 messages becau= se slotting stage cannot accept new message", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending BL= VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending B= L VN0 : Arbitration stage made no progress on pending bl vn0 messages becau= se slotting stage cannot accept new message", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : No Progress on Pending BL= VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : No Progress on Pending B= L VN1 : Arbitration stage made no progress on pending bl vn1 messages becau= se slotting stage cannot accept new message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous : VN0, VN1 Parallel Win", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.VN01_PARALLEL_WIN", + "PerPkg": "1", + "PublicDescription": "Arb Miscellaneous : VN0, VN1 Parallel Win : = VN0 and VN1 arbitration sub-pipelines had parallel winners (at least one AD= or BL on each side)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : REQ on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : REQ on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Home (REQ) messages on AD. REQ is generally used to send requests,= request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : RSP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : RSP on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on AD. RSP packets are used to transmit a = variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : SNP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : SNP on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : NCB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : NCB on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used= to transmit data without coherency. For example, non-coherent read data r= eturns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : NCS on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : NCS on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : RSP on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : RSP on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on BL. RSP packets are used to transmit a v= ariety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0 : WB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN0 : WB on BL : VN0 m= essage is blocked from requesting arbitration due to lack of remote UPI cre= dits : Data Response (WB) messages on BL. WB is generally used to transmit= data with coherency. For example, remote reads and writes, or cache to ca= che transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : REQ on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : REQ on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Home (REQ) messages on AD. REQ is generally used to send requests,= request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : RSP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : RSP on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on AD. RSP packets are used to transmit a = variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : SNP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : SNP on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : NCB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : NCB on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used= to transmit data without coherency. For example, non-coherent read data r= eturns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : NCS on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : NCS on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : RSP on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : RSP on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on BL. RSP packets are used to transmit a v= ariety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1 : WB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "No Credits to Arb for VN1 : WB on BL : VN1 m= essage is blocked from requesting arbitration due to lack of remote UPI cre= dits : Data Response (WB) messages on BL. WB is generally used to transmit= data with coherency. For example, remote reads and writes, or cache to ca= che transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : REQ on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : REQ on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Home (REQ) messages on AD. REQ is generally used to send requests, req= uest responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : RSP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : RSP on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on AD. RSP packets are used to transmit a vari= ety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : SNP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : SNP on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : NCB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : NCB on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to = transmit data without coherency. For example, non-coherent read data retur= ns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : NCS on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : NCS on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : RSP on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : RSP on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on BL. RSP packets are used to transmit a varie= ty of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0 : WB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN0 : WB on BL : VN0 message w= as not able to request arbitration while some other message won arbitration= : Data Response (WB) messages on BL. WB is generally used to transmit dat= a with coherency. For example, remote reads and writes, or cache to cache = transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : REQ on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : REQ on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Home (REQ) messages on AD. REQ is generally used to send requests, req= uest responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : RSP on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : RSP on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on AD. RSP packets are used to transmit a vari= ety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : SNP on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : SNP on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : NCB on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : NCB on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to = transmit data without coherency. For example, non-coherent read data retur= ns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : NCS on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : NCS on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : RSP on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : RSP on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on BL. RSP packets are used to transmit a varie= ty of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1 : WB on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Can't Arb for VN1 : WB on BL : VN1 message w= as not able to request arbitration while some other message won arbitration= : Data Response (WB) messages on BL. WB is generally used to transmit dat= a with coherency. For example, remote reads and writes, or cache to cache = transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL A= rb", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL = Arb : Number of times message is bypassed around the Ingress Queue : AD is = taking bypass to slot 0 of independent flit while bl message is in arbitrat= ion", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idle= ", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idl= e : Number of times message is bypassed around the Ingress Queue : AD is ta= king bypass to slot 0 of independent flit while pipeline is idle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 1", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD + BL to Slot 1 := Number of times message is bypassed around the Ingress Queue : AD is takin= g bypass to flit slot 1 while merging with bl message in same flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 2", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Ingress Queue Bypasses : AD + BL to Slot 2 := Number of times message is bypassed around the Ingress Queue : AD is takin= g bypass to flit slot 2 while merging with bl message in same flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events : Any In BGF FIFO= ", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : Any In BGF FIF= O : Indication that at least one packet (flit) is in the bgf (fifo only)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events : Any in BGF Path= ", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : Any in BGF Pat= h : Indication that at least one packet (flit) is in the bgf path (i.e. pip= e to fifo)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.LT1_FOR_D2K", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : d2k credit cou= nt is less than 1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.LT2_FOR_D2K", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : d2k credit cou= nt is less than 2", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events : No D2K For Arb", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.VN0_NO_D2K_FOR_ARB", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : No D2K For Arb= : VN0 BL RSP message was blocked from arbitration request due to lack of D= 2K CMP credit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.VN1_NO_D2K_FOR_ARB", + "PerPkg": "1", + "PublicDescription": "Miscellaneous Credit Events : VN1 BL RSP mes= sage was blocked from arbitration request due to lack of D2K CMP credits", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Credits Consumed", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.CONSUMED", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Credits Consumed : number= of remote vna credits consumed per cycle", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : D2K Credits", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : D2K Credits : D2K complet= ion fifo credit occupancy (credits in use), accumulated across all cycles", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Packets in BGF FIFO", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Packets in BGF FIFO : Occ= upancy of m3upi ingress -> upi link layer bgf; packets (flits) in fifo", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Packets in BGF Path", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Packets in BGF Path : Occ= upancy of m3upi ingress -> upi link layer bgf; packets (flits) in path (i.e= . pipe to fifo or fifo)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : count of bl messages in p= ump-1-pending state, in completion fifo only", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : count of bl messages in p= ump-1-pending state, in marker table and in fifo", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : Transmit Credits", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : Transmit Credits : Link l= ayer transmit queue credit occupancy (credits in use), accumulated across a= ll cycles", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy : VNA In Use", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE", + "PerPkg": "1", + "PublicDescription": "Credit Occupancy : VNA In Use : Remote UPI V= NA credit occupancy (number of credits in use), accumulated across all cycl= es", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : REQ on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : REQ on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Home (REQ) me= ssages on AD. REQ is generally used to send requests, request responses, a= nd snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on AD. RSP packets are used to transmit a variety of protocol f= lits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : SNP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : SNP on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Snoops (SNP) = messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : NCB on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Broadcast (NCB) messages on BL. NCB is generally used to transmit data wit= hout coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCS on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : NCS on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on BL. RSP packets are used to transmit a variety of protocol fl= its including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : WB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : WB on BL : Counts the number of cycles when the UPI Ingress is not em= pty. This tracks one of the three rings that are used by the UPI agent. T= his can be used in conjunction with the UPI Ingress Occupancy Accumulator e= vent in order to calculate average queue occupancy. Multiple ingress buffe= rs can be tracked at a given time using multiple counters. : Data Response = (WB) messages on BL. WB is generally used to transmit data with coherency.= For example, remote reads and writes, or cache to cache transfers will tr= ansmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : REQ on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : REQ on AD : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Home (REQ) me= ssages on AD. REQ is generally used to send requests, request responses, a= nd snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on AD : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on AD. RSP packets are used to transmit a variety of protocol f= lits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : SNP on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : SNP on AD : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Snoops (SNP) = messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCB on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : NCB on BL : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Broadcast (NCB) messages on BL. NCB is generally used to transmit data wit= hout coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCS on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : NCS on BL : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on BL : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on BL. RSP packets are used to transmit a variety of protocol fl= its including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : WB on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : WB on BL : Counts the number of allocations into the UPI VN1 Ingress= . This tracks one of the three rings that are used by the UPI agent. This= can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulator= event in order to calculate average queue latency. Multiple ingress buffe= rs can be tracked at a given time using multiple counters. : Data Response = (WB) messages on BL. WB is generally used to transmit data with coherency.= For example, remote reads and writes, or cache to cache transfers will tr= ansmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : All", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : All : Data flit is read= y for transmission but could not be sent : data flit is ready for transmiss= ion but could not be sent for any reason, e.g. low credits, low tsv, stall = injection", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : No BGF Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_BGF", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : No BGF Credits : Data f= lit is ready for transmission but could not be sent", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : No TxQ Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_TXQ", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : No TxQ Credits : Data f= lit is ready for transmission but could not be sent", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : TSV High", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.TSV_HI", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : TSV High : Data flit is= ready for transmission but could not be sent : data flit is ready for tran= smission but was not sent while tsv high", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent : Cycle valid for Flit", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.VALID_FOR_FLIT", + "PerPkg": "1", + "PublicDescription": "Data Flit Not Sent : Cycle valid for Flit : = Data flit is ready for transmission but could not be sent : data flit is re= ady for transmission but was not sent while cycle is valid for flit transmi= ssion", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence : Wait on Pu= mp 0", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : Wait on P= ump 0 : generating bl data flit sequence; waiting for data pump 0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is at capacity (pending table plus completion fifo at limit)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is tracking at least one message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding completion fifo is full", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is at or near capacity, such that pump-0-only bl messages are g= etting stalled in slotting stage", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : a bl mess= age finished but is in limbo and moved to pump-1-pending logic", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence : Wait on Pu= mp 1", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "Generating BL Data Flit Sequence : Wait on P= ump 1 : generating bl data flit sequence; waiting for data pump 1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF", + "PerPkg": "1", + "PublicDescription": ": slot 2 request naturally serviced during h= old-off period", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE", + "PerPkg": "1", + "PublicDescription": ": slot 2 request forcibly serviced during se= rvice window", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED", + "PerPkg": "1", + "PublicDescription": ": slot 2 request received from link layer wh= ile idle (with no slot 2 request active immediately prior)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN", + "PerPkg": "1", + "PublicDescription": ": slot 2 request withdrawn during hold-off p= eriod or service window", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : All", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Needs = Data Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Needs= Data Flit : BL message requires data flit sequence", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Wait o= n Pump 0", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Wait = on Pump 0 : Waiting for header pump 0", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 : Header pump 1 is not required for flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1 - Bubble", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 - Bubble : Header pump 1 is not required for flit but flit tra= nsmission delayed", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1 - Not Avail", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 - Not Avail : Header pump 1 is not required for flit and not a= vailable", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit : Wait o= n Pump 1", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "Slotting BL Message Into Header Flit : Wait = on Pump 1 : Waiting for header pump 1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Accumulate", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Accumulate : Events re= lated to Header Flit Generation - Set 1 : Header flit slotting control stat= e machine is in any accumulate state; multi-message flit may be assembled o= ver multiple cycles", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Accumulate Ready", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Accumulate Ready : Eve= nts related to Header Flit Generation - Set 1 : header flit slotting contro= l state machine is in accum_ready state; flit is ready to send but transmis= sion is blocked; more messages may be slotted into flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Accumulate Wasted", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Accumulate Wasted : Ev= ents related to Header Flit Generation - Set 1 : Flit is being assembled ov= er multiple cycles, but no additional message is being slotted into flit in= current cycle; accumulate cycle is wasted", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Blocked", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Run-Ahead - Blocked : = Events related to Header Flit Generation - Set 1 : Header flit slotting ent= ered run-ahead state; new header flit is started while transmission of prio= r, fully assembled flit is blocked", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_AFTER", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: message was slotted only after= run-ahead was over; run-ahead mode definitely wasted", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Message", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_DURING", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Run-Ahead - Message : = Events related to Header Flit Generation - Set 1 : run-ahead mode: one mess= age slotted during run-ahead", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_AFTER", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: second message slotted immedia= tely after run-ahead; potential run-ahead success", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_SENT", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: two (or three) message flit se= nt immediately after run-ahead; complete run-ahead success", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Parallel Ok", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Parallel Ok : Events r= elated to Header Flit Generation - Set 2 : new header flit construction may= proceed in parallel with data flit sequence", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Parallel Flit Finished", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_FLIT", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Parallel Flit Finished= : Events related to Header Flit Generation - Set 2 : header flit finished = assembly in parallel with data flit sequence", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Parallel Message", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_MSG", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Parallel Message : Eve= nts related to Header Flit Generation - Set 2 : message is slotted into hea= der flit in parallel with data flit sequence", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Rate-matching Stall : = Events related to Header Flit Generation - Set 2 : Rate-matching stall inje= cted", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall - N= o Message", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG", + "PerPkg": "1", + "PublicDescription": "Flit Gen - Header 2 : Rate-matching Stall - = No Message : Events related to Header Flit Generation - Set 2 : Rate matchi= ng stall injected, but no additional message slotted during stall cycle", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : One Message", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : One Message : One message= in flit; VNA or non-VNA flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : One Message in non-VNA", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG_VNX", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : One Message in non-VNA : = One message in flit; non-VNA flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : Two Messages", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.2_MSGS", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : Two Messages : Two messag= es in flit; VNA flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : Three Messages", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.3_MSGS", + "PerPkg": "1", + "PublicDescription": "Sent Header Flit : Three Messages : Three me= ssages in flit; VNA flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : One Slot Taken", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : Two Slots Taken", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_2", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit : All Slots Taken", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_3", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : All", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : All : header flit is ready= for transmission but could not be sent : header flit is ready for transmis= sion but could not be sent for any reason, e.g. no credits, low tsv, stall = injection", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No BGF Credits", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_CRD", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No BGF Credits : header fl= it is ready for transmission but could not be sent : No BGF credits availab= le", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No BGF Credits + No Extra M= essage Slotted", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_NO_MSG", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No BGF Credits + No Extra = Message Slotted : header flit is ready for transmission but could not be se= nt : No BGF credits available; no additional message slotted into flit", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No TxQ Credits", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_CRD", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No TxQ Credits : header fl= it is ready for transmission but could not be sent : No TxQ credits availab= le", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : No TxQ Credits + No Extra M= essage Slotted", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_NO_MSG", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : No TxQ Credits + No Extra = Message Slotted : header flit is ready for transmission but could not be se= nt : No TxQ credits available; no additional message slotted into flit", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : TSV High", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.TSV_HI", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : TSV High : header flit is = ready for transmission but could not be sent : header flit is ready for tra= nsmission but was not sent while tsv high", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent : Cycle valid for Flit", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.VALID_FOR_FLIT", + "PerPkg": "1", + "PublicDescription": "Header Not Sent : Cycle valid for Flit : hea= der flit is ready for transmission but could not be sent : header flit is r= eady for transmission but was not sent while cycle is valid for flit transm= ission", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Can't Slot AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD", + "PerPkg": "1", + "PublicDescription": "Message Held : Can't Slot AD : some AD messa= ge could not be slotted (logical OR of all AD events under INGR_SLOT_CANT_M= C_VN{0,1})", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Can't Slot BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL", + "PerPkg": "1", + "PublicDescription": "Message Held : Can't Slot BL : some BL messa= ge could not be slotted (logical OR of all BL events under INGR_SLOT_CANT_M= C_VN{0,1})", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Parallel Attempt", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT", + "PerPkg": "1", + "PublicDescription": "Message Held : Parallel Attempt : ad and bl = messages attempted to slot into the same flit in parallel", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : Parallel Success", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS", + "PerPkg": "1", + "PublicDescription": "Message Held : Parallel Success : ad and bl = messages were actually slotted into the same flit in paralle", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : VN0", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.VN0", + "PerPkg": "1", + "PublicDescription": "Message Held : VN0 : vn0 message(s) that cou= ldn't be slotted into last vn0 flit are held in slotting stage while proces= sing vn1 flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held : VN1", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_HELD.VN1", + "PerPkg": "1", + "PublicDescription": "Message Held : VN1 : vn1 message(s) that cou= ldn't be slotted into last vn1 flit are held in slotting stage while proces= sing vn0 flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : REQ = on AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : REQ= on AD : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Home (REQ) messages on AD. REQ = is generally used to send requests, request responses, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP = on AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP= on AD : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Response (RSP) messages on AD. = RSP packets are used to transmit a variety of protocol flits including gran= ts and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : SNP = on AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : SNP= on AD : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Snoops (SNP) messages on AD. SN= P is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCB = on BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCB= on BL : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Non-Coherent Broadcast (NCB) mes= sages on BL. NCB is generally used to transmit data without coherency. Fo= r example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCS = on BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCS= on BL : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Non-Coherent Standard (NCS) mess= ages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP = on BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP= on BL : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Response (RSP) messages on BL. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : WB o= n BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : WB = on BL : Counts the number of allocations into the UPI Ingress. This tracks= one of the three rings that are used by the UPI agent. This can be used i= n conjunction with the UPI Ingress Occupancy Accumulator event in order to = calculate average queue latency. Multiple ingress buffers can be tracked a= t a given time using multiple counters. : Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : REQ = on AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : REQ= on AD : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Home (REQ) messages on= AD. REQ is generally used to send requests, request responses, and snoop = responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP = on AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP= on AD : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Response (RSP) message= s on AD. RSP packets are used to transmit a variety of protocol flits incl= uding grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : SNP = on AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : SNP= on AD : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Snoops (SNP) messages = on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCB = on BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCB= on BL : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Non-Coherent Broadcast= (NCB) messages on BL. NCB is generally used to transmit data without cohe= rency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCS = on BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCS= on BL : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Non-Coherent Standard = (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP = on BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP= on BL : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Response (RSP) message= s on BL. RSP packets are used to transmit a variety of protocol flits inclu= ding grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : WB o= n BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : WB = on BL : Counts the number of allocations into the UPI VN1 Ingress. This t= racks one of the three rings that are used by the UPI agent. This can be u= sed in conjunction with the UPI VN1 Ingress Occupancy Accumulator event in= order to calculate average queue latency. Multiple ingress buffers can be= tracked at a given time using multiple counters. : Data Response (WB) mess= ages on BL. WB is generally used to transmit data with coherency. For exa= mple, remote reads and writes, or cache to cache transfers will transmit th= eir data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RE= Q on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : R= EQ on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Home (REQ) messages on AD. REQ is generally used to se= nd requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RS= P on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : R= SP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on AD. RSP packets are used to= transmit a variety of protocol flits including grants and completions (CMP= ).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : SN= P on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : S= NP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Snoops (SNP) messages on AD. SNP is used for outgoing = snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : NC= B on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : N= CB on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Broadcast (NCB) messages on BL. NCB is ge= nerally used to transmit data without coherency. For example, non-coherent= read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : NC= S on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : N= CS on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RS= P on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : R= SP on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on BL. RSP packets are used to = transmit a variety of protocol flits including grants and completions (CMP)= .", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : WB= on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : W= B on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in ea= ch cycle. This tracks one of the three ring Ingress buffers. This can be = used with the UPI VN1 Ingress Not Empty event to calculate average occupan= cy or the UPI VN1 Ingress Allocations event in order to calculate average = queuing latency. : Data Response (WB) messages on BL. WB is generally used= to transmit data with coherency. For example, remote reads and writes, or= cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RE= Q on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : R= EQ on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Home (REQ) messages on AD. REQ is generally used to se= nd requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RS= P on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : R= SP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on AD. RSP packets are used to= transmit a variety of protocol flits including grants and completions (CMP= ).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : SN= P on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : S= NP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Snoops (SNP) messages on AD. SNP is used for outgoing = snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : NC= B on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : N= CB on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Broadcast (NCB) messages on BL. NCB is ge= nerally used to transmit data without coherency. For example, non-coherent= read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : NC= S on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : N= CS on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RS= P on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : R= SP on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on BL. RSP packets are used to = transmit a variety of protocol flits including grants and completions (CMP)= .", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : WB= on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : W= B on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in ea= ch cycle. This tracks one of the three ring Ingress buffers. This can be = used with the UPI VN1 Ingress Not Empty event to calculate average occupan= cy or the UPI VN1 Ingress Allocations event in order to calculate average = queuing latency. : Data Response (WB) messages on BL. WB is generally used= to transmit data with coherency. For example, remote reads and writes, or= cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : REQ on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : REQ on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Home (REQ) messages on AD. REQ is generally used to send re= quests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : RSP on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : RSP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on AD. RSP packets are used to tran= smit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : SNP on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : SNP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Snoops (SNP) messages on AD. SNP is used for outgoing snoop= s.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : NCB on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : NCB on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Broadcast (NCB) messages on BL. NCB is general= ly used to transmit data without coherency. For example, non-coherent read= data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : NCS on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : NCS on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : RSP on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : RSP on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on BL. RSP packets are used to trans= mit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit : WB on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message can't slot into flit : WB on BL = : Count cases where Ingress has packets to send but did not have time to pa= ck into flit before sending to Agent so slot was left NULL which could have= been used. : Data Response (WB) messages on BL. WB is generally used to t= ransmit data with coherency. For example, remote reads and writes, or cach= e to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : REQ on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : REQ on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Home (REQ) messages on AD. REQ is generally used to send re= quests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : RSP on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : RSP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on AD. RSP packets are used to tran= smit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : SNP on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : SNP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Snoops (SNP) messages on AD. SNP is used for outgoing snoop= s.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : NCB on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : NCB on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Broadcast (NCB) messages on BL. NCB is general= ly used to transmit data without coherency. For example, non-coherent read= data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : NCS on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : NCS on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : RSP on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : RSP on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on BL. RSP packets are used to trans= mit a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit : WB on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message can't slot into flit : WB on BL = : Count cases where Ingress has packets to send but did not have time to pa= ck into flit before sending to Agent so slot was left NULL which could have= been used. : Data Response (WB) messages on BL. WB is generally used to t= ransmit data with coherency. For example, remote reads and writes, or cach= e to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Any In Use", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Any In Use : At least o= ne remote vna credit is in use", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Corrected", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Corrected : Number of r= emote vna credits corrected (local return) per cycle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 1", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 1 : Remote vna = credit level is less than 1 (i.e. no vna credits available)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 10", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT10", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 10 : remote vna= credit level is less than 10; parallel vn0/vn1 arb not possible", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 4", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 4 : Remote vna = credit level is less than 4; bl (or ad requiring 4 vna) cannot arb on vna", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits : Level < 5", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5", + "PerPkg": "1", + "PublicDescription": "Remote VNA Credits : Level < 5 : Remote vna = credit level is less than 5; parallel ad/bl arb on vna not possible", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5", + "PerPkg": "1", + "PublicDescription": ": remote vna credit count was less than 5 an= d allocation to ad or bl messages was required", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT1= 0", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT10", + "PerPkg": "1", + "PublicDescription": ": remote vna credit count was less than 10 a= nd allocation to vn0 or vn1 was required", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD", + "PerPkg": "1", + "PublicDescription": ": on vn0, remote vna credits were allocated = only to ad messages, not to bl", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL", + "PerPkg": "1", + "PublicDescription": ": on vn0, remote vna credits were allocated = only to bl messages, not to ad", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY", + "PerPkg": "1", + "PublicDescription": ": remote vna credits were allocated only to = vn0, not to vn1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD", + "PerPkg": "1", + "PublicDescription": ": on vn1, remote vna credits were allocated = only to ad messages, not to bl", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL", + "PerPkg": "1", + "PublicDescription": ": on vn1, remote vna credits were allocated = only to bl messages, not to ad", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY", + "PerPkg": "1", + "PublicDescription": ": remote vna credits were allocated only to = vn1, not to vn0", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE5", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE5", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xE2", + "EventName": "UNC_M3UPI_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xE3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xE1", + "EventName": "UNC_M3UPI_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xE0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD1", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD1", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD1", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD3", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD3", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD3", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD5", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD5", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD5", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD7", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD7", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD7", + "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 REQ Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 RSP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 SNP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN0 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN0 WB Messages : AD arb= but no win; arb request asserted but not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 REQ Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 RSP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 SNP Messages : AD ar= b but no win; arb request asserted but not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD : VN1 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for AD : VN1 WB Messages : AD arb= but no win; arb request asserted but not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP", + "PerPkg": "1", + "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 REQ Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 RSP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 SNP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN0 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN0 WB Messages : Numb= er of cycles the AD Egress queue is Not Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 REQ Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 RSP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 SNP Messages : Num= ber of cycles the AD Egress queue is Not Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty : VN1 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Not Empty : VN1 WB Messages : Numb= er of cycles the AD Egress queue is Not Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 REQ Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 REQ Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 RSP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 SNP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 SNP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN0 WB Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN0 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN1 REQ Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN1 REQ Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN1 RSP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN1 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts : VN1 SNP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD Flow Q Inserts : VN1 SNP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 REQ Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 RSP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 SNP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_SNP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN0 WB Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN1 REQ Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_REQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN1 RSP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy : VN1 SNP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_SNP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Inserts", + "EventCode": "0x2F", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Occupancy", + "EventCode": "0x1E", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_OCCUPANCY", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 NCB Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 NCS Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 RSP Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN0 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN0 WB Messages : BL arb= but no win; arb request asserted but not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 NCS Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 NCB Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 RSP Messages : BL ar= b but no win; arb request asserted but not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL : VN1 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Failed ARB for BL : VN1 WB Messages : BL arb= but no win; arb request asserted but not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 REQ Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 RSP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 SNP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN0 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN0 WB Messages : Numb= er of cycles the BL Egress queue is Not Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 REQ Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 RSP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 SNP Messages : Num= ber of cycles the BL Egress queue is Not Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty : VN1 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Not Empty : VN1 WB Messages : Numb= er of cycles the BL Egress queue is Not Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 RSP Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 WB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 NCS Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 NCS Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN0 NCB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN0 NCB Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1 RSP Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1 WB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1_NCB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1_NCB Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts : VN1_NCS Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL Flow Q Inserts : VN1_NCS Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 NCB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 NCS Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 RSP Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 WB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1_NCS Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1_NCB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 RSP Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 WB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 RSP Messages", + "EventCode": "0x1F", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 WB Messages", + "EventCode": "0x1F", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_THROUGH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN0 NCB Messages", + "EventCode": "0x1F", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_WRPULL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 RSP Messages", + "EventCode": "0x1F", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_LOCAL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1 WB Messages", + "EventCode": "0x1F", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_THROUGH", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy : VN1_NCS Messages", + "EventCode": "0x1F", + "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_WRPULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN0 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN0 REQ Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN0 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN0 RSP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN0 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN0 SNP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN1 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN1 REQ Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN1 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN1 RSP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VN1 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VN1 SNP Messages : N= o credits available to send to UPIs on the AD Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty : VNA", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "UPI0 AD Credits Empty : VNA : No credits ava= ilable to send to UPIs on the AD Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN0 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN0 RSP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN0 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN0 REQ Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN0 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN0 SNP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN1 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN1 RSP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN1 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN1 REQ Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VN1 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VN1 SNP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty : VNA", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "UPI0 BL Credits Empty : VNA : No credits ava= ilable to send to UPI on the BL Ring (diff between non-SMI and SMI mode)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "FlowQ Generated Prefetch", + "EventCode": "0x29", + "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", + "PerPkg": "1", + "PublicDescription": "FlowQ Generated Prefetch : Count cases where= FlowQ causes spawn of Prefetch to iMC/SMI3 target", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xB5", + "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xB5", + "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : WB on BL", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : WB on BL : Number of times= a VN0 credit was used on the DRS message channel. In order for a request = to be transferred across UPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN0.= VNA is a shared pool used to achieve high performance. The VN0 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN0 if= they fail. This counts the number of times a VN0 credit was used. Note t= hat a single VN0 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN0 will only count a single credit ev= en though it may use multiple buffers. : Data Response (WB) messages on BL.= WB is generally used to transmit data with coherency. For example, remot= e reads and writes, or cache to cache transfers will transmit their data us= ing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : NCB on BL", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : NCB on BL : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : REQ on AD", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : REQ on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : RSP on AD", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : RSP on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : SNP on AD", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : SNP on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used : RSP on BL", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Used : RSP on BL : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : WB on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : WB on BL : Number of Cycles= there were no VN0 Credits : Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : NCB on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : NCB on BL : Number of Cycle= s there were no VN0 Credits : Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, no= n-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : REQ on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : REQ on AD : Number of Cycle= s there were no VN0 Credits : Home (REQ) messages on AD. REQ is generally = used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : RSP on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : RSP on AD : Number of Cycle= s there were no VN0 Credits : Response (RSP) messages on AD. RSP packets a= re used to transmit a variety of protocol flits including grants and comple= tions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : SNP on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : SNP on AD : Number of Cycle= s there were no VN0 Credits : Snoops (SNP) messages on AD. SNP is used for= outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits : RSP on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "VN0 No Credits : RSP on BL : Number of Cycle= s there were no VN0 Credits : Response (RSP) messages on BL. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : WB on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : WB on BL : Number of times= a VN1 credit was used on the WB message channel. In order for a request t= o be transferred across QPI, it must be guaranteed to have a flit buffer on= the remote socket to sink into. There are two credit pools, VNA and VN1. = VNA is a shared pool used to achieve high performance. The VN1 pool has r= eserved entries for each message class and is used to prevent deadlock. Re= quests first attempt to acquire a VNA credit, and then fall back to VN1 if = they fail. This counts the number of times a VN1 credit was used. Note th= at a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that = case uses 9 credits. A transfer on VN1 will only count a single credit eve= n though it may use multiple buffers. : Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote= reads and writes, or cache to cache transfers will transmit their data usi= ng WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : NCB on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : NCB on BL : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Non-Coherent Broadcast (NCB) messa= ges on BL. NCB is generally used to transmit data without coherency. For = example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : REQ on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : REQ on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Home (REQ) messages on AD. REQ is= generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : RSP on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : RSP on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Response (RSP) messages on AD. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : SNP on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : SNP on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Snoops (SNP) messages on AD. SNP = is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used : RSP on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Used : RSP on BL : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Response (RSP) messages on BL. RSP= packets are used to transmit a variety of protocol flits including grants = and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : WB on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : WB on BL : Number of Cycles= there were no VN1 Credits : Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : NCB on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : NCB on BL : Number of Cycle= s there were no VN1 Credits : Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, no= n-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : REQ on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : REQ on AD : Number of Cycle= s there were no VN1 Credits : Home (REQ) messages on AD. REQ is generally = used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : RSP on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : RSP on AD : Number of Cycle= s there were no VN1 Credits : Response (RSP) messages on AD. RSP packets a= re used to transmit a variety of protocol flits including grants and comple= tions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : SNP on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : SNP on AD : Number of Cycle= s there were no VN1 Credits : Snoops (SNP) messages on AD. SNP is used for= outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits : RSP on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "VN1 No Credits : RSP on BL : Number of Cycle= s there were no VN1 Credits : Response (RSP) messages on BL. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LO= CALDEST_VN0", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST= _VN0", + "PerPkg": "1", + "UMask": "0x82", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LO= CALDEST_VN1", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST= _VN1", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LO= CALDEST_VN0", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST= _VN0", + "PerPkg": "1", + "UMask": "0x81", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LO= CALDEST_VN1", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST= _VN1", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LO= CALDEST_VN0", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST= _VN0", + "PerPkg": "1", + "UMask": "0x84", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LO= CALDEST_VN1", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST= _VN1", + "PerPkg": "1", + "UMask": "0xc0", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1", + "EventCode": "0x7E", + "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1", + "EventCode": "0x7D", + "EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARB", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.ARB", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message is making arbitration= request", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARRIVED", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.ARRIVED", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message arrived in ingress pi= peline", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.BYPASS", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.BYPASS", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message took bypass path", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.FLITTED", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.FLITTED", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message was slotted into flit= (non bypass)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_ARB", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_ARB", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message lost arbitration", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_OLD", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_OLD", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message was dropped because i= t became too old", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL", + "PerPkg": "1", + "PublicDescription": ": xpt prefetch message was dropped because i= t was overwritten by new message while prefetch queue was full", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of kfclks", + "EventCode": "0x01", + "EventName": "UNC_UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of kfclks : Counts the number of cloc= ks in the UPI LL. This clock runs at 1/8th the GT/s speed of the UPI link.= For example, a 8GT/s link will have qfclk or 1GHz. Current products do n= ot support dynamic link speeds, so this frequency is fixed.", + "Unit": "UPI" + }, + { + "BriefDescription": "Direct packet attempts : D2C", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", + "PerPkg": "1", + "PublicDescription": "Direct packet attempts : D2C : Counts the nu= mber of DRS packets that we attempted to do direct2core/direct2UPI on. The= re are 4 mutually exclusive filters. Filter [0] can be used to get success= ful spawns, while [1:3] provide the different failure cases. Note that thi= s does not count packets that are not candidates for Direct2Core. The only= candidates for Direct2Core are DRS packets destined for Cbos.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Direct packet attempts : D2K", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K", + "PerPkg": "1", + "PublicDescription": "Direct packet attempts : D2K : Counts the nu= mber of DRS packets that we attempted to do direct2core/direct2UPI on. The= re are 4 mutually exclusive filters. Filter [0] can be used to get success= ful spawns, while [1:3] provide the different failure cases. Note that thi= s does not count packets that are not candidates for Direct2Core. The only= candidates for Direct2Core are DRS packets destined for Cbos.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L1", + "EventCode": "0x21", + "EventName": "UNC_UPI_L1_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L1 : Number of UPI qfclk cycles sp= ent in L1 power mode. L1 is a mode that totally shuts down a UPI link. Us= e edge detect to count the number of instances when the UPI link entered L1= . Link power states are per link and per direction, so for example the Tx = direction could be in one state while Rx was in another. Because L1 totally= shuts down the link, it takes a good amount of time to exit this mode.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "EventCode": "0x16", + "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1", + "EventCode": "0x20", + "EventName": "UNC_UPI_PHY_INIT_CYCLES", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req Nack", + "EventCode": "0x23", + "EventName": "UNC_UPI_POWER_L1_NACK", + "PerPkg": "1", + "PublicDescription": "L1 Req Nack : Counts the number of times a l= ink sends/receives a LinkReqNAck. When the UPI links would like to change = power state, the Tx side initiates a request to the Rx side requesting to c= hange states. This requests can either be accepted or denied. If the Rx s= ide replies with an Ack, the power mode will change. If it replies with NA= ck, no change will take place. This can be filtered based on Rx and Tx. A= n Rx LinkReqNAck refers to receiving an NAck (meaning this agent's Tx origi= nally requested the power change). A Tx LinkReqNAck refers to sending this= command (meaning the peer agent's Tx originally requested the power change= and this agent accepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req (same as L1 Ack).", + "EventCode": "0x22", + "EventName": "UNC_UPI_POWER_L1_REQ", + "PerPkg": "1", + "PublicDescription": "L1 Req (same as L1 Ack). : Counts the number= of times a link sends/receives a LinkReqAck. When the UPI links would lik= e to change power state, the Tx side initiates a request to the Rx side req= uesting to change states. This requests can either be accepted or denied. = If the Rx side replies with an Ack, the power mode will change. If it rep= lies with NAck, no change will take place. This can be filtered based on R= x and Tx. An Rx LinkReqAck refers to receiving an Ack (meaning this agent'= s Tx originally requested the power change). A Tx LinkReqAck refers to sen= ding this command (meaning the peer agent's Tx originally requested the pow= er change and this agent accepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0x25", + "EventName": "UNC_UPI_RxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles s= pent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lane= s, decreasing our bandwidth in order to save power. It increases snoop and= data transfer latencies and decreases overall bandwidth. This mode can be= very useful in NUMA optimized workloads that largely only utilize UPI for = snoops and their responses. Use edge detect to count the number of instanc= es when the UPI link entered L0p. Link power states are per link and per d= irection, so for example the Tx direction could be in one state while Rx wa= s in another.", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0x24", + "EventName": "UNC_UPI_RxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0 : Number of UPI qfclk cycles sp= ent in L0 power mode in the Link Layer. L0 is the default mode which provi= des the highest performance with the most power. Use edge detect to count = the number of instances that the link entered L0. Link power states are pe= r link and per direction, so for example the Tx direction could be in one s= tate while Rx was in another. The phy layer sometimes leaves L0 for train= ing, which will not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass, Match Opcode : Matches on Receive path of a UPI port.\r\nM= atch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Messag= e Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\= r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: D= ual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control type= s are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match= _en cases.\r\nNote: If Message Class is disabled, we expect opcode to also = be disabled.", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard : Matches on Receive path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard, Match Opcode : Matches on Receive path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Reque= st", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Requ= est : Matches on Receive path of a UPI port.\r\nMatch based on UMask specif= ic bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcod= e (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: = Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: = Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, s= lot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Mes= sage Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Reque= st, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Requ= est, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", + "UMask": "0x108", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Conflict", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Conflict : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x1aa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Invalid", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Invalid : Matches on Receive path of a UPI port.\r\nMatch based on U= Mask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\= r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote En= able\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr En= able\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded = (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nN= ote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x12a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Data", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Data : Matches on Receive path of a UPI port.\r\nMatch based on UMas= k specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\n= W: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enabl= e\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enabl= e\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL= CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote= : If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Data, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Data, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch= based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Cl= ass Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT= : Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual = Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types ar= e excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en = cases.\r\nNote: If Message Class is disabled, we expect opcode to also be d= isabled.", + "UMask": "0x10c", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - No Data", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - No Data : Matches on Receive path of a UPI port.\r\nMatch based on U= Mask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\= r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote En= able\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr En= able\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded = (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nN= ote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - No Data, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - No Data, Match Opcode : Matches on Receive path of a UPI port.\r\nMa= tch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message= Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r= \nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Du= al Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types= are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_= en cases.\r\nNote: If Message Class is disabled, we expect opcode to also b= e disabled.", + "UMask": "0x10a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Snoop= ", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Snoo= p : Matches on Receive path of a UPI port.\r\nMatch based on UMask specific= bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode = (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Da= ta Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Si= ngle Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slo= t NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Messa= ge Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Snoop= , Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Snoo= p, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x109", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Write= back", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Writ= eback : Matches on Receive path of a UPI port.\r\nMatch based on UMask spec= ific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opc= ode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS= : Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP= : Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL,= slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If M= essage Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port : Write= back, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Receive path of a UPI Port : Writ= eback, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", + "UMask": "0x10d", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 0 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 1 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 2 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "CRC Errors Detected", + "EventCode": "0x0B", + "EventName": "UNC_UPI_RxL_CRC_ERRORS", + "PerPkg": "1", + "PublicDescription": "CRC Errors Detected : Number of CRC errors d= etected in the UPI Agent. Each UPI flit incorporates 8 bits of CRC for err= or detection. This counts the number of flits where the CRC was able to de= tect an error. After an error has been detected, the UPI agent will send a= request to the transmitting socket to resend the flit (as well as any flit= s that came after it).", + "Unit": "UPI" + }, + { + "BriefDescription": "LLR Requests Sent", + "EventCode": "0x08", + "EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT", + "PerPkg": "1", + "PublicDescription": "LLR Requests Sent : Number of LLR Requests w= ere transmitted. This should generally be <=3D the number of CRC errors de= tected. If multiple errors are detected before the Rx side receives a LLC_= REQ_ACK from the Tx side, there is no need to send more LLR_REQ_NACKs.", + "Unit": "UPI" + }, + { + "BriefDescription": "VN0 Credit Consumed", + "EventCode": "0x39", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0", + "PerPkg": "1", + "PublicDescription": "VN0 Credit Consumed : Counts the number of t= imes that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", + "Unit": "UPI" + }, + { + "BriefDescription": "VN1 Credit Consumed", + "EventCode": "0x3A", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1", + "PerPkg": "1", + "PublicDescription": "VN1 Credit Consumed : Counts the number of t= imes that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credit Consumed", + "EventCode": "0x38", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA", + "PerPkg": "1", + "PublicDescription": "VNA Credit Consumed : Counts the number of t= imes that an RxQ VNA credit was consumed (i.e. message uses a VNA credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : All Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : All Data : Shows lega= l flit time (hides impact of L0p and L0c).", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Null FLITs received fr= om any slot", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Null FLITs received f= rom any slot : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Data : Shows legal fl= it time (hides impact of L0p and L0c). : Count Data Flits (which consume al= l slots), but how much to count is based on Slot0-2 mask, so count can be 0= -3 depending on which slots are enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Null FLITs received fr= om any slot", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Null FLITs received f= rom any slot : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : LLCRD Not Empty", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : LLCRD Not Empty : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables counting of LLC= RD (with non-zero payload). This only applies to slot 2 since LLCRD is only= allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : LLCTRL", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : LLCTRL : Shows legal = flit time (hides impact of L0p and L0c). : Equivalent to an idle packet. E= nables counting of slot 0 LLCTRL messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : All Non Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : All Non Data : Shows = legal flit time (hides impact of L0p and L0c).", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Emp= ty", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.NULL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot NULL or LLCRD Em= pty : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all= zeros is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dua= l slot. This can apply to slot 0,1, or 2.", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Protocol Header", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Protocol Header : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables count of protoc= ol headers in slot 0,1,2 (depending on slot uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot 0", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot 0 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits d= etermine types of headers to count.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot 1", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot 1 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits d= etermine types of headers to count.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received : Slot 2", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Valid Flits Received : Slot 2 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits d= etermine types of headers to count.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 0", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 0 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 1", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 1 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 2", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", + "PerPkg": "1", + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 2 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets : Slot 0", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", + "PerPkg": "1", + "PublicDescription": "RxQ Occupancy - All Packets : Slot 0 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets : Slot 1", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", + "PerPkg": "1", + "PublicDescription": "RxQ Occupancy - All Packets : Slot 1 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets : Slot 2", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", + "PerPkg": "1", + "PublicDescription": "RxQ Occupancy - All Packets : Slot 2 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0p", + "EventCode": "0x27", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles s= pent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lane= s, decreasing our bandwidth in order to save power. It increases snoop and= data transfer latencies and decreases overall bandwidth. This mode can be= very useful in NUMA optimized workloads that largely only utilize UPI for = snoops and their responses. Use edge detect to count the number of instanc= es when the UPI link entered L0p. Link power states are per link and per d= irection, so for example the Tx direction could be in one state while Rx wa= s in another.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "EventCode": "0x28", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "EventCode": "0x29", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0", + "EventCode": "0x26", + "EventName": "UNC_UPI_TxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Cycles in L0 : Number of UPI qfclk cycles sp= ent in L0 power mode in the Link Layer. L0 is the default mode which provi= des the highest performance with the most power. Use edge detect to count = the number of instances that the link entered L0. Link power states are pe= r link and per direction, so for example the Tx direction could be in one s= tate while Rx was in another. The phy layer sometimes leaves L0 for train= ing, which will not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass, Match Opcode : Matches on Transmit path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard : Matches on Transmit path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard, Match Opcode : Matches on Transmit path of a UPI port.\= r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Me= ssage Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Ena= ble\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\n= Q: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control = types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode m= atch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to a= lso be disabled.", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Requ= est", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Req= uest : Matches on Transmit path of a UPI port.\r\nMatch based on UMask spec= ific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opc= ode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS= : Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP= : Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL,= slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If M= essage Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Requ= est, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Req= uest, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", + "UMask": "0x108", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Conflict", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Conflict : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", + "UMask": "0x1aa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Invalid", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Invalid : Matches on Transmit path of a UPI port.\r\nMatch based on= UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enabl= e\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote = Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr = Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclude= d (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\= nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x12a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Data", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Data : Matches on Transmit path of a UPI port.\r\nMatch based on UM= ask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r= \nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Ena= ble\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Ena= ble\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (= LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNo= te: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Data, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Data, Match Opcode : Matches on Transmit path of a UPI port.\r\nMat= ch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message = Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\= nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dua= l Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types = are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_e= n cases.\r\nNote: If Message Class is disabled, we expect opcode to also be= disabled.", + "UMask": "0x10c", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - No Data", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - No Data : Matches on Transmit path of a UPI port.\r\nMatch based on= UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enabl= e\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote = Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr = Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclude= d (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\= nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - No Data, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - No Data, Match Opcode : Matches on Transmit path of a UPI port.\r\n= Match based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Messa= ge Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable= \r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: = Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control typ= es are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode matc= h_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also= be disabled.", + "UMask": "0x10a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Snoo= p", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Sno= op : Matches on Transmit path of a UPI port.\r\nMatch based on UMask specif= ic bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcod= e (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: = Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: = Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, s= lot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Mes= sage Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Snoo= p, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Sno= op, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", + "UMask": "0x109", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Writ= eback", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Wri= teback : Matches on Transmit path of a UPI port.\r\nMatch based on UMask sp= ecific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: O= pcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\= nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\= nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTR= L, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If= Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Writ= eback, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Wri= teback, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch bas= ed on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class = Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Re= mote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot= Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are ex= cluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en case= s.\r\nNote: If Message Class is disabled, we expect opcode to also be disab= led.", + "UMask": "0x10d", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Bypassed", + "EventCode": "0x41", + "EventName": "UNC_UPI_TxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Bypassed : Counts the number = of times that an incoming flit was able to bypass the Tx flit buffer and pa= ss directly out the UPI Link. Generally, when data is transmitted across UP= I, it will bypass the TxQ and pass directly to the link. However, the TxQ = will be used with L0p and when LLR occurs, increasing latency to transfer o= ut to the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : All Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All Data : Shows legal fl= it time (hides impact of L0p and L0c).", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Null FLITs transmitted to = any slot", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Null FLITs transmitted to= any slot : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Data : Shows legal flit t= ime (hides impact of L0p and L0c). : Count Data Flits (which consume all sl= ots), but how much to count is based on Slot0-2 mask, so count can be 0-3 d= epending on which slots are enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Idle", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Idle : Shows legal flit t= ime (hides impact of L0p and L0c).", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : LLCRD Not Empty", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : LLCRD Not Empty : Shows l= egal flit time (hides impact of L0p and L0c). : Enables counting of LLCRD (= with non-zero payload). This only applies to slot 2 since LLCRD is only all= owed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : LLCTRL", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : LLCTRL : Shows legal flit= time (hides impact of L0p and L0c). : Equivalent to an idle packet. Enabl= es counting of slot 0 LLCTRL messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : All Non Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All Non Data : Shows lega= l flit time (hides impact of L0p and L0c).", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.NULL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty = : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all zer= os is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dual sl= ot. This can apply to slot 0,1, or 2.", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Protocol Header", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Protocol Header : Shows l= egal flit time (hides impact of L0p and L0c). : Enables count of protocol h= eaders in slot 0,1,2 (depending on slot uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 0", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 0 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits deter= mine types of headers to count.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 1", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 1 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits deter= mine types of headers to count.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 2", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 2 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits deter= mine types of headers to count.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Allocations", + "EventCode": "0x40", + "EventName": "UNC_UPI_TxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Allocations : Number of alloc= ations into the UPI Tx Flit Buffer. Generally, when data is transmitted ac= ross UPI, it will bypass the TxQ and pass directly to the link. However, t= he TxQ will be used with L0p and when LLR occurs, increasing latency to tra= nsfer out to the link. This event can be used in conjunction with the Flit= Buffer Occupancy event in order to calculate the average flit buffer lifet= ime.", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Occupancy", + "EventCode": "0x42", + "EventName": "UNC_UPI_TxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Occupancy : Accumulates the n= umber of flits in the TxQ. Generally, when data is transmitted across UPI,= it will bypass the TxQ and pass directly to the link. However, the TxQ wi= ll be used with L0p and when LLR occurs, increasing latency to transfer out= to the link. This can be used with the cycles not empty event to track ave= rage occupancy, or the allocations event to track average lifetime in the T= xQ.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "EventCode": "0x45", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credits Pending Return - Occupancy", + "EventCode": "0x44", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "VNA Credits Pending Return - Occupancy : Num= ber of VNA credits in the Rx side that are waitng to be returned back acros= s the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", + "EventCode": "0xff", + "EventName": "UNC_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : Doorbell", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : Interrupt", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Message Received : Interrupt : Interrupts", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : IPI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : IPI : Inter Processor Int= errupts", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : MSI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : MSI : Message Signaled In= terrupts - interrupts sent by devices (including PCIe via IOxAPIC) (Socket = Mode only)", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : VLW", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : VLW : Virtual Logical Wir= e (legacy) message were received from Uncore.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "IDI Lock/SplitLock Cycles", + "EventCode": "0x44", + "EventName": "UNC_U_LOCK_CYCLES", + "PerPkg": "1", + "PublicDescription": "IDI Lock/SplitLock Cycles : Number of times = an IDI Lock/SplitLock sequence was started", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "EventCode": "0x4F", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "EventCode": "0x4F", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "Cycles PHOLD Assert to Ack : Assert to ACK := PHOLD cycles.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDRAND", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDSEED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "PublicDescription": "RACU Request : Number outstanding register r= equests within message channel tracker", + "Unit": "UBOX" + } +] diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-io.json b/tools= /perf/pmu-events/arch/x86/icelakex/uncore-io.json new file mode 100644 index 000000000000..9cef8862c428 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-io.json @@ -0,0 +1,9270 @@ +[ + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", + "PerPkg": "1", + "UMask": "0x22", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", + "PerPkg": "1", + "UMask": "0x23", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", + "PerPkg": "1", + "UMask": "0x25", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", + "PerPkg": "1", + "UMask": "0x26", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", + "PerPkg": "1", + "UMask": "0x27", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Clockticks of the integrated IO (IIO) traffic= controller", + "EventCode": "0x01", + "EventName": "UNC_IIO_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Clockticks of the integrated IO (IIO) traffi= c controller : Increments counter once every Traffic Controller clock, the = LSCLK (500MHz)", + "Unit": "IIO" + }, + { + "BriefDescription": "Free running counter that increments for IIO = clocktick", + "EventCode": "0xff", + "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", + "PerPkg": "1", + "PublicDescription": "Free running counter that increments for int= egrated IO (IIO) traffic controller clockticks", + "UMask": "0x10", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts : All Ports", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0xff", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0-7", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 1", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 1 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 2", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 2 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 3", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 3 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 4", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 4 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 5", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 5 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 6", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 6 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 7", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 7 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1= , Or x4 card is plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5= , Or x4 card is plugged in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, = Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, = Or x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x= 4 card is plugged in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x= 4 card is plugged in to slot 4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 7", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card p= lugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card p= lugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plu= gged in to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plu= gged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugg= ed in to slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1,= Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5,= Or x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 c= ard is plugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 car= d is plugged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged= in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged= in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 ca= rd plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is= plugged in to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 ca= rd plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is= plugged in to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card= plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card= plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is p= lugged in to slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Passing data = to be written", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Passing data= to be written : How often different queues (e.g. channel / fc) ask to send= request into pipeline : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing final= read or write of line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Issuing fina= l read or write of line : How often different queues (e.g. channel / fc) as= k to send request into pipeline", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Processing re= sponse from IOMMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Processing r= esponse from IOMMU : How often different queues (e.g. channel / fc) ask to = send request into pipeline", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing to IO= MMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Issuing to I= OMMU : How often different queues (e.g. channel / fc) ask to send request i= nto pipeline", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Request Owner= ship", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Request Owne= rship : How often different queues (e.g. channel / fc) ask to send request = into pipeline : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Writing line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Writing line= : How often different queues (e.g. channel / fc) ask to send request into = pipeline : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Passi= ng data to be written", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Pass= ing data to be written : How often different queues (e.g. channel / fc) are= allowed to send request into pipeline : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng final read or write of line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing final read or write of line : How often different queues (e.g. channel = / fc) are allowed to send request into pipeline", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Proce= ssing response from IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Proc= essing response from IOMMU : How often different queues (e.g. channel / fc)= are allowed to send request into pipeline", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng to IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing to IOMMU : How often different queues (e.g. channel / fc) are allowed t= o send request into pipeline", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Reque= st Ownership", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Requ= est Ownership : How often different queues (e.g. channel / fc) are allowed = to send request into pipeline : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Writi= ng line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Writ= ing line : How often different queues (e.g. channel / fc) are allowed to se= nd request into pipeline : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 1G Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.1G_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 1G Page : Counts if a tran= saction to a 1G page, on its first lookup, hits the IOTLB.", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 2M Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.2M_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 2M Page : Counts if a tran= saction to a 2M page, on its first lookup, hits the IOTLB.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 4K Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.4K_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 4K Page : Counts if a tran= saction to a 4K page, on its first lookup, hits the IOTLB.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB lookups all", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": IOTLB lookups all : Some transactions have= to look up IOTLB multiple times. Counts every time a request looks up IOT= LB.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache hits", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", + "PerPkg": "1", + "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache lookups", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB lookups first", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Fills (same as IOTLB miss)", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.MISSES", + "PerPkg": "1", + "PublicDescription": ": IOTLB Fills (same as IOTLB miss) : When a = transaction misses IOTLB, it does a page walk to look up memory and bring i= n the relevant page translation. Counts when this page translation is writt= en to IOTLB.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Cycles PWT full", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.CYC_PWT_FULL", + "PerPkg": "1", + "PublicDescription": ": Cycles PWT full : Counts cycles the IOMMU = has reached its maximum limit for outstanding page walks.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOMMU memory access", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", + "PerPkg": "1", + "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 1G page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 2M page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 4K page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_4K_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWT Hit to a 256T page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache fill", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache fill : When a transaction m= isses SLPWC, it does a page walk to look up memory and bring in the relevan= t page translation. When this page translation is written to SLPWC, ObsPwcF= illValid_nnnH is asserted.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache lookup", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache lookup : Counts each time a= transaction looks up second level page walk cache.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Interrupt Entry cache hit", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS", + "PerPkg": "1", + "PublicDescription": ": Interrupt Entry cache hit : Counts each ti= me a transaction's first look up hits the IEC.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": Interrupt Entry cache lookup", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": Interrupt Entry cache lookup : Counts the = number of transaction looks up that interrupt remapping cache.", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": Device-selective Context cache invalidation= cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DEVICE", + "PerPkg": "1", + "PublicDescription": ": Device-selective Context cache invalidatio= n cycles : Counts number of Device selective context cache invalidation eve= nts", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Domain-selective Context cache invalidation= cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DOMAIN", + "PerPkg": "1", + "PublicDescription": ": Domain-selective Context cache invalidatio= n cycles : Counts number of Domain selective context cache invalidation eve= nts", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache global invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_GBL", + "PerPkg": "1", + "PublicDescription": ": Context cache global invalidation cycles := Counts number of Context Cache global invalidation events", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Domain-selective IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_DOMAIN", + "PerPkg": "1", + "PublicDescription": ": Domain-selective IOTLB invalidation cycles= : Counts number of Domain selective invalidation events", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Global IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_GBL", + "PerPkg": "1", + "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Page-selective IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PAGE", + "PerPkg": "1", + "PublicDescription": ": Page-selective IOTLB invalidation cycles := Counts number of Page-selective within Domain Invalidation events", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = : Asserted if all bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : PCIE bus : As= serted if all bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus := Asserted if any bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : PCIE bus : Ass= erted if any bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Counting disabled", + "EventCode": "0x80", + "EventName": "UNC_IIO_NOTHING", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Occupancy of outbound request queue : To devi= ce", + "EventCode": "0xC5", + "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Occupancy of outbound request queue : To dev= ice : Counts number of outbound requests/completions IIO is currently proce= ssing", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Passing data to be written", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Passing data to be written : Only for post= ed requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Issuing final read or write of line", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Processing response from IOMMU", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Issuing to IOMMU", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Request Ownership", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Request Ownership : Only for posted reques= ts", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": Writing line", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Writing line : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = From IRP", + "EventCode": "0xC2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.IRP", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests sent to PCIe from main die := From IRP : Captures Posted/Non-posted allocations from IRP. i.e. either no= n-confined P2P traffic or from the CPU", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = From ITC", + "EventCode": "0xC2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.ITC", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests sent to PCIe from main die := From ITC : Confined P2P", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = Completion allocations", + "EventCode": "0xc2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.PREALLOC", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests PCIe makes of the main die : = Drop request", + "EventCode": "0x85", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU.ALL.DROP", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests PCIe makes of the main die := Drop request : Counts full PCIe requests before they're broken into a seri= es of cache-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_O= F_CPU. : Packet error detected, must be dropped", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests PCIe makes of the main die : = All", + "EventCode": "0x85", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests PCIe makes of the main die := All : Counts full PCIe requests before they're broken into a series of cac= he-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_OF_CPU.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Abort= ", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Confi= ned P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Local= P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Multi= -cast", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Memor= y", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : MsgB", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Remot= e P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Ubox", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "ITC address map 1", + "EventCode": "0x8F", + "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound cacheline requests issued : 64B requ= ests issued to device", + "EventCode": "0xD0", + "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Outbound cacheline requests issued : 64B req= uests issued to device : Each outbound cacheline granular request may need = to make multiple passes through the pipeline. Each time a cacheline comple= tes all its passes it advances line", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound TLP (transaction layer packet) reque= sts issued : To device", + "EventCode": "0xD1", + "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Outbound TLP (transaction layer packet) requ= ests issued : To device : Each time an outbound completes all its passes it= advances the pointer", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PWT occupancy", + "EventCode": "0x42", + "EventName": "UNC_IIO_PWT_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Passing d= ata to be written", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Passing = data to be written : Each PCIe request is broken down into a series of cach= eline granular requests and each cacheline size request may need to make mu= ltiple passes through the pipeline (e.g. for posted interrupts or multi-cas= t). Each time a cacheline completes all its passes (e.g. finishes posting= writes to all multi-cast targets) it advances line : Only for posted reque= sts", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Issuing f= inal read or write of line", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Issuing = final read or write of line : Each PCIe request is broken down into a serie= s of cacheline granular requests and each cacheline size request may need t= o make multiple passes through the pipeline (e.g. for posted interrupts or = multi-cast). Each time a cacheline completes all its passes (e.g. finishe= s posting writes to all multi-cast targets) it advances line", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Request O= wnership", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Request = Ownership : Each PCIe request is broken down into a series of cacheline gra= nular requests and each cacheline size request may need to make multiple pa= sses through the pipeline (e.g. for posted interrupts or multi-cast). Eac= h time a cacheline completes all its passes (e.g. finishes posting writes t= o all multi-cast targets) it advances line : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Writing l= ine", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Writing = line : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes all its passes (e.g. finishes posting writes to all= multi-cast targets) it advances line : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Passing data to be wr= itten", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Passing data to be w= ritten : Each PCIe request is broken down into a series of cacheline granul= ar requests and each cacheline size request may need to make multiple passe= s through the pipeline (e.g. for posted interrupts or multi-cast). Each t= ime a single PCIe request completes all its cacheline granular requests, it= advances pointer. : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Issuing final read or= write of line", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Issuing final read o= r write of line : Each PCIe request is broken down into a series of cacheli= ne granular requests and each cacheline size request may need to make multi= ple passes through the pipeline (e.g. for posted interrupts or multi-cast).= Each time a single PCIe request completes all its cacheline granular req= uests, it advances pointer.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Processing response f= rom IOMMU", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Processing response = from IOMMU : Each PCIe request is broken down into a series of cacheline gr= anular requests and each cacheline size request may need to make multiple p= asses through the pipeline (e.g. for posted interrupts or multi-cast). Ea= ch time a single PCIe request completes all its cacheline granular requests= , it advances pointer.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Issuing to IOMMU", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Issuing to IOMMU : E= ach PCIe request is broken down into a series of cacheline granular request= s and each cacheline size request may need to make multiple passes through = the pipeline (e.g. for posted interrupts or multi-cast). Each time a sing= le PCIe request completes all its cacheline granular requests, it advances = pointer.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Request Ownership", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Request Ownership : = Each PCIe request is broken down into a series of cacheline granular reques= ts and each cacheline size request may need to make multiple passes through= the pipeline (e.g. for posted interrupts or multi-cast). Each time a sin= gle PCIe request completes all its cacheline granular requests, it advances= pointer. : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Writing line", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Writing line : Each = PCIe request is broken down into a series of cacheline granular requests an= d each cacheline size request may need to make multiple passes through the = pipeline (e.g. for posted interrupts or multi-cast). Each time a single P= CIe request completes all its cacheline granular requests, it advances poin= ter. : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Passing data t= o be written", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Passing data = to be written : Each PCIe request is broken down into a series of cacheline= granular requests and each cacheline size request may need to make multipl= e passes through the pipeline (e.g. for posted interrupts or multi-cast). = Each time a cacheline completes a single pass (e.g. posts a write to singl= e multi-cast target) it advances state : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Issuing final = read or write of line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Issuing final= read or write of line : Each PCIe request is broken down into a series of = cacheline granular requests and each cacheline size request may need to mak= e multiple passes through the pipeline (e.g. for posted interrupts or multi= -cast). Each time a cacheline completes a single pass (e.g. posts a write= to single multi-cast target) it advances state", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Request Owners= hip", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Request Owner= ship : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes a single pass (e.g. posts a write to single multi-c= ast target) it advances state : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Writing line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Writing line = : Each PCIe request is broken down into a series of cacheline granular requ= ests and each cacheline size request may need to make multiple passes throu= gh the pipeline (e.g. for posted interrupts or multi-cast). Each time a c= acheline completes a single pass (e.g. posts a write to single multi-cast t= arget) it advances state : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Symbol Times on Link", + "EventCode": "0x82", + "EventName": "UNC_IIO_SYMBOL_TIMES", + "PerPkg": "1", + "PublicDescription": "Symbol Times on Link : Gen1 - increment once= every 4nS, Gen2 - increment once every 2nS, Gen3 - increment once every 1n= S", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is= plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is= plugged in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugg= ed in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugg= ed in to slot 4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 7", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to La= ne 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot= 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to La= ne 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot= 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane= 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane= 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card= is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lan= e 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot = 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lan= e 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot = 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plug= ged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plug= ged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugge= d in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugge= d in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 0= /1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 2/= 3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 4= /5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot= 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 6/= 7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in= to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged = in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in= to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. 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"UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x85", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x85", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x85", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x86", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x87", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x87", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x87", + "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8c", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x8d", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x8d", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x8d", + "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8e", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Clockticks of the mesh to PCI (M2P)", + "EventCode": "0x01", + "EventName": "UNC_M2P_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Clockticks of the mesh to PCI (M2P) : Counts= the number of uclks in the M3 uclk domain. This could be slightly differe= nt than the count in the Ubox because of enable/freeze delays. However, be= cause the M3 is close to the Ubox, they generally should not diverge by mor= e than a handful of cycles.", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2P_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : PMM Local", + "EventCode": "0xAF", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.PMM_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : PMM Remote", + "EventCode": "0xAF", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.PMM_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xb9", + "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xb9", + "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCS message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credit fo= r transfer through CMS Port 0s to the IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the DRS message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCB message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCS me= ssage class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credit for transfer through CMS Port 0s to the IIO for the NCS me= ssage class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent0", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent1", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent2", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent0", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent1", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent2", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent3", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent4", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent5", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xe6", + "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xe6", + "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : All", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : All", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : All", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - DRS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - NCB", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - NCS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - DRS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_DRS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - NCB", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - NCS", + "EventCode": "0x48", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - DRS", + "EventCode": "0x49", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - NCB", + "EventCode": "0x49", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - NCS", + "EventCode": "0x49", + "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 = - NCB", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 = - NCS", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 = - NCB", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 = - NCS", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 = - NCB", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 = - NCS", + "EventCode": "0x1b", + "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent0", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent1", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent2", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent0", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent1", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent2", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - D= RS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - N= CB", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - N= CS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - D= RS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_DRS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - N= CB", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - N= CS", + "EventCode": "0x42", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - D= RS", + "EventCode": "0x43", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - N= CB", + "EventCode": "0x43", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - N= CS", + "EventCode": "0x43", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - DRS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - NCB", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - NCS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - DRS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_DRS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - NCB", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - NCS", + "EventCode": "0x4c", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - DRS", + "EventCode": "0x4d", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_DRS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - NCB", + "EventCode": "0x4d", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - NCS", + "EventCode": "0x4d", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_M2P_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_M2P_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "UNC_M2P_TxC_CREDITS.PMM", + "EventCode": "0x2D", + "EventName": "UNC_M2P_TxC_CREDITS.PMM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ", + "EventCode": "0x2d", + "EventName": "UNC_M2P_TxC_CREDITS.PRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9e", + "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9e", + "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xb3", + "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xb3", + "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-other.json b/to= ols/perf/pmu-events/arch/x86/icelakex/uncore-other.json deleted file mode 100644 index 134b54da0869..000000000000 --- a/tools/perf/pmu-events/arch/x86/icelakex/uncore-other.json +++ /dev/null @@ -1,33697 +0,0 @@ -[ - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", - "Deprecated": "1", - "EventCode": "0x65", - "EventName": "UNC_CHA_2LM_NM_INVITOX.LOCAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", - "Deprecated": "1", - "EventCode": "0x65", - "EventName": "UNC_CHA_2LM_NM_INVITOX.REMOTE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", - "Deprecated": "1", - "EventCode": "0x65", - "EventName": "UNC_CHA_2LM_NM_INVITOX.SETCONFLICT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC", - "Deprecated": "1", - "EventCode": "0x64", - "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.LLC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF", - "Deprecated": "1", - "EventCode": "0x64", - "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.SF", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR", - "Deprecated": "1", - "EventCode": "0x64", - "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.TOR", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", - "Deprecated": "1", - "EventCode": "0x70", - "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS2.MEMWR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", - "Deprecated": "1", - "EventCode": "0x70", - "EventName": "UNC_CHA_2LM_NM_SETCONFLICTS2.MEMWRNI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x81", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x81", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x81", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x83", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x83", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x83", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - 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"UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken= ", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Intermediate bypass Take= n : Counts the number of times when the CHA was able to bypass HA pipe on t= he way to iMC. This is a latency optimization for situations when there is= light loadings on the memory subsystem. This can be filtered by when the = bypass was taken and when it was not. : Filter for transactions that succee= ded in taking the intermediate bypass.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Not Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Not Taken : Counts the n= umber of times when the CHA was able to bypass HA pipe on the way to iMC. = This is a latency optimization for situations when there is light loadings = on the memory subsystem. This can be filtered by when the bypass was taken= and when it was not. : Filter for transactions that could not take the byp= ass, and issues a read to memory. Note that transactions that did not take = the bypass but did not issue read to memory will not be counted.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Taken : Counts the numbe= r of times when the CHA was able to bypass HA pipe on the way to iMC. This= is a latency optimization for situations when there is light loadings on t= he memory subsystem. This can be filtered by when the bypass was taken and= when it was not. : Filter for transactions that succeeded in taking the fu= ll bypass.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Clockticks of the uncore caching and home age= nt (CHA)", - "EventName": "UNC_CHA_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_CHA_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Mul= tiple Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Mu= ltiple Snoops : Counts the number of transactions that trigger a configurab= le number of cross snoops. Cores are snooped if the transaction looks up t= he cache and determines that it is necessary based on the operation type an= d what CoreValid bits are set. For example, if 2 CV bits are set on a data= read, the cores must have the data in S state so it is not necessary to sn= oop them. However, if only 1 CV bit is set the core my have modified the d= ata. If the transaction was an RFO, it would need to invalidate the lines.= This event can be filtered based on who triggered the initial snoop(s).", - "UMask": "0xf2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop = : Counts the number of transactions that trigger a configurable number of c= ross snoops. Cores are snooped if the transaction looks up the cache and d= etermines that it is necessary based on the operation type and what CoreVal= id bits are set. For example, if 2 CV bits are set on a data read, the cor= es must have the data in S state so it is not necessary to snoop them. How= ever, if only 1 CV bit is set the core my have modified the data. If the t= ransaction was an RFO, it would need to invalidate the lines. This event c= an be filtered based on who triggered the initial snoop(s).", - "UMask": "0xf1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requ= ests", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple Core Req= uests : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single Core Reques= ts", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single Core Reque= sts : Counts the number of transactions that trigger a configurable number = of cross snoops. Cores are snooped if the transaction looks up the cache a= nd determines that it is necessary based on the operation type and what Cor= eValid bits are set. For example, if 2 CV bits are set on a data read, the= cores must have the data in S state so it is not necessary to snoop them. = However, if only 1 CV bit is set the core my have modified the data. If t= he transaction was an RFO, it would need to invalidate the lines. This eve= nt can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple Eviction= : Counts the number of transactions that trigger a configurable number of = cross snoops. Cores are snooped if the transaction looks up the cache and = determines that it is necessary based on the operation type and what CoreVa= lid bits are set. For example, if 2 CV bits are set on a data read, the co= res must have the data in S state so it is not necessary to snoop them. Ho= wever, if only 1 CV bit is set the core my have modified the data. If the = transaction was an RFO, it would need to invalidate the lines. This event = can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single Eviction := Counts the number of transactions that trigger a configurable number of cr= oss snoops. Cores are snooped if the transaction looks up the cache and de= termines that it is necessary based on the operation type and what CoreVali= d bits are set. For example, if 2 CV bits are set on a data read, the core= s must have the data in S state so it is not necessary to snoop them. Howe= ver, if only 1 CV bit is set the core my have modified the data. If the tr= ansaction was an RFO, it would need to invalidate the lines. This event ca= n be filtered based on who triggered the initial snoop(s).", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple External = Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple External= Snoops : Counts the number of transactions that trigger a configurable num= ber of cross snoops. Cores are snooped if the transaction looks up the cac= he and determines that it is necessary based on the operation type and what= CoreValid bits are set. For example, if 2 CV bits are set on a data read,= the cores must have the data in S state so it is not necessary to snoop th= em. However, if only 1 CV bit is set the core my have modified the data. = If the transaction was an RFO, it would need to invalidate the lines. This= event can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single External Sn= oops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single External S= noops : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple Snoop Tar= gets from Remote", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.REMOTE_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple Snoop Ta= rgets from Remote : Counts the number of transactions that trigger a config= urable number of cross snoops. Cores are snooped if the transaction looks = up the cache and determines that it is necessary based on the operation typ= e and what CoreValid bits are set. For example, if 2 CV bits are set on a = data read, the cores must have the data in S state so it is not necessary t= o snoop them. However, if only 1 CV bit is set the core my have modified t= he data. If the transaction was an RFO, it would need to invalidate the li= nes. This event can be filtered based on who triggered the initial snoop(s= ).", - "UMask": "0x12", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single Snoop Targe= t from Remote", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.REMOTE_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single Snoop Targ= et from Remote : Counts the number of transactions that trigger a configura= ble number of cross snoops. Cores are snooped if the transaction looks up = the cache and determines that it is necessary based on the operation type a= nd what CoreValid bits are set. For example, if 2 CV bits are set on a dat= a read, the cores must have the data in S state so it is not necessary to s= noop them. However, if only 1 CV bit is set the core my have modified the = data. If the transaction was an RFO, it would need to invalidate the lines= . This event can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Counter 0 Occupancy", - "EventCode": "0x1F", - "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Counter 0 Occupancy : Since occupancy counts= can only be captured in the Cbo's 0 counter, this event allows a user to c= apture occupancy related information by filtering the Cb0 occupancy count c= aptured in Counter 0. The filtering available is found in the control reg= ister - threshold, invert and edge detect. E.g. setting threshold to 1 ca= n effectively monitor how many cycles the monitored queue has an entry.", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.GO", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline directory state lookup= s : Snoop Not Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", - "PerPkg": "1", - "PublicDescription": "Multi-socket cacheline directory state looku= ps : Snoop Not Needed : Counts the number of transactions that looked up th= e directory. Can be filtered by requests that had to snoop and those that = did not have to. : Filters for transactions that did not have to send any s= noops because the directory was clean.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline directory state lookup= s : Snoop Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.SNP", - "PerPkg": "1", - "PublicDescription": "Multi-socket cacheline directory state looku= ps : Snoop Needed : Counts the number of transactions that looked up the di= rectory. Can be filtered by requests that had to snoop and those that did = not have to. : Filters for transactions that had to send one or more snoops= because the directory was not clean.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline directory state update= s; memory write due to directory update from the home agent (HA) pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.HA", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline directory= state updates memory writes issued from the home agent (HA) pipe. This doe= s not include memory write requests which are for I (Invalid) or E (Exclusi= ve) cachelines.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline directory state update= s; memory write due to directory update from (table of requests) TOR pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.TOR", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline directory= state updates due to memory writes issued from the table of requests (TOR)= pipe which are the result of remote transaction hitting the SF/LLC and ret= urning data Core2Core. This does not include memory write requests which ar= e for I (Invalid) or E (Exclusive) cachelines.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : PMM Local", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.PMM_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : PMM Remote", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.PMM_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xBA", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xBA", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Read request from a remote socket which hit i= n the HitMe Cache to a line In the E state", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.EX_RDS", - "PerPkg": "1", - "PublicDescription": "Counts read requests from a remote socket wh= ich hit in the HitME cache (used to cache the multi-socket Directory state)= to a line in the E(Exclusive) state. This includes the following read opc= odes (RdCode, RdData, RdDataMigratory, RdCur, RdInv*, Inv*).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache : Remote= socket ownership read requests that hit in S state.", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ", - "PerPkg": "1", - "PublicDescription": "Counts Number of Hits in HitMe Cache : Remot= e socket ownership read requests that hit in S state. : Shared hit and op i= s RdInvOwn, RdInv, Inv*", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache : Remote= socket WBMtoE requests", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.WBMTOE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache : Remote= socket writeback to I or S requests", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S", - "PerPkg": "1", - "PublicDescription": "Counts Number of Hits in HitMe Cache : Remot= e socket writeback to I or S requests : op is WbMtoI, WbPushMtoI, WbFlush, = or WbMtoS", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times HitMe Cache is accesse= d : Remote socket read requests", - "EventCode": "0x5E", - "EventName": "UNC_CHA_HITME_LOOKUP.READ", - "PerPkg": "1", - "PublicDescription": "Counts Number of times HitMe Cache is access= ed : Remote socket read requests : op is RdCode, RdData, RdDataMigratory, R= dCur, RdInvOwn, RdInv, Inv*", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times HitMe Cache is accesse= d : Remote socket write (i.e. writeback) requests", - "EventCode": "0x5E", - "EventName": "UNC_CHA_HITME_LOOKUP.WRITE", - "PerPkg": "1", - "PublicDescription": "Counts Number of times HitMe Cache is access= ed : Remote socket write (i.e. writeback) requests : op is WbMtoE, WbMtoI, = WbPushMtoI, WbFlush, or WbMtoS", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache : Remo= te socket RdInvOwn requests that are not to shared line", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", - "PerPkg": "1", - "PublicDescription": "Counts Number of Misses in HitMe Cache : Rem= ote socket RdInvOwn requests that are not to shared line : No SF/LLC HitS/F= and op is RdInvOwn", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache : Remo= te socket read or invalidate requests", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV", - "PerPkg": "1", - "PublicDescription": "Counts Number of Misses in HitMe Cache : Rem= ote socket read or invalidate requests : op is RdCode, RdData, RdDataMigrat= ory, RdCur, RdInv, Inv*", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache : Remo= te socket RdInvOwn requests to shared line", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN", - "PerPkg": "1", - "PublicDescription": "Counts Number of Misses in HitMe Cache : Rem= ote socket RdInvOwn requests to shared line : SF/LLC HitS/F and op is RdInv= Own", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Deallocate HitME$ on Reads without RspFwdI*", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : op is RspIFwd or RspIFwdWb for a local request", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", - "PerPkg": "1", - "PublicDescription": "Counts the number of Allocate/Update to HitM= e Cache : op is RspIFwd or RspIFwdWb for a local request : Received RspFwdI= * for a local request, but converted HitME$ to SF entry", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Update HitMe Cache on RdInvOwn even if not RspFwdI*", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : op is RspIFwd or RspIFwdWb for a remote request", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM", - "PerPkg": "1", - "PublicDescription": "Counts the number of Allocate/Update to HitM= e Cache : op is RspIFwd or RspIFwdWb for a remote request : Updated HitME$ = on RspFwdI* or local HitM/E received for a remote request", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache : Update HitMe Cache to SHARed", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.SHARED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xB9", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xB9", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "HA to iMC Reads Issued : ISOCH", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", - "PerPkg": "1", - "PublicDescription": "HA to iMC Reads Issued : ISOCH : Count of th= e number of reads issued to any of the memory controller channels. This ca= n be filtered by the priority of the reads.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Lin= e Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to any of the memory controller channels.= ", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Fu= ll Line", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH F= ull Line : Counts the total number of full line writes issued from the HA i= nto the memory controller.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial = Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : Partial= Non-ISOCH : Counts the total number of full line writes issued from the HA= into the memory controller.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Pa= rtial", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH P= artial : Counts the total number of full line writes issued from the HA int= o the memory controller.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", - "UMask": "0x1fffff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : All transactions from Remote = Agents", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ALL_REMOTE", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : All transactions from Remote= Agents : Counts the number of times the LLC was accessed - this includes c= ode, data, prefetches and hints coming from L2. This has numerous filters = available. Note the non-standard filtering equation. This event will coun= t requests that lookup the cache multiple times with multiple increments. = One must ALWAYS select a state or states (in the umask field) to match. Ot= herwise, the event will count nothing.", - "UMask": "0x1e20ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : All Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : All Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Any local or remote transaction to the LLC, includi= ng prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE", - "PerPkg": "1", - "UMask": "0x1bd0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_LOCAL", - "PerPkg": "1", - "UMask": "0x19d0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Code Reads", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Code Reads : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1bd0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : CRd Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : CRd Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote CRd transactions to the LLC. This = includes CRd prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : CRd Requests that come from t= he local socket (usually the core)", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_LOCAL", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", - "UMask": "0x19d0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Code Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Code Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", - "UMask": "0x1bd001", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : CRd Requests that come from a= Remote socket.", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_REMOTE", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : CRd Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote CRd transactions to the LLC. This include= s CRd prefetch.", - "UMask": "0x1a10ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ_REMOTE", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_REMOTE", - "PerPkg": "1", - "UMask": "0x1a10ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Local request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Local request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Any local transaction to the LLC, including prefe= tches from the Core", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", - "PerPkg": "1", - "UMask": "0x1bc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", - "UMask": "0x1bc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL", - "PerPkg": "1", - "UMask": "0x1fc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Data Read Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Data Read Request Filter : C= ounts the number of times the LLC was accessed - this includes code, data, = prefetches and hints coming from L2. This has numerous filters available. = Note the non-standard filtering equation. This event will count requests = that lookup the cache multiple times with multiple increments. One must AL= WAYS select a state or states (in the umask field) to match. Otherwise, th= e event will count nothing. : Read transactions.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest that come from the local socket (usually the core)", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", - "UMask": "0x19c1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Data Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Data Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", - "UMask": "0x1bc101", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uests that come from a Remote socket", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", - "UMask": "0x1a01ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DMND_READ_LOCAL", - "PerPkg": "1", - "UMask": "0x841ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : E State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.E", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : E State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Exclusive State", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : F State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : F State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Forward State", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate Requests", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", - "UMask": "0x1a44ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate Requests = that come from the local socket (usually the core)", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV_LOCAL", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", - "UMask": "0x1844ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate requests = that come from a Remote socket.", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV_REMOTE", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", - "UMask": "0x1a04ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush or Invalidate Filter := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : I State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.I", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : I State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Miss", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Prefetch requ= ests to the LLC that come from the local socket (usually the core)", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", - "UMask": "0x189dff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Local LLC prefetch requests (= from LLC) Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Local LLC prefetch requests = (from LLC) Filter : Counts the number of times the LLC was accessed - this = includes code, data, prefetches and hints coming from L2. This has numerou= s filters available. Note the non-standard filtering equation. This event= will count requests that lookup the cache multiple times with multiple inc= rements. One must ALWAYS select a state or states (in the umask field) to = match. Otherwise, the event will count nothing. : Any local LLC prefetch t= o the LLC", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LLC_PF_LOCAL", - "PerPkg": "1", - "UMask": "0x189dff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LOC_HOM", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LOCALLY_HOMED_ADDRESS", - "PerPkg": "1", - "UMask": "0xbdfff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Transactions homed locally Fi= lter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Transactions homed locally F= ilter : Counts the number of times the LLC was accessed - this includes cod= e, data, prefetches and hints coming from L2. This has numerous filters av= ailable. Note the non-standard filtering equation. This event will count = requests that lookup the cache multiple times with multiple increments. On= e must ALWAYS select a state or states (in the umask field) to match. Othe= rwise, the event will count nothing. : Transaction whose address resides in= the local MC.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Transactions homed locally", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Transactions homed locally := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS set umask bit 0 and select a state or states to match. Otherwise, t= he event will count nothing. : Transaction whose address resides in the loc= al MC.", - "UMask": "0xbdfff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : M State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.M", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : M State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Modified State", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : All Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : All Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1fe001", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Write Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Write Request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Writeback transactions to the LLC This includes = all write transactions -- both Cacheable and UC.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remote non-snoop request Filt= er", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.PREF_OR_DMND_REMOTE_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remote non-snoop request Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing. : Non-snoop transactions to the LLC from= remote agent", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Reads", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Reads : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS select a state= or states (in the umask field) to match. Otherwise, the event will count = nothing.", - "UMask": "0x1bd9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Locally HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Locally HOMed : Counts the number of times the LLC was accessed - this= includes code, data, prefetches and hints coming from L2. This has numero= us filters available. Note the non-standard filtering equation. This even= t will count requests that lookup the cache multiple times with multiple in= crements. One must ALWAYS select a state or states (in the umask field) to= match. Otherwise, the event will count nothing.", - "UMask": "0x9d9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Remotely HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_REM_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Remotely HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", - "UMask": "0x11d9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Read Misses : Counts the num= ber of times the LLC was accessed - this includes code, data, prefetches an= d hints coming from L2. This has numerous filters available. Note the non= -standard filtering equation. This event will count requests that lookup t= he cache multiple times with multiple increments. One must ALWAYS select a= state or states (in the umask field) to match. Otherwise, the event will = count nothing.", - "UMask": "0x1bd901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally HOMed Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally HOMed Read Misses : = Counts the number of times the LLC was accessed - this includes code, data,= prefetches and hints coming from L2. This has numerous filters available.= Note the non-standard filtering equation. This event will count requests= that lookup the cache multiple times with multiple increments. One must A= LWAYS select a state or states (in the umask field) to match. Otherwise, t= he event will count nothing.", - "UMask": "0xbd901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely HOMed Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_REM_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely HOMed Read Misses := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", - "UMask": "0x13d901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely requested Read or Sn= oop Misses that are Remotely HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_OR_SNOOP_REMOTE_MISS_REM_HOM= ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely requested Read or S= noop Misses that are Remotely HOMed : Counts the number of times the LLC wa= s accessed - this includes code, data, prefetches and hints coming from L2.= This has numerous filters available. Note the non-standard filtering equ= ation. This event will count requests that lookup the cache multiple times= with multiple increments. One must ALWAYS select a state or states (in th= e umask field) to match. Otherwise, the event will count nothing.", - "UMask": "0x161901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely Requested Reads that= are Locally HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_REMOTE_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely Requested Reads tha= t are Locally HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", - "UMask": "0xa19ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Reads that Hit the Snoop Filt= er", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_SF_HIT", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Reads that Hit the Snoop Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing.", - "UMask": "0x1bd90e", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REM_HOM", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTELY_HOMED_ADDRESS", - "PerPkg": "1", - "UMask": "0x15dfff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Transactions homed remotely F= ilter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Transactions homed remotely = Filter : Counts the number of times the LLC was accessed - this includes co= de, data, prefetches and hints coming from L2. This has numerous filters a= vailable. Note the non-standard filtering equation. This event will count= requests that lookup the cache multiple times with multiple increments. O= ne must ALWAYS select a state or states (in the umask field) to match. Oth= erwise, the event will count nothing. : Transaction whose address resides i= n a remote MC", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remote snoop request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remote snoop request Filter = : Counts the number of times the LLC was accessed - this includes code, dat= a, prefetches and hints coming from L2. This has numerous filters availabl= e. Note the non-standard filtering equation. This event will count reques= ts that lookup the cache multiple times with multiple increments. One must= ALWAYS select a state or states (in the umask field) to match. Otherwise,= the event will count nothing. : Snoop transactions to the LLC from remote = agent", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Snoop Request= s from a Remote Socket", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", - "UMask": "0x1c19ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Transactions homed remotely", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REM_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Transactions homed remotely = : Counts the number of times the LLC was accessed - this includes code, dat= a, prefetches and hints coming from L2. This has numerous filters availabl= e. Note the non-standard filtering equation. This event will count reques= ts that lookup the cache multiple times with multiple increments. One must= ALWAYS set umask bit 0 and select a state or states to match. Otherwise, = the event will count nothing. : Transaction whose address resides in a remo= te MC", - "UMask": "0x15dfff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Requests", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", - "UMask": "0x1bc8ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote RFO transactions to the LLC. This = includes RFO prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Requests that come from t= he local socket (usually the core)", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_LOCAL", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", - "UMask": "0x19c8ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1bc801", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.RFO_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_PREF_LOCAL", - "PerPkg": "1", - "UMask": "0x888ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Requests that come from a= Remote socket.", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_REMOTE", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", - "UMask": "0x1a08ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : S State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.S", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : S State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Shared State", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - E State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_E", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - E State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Exclusive State", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - H State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_H", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - H State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit HitMe State", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - S State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_S", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - S State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Shared State", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Filters Requests for those th= at write info into the cache", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", - "UMask": "0x1a42ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL", - "PerPkg": "1", - "UMask": "0x842ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_REMOTE", - "PerPkg": "1", - "UMask": "0x17c2ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : All Lines Victimized", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.ALL", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : All Lines Victimized : Co= unts the number of lines that were victimized on a fill. This can be filte= red by the state that the line was in.", - "UMask": "0xf", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in E state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in E state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - All Lines : Count= s the number of lines that were victimized on a fill. This can be filtered= by the state that the line was in.", - "UMask": "0x200f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in E State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2002", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in M State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2001", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local Only", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local Only : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in S State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2004", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in M state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in M state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Remote - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Remote - All Lines : Coun= ts the number of lines that were victimized on a fill. This can be filtere= d by the state that the line was in.", - "UMask": "0x800f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Remote - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Remote - Lines in E State= : Counts the number of lines that were victimized on a fill. This can be = filtered by the state that the line was in.", - "UMask": "0x8002", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Remote - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Remote - Lines in M State= : Counts the number of lines that were victimized on a fill. This can be = filtered by the state that the line was in.", - "UMask": "0x8001", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Remote Only", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ONLY", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Remote Only : Counts the = number of lines that were victimized on a fill. This can be filtered by th= e state that the line was in.", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Remote - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Remote - Lines in S State= : Counts the number of lines that were victimized on a fill. This can be = filtered by the state that the line was in.", - "UMask": "0x8004", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in S State : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : CV0 Prefetch Miss", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : CV0 Prefetch Miss : Miscellaneous= events in the Cbo.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : CV0 Prefetch Victim", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : CV0 Prefetch Victim : Miscellaneo= us events in the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Number of times that an RFO hit in S state.", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RFO_HIT_S", - "PerPkg": "1", - "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : Silent Snoop Eviction", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : Silent Snoop Eviction : Miscellan= eous events in the Cbo. : Counts the number of times when a Snoop hit in FS= E states and triggered a silent eviction. This is useful because this info= rmation is lost in the PRE encodings.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : Write Combining Aliasing", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.WC_ALIASING", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : Write Combining Aliasing : Miscel= laneous events in the Cbo. : Counts the number of times that a USWC write (= WCIL(F)) transaction hit in the LLC in M state, triggering a WBMtoI followe= d by the USWC write. This occurs when there is WC aliasing.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xE6", - "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xE6", - "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : Local InvItoE", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.LOCAL_INVITOE", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : Local InvItoE : Count = of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to be b= roadcast. Does not count all the snoops generated by OSB.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : Local Rd", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.LOCAL_READ", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : Local Rd : Count of OS= B snoop broadcasts. Counts by 1 per request causing OSB snoops to be broadc= ast. Does not count all the snoops generated by OSB.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : Off", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.OFF_PWRHEURISTIC", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : Off : Count of OSB sno= op broadcasts. Counts by 1 per request causing OSB snoops to be broadcast. = Does not count all the snoops generated by OSB.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : Remote Rd", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.REMOTE_READ", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : Remote Rd : Count of O= SB snoop broadcasts. Counts by 1 per request causing OSB snoops to be broad= cast. Does not count all the snoops generated by OSB.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : Remote Rd InvItoE", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.REMOTE_READINVITOE", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : Remote Rd InvItoE : Co= unt of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to = be broadcast. Does not count all the snoops generated by OSB.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadcas= t", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.RFO_HITS_SNP_BCAST", - "PerPkg": "1", - "PublicDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadca= st : Count of OSB snoop broadcasts. Counts by 1 per request causing OSB sno= ops to be broadcast. Does not count all the snoops generated by OSB.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ADEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.AKEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ALLRSFWAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.BLEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.FSF_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLOWSNP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLWAYRSV", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_PAMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_WAYMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.HACREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IDX_INPIPE", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IPQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IRQ_PMM", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IRQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ISMQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IVEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.LLC_WAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.NOTALLOWSNOOP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ONE_FSF_VIC", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ONE_RSP_CON", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.PMM_MEMMODE_TORMATCH_MULTI", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.PMM_MEMMODE_TOR_MATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.PRQ_PMM", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.PTL_INPIPE", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.RMW_SETMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.RRQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.SETMATCHENTRYWSCT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.SF_WAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.TOPA_MATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.TORID_MATCH_GO_P", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_REQ", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_RSP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCB", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCS", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_RSP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_WB", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.WAY_MATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", - "EventCode": "0x65", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", - "EventCode": "0x65", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", - "EventCode": "0x65", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "PMM Memory Mode related events : Counts the n= umber of times CHA saw NM Set conflict in SF/LLC", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC", - "PerPkg": "1", - "PublicDescription": "PMM Memory Mode related events : Counts the = number of times CHA saw NM Set conflict in SF/LLC : NM evictions due to ano= ther read to the same near memory set in the LLC.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "PMM Memory Mode related events : Counts the n= umber of times CHA saw NM Set conflict in SF/LLC", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF", - "PerPkg": "1", - "PublicDescription": "PMM Memory Mode related events : Counts the = number of times CHA saw NM Set conflict in SF/LLC : NM evictions due to ano= ther read to the same near memory set in the SF.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "PMM Memory Mode related events : Counts the n= umber of times CHA saw NM Set conflict in TOR", - "EventCode": "0x64", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR", - "PerPkg": "1", - "PublicDescription": "PMM Memory Mode related events : Counts the = number of times CHA saw NM Set conflict in TOR : No Reject in the CHA due t= o a pending read to the same near memory set in the TOR.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC", - "EventCode": "0x70", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", - "EventCode": "0x70", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", - "EventCode": "0x70", - "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT", - "EventCode": "0x66", - "EventName": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS.REJ_IRQ", - "EventCode": "0x66", - "EventName": "UNC_CHA_PMM_QOS.REJ_IRQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP", - "EventCode": "0x66", - "EventName": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS.SLOW_INSERT", - "EventCode": "0x66", - "EventName": "UNC_CHA_PMM_QOS.SLOW_INSERT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE", - "EventCode": "0x66", - "EventName": "UNC_CHA_PMM_QOS.THROTTLE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_IRQ", - "EventCode": "0x66", - "EventName": "UNC_CHA_PMM_QOS.THROTTLE_IRQ", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_PRQ", - "EventCode": "0x66", - "EventName": "UNC_CHA_PMM_QOS.THROTTLE_PRQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO", - "EventCode": "0x67", - "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO", - "PerPkg": "1", - "PublicDescription": ": count # of FAST TOR Request inserted to ha= _tor_req_fifo", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO", - "EventCode": "0x67", - "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO", - "PerPkg": "1", - "PublicDescription": ": count # of SLOW TOR Request inserted to ha= _pmm_tor_req_fifo", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC0", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC0 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC1", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC10", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC10", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC10 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 10 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC11", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC11", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC11 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 11 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC12", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC12", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC12 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 12 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC13", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC13", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC13 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 13 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC2", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC2 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC3", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC3 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC4", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC4 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC5", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC5 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC6", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC6", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC6 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 6 only.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC7", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC7", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC7 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 7 only.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC8", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC8", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC8 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 8 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC9", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC9", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC9 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 9 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and remote INVI= TOE requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and are sent to= the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Remote INVITOE requests (exclusive ownership = of a cache line without receiving data) sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a remote socket for exclusive ownership of a cache line without receivi= ng data (INVITOE) to the CHA.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Local read requests that miss the SF/LLC and = remote read requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS", - "PerPkg": "1", - "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Local read requests that miss the SF/LLC and = are sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Remote read requests sent to the CHA's home a= gent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Local write requests that miss the SF/LLC and= remote write requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "Local write requests that miss the SF/LLC and= are sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Remote write requests sent to the CHA's home = agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_CHA_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : IPQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IPQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : IPQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : IRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : IRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected= ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : IRQ Rejecte= d : Counts number of allocations per cycle into the specified Ingress queue= .", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : RRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.RRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : RRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : WBQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.WBQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : WBQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : AN= Y0", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IPQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : HA= ", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : SF= Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "IPQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IRQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA= ", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C or SF Way", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : L= LC or SF Way : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 1 : ANY0", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 1 : HA", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 1 : ANY0", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 1 : HA", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy : IPQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IPQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Occupancy : IPQ : Counts = number of entries in the specified Ingress queue in each cycle.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy : IRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Occupancy : IRQ : Counts = number of entries in the specified Ingress queue in each cycle.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy : RRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.RRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Occupancy : RRQ : Counts = number of entries in the specified Ingress queue in each cycle.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy : WBQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.WBQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Occupancy : WBQ : Counts = number of entries in the specified Ingress queue in each cycle.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : AD REQ on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : AD RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : Non UPI AK Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject AK ring me= ssage", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL NCB on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL NCS on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for generat= ing a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL WB on VN0 : Retry= Queue Inserts of Transactions that were already in another Retry Q (sub-ev= ents encode the reason for the next reject) : No BL VN0 credit for generati= ng a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : Non UPI IV Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject IV ring me= ssage", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : Allow Snoop", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : Allow Snoop : Retry = Queue Inserts of Transactions that were already in another Retry Q (sub-eve= nts encode the reason for the next reject)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : ANY0", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : ANY0 : Retry Queue I= nserts of Transactions that were already in another Retry Q (sub-events enc= ode the reason for the next reject) : Any condition listed in the Other0 Re= ject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : HA", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : HA : Retry Queue Ins= erts of Transactions that were already in another Retry Q (sub-events encod= e the reason for the next reject)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : LLC OR SF Way : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Way conflict with another re= quest that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : LLC Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : LLC Victim : Retry Q= ueue Inserts of Transactions that were already in another Retry Q (sub-even= ts encode the reason for the next reject)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : PhyAddr Match", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : PhyAddr Match : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Address match with an outsta= nding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : SF Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : SF Victim : Retry Qu= eue Inserts of Transactions that were already in another Retry Q (sub-event= s encode the reason for the next reject) : Requests did not generate Snoop = filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : Victim : Retry Queue= Inserts of Transactions that were already in another Retry Q (sub-events e= ncode the reason for the next reject)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the PRQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA= ", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : AD REQ on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : AD RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Re= quest", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : Non UPI AK R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL NCB on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL NCS on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL WB on VN0= : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)= : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Re= quest", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : Non UPI IV R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : Allow Snoop = : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : ANY0", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : ANY0 : REQUE= STQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : Any c= ondition listed in the WBQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : HA", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : HA : REQUEST= Q includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way= ", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : LLC OR SF Wa= y : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : LLC Victim := REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match= ", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : PhyAddr Matc= h : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Address match with an outstanding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : SF Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : SF Victim : = REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : = Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : Victim : REQ= UESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : AD REQ on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : AD REQ on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : AD RSP on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : AD RSP on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : Non UPI AK Request", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : Non UPI AK Request : N= umber of times a transaction flowing through the RRQ (Remote Response Queue= ) had to retry. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : BL NCB on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : BL NCB on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : BL NCS on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : BL NCS on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : BL RSP on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : BL RSP on VN0 : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : BL WB on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : BL WB on VN0 : Number = of times a transaction flowing through the RRQ (Remote Response Queue) had = to retry. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 0 : Non UPI IV Request", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 0 : Non UPI IV Request : N= umber of times a transaction flowing through the RRQ (Remote Response Queue= ) had to retry. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : Allow Snoop", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : Allow Snoop : Number o= f times a transaction flowing through the RRQ (Remote Response Queue) had t= o retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : ANY0", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : ANY0 : Number of times= a transaction flowing through the RRQ (Remote Response Queue) had to retry= . : Any condition listed in the RRQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : HA", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : HA : Number of times a= transaction flowing through the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : LLC OR SF Way", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : LLC OR SF Way : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : LLC Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : LLC Victim : Number of= times a transaction flowing through the RRQ (Remote Response Queue) had to= retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : PhyAddr Match", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : PhyAddr Match : Number= of times a transaction flowing through the RRQ (Remote Response Queue) had= to retry. : Address match with an outstanding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : SF Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : SF Victim : Number of = times a transaction flowing through the RRQ (Remote Response Queue) had to = retry. : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects - Set 1 : Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM", - "PerPkg": "1", - "PublicDescription": "RRQ Rejects - Set 1 : Victim : Number of tim= es a transaction flowing through the RRQ (Remote Response Queue) had to ret= ry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : AD REQ on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : AD REQ on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : AD RSP on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : AD RSP on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : Non UPI AK Request", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : Non UPI AK Request : N= umber of times a transaction flowing through the WBQ (Writeback Queue) had = to retry. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : BL NCB on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : BL NCB on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : BL NCS on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : BL NCS on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : BL RSP on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : BL RSP on VN0 : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : BL WB on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : BL WB on VN0 : Number = of times a transaction flowing through the WBQ (Writeback Queue) had to ret= ry. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 0 : Non UPI IV Request", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 0 : Non UPI IV Request : N= umber of times a transaction flowing through the WBQ (Writeback Queue) had = to retry. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : Allow Snoop", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : Allow Snoop : Number o= f times a transaction flowing through the WBQ (Writeback Queue) had to retr= y.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : ANY0", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : ANY0 : Number of times= a transaction flowing through the WBQ (Writeback Queue) had to retry. : An= y condition listed in the WBQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : HA", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : HA : Number of times a= transaction flowing through the WBQ (Writeback Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : LLC OR SF Way", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : LLC OR SF Way : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : LLC Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : LLC Victim : Number of= times a transaction flowing through the WBQ (Writeback Queue) had to retry= .", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : PhyAddr Match", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : PhyAddr Match : Number= of times a transaction flowing through the WBQ (Writeback Queue) had to re= try. : Address match with an outstanding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : SF Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : SF Victim : Number of = times a transaction flowing through the WBQ (Writeback Queue) had to retry.= : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects - Set 1 : Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM", - "PerPkg": "1", - "PublicDescription": "WBQ Rejects - Set 1 : Victim : Number of tim= es a transaction flowing through the WBQ (Writeback Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_CHA_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.E_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores? cache.? Snoop filter capacity= evictions occur when the snoop filter is full and evicts an existing entry= to track a new entry.? Does not count clean evictions such as when a core?= s cache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.M_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores? cache.? Snoop filter capacity = evictions occur when the snoop filter is full and evicts an existing entry = to track a new entry.? Does not count clean evictions such as when a core?s= cache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.S_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores? cache.? Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry.? Does not count clean evictions such as when a core?s c= ache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : All", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : All : Counts the number of sno= ops issued by the HA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Broadcast snoops for Local Requ= ests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Broadcast snoops for Local Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f broadcast snoops issued by the HA responding to local requests", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Broadcast snoops for Remote Req= uests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Broadcast snoops for Remote Re= quests : Counts the number of snoops issued by the HA. : Counts the number = of broadcast snoops issued by the HA responding to remote requests", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Directed snoops for Local Reque= sts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Directed snoops for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= directed snoops issued by the HA responding to local requests", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Directed snoops for Remote Requ= ests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Directed snoops for Remote Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f directed snoops issued by the HA responding to remote requests", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Snoops sent for Local Requests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Snoops sent for Local Requests= : Counts the number of snoops issued by the HA. : Counts the number of bro= adcast or directed snoops issued by the HA responding to local requests", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Snoops sent for Remote Requests= ", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Snoops sent for Remote Request= s : Counts the number of snoops issued by the HA. : Counts the number of br= oadcast or directed snoops issued by the HA responding to remote requests", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RSPCNFLCT*", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCT", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received : RSPCNFLCT* : Coun= ts the total number of RspI snoop responses received. Whenever a snoops ar= e issued, one or more snoop responses will be returned depending on the top= ology of the system. In systems larger than 2s, when multiple snoops are = returned this will count all the snoops that are received. For example, if= 3 snoops were issued and returned RspI, RspS, and RspSFwd; then each of th= ese sub-events would increment by 1. : Filters for snoops responses of RspC= onflict. This is returned when a snoop finds an existing outstanding trans= action in a remote caching agent when it CAMs that caching agent. This tri= ggers conflict resolution hardware. This covers both RspCnflct and RspCnfl= ctWbI.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RspFwd", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received : RspFwd : Counts t= he total number of RspI snoop responses received. Whenever a snoops are is= sued, one or more snoop responses will be returned depending on the topolog= y of the system. In systems larger than 2s, when multiple snoops are retu= rned this will count all the snoops that are received. For example, if 3 s= noops were issued and returned RspI, RspS, and RspSFwd; then each of these = sub-events would increment by 1. : Filters for a snoop response of RspFwd t= o a CA request. This snoop response is only possible for RdCur when a snoo= p HITM/E in a remote caching agent and it directly forwards data to a reque= stor without changing the requestor's cache line state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : Rsp*Fwd*WB", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPFWDWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received : Rsp*Fwd*WB : Coun= ts the total number of RspI snoop responses received. Whenever a snoops ar= e issued, one or more snoop responses will be returned depending on the top= ology of the system. In systems larger than 2s, when multiple snoops are = returned this will count all the snoops that are received. For example, if= 3 snoops were issued and returned RspI, RspS, and RspSFwd; then each of th= ese sub-events would increment by 1. : Filters for a snoop response of Rsp*= Fwd*WB. This snoop response is only used in 4s systems. It is used when a= snoop HITM's in a remote caching agent and it directly forwards data to a = requestor, and simultaneously returns data to the home to be written back t= o memory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RspI", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPI", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe RspI Snoop Response was received which indicates the remote cache does n= ot have the data, or when the remote cache silently evicts data (such as wh= en an RFO: the Read for Ownership issued before a write hits non-modified d= ata).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RspIFwd", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspIFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data and the requesting agent is able to acquire the dat= a in E (Exclusive) or M (modified) states. This is commonly returned with = RFO (the Read for Ownership issued before a write) transactions. The snoop= could have either been to a cacheline in the M,E,F (Modified, Exclusive or= Forward) states.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RspS", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPS", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe RspS Snoop Response was received which indicates when a remote cache has= data but is not forwarding it. It is a way to let the requesting socket k= now that it cannot allocate the data in E state. No data is sent with S Rs= pS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RspSFwd", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspSFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data but held on to its current copy. This is common fo= r data and code reads that hit in a remote socket in E (Exclusive) or F (Fo= rward) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : Rsp*WB", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received : Rsp*WB : Counts t= he total number of RspI snoop responses received. Whenever a snoops are is= sued, one or more snoop responses will be returned depending on the topolog= y of the system. In systems larger than 2s, when multiple snoops are retu= rned this will count all the snoops that are received. For example, if 3 s= noops were issued and returned RspI, RspS, and RspSFwd; then each of these = sub-events would increment by 1. : Filters for a snoop response of RspIWB o= r RspSWB. This is returned when a non-RFO request hits in M state. Data a= nd Code Reads can return either RspIWB or RspSWB depending on how the syste= m has been configured. InvItoE transactions will also return RspIWB becaus= e they must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspCnflct", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspCnflct := Number of snoop responses received for a Local request : Filters for snoo= ps responses of RspConflict to local CA requests. This is returned when a = snoop finds an existing outstanding transaction in a remote caching agent w= hen it CAMs that caching agent. This triggers conflict resolution hardware= . This covers both RspCnflct and RspCnflctWbI.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspFwd : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspFwd to local CA requests. This snoop response is only poss= ible for RdCur when a snoop HITM/E in a remote caching agent and it directl= y forwards data to a requestor without changing the requestor's cache line = state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : Rsp*FWD*WB = : Number of snoop responses received for a Local request : Filters for a s= noop response of Rsp*Fwd*WB to local CA requests. This snoop response is o= nly used in 4s systems. It is used when a snoop HITM's in a remote caching= agent and it directly forwards data to a requestor, and simultaneously ret= urns data to the home to be written back to memory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspI", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspI : Numb= er of snoop responses received for a Local request : Filters for snoops re= sponses of RspI to local CA requests. RspI is returned when the remote cac= he does not have the data, or when the remote cache silently evicts data (s= uch as when an RFO hits non-modified data).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspIFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspIFwd : N= umber of snoop responses received for a Local request : Filters for snoop = responses of RspIFwd to local CA requests. This is returned when a remote = caching agent forwards data and the requesting agent is able to acquire the= data in E or M states. This is commonly returned with RFO transactions. = It can be either a HitM or a HitFE.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspS", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspS : Numb= er of snoop responses received for a Local request : Filters for snoop res= ponses of RspS to local CA requests. RspS is returned when a remote cache = has data but is not forwarding it. It is a way to let the requesting socke= t know that it cannot allocate the data in E state. No data is sent with S= RspS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspSFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspSFwd : N= umber of snoop responses received for a Local request : Filters for a snoo= p response of RspSFwd to local CA requests. This is returned when a remote= caching agent forwards data but holds on to its currently copy. This is c= ommon for data and code reads that hit in a remote socket in E or F state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : Rsp*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : Rsp*WB : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspIWB or RspSWB to local CA requests. This is returned when = a non-RFO request hits in M state. Data and Code Reads can return either R= spIWB or RspSWB depending on how the system has been configured. InvItoE t= ransactions will also return RspIWB because they must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : MtoI RspIData= M", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM= ", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit LLC", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit SF", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t LLC", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t SF", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0xc001ffff", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DDR4 Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DDR4 Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR4", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : SF/LLC Evictions", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts. : TOR allocation occurred as a result of SF/LLC e= victions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Hits", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushes issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushOpts issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushOpts issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRDs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRDs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd Pref from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", - "UMask": "0xc817ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc837ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores : = Counts the number of entries successfully inserted into the TOR that match = qualifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es : Counts the number of entries successfully inserted into the TOR that m= atch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc897ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xc817fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc837fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores tha= t hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores th= at hit the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that hit the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores th= at Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc897fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that H= it LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by iA Cores that = Hit LLC : Counts the number of entries successfully inserted into the TOR t= hat match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", - "UMask": "0xcc47fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores = that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefCode issued by iA Cores= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", - "UMask": "0xcccffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCRD", - "PerPkg": "1", - "UMask": "0xcccffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores = that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefData issued by iA Cores= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", - "UMask": "0xccd7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDRD", - "PerPkg": "1", - "UMask": "0xccd7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that hit the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xccc7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores th= at hit in the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_SPECITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : SpecItoMs issued by iA Cores t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xcc57fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", - "UMask": "0xcc47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cor= es", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears issued by iA Co= res : Counts the number of entries successfully inserted into the TOR that = match qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", - "UMask": "0xcd47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefCode issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xcccfff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefData issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xccd7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = : Counts the number of entries successfully inserted into the TOR that matc= h qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", - "UMask": "0xccc7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd issued by iA Cores that Mi= ssed the LLC - HOMed locally : Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC - HOMed locally : Counts the number of entries successfu= lly inserted into the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc88efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC - HOMed remotely : Counts the number of entries successf= ully inserted into the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc88f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Mis= sed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd issued by iA Cores that Mi= ssed the LLC - HOMed remotely : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc817fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc837fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing DDR Mem that Missed the LLC : Counts the number of entries successfully= inserted into the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8178601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC - HOMed locally : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc816fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing DDR Mem that Missed the LLC - HOMed locally : Counts the number of entr= ies successfully inserted into the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc8168601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing PMM Mem that Missed the LLC - HOMed locally : Counts the number of entr= ies successfully inserted into the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc8168a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt issued by iA Cores that= missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt issued by iA Cores tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that missed the LLC : Counts the number of entries successfully inserted= into the TOR that match qualifications specified by the subevent. Does n= ot include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing PMM Mem that Missed the LLC : Counts the number of entries successfully= inserted into the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8178a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores th= at Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc897fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting DDR Mem that Missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc8978601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Pref misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read prefetch from local I= A that misses in the snoop filter", - "UMask": "0xc896fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting DDR Mem that Missed the LLC - HOMed locally : Counts the number of= entries successfully inserted into the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc8968601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting PMM Mem that Missed the LLC - HOMed locally : Counts the number of= entries successfully inserted into the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc8968a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting PMM Mem that Missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc8978a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; DRd Pref misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read prefetch from remote = IA that misses in the snoop filter", - "UMask": "0xc8977e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting DDR Mem that Missed the LLC - HOMed remotely : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts.", - "UMask": "0xc8970601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores ta= rgeting PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Prefs issued by iA Cores t= argeting PMM Mem that Missed the LLC - HOMed remotely : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts.", - "UMask": "0xc8970a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC - HOMed remotely : Counts the number of entries successfully = inserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8177e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing DDR Mem that Missed the LLC - HOMed remotely : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0xc8170601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeti= ng PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores target= ing PMM Mem that Missed the LLC - HOMed remotely : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0xc8170a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc8678601", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_DRAM", - "PerPkg": "1", - "UMask": "0xc8678601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_= DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc8668601", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_= DRAM", - "PerPkg": "1", - "UMask": "0xc8668601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_= PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc8668a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc8678a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE= _DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc8670601", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE= _DRAM", - "PerPkg": "1", - "UMask": "0xc8670601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE= _PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc8670a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that M= issed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by iA Cores that = Missed LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xcc47fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores = that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefCode issued by iA Cores= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xcccffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores = that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefData issued by iA Cores= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xccd7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that missed the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", - "UMask": "0xccc7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting DDR that missed the LLC - HOMed locally : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", - "UMask": "0xc8668601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting PMM that missed the LLC - HOMed locally : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", - "UMask": "0xc8668a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting DDR that missed the LLC - HOMed locally : Counts the number of entries= successfully inserted into the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and int= errupts.", - "UMask": "0xc86e8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting PMM that missed the LLC - HOMed locally : Counts the number of entries= successfully inserted into the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and int= errupts.", - "UMask": "0xc86e8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_DDR= ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86f8601", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_DRA= M", - "PerPkg": "1", - "UMask": "0xc86f8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOC= AL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86e8601", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOC= AL_DRAM", - "PerPkg": "1", - "UMask": "0xc86e8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOC= AL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86e8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_PMM= ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86f8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REM= OTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86f0601", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REM= OTE_DRAM", - "PerPkg": "1", - "UMask": "0xc86f0601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REM= OTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86f0a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting DDR that missed the LLC - HOMed remotely : Counts the number of entri= es successfully inserted into the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc8670601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC - HOMed remote memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting PMM that missed the LLC - HOMed remotely : Counts the number of entri= es successfully inserted into the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc8670a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting DDR that missed the LLC - HOMed remotely : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", - "UMask": "0xc86f0601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting PMM that missed the LLC - HOMed remotely : Counts the number of entrie= s successfully inserted into the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and in= terrupts.", - "UMask": "0xc86f0a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC - HOMed locally : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc806fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC - HOMed locally", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC - HOMed locally : Counts the number of entries successfu= lly inserted into the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc886fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC - HOMed remotely : Counts the number of entries successf= ully inserted into the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8877e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC - HOMed remotely", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC - HOMed remotely : Counts the number of entries successfully = inserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8077e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores th= at missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_SPECITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : SpecItoMs issued by iA Cores t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xcc57fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : UCRdFs issued by iA Cores that= Missed LLC : Counts the number of entries successfully inserted into the T= OR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting DDR that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting DDR that missed the LLC : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8678601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targe= ting PMM that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLFs issued by iA Cores targ= eting PMM that missed the LLC : Counts the number of entries successfully i= nserted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8678a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing DDR that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting DDR that missed the LLC : Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86f8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores target= ing PMM that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores targe= ting PMM that missed the LLC : Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86f8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WiLs issued by iA Cores that M= issed LLC : Counts the number of entries successfully inserted into the TOR= that match qualifications specified by the subevent. Does not include ad= dressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : SpecItoMs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xcc57ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", - "PerPkg": "1", - "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc3fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBEFtoIs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI", - "PerPkg": "1", - "PublicDescription": "WbEFtoIs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc37ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBMtoEs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE", - "PerPkg": "1", - "PublicDescription": "WbMtoEs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xcc2fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBStoIs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI", - "PerPkg": "1", - "PublicDescription": "WbStoIs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xcc67ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushes issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices th= at hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= hit the LLC : Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xcd43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices to locally HOMed memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xcd42ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices to remotely HOMed memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xcd437f04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to l= ocally HOMed memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xcc42ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to r= emotely HOMed memory", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xcc437f04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices th= at missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WbMtoIs issued by IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IPQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IPQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts. : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - Non iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just ISOC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Local Targets", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA and IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts. : All locally initiated requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally initiated requests from iA Cores", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally generated IO traffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent. Do= es not include addressless requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Misses", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : MMCFG Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NearMem", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NearMem : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NonCoherent", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NotNearMem", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NotNearMem : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests such = as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PMM Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PMM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PMM Access : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts. : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - Non IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent. Does not include addressless requests such a= s locks and interrupts.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Remote Targets", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Remote Targets : Counts t= he number of entries successfully inserted into the TOR that match qualific= ations specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RRQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.RRQ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RRQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.WBQ", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WBQ : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DDR4 Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DDR4 Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : SF/LLC Evictions", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts. : TOR allocation occurred as a = result of SF/LLC evictions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Hits", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRDs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRDs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd Pref from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc817ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc837ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = : For each cycle, this event accumulates the number of valid entries in the= TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores : For each cycle, this event accumulates the number of valid entries i= n the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc897ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc817fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that hit the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", - "UMask": "0xc837fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores t= hat hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = that hit the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that hit the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = that Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc897fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Hit LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Hit LLC : For each cycle, this event accumulates the number of valid entr= ies in the TOR that match qualifications specified by the subevent. Doe= s not include addressless requests such as locks and interrupts.", - "UMask": "0xcc47fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefCode issued by iA Core= s that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefCode issued by iA Cor= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcccffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefData issued by iA Core= s that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefData issued by iA Cor= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xccd7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that hit the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xccc7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears issued by iA C= ores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears issued by iA = Cores : For each cycle, this event accumulates the number of valid entries = in the TOR that match qualifications specified by the subevent. Does no= t include addressless requests such as locks and interrupts.", - "UMask": "0xcd47ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefCode issued by iA Core= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefCode issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xcccfff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefData issued by iA Core= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefData issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xccd7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s : For each cycle, this event accumulates the number of valid entries in t= he TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", - "UMask": "0xccc7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed locally : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc80efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed locally : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc88efe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC - HOMed remotely : For each cycle, this event accumula= tes the number of valid entries in the TOR that match qualifications specif= ied by the subevent. Does not include addressless requests such as lock= s and interrupts.", - "UMask": "0xc88f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that M= issed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that = Missed the LLC - HOMed remotely : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc80f7e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc817fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that missed the LLC : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc837fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", - "UMask": "0xc8178601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC - HOMed locally : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc816fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", - "UMask": "0xc8168601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed locally : For each cycle, this ev= ent accumulates the number of valid entries in the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests = such as locks and interrupts.", - "UMask": "0xc8168a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt issued by iA Cores th= at missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt issued by iA Cores t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that missed the LLC : For each cycle, this event accumulates the numbe= r of valid entries in the TOR that match qualifications specified by the su= bevent. Does not include addressless requests such as locks and interru= pts.", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", - "UMask": "0xc8178a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc897fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xc8978601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc896fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc8968601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed locally : For each cycle, th= is event accumulates the number of valid entries in the TOR that match qual= ifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc8968a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC : For each cycle, this event accumul= ates the number of valid entries in the TOR that match qualifications speci= fied by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xc8978a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc8977e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xc8970601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores = targeting PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores= targeting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xc8970a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC - HOMed remotely : For each cycle, this event accumulates t= he number of valid entries in the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0xc8177e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting DDR Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", - "UMask": "0xc8170601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targe= ting PMM Mem that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targ= eting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", - "UMask": "0xc8170a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc8678601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_LOCA= L_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc8668601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_LOCA= L_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc8668a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc8678a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_REMO= TE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc8670601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR_REMO= TE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc8670a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that= Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores tha= t Missed LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc47fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefCode issued by iA Core= s that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFCODE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefCode issued by iA Cor= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", - "UMask": "0xcccffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefData issued by iA Core= s that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefData issued by iA Cor= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", - "UMask": "0xccd7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that missed the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xccc7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc8668601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed locally : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc8668a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", - "UMask": "0xc86e8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed locally : For each cycle, this event= accumulates the number of valid entries in the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests suc= h as locks and interrupts.", - "UMask": "0xc86e8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_D= DR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86f8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_L= OCAL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86e8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_L= OCAL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86e8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_P= MM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86f8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_R= EMOTE_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86f0601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR_R= EMOTE_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86f0a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", - "UMask": "0xc8670601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC - HOMed remotely : For each cycle, this eve= nt accumulates the number of valid entries in the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests s= uch as locks and interrupts.", - "UMask": "0xc8670a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc86f0601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC - HOMed remotely : For each cycle, this even= t accumulates the number of valid entries in the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "UMask": "0xc86f0a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC - HOMed locally : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc806fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC - HOMed locally", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_LOCAL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC - HOMed locally : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc886fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC - HOMed remotely : For each cycle, this event accumula= tes the number of valid entries in the TOR that match qualifications specif= ied by the subevent. Does not include addressless requests such as lock= s and interrupts.", - "UMask": "0xc8877e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC - HOMed remotely", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_REMOTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC - HOMed remotely : For each cycle, this event accumulates t= he number of valid entries in the TOR that match qualifications specified b= y the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0xc8077e01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores = that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_SPECITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : SpecItoMs issued by iA Cores= that missed the LLC: For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc57fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting DDR that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting DDR that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc8678601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores tar= geting PMM that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores ta= rgeting PMM that missed the LLC : For each cycle, this event accumulates th= e number of valid entries in the TOR that match qualifications specified by= the subevent. Does not include addressless requests such as locks and = interrupts.", - "UMask": "0xc8678a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting DDR that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting DDR that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc86f8601", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targ= eting PMM that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tar= geting PMM that missed the LLC : For each cycle, this event accumulates the= number of valid entries in the TOR that match qualifications specified by = the subevent. Does not include addressless requests such as locks and i= nterrupts.", - "UMask": "0xc86f8a01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_SPECITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : SpecItoMs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc57ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices = that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", - "UMask": "0xcd43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices = that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IPQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IPQ : For each cycle, this e= vent accumulates the number of valid entries in the TOR that match qualific= ations specified by the subevent. Does not include addressless requests= such as locks and interrupts.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts. : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - Non iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just ISOC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Local Targets", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. Does not include addre= ssless requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA and IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts. : All locally initiated= requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally initiated reques= ts from iA Cores", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally generated IO tra= ffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. Does not include addressless requests such as locks and int= errupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Misses", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : MMCFG Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NearMem", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NearMem : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NonCoherent", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NotNearMem", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NOT_NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NotNearMem : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PMM Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PMM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PMM Access : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts. : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Remote Targets", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.REMOTE_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Remote Targets : For ea= ch cycle, this event accumulates the number of valid entries in the TOR tha= t match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xB3", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xB3", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI : Pushed to LLC", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", - "PerPkg": "1", - "PublicDescription": "WbPushMtoI : Pushed to LLC : Counts the numb= er of times when the CHA was received WbPushMtoI : Counts the number of tim= es when the CHA was able to push WbPushMToI to LLC", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI : Pushed to Memory", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", - "PerPkg": "1", - "PublicDescription": "WbPushMtoI : Pushed to Memory : Counts the n= umber of times when the CHA was received WbPushMtoI : Counts the number of = times when the CHA was unable to push WbPushMToI to LLC (hence pushed it to= MEM)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC0 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC10", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC10", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC10 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 10 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC11", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC11", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC11 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 11 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC12", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC12", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC12 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 12 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC13", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC13", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC13 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 13 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC2 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC3 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC4 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC5 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC6", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC6", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC6 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 6 only.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC7", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC7", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC7 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 7 only.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC8", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC8", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC8 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 8 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC9", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC9", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC9 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 9 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 0?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits= ", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 0?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 1?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits= ", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 1?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Sent (on 0?)", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.SENT0", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Sent (on 0?) : Number of XP= T prefetches sent", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Sent (on 1?)", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.SENT1", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Sent (on 1?) : Number of XP= T prefetches sent", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", - "PerPkg": "1", - "UMask": "0x22", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", - "PerPkg": "1", - "UMask": "0x23", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", - "PerPkg": "1", - "UMask": "0x25", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", - "PerPkg": "1", - "UMask": "0x26", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", - "PerPkg": "1", - "UMask": "0x27", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Clockticks of the integrated IO (IIO) traffic= controller", - "EventCode": "0x01", - "EventName": "UNC_IIO_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Clockticks of the integrated IO (IIO) traffi= c controller : Increments counter once every Traffic Controller clock, the = LSCLK (500MHz)", - "Unit": "IIO" - }, - { - "BriefDescription": "Free running counter that increments for IIO = clocktick", - "EventCode": "0xff", - "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", - "PerPkg": "1", - "PublicDescription": "Free running counter that increments for int= egrated IO (IIO) traffic controller clockticks", - "UMask": "0x10", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts : All Ports", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-7", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0xff", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0-7", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 1", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 1 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 2", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 2 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 3", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 3 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 4", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 4 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 5", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 5 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 6", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 6 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 7", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 7 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1= , Or x4 card is plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5= , Or x4 card is plugged in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, = Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, = Or x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x= 4 card is plugged in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x= 4 card is plugged in to slot 4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 7", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card p= lugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card p= lugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plu= gged in to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plu= gged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugg= ed in to slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1,= Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5,= Or x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 c= ard is plugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 car= d is plugged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged= in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged= in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 ca= rd plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is= plugged in to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 ca= rd plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is= plugged in to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card= plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card= plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is p= lugged in to slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Passing data = to be written", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Passing data= to be written : How often different queues (e.g. channel / fc) ask to send= request into pipeline : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Issuing final= read or write of line", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Issuing fina= l read or write of line : How often different queues (e.g. channel / fc) as= k to send request into pipeline", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Processing re= sponse from IOMMU", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Processing r= esponse from IOMMU : How often different queues (e.g. channel / fc) ask to = send request into pipeline", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Issuing to IO= MMU", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Issuing to I= OMMU : How often different queues (e.g. channel / fc) ask to send request i= nto pipeline", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Request Owner= ship", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Request Owne= rship : How often different queues (e.g. channel / fc) ask to send request = into pipeline : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Writing line", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Writing line= : How often different queues (e.g. channel / fc) ask to send request into = pipeline : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Passi= ng data to be written", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Pass= ing data to be written : How often different queues (e.g. channel / fc) are= allowed to send request into pipeline : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Issui= ng final read or write of line", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Issu= ing final read or write of line : How often different queues (e.g. channel = / fc) are allowed to send request into pipeline", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Proce= ssing response from IOMMU", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Proc= essing response from IOMMU : How often different queues (e.g. channel / fc)= are allowed to send request into pipeline", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Issui= ng to IOMMU", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Issu= ing to IOMMU : How often different queues (e.g. channel / fc) are allowed t= o send request into pipeline", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Reque= st Ownership", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Requ= est Ownership : How often different queues (e.g. channel / fc) are allowed = to send request into pipeline : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Writi= ng line", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Writ= ing line : How often different queues (e.g. channel / fc) are allowed to se= nd request into pipeline : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 1G Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.1G_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 1G Page : Counts if a tran= saction to a 1G page, on its first lookup, hits the IOTLB.", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 2M Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.2M_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 2M Page : Counts if a tran= saction to a 2M page, on its first lookup, hits the IOTLB.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 4K Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.4K_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 4K Page : Counts if a tran= saction to a 4K page, on its first lookup, hits the IOTLB.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB lookups all", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": IOTLB lookups all : Some transactions have= to look up IOTLB multiple times. Counts every time a request looks up IOT= LB.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache hits", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", - "PerPkg": "1", - "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache lookups", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB lookups first", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Fills (same as IOTLB miss)", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.MISSES", - "PerPkg": "1", - "PublicDescription": ": IOTLB Fills (same as IOTLB miss) : When a = transaction misses IOTLB, it does a page walk to look up memory and bring i= n the relevant page translation. Counts when this page translation is writt= en to IOTLB.", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Cycles PWT full", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.CYC_PWT_FULL", - "PerPkg": "1", - "PublicDescription": ": Cycles PWT full : Counts cycles the IOMMU = has reached its maximum limit for outstanding page walks.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOMMU memory access", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", - "PerPkg": "1", - "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 1G page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 2M page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 4K page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_4K_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWT Hit to a 256T page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": PageWalk cache fill", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS", - "PerPkg": "1", - "PublicDescription": ": PageWalk cache fill : When a transaction m= isses SLPWC, it does a page walk to look up memory and bring in the relevan= t page translation. When this page translation is written to SLPWC, ObsPwcF= illValid_nnnH is asserted.", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": PageWalk cache lookup", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": PageWalk cache lookup : Counts each time a= transaction looks up second level page walk cache.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Interrupt Entry cache hit", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS", - "PerPkg": "1", - "PublicDescription": ": Interrupt Entry cache hit : Counts each ti= me a transaction's first look up hits the IEC.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": Interrupt Entry cache lookup", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": Interrupt Entry cache lookup : Counts the = number of transaction looks up that interrupt remapping cache.", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": Device-selective Context cache invalidation= cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DEVICE", - "PerPkg": "1", - "PublicDescription": ": Device-selective Context cache invalidatio= n cycles : Counts number of Device selective context cache invalidation eve= nts", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Domain-selective Context cache invalidation= cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DOMAIN", - "PerPkg": "1", - "PublicDescription": ": Domain-selective Context cache invalidatio= n cycles : Counts number of Domain selective context cache invalidation eve= nts", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache global invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_GBL", - "PerPkg": "1", - "PublicDescription": ": Context cache global invalidation cycles := Counts number of Context Cache global invalidation events", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Domain-selective IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_DOMAIN", - "PerPkg": "1", - "PublicDescription": ": Domain-selective IOTLB invalidation cycles= : Counts number of Domain selective invalidation events", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Global IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_GBL", - "PerPkg": "1", - "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Page-selective IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PAGE", - "PerPkg": "1", - "PublicDescription": ": Page-selective IOTLB invalidation cycles := Counts number of Page-selective within Domain Invalidation events", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = : Asserted if all bits specified by mask match", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and PCIE bus : Asserted if all bits specified by mask match", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus)", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and !(PCIE bus) : Asserted if all bits specified by mask match", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : PCIE bus : As= serted if all bits specified by mask match", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and PCIE bus : Asserted if all bits specified by mask match", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus)", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and !(PCIE bus) : Asserted if all bits specified by mask match", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus := Asserted if any bits specified by mask match", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus : Asserted if any bits specified by mask match", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d !(PCIE bus)", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus) : Asserted if any bits specified by mask match", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : PCIE bus : Ass= erted if any bits specified by mask match", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus : Asserted if any bits specified by mask match", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and !(PCIE bus)", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus) : Asserted if any bits specified by mask match", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Counting disabled", - "EventCode": "0x80", - "EventName": "UNC_IIO_NOTHING", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Occupancy of outbound request queue : To devi= ce", - "EventCode": "0xC5", - "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Occupancy of outbound request queue : To dev= ice : Counts number of outbound requests/completions IIO is currently proce= ssing", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Passing data to be written", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Passing data to be written : Only for post= ed requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Issuing final read or write of line", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Processing response from IOMMU", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Issuing to IOMMU", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Request Ownership", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Request Ownership : Only for posted reques= ts", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": Writing line", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Writing line : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = From IRP", - "EventCode": "0xC2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.IRP", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests sent to PCIe from main die := From IRP : Captures Posted/Non-posted allocations from IRP. i.e. either no= n-confined P2P traffic or from the CPU", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = From ITC", - "EventCode": "0xC2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.ITC", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests sent to PCIe from main die := From ITC : Confined P2P", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = Completion allocations", - "EventCode": "0xc2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.PREALLOC", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests PCIe makes of the main die : = Drop request", - "EventCode": "0x85", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU.ALL.DROP", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests PCIe makes of the main die := Drop request : Counts full PCIe requests before they're broken into a seri= es of cache-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_O= F_CPU. : Packet error detected, must be dropped", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests PCIe makes of the main die : = All", - "EventCode": "0x85", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests PCIe makes of the main die := All : Counts full PCIe requests before they're broken into a series of cac= he-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_OF_CPU.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Abort= ", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Confi= ned P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Local= P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Multi= -cast", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Memor= y", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : MsgB", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Remot= e P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Ubox", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "ITC address map 1", - "EventCode": "0x8F", - "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Outbound cacheline requests issued : 64B requ= ests issued to device", - "EventCode": "0xD0", - "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Outbound cacheline requests issued : 64B req= uests issued to device : Each outbound cacheline granular request may need = to make multiple passes through the pipeline. Each time a cacheline comple= tes all its passes it advances line", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Outbound TLP (transaction layer packet) reque= sts issued : To device", - "EventCode": "0xD1", - "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Outbound TLP (transaction layer packet) requ= ests issued : To device : Each time an outbound completes all its passes it= advances the pointer", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PWT occupancy", - "EventCode": "0x42", - "EventName": "UNC_IIO_PWT_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Passing d= ata to be written", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Passing = data to be written : Each PCIe request is broken down into a series of cach= eline granular requests and each cacheline size request may need to make mu= ltiple passes through the pipeline (e.g. for posted interrupts or multi-cas= t). Each time a cacheline completes all its passes (e.g. finishes posting= writes to all multi-cast targets) it advances line : Only for posted reque= sts", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Issuing f= inal read or write of line", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Issuing = final read or write of line : Each PCIe request is broken down into a serie= s of cacheline granular requests and each cacheline size request may need t= o make multiple passes through the pipeline (e.g. for posted interrupts or = multi-cast). Each time a cacheline completes all its passes (e.g. finishe= s posting writes to all multi-cast targets) it advances line", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Request O= wnership", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Request = Ownership : Each PCIe request is broken down into a series of cacheline gra= nular requests and each cacheline size request may need to make multiple pa= sses through the pipeline (e.g. for posted interrupts or multi-cast). Eac= h time a cacheline completes all its passes (e.g. finishes posting writes t= o all multi-cast targets) it advances line : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Writing l= ine", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Writing = line : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes all its passes (e.g. finishes posting writes to all= multi-cast targets) it advances line : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Passing data to be wr= itten", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Passing data to be w= ritten : Each PCIe request is broken down into a series of cacheline granul= ar requests and each cacheline size request may need to make multiple passe= s through the pipeline (e.g. for posted interrupts or multi-cast). Each t= ime a single PCIe request completes all its cacheline granular requests, it= advances pointer. : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Issuing final read or= write of line", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Issuing final read o= r write of line : Each PCIe request is broken down into a series of cacheli= ne granular requests and each cacheline size request may need to make multi= ple passes through the pipeline (e.g. for posted interrupts or multi-cast).= Each time a single PCIe request completes all its cacheline granular req= uests, it advances pointer.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Processing response f= rom IOMMU", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Processing response = from IOMMU : Each PCIe request is broken down into a series of cacheline gr= anular requests and each cacheline size request may need to make multiple p= asses through the pipeline (e.g. for posted interrupts or multi-cast). Ea= ch time a single PCIe request completes all its cacheline granular requests= , it advances pointer.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Issuing to IOMMU", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Issuing to IOMMU : E= ach PCIe request is broken down into a series of cacheline granular request= s and each cacheline size request may need to make multiple passes through = the pipeline (e.g. for posted interrupts or multi-cast). Each time a sing= le PCIe request completes all its cacheline granular requests, it advances = pointer.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Request Ownership", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Request Ownership : = Each PCIe request is broken down into a series of cacheline granular reques= ts and each cacheline size request may need to make multiple passes through= the pipeline (e.g. for posted interrupts or multi-cast). Each time a sin= gle PCIe request completes all its cacheline granular requests, it advances= pointer. : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Writing line", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Writing line : Each = PCIe request is broken down into a series of cacheline granular requests an= d each cacheline size request may need to make multiple passes through the = pipeline (e.g. for posted interrupts or multi-cast). Each time a single P= CIe request completes all its cacheline granular requests, it advances poin= ter. : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Passing data t= o be written", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Passing data = to be written : Each PCIe request is broken down into a series of cacheline= granular requests and each cacheline size request may need to make multipl= e passes through the pipeline (e.g. for posted interrupts or multi-cast). = Each time a cacheline completes a single pass (e.g. posts a write to singl= e multi-cast target) it advances state : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Issuing final = read or write of line", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Issuing final= read or write of line : Each PCIe request is broken down into a series of = cacheline granular requests and each cacheline size request may need to mak= e multiple passes through the pipeline (e.g. for posted interrupts or multi= -cast). Each time a cacheline completes a single pass (e.g. posts a write= to single multi-cast target) it advances state", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Request Owners= hip", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Request Owner= ship : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes a single pass (e.g. posts a write to single multi-c= ast target) it advances state : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Writing line", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Writing line = : Each PCIe request is broken down into a series of cacheline granular requ= ests and each cacheline size request may need to make multiple passes throu= gh the pipeline (e.g. for posted interrupts or multi-cast). Each time a c= acheline completes a single pass (e.g. posts a write to single multi-cast t= arget) it advances state : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Symbol Times on Link", - "EventCode": "0x82", - "EventName": "UNC_IIO_SYMBOL_TIMES", - "PerPkg": "1", - "PublicDescription": "Symbol Times on Link : Gen1 - increment once= every 4nS, Gen2 - increment once every 2nS, Gen3 - increment once every 1n= S", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is= plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is= plugged in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugg= ed in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugg= ed in to slot 4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 7", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to La= ne 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot= 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to La= ne 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot= 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane= 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane= 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card= is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lan= e 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot = 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lan= e 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot = 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plug= ged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plug= ged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugge= d in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugge= d in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 0= /1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 2/= 3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 4= /5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot= 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 6/= 7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in= to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged = in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in= to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in t= o slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in= to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in t= o slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Total Write Cache Occupancy : Any Source", - "EventCode": "0x0F", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Total Write Cache Occupancy : Any Source : A= ccumulates the number of reads and writes that are outstanding in the uncor= e in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRI= TE_OCCUPANCY events. : Tracks all requests from any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy : Snoops", - "EventCode": "0x0F", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", - "PerPkg": "1", - "PublicDescription": "Total Write Cache Occupancy : Snoops : Accum= ulates the number of reads and writes that are outstanding in the uncore in= each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_O= CCUPANCY events.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Total IRP occupancy of inbound read and write= requests to coherent memory.", - "EventCode": "0x0f", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", - "PerPkg": "1", - "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests to coherent memory. This is effectively the sum of read occupan= cy and write occupancy.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", - "EventCode": "0x01", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops : CLFlush", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Coherent Ops : CLFlush : Counts the number o= f coherency related operations servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops : WbMtoI", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Coherent Ops : WbMtoI : Counts the number of= coherency related operations servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF RF full", - "EventCode": "0x17", - "EventName": "UNC_I_FAF_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", - "EventCode": "0x18", - "EventName": "UNC_I_FAF_INSERTS", - "PerPkg": "1", - "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Occupancy of the IRP FAF queue.", - "EventCode": "0x19", - "EventName": "UNC_I_FAF_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF allocation -- sent to ADQ", - "EventCode": "0x16", - "EventName": "UNC_I_FAF_TRANSACTIONS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.EVICTS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of At= omic Transactions as Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Re= ad Transactions as Secondary", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Wr= ite Transactions as Secondary", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers = From Primary to Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints = From Primary to Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn= 't find prefetch", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Lost Forward", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Received Invalid", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Received Invalid : Sec= ondary received a transfer that did not have sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Received Valid", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Received Valid : Secon= dary received a transfer that did have sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of E Lin= e : Secondary received a transfer that did have sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of I Lin= e : Snoop took cacheline ownership before write from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of M Lin= e : Snoop took cacheline ownership before write from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of S Lin= e : Secondary received a transfer that did not have sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Requests", - "EventCode": "0x14", - "EventName": "UNC_I_P2P_INSERTS", - "PerPkg": "1", - "PublicDescription": "P2P Requests : P2P requests from the ITC", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Occupancy", - "EventCode": "0x15", - "EventName": "UNC_I_P2P_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "P2P Occupancy : P2P B & S Queue Occupancy", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P completions", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if local only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if local and target = matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P Message", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P reads", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.RD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : Match if remote only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if remote and target= matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P Writes", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.WR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", - "UMask": "0x7e", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", - "UMask": "0x74", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", - "UMask": "0x72", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", - "UMask": "0x78", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", - "UMask": "0x71", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit E or S", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit I", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit M", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Miss", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpCode", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpData", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpInv", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Atomic", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Atomic : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Tracks the number of atomic transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Other", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Other : Counts t= he number of Inbound transactions from the IRP to the Uncore. This can be = filtered based on request type in addition to the source queue. Note the s= pecial filtering equation. We do OR-reduction on the request type. If the= SOURCE bit is set, then we also do AND qualification based on the source p= ortID. : Tracks the number of 'other' kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Writes", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Writes : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Trackes only write requests. Each write request should have a pr= efetch, so there is no need to explicitly track these requests. For writes= that are tickled and have to retry, the counter will be incremented for ea= ch retry.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Egress Allocations", - "EventCode": "0x0B", - "EventName": "UNC_I_TxC_AK_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Cycles Full", - "EventCode": "0x05", - "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Inserts", - "EventCode": "0x02", - "EventName": "UNC_I_TxC_BL_DRS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Occupancy", - "EventCode": "0x08", - "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Cycles Full", - "EventCode": "0x06", - "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Inserts", - "EventCode": "0x03", - "EventName": "UNC_I_TxC_BL_NCB_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Occupancy", - "EventCode": "0x09", - "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Cycles Full", - "EventCode": "0x07", - "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Inserts", - "EventCode": "0x04", - "EventName": "UNC_I_TxC_BL_NCS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Occupancy", - "EventCode": "0x0A", - "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", - "EventCode": "0x1C", - "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": ": Counts the number times when it is not pos= sible to issue a request to the M2PCIe because there are no Egress Credits = available on AD0, A1 or AD0&AD1 both. Stalls on both AD0 and AD1 will count= as 2", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD0 Egress Credits Stalls", - "EventCode": "0x1A", - "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No AD0 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD0 Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD1 Egress Credits Stalls", - "EventCode": "0x1B", - "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No AD1 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD1 Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x1D", - "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No BL Egress Credit Stalls : Counts the numb= er times when it is not possible to issue data to the R2PCIe because there = are no BL Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0x0D", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0x0E", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0x0C", - "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Outbound Request Queue Occupancy : Accumulat= es the number of outstanding outbound requests from the IRP to the switch (= towards the devices). This can be used in conjunction with the allocations= event in order to calculate average latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x81", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x81", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x81", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x83", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x83", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x83", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - 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"UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Not Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Not Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Clockticks of the mesh to memory (M2M)", - "EventName": "UNC_M2M_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M2M_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to core mode, which bypass= es the CHA, was disabled", - "EventCode": "0x24", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", - "EventCode": "0x60", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to core trans= action was overridden", - "EventCode": "0x25", - "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to Intel UPI = transactions were overridden", - "EventCode": "0x28", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when Direct2UPI was Disabled", - "EventCode": "0x27", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads that a message sent direct2 I= ntel UPI was overridden", - "EventCode": "0x29", - "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", - "PerPkg": "1", - "PublicDescription": "Clockticks of the mesh to PCI (M2P)", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On NonDirty Line in A State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On NonDirty Line in I State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On NonDirty Line in L State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On NonDirty Line in S State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On Dirty Line in A State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On Dirty Line in I State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On Dirty Line in L State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit : On Dirty Line in S State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in any state", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in A state", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in I state", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory Lookups : Fo= und in S state", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On NonDirty Line in A State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On NonDirty Line in I State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On NonDirty Line in L State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On NonDirty Line in S State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On Dirty Line in A State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On Dirty Line in I State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On Dirty Line in L State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss : On Dirty Line in S State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory Updates : Fr= om/to any state. Note: event counts are incorrect in 2LM mode.", - "EventCode": "0x2e", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : PMM Local", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.PMM_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : PMM Remote", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.PMM_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_DISTRESS_PMM", - "EventCode": "0xF2", - "EventName": "UNC_M2M_DISTRESS_PMM", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_DISTRESS_PMM_MEMMODE", - "EventCode": "0xF1", - "EventName": "UNC_M2M_DISTRESS_PMM_MEMMODE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xBA", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xBA", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xB9", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xB9", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ALL", - "PerPkg": "1", - "UMask": "0x704", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_ALL", - "PerPkg": "1", - "UMask": "0x104", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR", - "PerPkg": "1", - "UMask": "0x140", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH", - "PerPkg": "1", - "UMask": "0x102", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL", - "PerPkg": "1", - "UMask": "0x101", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cach= e - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE", - "PerPkg": "1", - "UMask": "0x110", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : DDR - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM", - "PerPkg": "1", - "UMask": "0x108", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : PMM - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_TO_PMM", - "PerPkg": "1", - "PublicDescription": "M2M Reads Issued to iMC : PMM - Ch0 : Counts= all PMM dimm read requests(full line) sent from M2M to iMC", - "UMask": "0x120", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_ALL", - "PerPkg": "1", - "UMask": "0x204", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR", - "PerPkg": "1", - "UMask": "0x240", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH", - "PerPkg": "1", - "UMask": "0x202", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL", - "PerPkg": "1", - "UMask": "0x201", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cach= e - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE", - "PerPkg": "1", - "UMask": "0x210", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : DDR - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM", - "PerPkg": "1", - "UMask": "0x208", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : PMM - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_TO_PMM", - "PerPkg": "1", - "PublicDescription": "M2M Reads Issued to iMC : PMM - Ch1 : Counts= all PMM dimm read requests(full line) sent from M2M to iMC", - "UMask": "0x220", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch2", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH2_FROM_TGR", - "PerPkg": "1", - "UMask": "0x440", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - All Chan= nels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.FROM_TGR", - "PerPkg": "1", - "UMask": "0x740", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ISOCH", - "PerPkg": "1", - "UMask": "0x702", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - A= ll Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.NORMAL", - "PerPkg": "1", - "UMask": "0x701", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cach= e - All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE", - "PerPkg": "1", - "UMask": "0x710", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : DDR - All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM", - "PerPkg": "1", - "UMask": "0x708", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : PMM - All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.TO_PMM", - "PerPkg": "1", - "UMask": "0x720", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - All C= hannels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.ALL", - "PerPkg": "1", - "UMask": "0x1c10", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL", - "PerPkg": "1", - "UMask": "0x410", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL", - "PerPkg": "1", - "UMask": "0x401", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x404", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Ch= 0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_NI", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", - "PerPkg": "1", - "UMask": "0x402", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x408", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cac= he - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_CACHE", - "PerPkg": "1", - "UMask": "0x440", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : DDR - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM", - "PerPkg": "1", - "UMask": "0x420", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : PMM - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_PMM", - "PerPkg": "1", - "PublicDescription": "M2M Writes Issued to iMC : PMM - Ch0 : Count= s all PMM dimm writes requests(full line and partial) sent from M2M to iMC", - "UMask": "0x480", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL", - "PerPkg": "1", - "UMask": "0x810", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL", - "PerPkg": "1", - "UMask": "0x801", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x804", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Ch= 1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_NI", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL", - "PerPkg": "1", - "UMask": "0x802", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x808", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cac= he - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_CACHE", - "PerPkg": "1", - "UMask": "0x840", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : DDR - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_MEM", - "PerPkg": "1", - "UMask": "0x820", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : PMM - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_PMM", - "PerPkg": "1", - "PublicDescription": "M2M Writes Issued to iMC : PMM - Ch1 : Count= s all PMM dimm writes requests(full line and partial) sent from M2M to iMC", - "UMask": "0x880", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - All Cha= nnels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL", - "PerPkg": "1", - "UMask": "0x1c01", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x1c04", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Al= l Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.NI", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", - "PerPkg": "1", - "UMask": "0x1c02", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Al= l Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x1c08", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cac= he - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_CACHE", - "PerPkg": "1", - "UMask": "0x1c40", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : DDR - All Channels= ", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_MEM", - "PerPkg": "1", - "UMask": "0x1c20", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : PMM - All Channels= ", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", - "PerPkg": "1", - "UMask": "0x1c80", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts", - "EventCode": "0x64", - "EventName": "UNC_M2M_MIRR_WRQ_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy", - "EventCode": "0x65", - "EventName": "UNC_M2M_MIRR_WRQ_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xE6", - "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xE6", - "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches : MC Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches : Mesh Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MESH", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS", - "EventCode": "0x73", - "EventName": "UNC_M2M_PREFCAM_CIS_DROPS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : All Channels", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : Channel 0", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : Channel 1", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : Channel 2", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : All Channels", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 0", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 1", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 2", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA0_INVAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA1_INVAL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_MISS_INVAL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_RSP_PDRESET", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA0_INVAL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA1_INVAL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_MISS_INVAL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_RSP_PDRESET", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_HITA0_INVAL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_HITA1_INVAL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_MISS_INVAL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_RSP_PDRESET", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : UPI - Ch 0", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - Ch 0", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : UPI - Ch 1", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - Ch 1", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : UPI - Ch 2", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH2_UPI", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - Ch 2", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH2_XPT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : UPI - All Channels", - "EventCode": "0x6f", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.UPI_ALLCH", - "PerPkg": "1", - "UMask": "0x2a", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - All Channels", - "EventCode": "0x6f", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 0", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 0", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI - Ch 1", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI- Ch 1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 2", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH2_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 2", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- All Channels", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPTUPI_ALLCH", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - All Channels", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 0", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 0", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 1", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 2", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH2_XPTUPI", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - All Channels", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPTUPI_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.ERRORBLK_RxC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.NOT_PF_SAD_REGION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_HIT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_SECURE_DROP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.RPQ_PROXY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.STOP_B2B", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.UPI_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.WPQ_PROXY", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.XPT_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.ERRORBLK_RxC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.NOT_PF_SAD_REGION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_HIT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_SECURE_DROP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.RPQ_PROXY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.STOP_B2B", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.UPI_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.WPQ_PROXY", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.XPT_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.ERRORBLK_RxC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.NOT_PF_SAD_REGION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_CAM_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_CAM_HIT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_SECURE_DROP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.RPQ_PROXY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.STOP_B2B", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.UPI_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.WPQ_PROXY", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch2 - Reasons", - "EventCode": "0x72", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.XPT_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_UPI", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_UPI", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 2", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH2_UPI", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 2", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH2_XPT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels", - "EventCode": "0x6d", - "EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH", - "PerPkg": "1", - "UMask": "0x2a", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : All Channels", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : Channel 0", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : Channel 1", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : Channel 2", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": ": All Channels", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": ": Channel 0", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": ": Channel 1", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": ": Channel 2", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", - "EventCode": "0x79", - "EventName": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCE= PT", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_INSERTS", - "EventCode": "0x78", - "EventName": "UNC_M2M_PREFCAM_RxC_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", - "EventCode": "0x77", - "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_M2M_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 0", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 1", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 2", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel= 0", - "EventCode": "0x4F", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel= 1", - "EventCode": "0x4F", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel= 2", - "EventCode": "0x4F", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 0", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 2", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Full", - "EventCode": "0x04", - "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Not Empty", - "EventCode": "0x03", - "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Allocations", - "EventCode": "0x01", - "EventName": "UNC_M2M_RxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy", - "EventCode": "0x02", - "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches", - "EventCode": "0x77", - "EventName": "UNC_M2M_RxC_AD_PREF_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x5C", - "EventName": "UNC_M2M_RxC_AK_WR_CMP", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Full", - "EventCode": "0x08", - "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Not Empty", - "EventCode": "0x07", - "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Allocations", - "EventCode": "0x05", - "EventName": "UNC_M2M_RxC_BL_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Occupancy", - "EventCode": "0x06", - "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_M2M_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_SCOREBOARD_AD_RETRY_ACCEPTS", - "EventCode": "0x33", - "EventName": "UNC_M2M_SCOREBOARD_AD_RETRY_ACCEPTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_SCOREBOARD_AD_RETRY_REJECTS", - "EventCode": "0x34", - "EventName": "UNC_M2M_SCOREBOARD_AD_RETRY_REJECTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Retry - Mem Mirroring Mode", - "EventCode": "0x35", - "EventName": "UNC_M2M_SCOREBOARD_BL_RETRY_ACCEPTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Retry - Mem Mirroring Mode", - "EventCode": "0x36", - "EventName": "UNC_M2M_SCOREBOARD_BL_RETRY_REJECTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Scoreboard Accepts", - "EventCode": "0x2F", - "EventName": "UNC_M2M_SCOREBOARD_RD_ACCEPTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Scoreboard Rejects", - "EventCode": "0x30", - "EventName": "UNC_M2M_SCOREBOARD_RD_REJECTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Scoreboard Accepts", - "EventCode": "0x31", - "EventName": "UNC_M2M_SCOREBOARD_WR_ACCEPTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Scoreboard Rejects", - "EventCode": "0x32", - "EventName": "UNC_M2M_SCOREBOARD_WR_REJECTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tag Hit : Clean NearMem Read Hit", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN", - "PerPkg": "1", - "PublicDescription": "Tag Hit : Clean NearMem Read Hit : Tag Hit i= ndicates when a request sent to the iMC hit in Near Memory. : Counts clean = full line read hits (reads and RFOs).", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tag Hit : Dirty NearMem Read Hit", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY", - "PerPkg": "1", - "PublicDescription": "Tag Hit : Dirty NearMem Read Hit : Tag Hit i= ndicates when a request sent to the iMC hit in Near Memory. : Counts dirty = full line read hits (reads and RFOs).", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tag Hit : Clean NearMem Underfill Hit", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN", - "PerPkg": "1", - "PublicDescription": "Tag Hit : Clean NearMem Underfill Hit : Tag = Hit indicates when a request sent to the iMC hit in Near Memory. : Counts c= lean underfill hits due to a partial write", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tag Hit : Dirty NearMem Underfill Hit", - "EventCode": "0x2C", - "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY", - "PerPkg": "1", - "PublicDescription": "Tag Hit : Dirty NearMem Underfill Hit : Tag = Hit indicates when a request sent to the iMC hit in Near Memory. : Counts d= irty underfill read hits due to a partial write", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Tag Miss", - "EventCode": "0x61", - "EventName": "UNC_M2M_TAG_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number AD Ingress Credits", - "EventCode": "0x41", - "EventName": "UNC_M2M_TGR_AD_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number BL Ingress Credits", - "EventCode": "0x42", - "EventName": "UNC_M2M_TGR_BL_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full : Channel 0", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full : Channel 1", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full : Channel 2", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_FULL.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 0", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 1", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 2", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty : Channel 0", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty : Channel 1", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty : Channel 2", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_NE.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 0", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 1", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 2", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credit Acquired", - "EventCode": "0x0d", - "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credits Occupancy", - "EventCode": "0x0e", - "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Full", - "EventCode": "0x0c", - "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Not Empty", - "EventCode": "0x0b", - "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Allocations", - "EventCode": "0x09", - "EventName": "UNC_M2M_TxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", - "EventCode": "0x0f", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", - "EventCode": "0x10", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Occupancy", - "EventCode": "0x0A", - "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK : CRD Transa= ctions to Cbo", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.CRD_CBO", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK : NDR Transa= ctions", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.NDR", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AKC Credits", - "EventCode": "0x5F", - "EventName": "UNC_M2M_TxC_AKC_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : All", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Near Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Far Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", - "PerPkg": "1", - "UMask": "0x88", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : All", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : All", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : All", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Near Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Far Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Cache", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Core", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to QPI", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_UPI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : All", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Near Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Far Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : All", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : All", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xB3", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xB3", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "WPQ Flush : Channel 0", - "EventCode": "0x58", - "EventName": "UNC_M2M_WPQ_FLUSH.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "WPQ Flush : Channel 1", - "EventCode": "0x58", - "EventName": "UNC_M2M_WPQ_FLUSH.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "WPQ Flush : Channel 2", - "EventCode": "0x58", - "EventName": "UNC_M2M_WPQ_FLUSH.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 0", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Cha= nnel 2", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel= 0", - "EventCode": "0x51", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel= 1", - "EventCode": "0x51", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel= 2", - "EventCode": "0x51", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 0", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 1", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Cha= nnel 2", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Channel 0", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Channel 1", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Channel 2", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Mirror", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.MIRR", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts : Channel 0", - "EventCode": "0x56", - "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts : Channel 1", - "EventCode": "0x56", - "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts : Channel 2", - "EventCode": "0x56", - "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.CH0", - 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}, - { - "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", - "EventCode": "0x63", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", - "EventCode": "0x63", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 2", - "EventCode": "0x63", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", - "EventCode": "0x62", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", - "EventCode": "0x62", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", - 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"Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", - "EventCode": "0x5D", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", - "EventCode": "0x5D", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Occupancy : Channel 2", - "EventCode": "0x5D", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - 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"UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x81", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x81", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - 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"UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x83", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x83", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x83", - "EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", - "EventCode": "0x88", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x89", - "EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", - 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"UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Clockticks of the mesh to PCI (M2P)", - "EventCode": "0x01", - "EventName": "UNC_M2P_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Clockticks of the mesh to PCI (M2P) : Counts= the number of uclks in the M3 uclk domain. This could be slightly differe= nt than the count in the Ubox because of enable/freeze delays. However, be= cause the M3 is close to the Ubox, they generally should not diverge by mor= e than a handful of cycles.", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M2P_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : PMM Local", - "EventCode": "0xAF", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.PMM_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : PMM Remote", - "EventCode": "0xAF", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.PMM_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xba", - "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xba", - "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xb9", - "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xb9", - "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCS message class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credit fo= r transfer through CMS Port 0s to the IIO for the NCS message class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the DRS message class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCB message class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCS message class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCS me= ssage class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credit for transfer through CMS Port 0s to the IIO for the NCS me= ssage class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCB", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCS", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCB", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCS", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCB", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCS", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCB", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCS", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent0", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent1", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent2", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent0", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent1", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent2", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent3", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent4", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent5", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCB", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCS", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCB", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCS", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCB", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCS", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCB", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCS", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xe6", - "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xe6", - "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : All", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Local NCB", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Local NCS", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Remote NCB", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Remote NCS", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : All", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Local NCB", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Local NCS", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Remote NCB", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Remote NCS", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : All", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Local NCB", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Local NCS", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Remote NCB", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Remote NCS", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - DRS", - "EventCode": "0x48", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_DRS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - NCB", - "EventCode": "0x48", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 = - NCS", - "EventCode": "0x48", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - DRS", - "EventCode": "0x48", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_DRS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - NCB", - "EventCode": "0x48", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 = - NCS", - "EventCode": "0x48", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - DRS", - "EventCode": "0x49", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_DRS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - NCB", - "EventCode": "0x49", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 = - NCS", - "EventCode": "0x49", - "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 = - NCB", - "EventCode": "0x1b", - "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 = - NCS", - "EventCode": "0x1b", - "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 = - NCB", - "EventCode": "0x1b", - "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 = - NCS", - "EventCode": "0x1b", - "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 = - NCB", - "EventCode": "0x1b", - "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 = - NCS", - "EventCode": "0x1b", - "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent0", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent1", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent2", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent0", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent1", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent2", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - D= RS", - "EventCode": "0x42", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_DRS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - N= CB", - "EventCode": "0x42", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - N= CS", - "EventCode": "0x42", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - D= RS", - "EventCode": "0x42", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_DRS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - N= CB", - "EventCode": "0x42", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - N= CS", - "EventCode": "0x42", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - D= RS", - "EventCode": "0x43", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_DRS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - N= CB", - "EventCode": "0x43", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - N= CS", - "EventCode": "0x43", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - DRS", - "EventCode": "0x4c", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_DRS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - NCB", - "EventCode": "0x4c", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 0 - NCS", - "EventCode": "0x4c", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - DRS", - "EventCode": "0x4c", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_DRS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - NCB", - "EventCode": "0x4c", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI= 1 - NCS", - "EventCode": "0x4c", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - DRS", - "EventCode": "0x4d", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_DRS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - NCB", - "EventCode": "0x4d", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI= 2 - NCS", - "EventCode": "0x4d", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_M2P_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_M2P_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "UNC_M2P_TxC_CREDITS.PMM", - "EventCode": "0x2D", - "EventName": "UNC_M2P_TxC_CREDITS.PMM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ", - "EventCode": "0x2d", - "EventName": "UNC_M2P_TxC_CREDITS.PRQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9e", - "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9e", - "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xb3", - "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xb3", - "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x81", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x81", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x81", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x83", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x83", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x83", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", - 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"UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8D", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8D", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8D", - "EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8F", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8F", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8F", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty : Requests", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ", - "PerPkg": "1", - "PublicDescription": "CBox AD Credits Empty : Requests : No credit= s available to send to Cbox on the AD Ring (covers higher CBoxes)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty : Snoops", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP", - "PerPkg": "1", - "PublicDescription": "CBox AD Credits Empty : Snoops : No credits = available to send to Cbox on the AD Ring (covers higher CBoxes)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty : VNA Messages", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "CBox AD Credits Empty : VNA Messages : No cr= edits available to send to Cbox on the AD Ring (covers higher CBoxes)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty : Writebacks", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB", - "PerPkg": "1", - "PublicDescription": "CBox AD Credits Empty : Writebacks : No cred= its available to send to Cbox on the AD Ring (covers higher CBoxes)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Clockticks of the mesh to UPI (M3UPI)", - "EventCode": "0x01", - "EventName": "UNC_M3UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Clockticks of the mesh to UPI (M3UPI) : Coun= ts the number of uclks in the M3 uclk domain. This could be slightly diffe= rent than the count in the Ubox because of enable/freeze delays. However, = because the M3 is close to the Ubox, they generally should not diverge by m= ore than a handful of cycles.", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2C Sent", - "EventCode": "0x2B", - "EventName": "UNC_M3UPI_D2C_SENT", - "PerPkg": "1", - "PublicDescription": "D2C Sent : Count cases BL sends direct to co= re", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2U Sent", - "EventCode": "0x2A", - "EventName": "UNC_M3UPI_D2U_SENT", - "PerPkg": "1", - "PublicDescription": "D2U Sent : Cases where SMI3 sends D2U comman= d", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : PMM Local", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.PMM_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : If the CHA TOR has too many PMM transactions, this signal will th= rottle outgoing MS2IDI traffic", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : PMM Remote", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.PMM_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : PMM Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If another CHA TOR has too many PMM transactions, this signal wi= ll throttle outgoing MS2IDI traffic", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xAF", - "EventName": "UNC_M3UPI_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xBA", - "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xBA", - "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xB6", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xB6", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xBB", - "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xBB", - "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xB7", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xB7", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xB8", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xB8", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xB9", - "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xB9", - "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : IIO0 and IIO1 share the= same ring destination. (1 VN0 credit only)", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO1_NCB", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : IIO0 and IIO1 share th= e same ring destination. (1 VN0 credit only) : No vn0 and vna credits avail= able to send to M2", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : IIO2", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : IIO2 : No vn0 and vna = credits available to send to M2", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : IIO3", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : IIO3 : No vn0 and vna = credits available to send to M2", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : IIO4", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : IIO4 : No vn0 and vna = credits available to send to M2", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : IIO5", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : IIO5 : No vn0 and vna = credits available to send to M2", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : All IIO targets for NCS= are in single mask. ORs them together", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : All IIO targets for NC= S are in single mask. ORs them together : No vn0 and vna credits available = to send to M2", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : Selected M2p BL NCS cre= dits", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : Selected M2p BL NCS cr= edits : No vn0 and vna credits available to send to M2", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty : IIO5", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.UBOX_NCB", - "PerPkg": "1", - "PublicDescription": "M2 BL Credits Empty : IIO5 : No vn0 and vna = credits available to send to M2", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xE6", - "EventName": "UNC_M3UPI_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xE6", - "EventName": "UNC_M3UPI_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received : AD - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi Slot Flit Received : AD - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received : AD - Slot 1", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1", - "PerPkg": "1", - "PublicDescription": "Multi Slot Flit Received : AD - Slot 1 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received : AD - Slot 2", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2", - "PerPkg": "1", - "PublicDescription": "Multi Slot Flit Received : AD - Slot 2 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received : AK - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi Slot Flit Received : AK - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received : AK - Slot 2", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2", - "PerPkg": "1", - "PublicDescription": "Multi Slot Flit Received : AK - Slot 2 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received : BL - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi Slot Flit Received : BL - Slot 0 : Mul= ti slot flit received - S0, S1 and/or S2 populated (can use AK S0/S1 masks = for AK allocations)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_M3UPI_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0 : REQ on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN0 : REQ on AD : VN0 message r= equested but lost arbitration : Home (REQ) messages on AD. REQ is generall= y used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0 : RSP on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN0 : RSP on AD : VN0 message r= equested but lost arbitration : Response (RSP) messages on AD. RSP packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0 : SNP on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN0 : SNP on AD : VN0 message r= equested but lost arbitration : Snoops (SNP) messages on AD. SNP is used f= or outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0 : NCB on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN0 : NCB on BL : VN0 message r= equested but lost arbitration : Non-Coherent Broadcast (NCB) messages on BL= . NCB is generally used to transmit data without coherency. For example, = non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0 : NCS on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN0 : NCS on BL : VN0 message r= equested but lost arbitration : Non-Coherent Standard (NCS) messages on BL.= ", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0 : RSP on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN0 : RSP on BL : VN0 message r= equested but lost arbitration : Response (RSP) messages on BL. RSP packets = are used to transmit a variety of protocol flits including grants and compl= etions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0 : WB on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN0 : WB on BL : VN0 message re= quested but lost arbitration : Data Response (WB) messages on BL. WB is ge= nerally used to transmit data with coherency. For example, remote reads an= d writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1 : REQ on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN1 : REQ on AD : VN1 message r= equested but lost arbitration : Home (REQ) messages on AD. REQ is generall= y used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1 : RSP on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN1 : RSP on AD : VN1 message r= equested but lost arbitration : Response (RSP) messages on AD. RSP packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1 : SNP on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN1 : SNP on AD : VN1 message r= equested but lost arbitration : Snoops (SNP) messages on AD. SNP is used f= or outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1 : NCB on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN1 : NCB on BL : VN1 message r= equested but lost arbitration : Non-Coherent Broadcast (NCB) messages on BL= . NCB is generally used to transmit data without coherency. For example, = non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1 : NCS on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN1 : NCS on BL : VN1 message r= equested but lost arbitration : Non-Coherent Standard (NCS) messages on BL.= ", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1 : RSP on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN1 : RSP on BL : VN1 message r= equested but lost arbitration : Response (RSP) messages on BL. RSP packets = are used to transmit a variety of protocol flits including grants and compl= etions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1 : WB on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Lost Arb for VN1 : WB on BL : VN1 message re= quested but lost arbitration : Data Response (WB) messages on BL. WB is ge= nerally used to transmit data with coherency. For example, remote reads an= d writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN0", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : AD, BL Parallel Win VN0 = : AD and BL messages won arbitration concurrently / in parallel", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN1", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : AD, BL Parallel Win VN1 = : AD and BL messages won arbitration concurrently / in parallel", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : Max Parallel Win", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.ALL_PARALLEL_WIN", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : Max Parallel Win : VN0 a= nd VN1 arbitration sub-pipelines both produced AD and BL winners (maximum p= ossible parallel winners)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : No Progress on Pending AD= VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : No Progress on Pending A= D VN0 : Arbitration stage made no progress on pending ad vn0 messages becau= se slotting stage cannot accept new message", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : No Progress on Pending AD= VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : No Progress on Pending A= D VN1 : Arbitration stage made no progress on pending ad vn1 messages becau= se slotting stage cannot accept new message", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : No Progress on Pending BL= VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : No Progress on Pending B= L VN0 : Arbitration stage made no progress on pending bl vn0 messages becau= se slotting stage cannot accept new message", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : No Progress on Pending BL= VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : No Progress on Pending B= L VN1 : Arbitration stage made no progress on pending bl vn1 messages becau= se slotting stage cannot accept new message", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous : VN0, VN1 Parallel Win", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.VN01_PARALLEL_WIN", - "PerPkg": "1", - "PublicDescription": "Arb Miscellaneous : VN0, VN1 Parallel Win : = VN0 and VN1 arbitration sub-pipelines had parallel winners (at least one AD= or BL on each side)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0 : REQ on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN0 : REQ on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Home (REQ) messages on AD. REQ is generally used to send requests,= request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0 : RSP on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN0 : RSP on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on AD. RSP packets are used to transmit a = variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0 : SNP on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN0 : SNP on AD : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0 : NCB on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN0 : NCB on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used= to transmit data without coherency. For example, non-coherent read data r= eturns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0 : NCS on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN0 : NCS on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0 : RSP on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN0 : RSP on BL : VN0 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on BL. RSP packets are used to transmit a v= ariety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0 : WB on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN0 : WB on BL : VN0 m= essage is blocked from requesting arbitration due to lack of remote UPI cre= dits : Data Response (WB) messages on BL. WB is generally used to transmit= data with coherency. For example, remote reads and writes, or cache to ca= che transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1 : REQ on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN1 : REQ on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Home (REQ) messages on AD. REQ is generally used to send requests,= request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1 : RSP on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN1 : RSP on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on AD. RSP packets are used to transmit a = variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1 : SNP on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN1 : SNP on AD : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1 : NCB on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN1 : NCB on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used= to transmit data without coherency. For example, non-coherent read data r= eturns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1 : NCS on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN1 : NCS on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1 : RSP on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN1 : RSP on BL : VN1 = message is blocked from requesting arbitration due to lack of remote UPI cr= edits : Response (RSP) messages on BL. RSP packets are used to transmit a v= ariety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1 : WB on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "No Credits to Arb for VN1 : WB on BL : VN1 m= essage is blocked from requesting arbitration due to lack of remote UPI cre= dits : Data Response (WB) messages on BL. WB is generally used to transmit= data with coherency. For example, remote reads and writes, or cache to ca= che transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0 : REQ on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN0 : REQ on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Home (REQ) messages on AD. REQ is generally used to send requests, req= uest responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0 : RSP on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN0 : RSP on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on AD. RSP packets are used to transmit a vari= ety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0 : SNP on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN0 : SNP on AD : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0 : NCB on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN0 : NCB on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to = transmit data without coherency. For example, non-coherent read data retur= ns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0 : NCS on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN0 : NCS on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0 : RSP on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN0 : RSP on BL : VN0 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on BL. RSP packets are used to transmit a varie= ty of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0 : WB on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN0 : WB on BL : VN0 message w= as not able to request arbitration while some other message won arbitration= : Data Response (WB) messages on BL. WB is generally used to transmit dat= a with coherency. For example, remote reads and writes, or cache to cache = transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1 : REQ on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN1 : REQ on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Home (REQ) messages on AD. REQ is generally used to send requests, req= uest responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1 : RSP on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN1 : RSP on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on AD. RSP packets are used to transmit a vari= ety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1 : SNP on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN1 : SNP on AD : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1 : NCB on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN1 : NCB on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to = transmit data without coherency. For example, non-coherent read data retur= ns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1 : NCS on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN1 : NCS on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1 : RSP on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN1 : RSP on BL : VN1 message = was not able to request arbitration while some other message won arbitratio= n : Response (RSP) messages on BL. RSP packets are used to transmit a varie= ty of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1 : WB on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Can't Arb for VN1 : WB on BL : VN1 message w= as not able to request arbitration while some other message won arbitration= : Data Response (WB) messages on BL. WB is generally used to transmit dat= a with coherency. For example, remote reads and writes, or cache to cache = transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL A= rb", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB", - "PerPkg": "1", - "PublicDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL = Arb : Number of times message is bypassed around the Ingress Queue : AD is = taking bypass to slot 0 of independent flit while bl message is in arbitrat= ion", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idle= ", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE", - "PerPkg": "1", - "PublicDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idl= e : Number of times message is bypassed around the Ingress Queue : AD is ta= king bypass to slot 0 of independent flit while pipeline is idle", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 1", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT", - "PerPkg": "1", - "PublicDescription": "Ingress Queue Bypasses : AD + BL to Slot 1 := Number of times message is bypassed around the Ingress Queue : AD is takin= g bypass to flit slot 1 while merging with bl message in same flit", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 2", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT", - "PerPkg": "1", - "PublicDescription": "Ingress Queue Bypasses : AD + BL to Slot 2 := Number of times message is bypassed around the Ingress Queue : AD is takin= g bypass to flit slot 2 while merging with bl message in same flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events : Any In BGF FIFO= ", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO", - "PerPkg": "1", - "PublicDescription": "Miscellaneous Credit Events : Any In BGF FIF= O : Indication that at least one packet (flit) is in the bgf (fifo only)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events : Any in BGF Path= ", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH", - "PerPkg": "1", - "PublicDescription": "Miscellaneous Credit Events : Any in BGF Pat= h : Indication that at least one packet (flit) is in the bgf path (i.e. pip= e to fifo)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.LT1_FOR_D2K", - "PerPkg": "1", - "PublicDescription": "Miscellaneous Credit Events : d2k credit cou= nt is less than 1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.LT2_FOR_D2K", - "PerPkg": "1", - "PublicDescription": "Miscellaneous Credit Events : d2k credit cou= nt is less than 2", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events : No D2K For Arb", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.VN0_NO_D2K_FOR_ARB", - "PerPkg": "1", - "PublicDescription": "Miscellaneous Credit Events : No D2K For Arb= : VN0 BL RSP message was blocked from arbitration request due to lack of D= 2K CMP credit", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.VN1_NO_D2K_FOR_ARB", - "PerPkg": "1", - "PublicDescription": "Miscellaneous Credit Events : VN1 BL RSP mes= sage was blocked from arbitration request due to lack of D2K CMP credits", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy : Credits Consumed", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.CONSUMED", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : Credits Consumed : number= of remote vna credits consumed per cycle", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy : D2K Credits", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : D2K Credits : D2K complet= ion fifo credit occupancy (credits in use), accumulated across all cycles", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy : Packets in BGF FIFO", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : Packets in BGF FIFO : Occ= upancy of m3upi ingress -> upi link layer bgf; packets (flits) in fifo", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy : Packets in BGF Path", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : Packets in BGF Path : Occ= upancy of m3upi ingress -> upi link layer bgf; packets (flits) in path (i.e= . pipe to fifo or fifo)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : count of bl messages in p= ump-1-pending state, in completion fifo only", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : count of bl messages in p= ump-1-pending state, in marker table and in fifo", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy : Transmit Credits", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : Transmit Credits : Link l= ayer transmit queue credit occupancy (credits in use), accumulated across a= ll cycles", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy : VNA In Use", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE", - "PerPkg": "1", - "PublicDescription": "Credit Occupancy : VNA In Use : Remote UPI V= NA credit occupancy (number of credits in use), accumulated across all cycl= es", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : REQ on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : REQ on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Home (REQ) me= ssages on AD. REQ is generally used to send requests, request responses, a= nd snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on AD. RSP packets are used to transmit a variety of protocol f= lits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : SNP on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : SNP on AD : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Snoops (SNP) = messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCB on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : NCB on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Broadcast (NCB) messages on BL. NCB is generally used to transmit data wit= hout coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCS on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : NCS on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on BL : Counts the number of cycles when the UPI Ingress is not e= mpty. This tracks one of the three rings that are used by the UPI agent. = This can be used in conjunction with the UPI Ingress Occupancy Accumulator = event in order to calculate average queue occupancy. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on BL. RSP packets are used to transmit a variety of protocol fl= its including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty : WB on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Em= pty : WB on BL : Counts the number of cycles when the UPI Ingress is not em= pty. This tracks one of the three rings that are used by the UPI agent. T= his can be used in conjunction with the UPI Ingress Occupancy Accumulator e= vent in order to calculate average queue occupancy. Multiple ingress buffe= rs can be tracked at a given time using multiple counters. : Data Response = (WB) messages on BL. WB is generally used to transmit data with coherency.= For example, remote reads and writes, or cache to cache transfers will tr= ansmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : REQ on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : REQ on AD : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Home (REQ) me= ssages on AD. REQ is generally used to send requests, request responses, a= nd snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on AD : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on AD. RSP packets are used to transmit a variety of protocol f= lits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : SNP on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : SNP on AD : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Snoops (SNP) = messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCB on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : NCB on BL : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Broadcast (NCB) messages on BL. NCB is generally used to transmit data wit= hout coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : NCS on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : NCS on BL : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Non-Coherent = Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : RSP on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : RSP on BL : Counts the number of allocations into the UPI VN1 Ingres= s. This tracks one of the three rings that are used by the UPI agent. Thi= s can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulato= r event in order to calculate average queue latency. Multiple ingress buff= ers can be tracked at a given time using multiple counters. : Response (RSP= ) messages on BL. RSP packets are used to transmit a variety of protocol fl= its including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty : WB on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Em= pty : WB on BL : Counts the number of allocations into the UPI VN1 Ingress= . This tracks one of the three rings that are used by the UPI agent. This= can be used in conjunction with the UPI VN1 Ingress Occupancy Accumulator= event in order to calculate average queue latency. Multiple ingress buffe= rs can be tracked at a given time using multiple counters. : Data Response = (WB) messages on BL. WB is generally used to transmit data with coherency.= For example, remote reads and writes, or cache to cache transfers will tr= ansmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent : All", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Data Flit Not Sent : All : Data flit is read= y for transmission but could not be sent : data flit is ready for transmiss= ion but could not be sent for any reason, e.g. low credits, low tsv, stall = injection", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent : No BGF Credits", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_BGF", - "PerPkg": "1", - "PublicDescription": "Data Flit Not Sent : No BGF Credits : Data f= lit is ready for transmission but could not be sent", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent : No TxQ Credits", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_TXQ", - "PerPkg": "1", - "PublicDescription": "Data Flit Not Sent : No TxQ Credits : Data f= lit is ready for transmission but could not be sent", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent : TSV High", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.TSV_HI", - "PerPkg": "1", - "PublicDescription": "Data Flit Not Sent : TSV High : Data flit is= ready for transmission but could not be sent : data flit is ready for tran= smission but was not sent while tsv high", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent : Cycle valid for Flit", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.VALID_FOR_FLIT", - "PerPkg": "1", - "PublicDescription": "Data Flit Not Sent : Cycle valid for Flit : = Data flit is ready for transmission but could not be sent : data flit is re= ady for transmission but was not sent while cycle is valid for flit transmi= ssion", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence : Wait on Pu= mp 0", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT", - "PerPkg": "1", - "PublicDescription": "Generating BL Data Flit Sequence : Wait on P= ump 0 : generating bl data flit sequence; waiting for data pump 0", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT", - "PerPkg": "1", - "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is at capacity (pending table plus completion fifo at limit)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY", - "PerPkg": "1", - "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is tracking at least one message", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL", - "PerPkg": "1", - "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding completion fifo is full", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0", - "PerPkg": "1", - "PublicDescription": "Generating BL Data Flit Sequence : pump-1-pe= nding logic is at or near capacity, such that pump-0-only bl messages are g= etting stalled in slotting stage", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO", - "PerPkg": "1", - "PublicDescription": "Generating BL Data Flit Sequence : a bl mess= age finished but is in limbo and moved to pump-1-pending logic", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence : Wait on Pu= mp 1", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT", - "PerPkg": "1", - "PublicDescription": "Generating BL Data Flit Sequence : Wait on P= ump 1 : generating bl data flit sequence; waiting for data pump 1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF", - "PerPkg": "1", - "PublicDescription": ": slot 2 request naturally serviced during h= old-off period", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE", - "PerPkg": "1", - "PublicDescription": ": slot 2 request forcibly serviced during se= rvice window", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED", - "PerPkg": "1", - "PublicDescription": ": slot 2 request received from link layer wh= ile idle (with no slot 2 request active immediately prior)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN", - "PerPkg": "1", - "PublicDescription": ": slot 2 request withdrawn during hold-off p= eriod or service window", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit : All", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit : Needs = Data Flit", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA", - "PerPkg": "1", - "PublicDescription": "Slotting BL Message Into Header Flit : Needs= Data Flit : BL message requires data flit sequence", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit : Wait o= n Pump 0", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT", - "PerPkg": "1", - "PublicDescription": "Slotting BL Message Into Header Flit : Wait = on Pump 0 : Waiting for header pump 0", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ", - "PerPkg": "1", - "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 : Header pump 1 is not required for flit", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1 - Bubble", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE", - "PerPkg": "1", - "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 - Bubble : Header pump 1 is not required for flit but flit tra= nsmission delayed", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit : Don't = Need Pump 1 - Not Avail", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL", - "PerPkg": "1", - "PublicDescription": "Slotting BL Message Into Header Flit : Don't= Need Pump 1 - Not Avail : Header pump 1 is not required for flit and not a= vailable", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit : Wait o= n Pump 1", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT", - "PerPkg": "1", - "PublicDescription": "Slotting BL Message Into Header Flit : Wait = on Pump 1 : Waiting for header pump 1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1 : Accumulate", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Accumulate : Events re= lated to Header Flit Generation - Set 1 : Header flit slotting control stat= e machine is in any accumulate state; multi-message flit may be assembled o= ver multiple cycles", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1 : Accumulate Ready", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Accumulate Ready : Eve= nts related to Header Flit Generation - Set 1 : header flit slotting contro= l state machine is in accum_ready state; flit is ready to send but transmis= sion is blocked; more messages may be slotted into flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1 : Accumulate Wasted", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Accumulate Wasted : Ev= ents related to Header Flit Generation - Set 1 : Flit is being assembled ov= er multiple cycles, but no additional message is being slotted into flit in= current cycle; accumulate cycle is wasted", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Blocked", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Run-Ahead - Blocked : = Events related to Header Flit Generation - Set 1 : Header flit slotting ent= ered run-ahead state; new header flit is started while transmission of prio= r, fully assembled flit is blocked", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_AFTER", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: message was slotted only after= run-ahead was over; run-ahead mode definitely wasted", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Message", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_DURING", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Run-Ahead - Message : = Events related to Header Flit Generation - Set 1 : run-ahead mode: one mess= age slotted during run-ahead", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_AFTER", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: second message slotted immedia= tely after run-ahead; potential run-ahead success", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_SENT", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 1 : Events related to Head= er Flit Generation - Set 1 : run-ahead mode: two (or three) message flit se= nt immediately after run-ahead; complete run-ahead success", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2 : Parallel Ok", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 2 : Parallel Ok : Events r= elated to Header Flit Generation - Set 2 : new header flit construction may= proceed in parallel with data flit sequence", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2 : Parallel Flit Finished", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_FLIT", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 2 : Parallel Flit Finished= : Events related to Header Flit Generation - Set 2 : header flit finished = assembly in parallel with data flit sequence", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2 : Parallel Message", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_MSG", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 2 : Parallel Message : Eve= nts related to Header Flit Generation - Set 2 : message is slotted into hea= der flit in parallel with data flit sequence", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 2 : Rate-matching Stall : = Events related to Header Flit Generation - Set 2 : Rate-matching stall inje= cted", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall - N= o Message", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG", - "PerPkg": "1", - "PublicDescription": "Flit Gen - Header 2 : Rate-matching Stall - = No Message : Events related to Header Flit Generation - Set 2 : Rate matchi= ng stall injected, but no additional message slotted during stall cycle", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit : One Message", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG", - "PerPkg": "1", - "PublicDescription": "Sent Header Flit : One Message : One message= in flit; VNA or non-VNA flit", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit : One Message in non-VNA", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG_VNX", - "PerPkg": "1", - "PublicDescription": "Sent Header Flit : One Message in non-VNA : = One message in flit; non-VNA flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit : Two Messages", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.2_MSGS", - "PerPkg": "1", - "PublicDescription": "Sent Header Flit : Two Messages : Two messag= es in flit; VNA flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit : Three Messages", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.3_MSGS", - "PerPkg": "1", - "PublicDescription": "Sent Header Flit : Three Messages : Three me= ssages in flit; VNA flit", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit : One Slot Taken", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit : Two Slots Taken", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_2", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit : All Slots Taken", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_3", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent : All", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Header Not Sent : All : header flit is ready= for transmission but could not be sent : header flit is ready for transmis= sion but could not be sent for any reason, e.g. no credits, low tsv, stall = injection", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent : No BGF Credits", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_CRD", - "PerPkg": "1", - "PublicDescription": "Header Not Sent : No BGF Credits : header fl= it is ready for transmission but could not be sent : No BGF credits availab= le", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent : No BGF Credits + No Extra M= essage Slotted", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_NO_MSG", - "PerPkg": "1", - "PublicDescription": "Header Not Sent : No BGF Credits + No Extra = Message Slotted : header flit is ready for transmission but could not be se= nt : No BGF credits available; no additional message slotted into flit", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent : No TxQ Credits", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_CRD", - "PerPkg": "1", - "PublicDescription": "Header Not Sent : No TxQ Credits : header fl= it is ready for transmission but could not be sent : No TxQ credits availab= le", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent : No TxQ Credits + No Extra M= essage Slotted", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_NO_MSG", - "PerPkg": "1", - "PublicDescription": "Header Not Sent : No TxQ Credits + No Extra = Message Slotted : header flit is ready for transmission but could not be se= nt : No TxQ credits available; no additional message slotted into flit", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent : TSV High", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.TSV_HI", - "PerPkg": "1", - "PublicDescription": "Header Not Sent : TSV High : header flit is = ready for transmission but could not be sent : header flit is ready for tra= nsmission but was not sent while tsv high", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent : Cycle valid for Flit", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.VALID_FOR_FLIT", - "PerPkg": "1", - "PublicDescription": "Header Not Sent : Cycle valid for Flit : hea= der flit is ready for transmission but could not be sent : header flit is r= eady for transmission but was not sent while cycle is valid for flit transm= ission", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held : Can't Slot AD", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD", - "PerPkg": "1", - "PublicDescription": "Message Held : Can't Slot AD : some AD messa= ge could not be slotted (logical OR of all AD events under INGR_SLOT_CANT_M= C_VN{0,1})", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held : Can't Slot BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL", - "PerPkg": "1", - "PublicDescription": "Message Held : Can't Slot BL : some BL messa= ge could not be slotted (logical OR of all BL events under INGR_SLOT_CANT_M= C_VN{0,1})", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held : Parallel Attempt", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT", - "PerPkg": "1", - "PublicDescription": "Message Held : Parallel Attempt : ad and bl = messages attempted to slot into the same flit in parallel", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held : Parallel Success", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS", - "PerPkg": "1", - "PublicDescription": "Message Held : Parallel Success : ad and bl = messages were actually slotted into the same flit in paralle", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held : VN0", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_HELD.VN0", - "PerPkg": "1", - "PublicDescription": "Message Held : VN0 : vn0 message(s) that cou= ldn't be slotted into last vn0 flit are held in slotting stage while proces= sing vn1 flit", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held : VN1", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_HELD.VN1", - "PerPkg": "1", - "PublicDescription": "Message Held : VN1 : vn1 message(s) that cou= ldn't be slotted into last vn1 flit are held in slotting stage while proces= sing vn0 flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : REQ = on AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : REQ= on AD : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Home (REQ) messages on AD. REQ = is generally used to send requests, request responses, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP = on AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP= on AD : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Response (RSP) messages on AD. = RSP packets are used to transmit a variety of protocol flits including gran= ts and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : SNP = on AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : SNP= on AD : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Snoops (SNP) messages on AD. SN= P is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCB = on BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCB= on BL : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Non-Coherent Broadcast (NCB) mes= sages on BL. NCB is generally used to transmit data without coherency. Fo= r example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCS = on BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCS= on BL : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Non-Coherent Standard (NCS) mess= ages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP = on BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP= on BL : Counts the number of allocations into the UPI Ingress. This track= s one of the three rings that are used by the UPI agent. This can be used = in conjunction with the UPI Ingress Occupancy Accumulator event in order to= calculate average queue latency. Multiple ingress buffers can be tracked = at a given time using multiple counters. : Response (RSP) messages on BL. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : WB o= n BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Inserts : WB = on BL : Counts the number of allocations into the UPI Ingress. This tracks= one of the three rings that are used by the UPI agent. This can be used i= n conjunction with the UPI Ingress Occupancy Accumulator event in order to = calculate average queue latency. Multiple ingress buffers can be tracked a= t a given time using multiple counters. : Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : REQ = on AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : REQ= on AD : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Home (REQ) messages on= AD. REQ is generally used to send requests, request responses, and snoop = responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP = on AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP= on AD : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Response (RSP) message= s on AD. RSP packets are used to transmit a variety of protocol flits incl= uding grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : SNP = on AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : SNP= on AD : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Snoops (SNP) messages = on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCB = on BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCB= on BL : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Non-Coherent Broadcast= (NCB) messages on BL. NCB is generally used to transmit data without cohe= rency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCS = on BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCS= on BL : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Non-Coherent Standard = (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP = on BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP= on BL : Counts the number of allocations into the UPI VN1 Ingress. This = tracks one of the three rings that are used by the UPI agent. This can be = used in conjunction with the UPI VN1 Ingress Occupancy Accumulator event i= n order to calculate average queue latency. Multiple ingress buffers can b= e tracked at a given time using multiple counters. : Response (RSP) message= s on BL. RSP packets are used to transmit a variety of protocol flits inclu= ding grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : WB o= n BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Inserts : WB = on BL : Counts the number of allocations into the UPI VN1 Ingress. This t= racks one of the three rings that are used by the UPI agent. This can be u= sed in conjunction with the UPI VN1 Ingress Occupancy Accumulator event in= order to calculate average queue latency. Multiple ingress buffers can be= tracked at a given time using multiple counters. : Data Response (WB) mess= ages on BL. WB is generally used to transmit data with coherency. For exa= mple, remote reads and writes, or cache to cache transfers will transmit th= eir data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RE= Q on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : R= EQ on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Home (REQ) messages on AD. REQ is generally used to se= nd requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RS= P on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : R= SP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on AD. RSP packets are used to= transmit a variety of protocol flits including grants and completions (CMP= ).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : SN= P on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : S= NP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Snoops (SNP) messages on AD. SNP is used for outgoing = snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : NC= B on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : N= CB on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Broadcast (NCB) messages on BL. NCB is ge= nerally used to transmit data without coherency. For example, non-coherent= read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : NC= S on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : N= CS on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RS= P on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : R= SP on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on BL. RSP packets are used to = transmit a variety of protocol flits including grants and completions (CMP)= .", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : WB= on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 Ingress (from CMS) Queue - Occupancy : W= B on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in ea= ch cycle. This tracks one of the three ring Ingress buffers. This can be = used with the UPI VN1 Ingress Not Empty event to calculate average occupan= cy or the UPI VN1 Ingress Allocations event in order to calculate average = queuing latency. : Data Response (WB) messages on BL. WB is generally used= to transmit data with coherency. For example, remote reads and writes, or= cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RE= Q on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : R= EQ on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Home (REQ) messages on AD. REQ is generally used to se= nd requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RS= P on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : R= SP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on AD. RSP packets are used to= transmit a variety of protocol flits including grants and completions (CMP= ).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : SN= P on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : S= NP on AD : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Snoops (SNP) messages on AD. SNP is used for outgoing = snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : NC= B on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : N= CB on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Broadcast (NCB) messages on BL. NCB is ge= nerally used to transmit data without coherency. For example, non-coherent= read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : NC= S on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : N= CS on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RS= P on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : R= SP on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in e= ach cycle. This tracks one of the three ring Ingress buffers. This can be= used with the UPI VN1 Ingress Not Empty event to calculate average occupa= ncy or the UPI VN1 Ingress Allocations event in order to calculate average= queuing latency. : Response (RSP) messages on BL. RSP packets are used to = transmit a variety of protocol flits including grants and completions (CMP)= .", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : WB= on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 Ingress (from CMS) Queue - Occupancy : W= B on BL : Accumulates the occupancy of a given UPI VN1 Ingress queue in ea= ch cycle. This tracks one of the three ring Ingress buffers. This can be = used with the UPI VN1 Ingress Not Empty event to calculate average occupan= cy or the UPI VN1 Ingress Allocations event in order to calculate average = queuing latency. : Data Response (WB) messages on BL. WB is generally used= to transmit data with coherency. For example, remote reads and writes, or= cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit : REQ on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 message can't slot into flit : REQ on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Home (REQ) messages on AD. REQ is generally used to send re= quests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit : RSP on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message can't slot into flit : RSP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on AD. RSP packets are used to tran= smit a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit : SNP on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 message can't slot into flit : SNP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Snoops (SNP) messages on AD. SNP is used for outgoing snoop= s.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit : NCB on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 message can't slot into flit : NCB on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Broadcast (NCB) messages on BL. NCB is general= ly used to transmit data without coherency. For example, non-coherent read= data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit : NCS on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 message can't slot into flit : NCS on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit : RSP on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message can't slot into flit : RSP on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on BL. RSP packets are used to trans= mit a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit : WB on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 message can't slot into flit : WB on BL = : Count cases where Ingress has packets to send but did not have time to pa= ck into flit before sending to Agent so slot was left NULL which could have= been used. : Data Response (WB) messages on BL. WB is generally used to t= ransmit data with coherency. For example, remote reads and writes, or cach= e to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit : REQ on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 message can't slot into flit : REQ on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Home (REQ) messages on AD. REQ is generally used to send re= quests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit : RSP on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message can't slot into flit : RSP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on AD. RSP packets are used to tran= smit a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit : SNP on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 message can't slot into flit : SNP on AD= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Snoops (SNP) messages on AD. SNP is used for outgoing snoop= s.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit : NCB on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 message can't slot into flit : NCB on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Broadcast (NCB) messages on BL. NCB is general= ly used to transmit data without coherency. For example, non-coherent read= data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit : NCS on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 message can't slot into flit : NCS on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit : RSP on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message can't slot into flit : RSP on BL= : Count cases where Ingress has packets to send but did not have time to p= ack into flit before sending to Agent so slot was left NULL which could hav= e been used. : Response (RSP) messages on BL. RSP packets are used to trans= mit a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit : WB on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 message can't slot into flit : WB on BL = : Count cases where Ingress has packets to send but did not have time to pa= ck into flit before sending to Agent so slot was left NULL which could have= been used. : Data Response (WB) messages on BL. WB is generally used to t= ransmit data with coherency. For example, remote reads and writes, or cach= e to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits : Any In Use", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE", - "PerPkg": "1", - "PublicDescription": "Remote VNA Credits : Any In Use : At least o= ne remote vna credit is in use", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits : Corrected", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED", - "PerPkg": "1", - "PublicDescription": "Remote VNA Credits : Corrected : Number of r= emote vna credits corrected (local return) per cycle", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits : Level < 1", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1", - "PerPkg": "1", - "PublicDescription": "Remote VNA Credits : Level < 1 : Remote vna = credit level is less than 1 (i.e. no vna credits available)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits : Level < 10", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT10", - "PerPkg": "1", - "PublicDescription": "Remote VNA Credits : Level < 10 : remote vna= credit level is less than 10; parallel vn0/vn1 arb not possible", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits : Level < 4", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4", - "PerPkg": "1", - "PublicDescription": "Remote VNA Credits : Level < 4 : Remote vna = credit level is less than 4; bl (or ad requiring 4 vna) cannot arb on vna", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits : Level < 5", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5", - "PerPkg": "1", - "PublicDescription": "Remote VNA Credits : Level < 5 : Remote vna = credit level is less than 5; parallel ad/bl arb on vna not possible", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5", - "PerPkg": "1", - "PublicDescription": ": remote vna credit count was less than 5 an= d allocation to ad or bl messages was required", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT1= 0", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT10", - "PerPkg": "1", - "PublicDescription": ": remote vna credit count was less than 10 a= nd allocation to vn0 or vn1 was required", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD", - "PerPkg": "1", - "PublicDescription": ": on vn0, remote vna credits were allocated = only to ad messages, not to bl", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL", - "PerPkg": "1", - "PublicDescription": ": on vn0, remote vna credits were allocated = only to bl messages, not to ad", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY", - "PerPkg": "1", - "PublicDescription": ": remote vna credits were allocated only to = vn0, not to vn1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD", - "PerPkg": "1", - "PublicDescription": ": on vn1, remote vna credits were allocated = only to ad messages, not to bl", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL", - "PerPkg": "1", - "PublicDescription": ": on vn1, remote vna credits were allocated = only to bl messages, not to ad", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY", - "PerPkg": "1", - "PublicDescription": ": remote vna credits were allocated only to = vn1, not to vn0", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE5", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE5", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xE2", - "EventName": "UNC_M3UPI_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xE3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xE1", - "EventName": "UNC_M3UPI_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xE0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD1", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD1", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD1", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD3", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD3", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD3", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD5", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD5", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD5", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD7", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD7", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD7", - "EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN0 REQ Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN0 REQ Messages : AD ar= b but no win; arb request asserted but not won", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN0 RSP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN0 RSP Messages : AD ar= b but no win; arb request asserted but not won", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN0 SNP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN0 SNP Messages : AD ar= b but no win; arb request asserted but not won", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN0 WB Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN0 WB Messages : AD arb= but no win; arb request asserted but not won", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN1 REQ Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN1 REQ Messages : AD ar= b but no win; arb request asserted but not won", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN1 RSP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN1 RSP Messages : AD ar= b but no win; arb request asserted but not won", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN1 SNP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN1 SNP Messages : AD ar= b but no win; arb request asserted but not won", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD : VN1 WB Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Failed ARB for AD : VN1 WB Messages : AD arb= but no win; arb request asserted but not won", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0", - "PerPkg": "1", - "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1", - "PerPkg": "1", - "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2", - "PerPkg": "1", - "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP", - "PerPkg": "1", - "PublicDescription": "AD FlowQ Bypass : Counts cases when the AD f= lowQ is bypassed (S0, S1 and S2 indicate which slot was bypassed with S0 ha= ving the highest priority and S2 the least)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN0 REQ Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN0 REQ Messages : Num= ber of cycles the AD Egress queue is Not Empty", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN0 RSP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN0 RSP Messages : Num= ber of cycles the AD Egress queue is Not Empty", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN0 SNP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN0 SNP Messages : Num= ber of cycles the AD Egress queue is Not Empty", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN0 WB Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN0 WB Messages : Numb= er of cycles the AD Egress queue is Not Empty", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN1 REQ Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN1 REQ Messages : Num= ber of cycles the AD Egress queue is Not Empty", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN1 RSP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN1 RSP Messages : Num= ber of cycles the AD Egress queue is Not Empty", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN1 SNP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN1 SNP Messages : Num= ber of cycles the AD Egress queue is Not Empty", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty : VN1 WB Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Not Empty : VN1 WB Messages : Numb= er of cycles the AD Egress queue is Not Empty", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts : VN0 REQ Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Inserts : VN0 REQ Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts : VN0 RSP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Inserts : VN0 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts : VN0 SNP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Inserts : VN0 SNP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts : VN0 WB Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Inserts : VN0 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts : VN1 REQ Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Inserts : VN1 REQ Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts : VN1 RSP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Inserts : VN1 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts : VN1 SNP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD Flow Q Inserts : VN1 SNP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy : VN0 REQ Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy : VN0 RSP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_RSP", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy : VN0 SNP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_SNP", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy : VN0 WB Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_WB", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy : VN1 REQ Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_REQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy : VN1 RSP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_RSP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy : VN1 SNP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_SNP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AK Flow Q Inserts", - "EventCode": "0x2F", - "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AK Flow Q Occupancy", - "EventCode": "0x1E", - "EventName": "UNC_M3UPI_TxC_AK_FLQ_OCCUPANCY", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN0 NCB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN0 NCB Messages : BL ar= b but no win; arb request asserted but not won", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN0 NCS Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN0 NCS Messages : BL ar= b but no win; arb request asserted but not won", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN0 RSP Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN0 RSP Messages : BL ar= b but no win; arb request asserted but not won", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN0 WB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN0 WB Messages : BL arb= but no win; arb request asserted but not won", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN1 NCS Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN1 NCS Messages : BL ar= b but no win; arb request asserted but not won", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN1 NCB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN1 NCB Messages : BL ar= b but no win; arb request asserted but not won", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN1 RSP Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN1 RSP Messages : BL ar= b but no win; arb request asserted but not won", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL : VN1 WB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Failed ARB for BL : VN1 WB Messages : BL arb= but no win; arb request asserted but not won", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN0 REQ Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN0 REQ Messages : Num= ber of cycles the BL Egress queue is Not Empty", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN0 RSP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN0 RSP Messages : Num= ber of cycles the BL Egress queue is Not Empty", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN0 SNP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN0 SNP Messages : Num= ber of cycles the BL Egress queue is Not Empty", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN0 WB Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN0 WB Messages : Numb= er of cycles the BL Egress queue is Not Empty", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN1 REQ Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN1 REQ Messages : Num= ber of cycles the BL Egress queue is Not Empty", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN1 RSP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN1 RSP Messages : Num= ber of cycles the BL Egress queue is Not Empty", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN1 SNP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN1 SNP Messages : Num= ber of cycles the BL Egress queue is Not Empty", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty : VN1 WB Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Not Empty : VN1 WB Messages : Numb= er of cycles the BL Egress queue is Not Empty", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN0 RSP Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN0 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN0 WB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN0 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN0 NCS Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN0 NCS Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN0 NCB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN0 NCB Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN1 RSP Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN1 RSP Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN1 WB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN1 WB Messages : Counts= the number of allocations into the QPI FlowQ. This can be used in conjunct= ion with the QPI FlowQ Occupancy Accumulator event in order to calculate av= erage queue latency. Only a single FlowQ queue can be tracked at any given= time. It is not possible to filter based on direction or polarity.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN1_NCB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN1_NCB Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts : VN1_NCS Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL Flow Q Inserts : VN1_NCS Messages : Count= s the number of allocations into the QPI FlowQ. This can be used in conjunc= tion with the QPI FlowQ Occupancy Accumulator event in order to calculate a= verage queue latency. Only a single FlowQ queue can be tracked at any give= n time. It is not possible to filter based on direction or polarity.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN0 NCB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN0 NCS Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN0 RSP Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_RSP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN0 WB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_WB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN1_NCS Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN1_NCB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN1 RSP Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_RSP", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN1 WB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_WB", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN0 RSP Messages", - "EventCode": "0x1F", - "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_LOCAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN0 WB Messages", - "EventCode": "0x1F", - "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_THROUGH", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN0 NCB Messages", - "EventCode": "0x1F", - "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN0_WRPULL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN1 RSP Messages", - "EventCode": "0x1F", - "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_LOCAL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN1 WB Messages", - "EventCode": "0x1F", - "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_THROUGH", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy : VN1_NCS Messages", - "EventCode": "0x1F", - "EventName": "UNC_M3UPI_TxC_BL_WB_FLQ_OCCUPANCY.VN1_WRPULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty : VN0 REQ Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "UPI0 AD Credits Empty : VN0 REQ Messages : N= o credits available to send to UPIs on the AD Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty : VN0 RSP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "UPI0 AD Credits Empty : VN0 RSP Messages : N= o credits available to send to UPIs on the AD Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty : VN0 SNP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "UPI0 AD Credits Empty : VN0 SNP Messages : N= o credits available to send to UPIs on the AD Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty : VN1 REQ Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "UPI0 AD Credits Empty : VN1 REQ Messages : N= o credits available to send to UPIs on the AD Ring", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty : VN1 RSP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "UPI0 AD Credits Empty : VN1 RSP Messages : N= o credits available to send to UPIs on the AD Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty : VN1 SNP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "UPI0 AD Credits Empty : VN1 SNP Messages : N= o credits available to send to UPIs on the AD Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty : VNA", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "UPI0 AD Credits Empty : VNA : No credits ava= ilable to send to UPIs on the AD Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty : VN0 RSP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB", - "PerPkg": "1", - "PublicDescription": "UPI0 BL Credits Empty : VN0 RSP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty : VN0 REQ Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "UPI0 BL Credits Empty : VN0 REQ Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty : VN0 SNP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB", - "PerPkg": "1", - "PublicDescription": "UPI0 BL Credits Empty : VN0 SNP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty : VN1 RSP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB", - "PerPkg": "1", - "PublicDescription": "UPI0 BL Credits Empty : VN1 RSP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty : VN1 REQ Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "UPI0 BL Credits Empty : VN1 REQ Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty : VN1 SNP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB", - "PerPkg": "1", - "PublicDescription": "UPI0 BL Credits Empty : VN1 SNP Messages : N= o credits available to send to UPI on the BL Ring (diff between non-SMI and= SMI mode)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty : VNA", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "UPI0 BL Credits Empty : VNA : No credits ava= ilable to send to UPI on the BL Ring (diff between non-SMI and SMI mode)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "FlowQ Generated Prefetch", - "EventCode": "0x29", - "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", - "PerPkg": "1", - "PublicDescription": "FlowQ Generated Prefetch : Count cases where= FlowQ causes spawn of Prefetch to iMC/SMI3 target", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xB5", - "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xB5", - "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used : WB on BL", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "VN0 Credit Used : WB on BL : Number of times= a VN0 credit was used on the DRS message channel. In order for a request = to be transferred across UPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN0.= VNA is a shared pool used to achieve high performance. The VN0 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN0 if= they fail. This counts the number of times a VN0 credit was used. Note t= hat a single VN0 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN0 will only count a single credit ev= en though it may use multiple buffers. : Data Response (WB) messages on BL.= WB is generally used to transmit data with coherency. For example, remot= e reads and writes, or cache to cache transfers will transmit their data us= ing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used : NCB on BL", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "VN0 Credit Used : NCB on BL : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used : REQ on AD", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ", - "PerPkg": "1", - "PublicDescription": "VN0 Credit Used : REQ on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used : RSP on AD", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP", - "PerPkg": "1", - "PublicDescription": "VN0 Credit Used : RSP on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used : SNP on AD", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "VN0 Credit Used : SNP on AD : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used : RSP on BL", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB", - "PerPkg": "1", - "PublicDescription": "VN0 Credit Used : RSP on BL : Number of time= s a VN0 credit was used on the DRS message channel. In order for a request= to be transferred across UPI, it must be guaranteed to have a flit buffer = on the remote socket to sink into. There are two credit pools, VNA and VN0= . VNA is a shared pool used to achieve high performance. The VN0 pool has= reserved entries for each message class and is used to prevent deadlock. = Requests first attempt to acquire a VNA credit, and then fall back to VN0 i= f they fail. This counts the number of times a VN0 credit was used. Note = that a single VN0 credit holds access to potentially multiple flit buffers.= For example, a transfer that uses VNA could use 9 flit buffers and in tha= t case uses 9 credits. A transfer on VN0 will only count a single credit e= ven though it may use multiple buffers. : Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits : WB on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB", - "PerPkg": "1", - "PublicDescription": "VN0 No Credits : WB on BL : Number of Cycles= there were no VN0 Credits : Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits : NCB on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS", - "PerPkg": "1", - "PublicDescription": "VN0 No Credits : NCB on BL : Number of Cycle= s there were no VN0 Credits : Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, no= n-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits : REQ on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ", - "PerPkg": "1", - "PublicDescription": "VN0 No Credits : REQ on AD : Number of Cycle= s there were no VN0 Credits : Home (REQ) messages on AD. REQ is generally = used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits : RSP on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP", - "PerPkg": "1", - "PublicDescription": "VN0 No Credits : RSP on AD : Number of Cycle= s there were no VN0 Credits : Response (RSP) messages on AD. RSP packets a= re used to transmit a variety of protocol flits including grants and comple= tions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits : SNP on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP", - "PerPkg": "1", - "PublicDescription": "VN0 No Credits : SNP on AD : Number of Cycle= s there were no VN0 Credits : Snoops (SNP) messages on AD. SNP is used for= outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits : RSP on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB", - "PerPkg": "1", - "PublicDescription": "VN0 No Credits : RSP on BL : Number of Cycle= s there were no VN0 Credits : Response (RSP) messages on BL. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used : WB on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "VN1 Credit Used : WB on BL : Number of times= a VN1 credit was used on the WB message channel. In order for a request t= o be transferred across QPI, it must be guaranteed to have a flit buffer on= the remote socket to sink into. There are two credit pools, VNA and VN1. = VNA is a shared pool used to achieve high performance. The VN1 pool has r= eserved entries for each message class and is used to prevent deadlock. Re= quests first attempt to acquire a VNA credit, and then fall back to VN1 if = they fail. This counts the number of times a VN1 credit was used. Note th= at a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that = case uses 9 credits. A transfer on VN1 will only count a single credit eve= n though it may use multiple buffers. : Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote= reads and writes, or cache to cache transfers will transmit their data usi= ng WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used : NCB on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "VN1 Credit Used : NCB on BL : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Non-Coherent Broadcast (NCB) messa= ges on BL. NCB is generally used to transmit data without coherency. For = example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used : REQ on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ", - "PerPkg": "1", - "PublicDescription": "VN1 Credit Used : REQ on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Home (REQ) messages on AD. REQ is= generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used : RSP on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP", - "PerPkg": "1", - "PublicDescription": "VN1 Credit Used : RSP on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Response (RSP) messages on AD. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used : SNP on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "VN1 Credit Used : SNP on AD : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Snoops (SNP) messages on AD. SNP = is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used : RSP on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB", - "PerPkg": "1", - "PublicDescription": "VN1 Credit Used : RSP on BL : Number of time= s a VN1 credit was used on the WB message channel. In order for a request = to be transferred across QPI, it must be guaranteed to have a flit buffer o= n the remote socket to sink into. There are two credit pools, VNA and VN1.= VNA is a shared pool used to achieve high performance. The VN1 pool has = reserved entries for each message class and is used to prevent deadlock. R= equests first attempt to acquire a VNA credit, and then fall back to VN1 if= they fail. This counts the number of times a VN1 credit was used. Note t= hat a single VN1 credit holds access to potentially multiple flit buffers. = For example, a transfer that uses VNA could use 9 flit buffers and in that= case uses 9 credits. A transfer on VN1 will only count a single credit ev= en though it may use multiple buffers. : Response (RSP) messages on BL. RSP= packets are used to transmit a variety of protocol flits including grants = and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits : WB on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB", - "PerPkg": "1", - "PublicDescription": "VN1 No Credits : WB on BL : Number of Cycles= there were no VN1 Credits : Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits : NCB on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS", - "PerPkg": "1", - "PublicDescription": "VN1 No Credits : NCB on BL : Number of Cycle= s there were no VN1 Credits : Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, no= n-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits : REQ on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ", - "PerPkg": "1", - "PublicDescription": "VN1 No Credits : REQ on AD : Number of Cycle= s there were no VN1 Credits : Home (REQ) messages on AD. REQ is generally = used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits : RSP on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP", - "PerPkg": "1", - "PublicDescription": "VN1 No Credits : RSP on AD : Number of Cycle= s there were no VN1 Credits : Response (RSP) messages on AD. RSP packets a= re used to transmit a variety of protocol flits including grants and comple= tions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits : SNP on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP", - "PerPkg": "1", - "PublicDescription": "VN1 No Credits : SNP on AD : Number of Cycle= s there were no VN1 Credits : Snoops (SNP) messages on AD. SNP is used for= outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits : RSP on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB", - "PerPkg": "1", - "PublicDescription": "VN1 No Credits : RSP on BL : Number of Cycle= s there were no VN1 Credits : Response (RSP) messages on BL. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LO= CALDEST_VN0", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST= _VN0", - "PerPkg": "1", - "UMask": "0x82", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LO= CALDEST_VN1", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST= _VN1", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LO= CALDEST_VN0", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST= _VN0", - "PerPkg": "1", - "UMask": "0x81", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LO= CALDEST_VN1", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST= _VN1", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LO= CALDEST_VN0", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST= _VN0", - "PerPkg": "1", - "UMask": "0x84", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LO= CALDEST_VN1", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST= _VN1", - "PerPkg": "1", - "UMask": "0xc0", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1", - "EventCode": "0x7E", - "EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1", - "EventCode": "0x7D", - "EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARB", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_XPT_PFTCH.ARB", - "PerPkg": "1", - "PublicDescription": ": xpt prefetch message is making arbitration= request", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARRIVED", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_XPT_PFTCH.ARRIVED", - "PerPkg": "1", - "PublicDescription": ": xpt prefetch message arrived in ingress pi= peline", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_XPT_PFTCH.BYPASS", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_XPT_PFTCH.BYPASS", - "PerPkg": "1", - "PublicDescription": ": xpt prefetch message took bypass path", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_XPT_PFTCH.FLITTED", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_XPT_PFTCH.FLITTED", - "PerPkg": "1", - "PublicDescription": ": xpt prefetch message was slotted into flit= (non bypass)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_ARB", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_ARB", - "PerPkg": "1", - "PublicDescription": ": xpt prefetch message lost arbitration", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_OLD", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_OLD", - "PerPkg": "1", - "PublicDescription": ": xpt prefetch message was dropped because i= t became too old", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL", - "PerPkg": "1", - "PublicDescription": ": xpt prefetch message was dropped because i= t was overwritten by new message while prefetch queue was full", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of kfclks", - "EventCode": "0x01", - "EventName": "UNC_UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of kfclks : Counts the number of cloc= ks in the UPI LL. This clock runs at 1/8th the GT/s speed of the UPI link.= For example, a 8GT/s link will have qfclk or 1GHz. Current products do n= ot support dynamic link speeds, so this frequency is fixed.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Direct packet attempts : D2C", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", - "PerPkg": "1", - "PublicDescription": "Direct packet attempts : D2C : Counts the nu= mber of DRS packets that we attempted to do direct2core/direct2UPI on. The= re are 4 mutually exclusive filters. Filter [0] can be used to get success= ful spawns, while [1:3] provide the different failure cases. Note that thi= s does not count packets that are not candidates for Direct2Core. The only= candidates for Direct2Core are DRS packets destined for Cbos.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Direct packet attempts : D2K", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K", - "PerPkg": "1", - "PublicDescription": "Direct packet attempts : D2K : Counts the nu= mber of DRS packets that we attempted to do direct2core/direct2UPI on. The= re are 4 mutually exclusive filters. Filter [0] can be used to get success= ful spawns, while [1:3] provide the different failure cases. Note that thi= s does not count packets that are not candidates for Direct2Core. The only= candidates for Direct2Core are DRS packets destined for Cbos.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L1", - "EventCode": "0x21", - "EventName": "UNC_UPI_L1_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Cycles in L1 : Number of UPI qfclk cycles sp= ent in L1 power mode. L1 is a mode that totally shuts down a UPI link. Us= e edge detect to count the number of instances when the UPI link entered L1= . Link power states are per link and per direction, so for example the Tx = direction could be in one state while Rx was in another. Because L1 totally= shuts down the link, it takes a good amount of time to exit this mode.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED", - "EventCode": "0x16", - "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THR= ESH", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THR= ESH", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1", - "EventCode": "0x20", - "EventName": "UNC_UPI_PHY_INIT_CYCLES", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "L1 Req Nack", - "EventCode": "0x23", - "EventName": "UNC_UPI_POWER_L1_NACK", - "PerPkg": "1", - "PublicDescription": "L1 Req Nack : Counts the number of times a l= ink sends/receives a LinkReqNAck. When the UPI links would like to change = power state, the Tx side initiates a request to the Rx side requesting to c= hange states. This requests can either be accepted or denied. If the Rx s= ide replies with an Ack, the power mode will change. If it replies with NA= ck, no change will take place. This can be filtered based on Rx and Tx. A= n Rx LinkReqNAck refers to receiving an NAck (meaning this agent's Tx origi= nally requested the power change). A Tx LinkReqNAck refers to sending this= command (meaning the peer agent's Tx originally requested the power change= and this agent accepted it).", - "Unit": "UPI LL" - }, - { - "BriefDescription": "L1 Req (same as L1 Ack).", - "EventCode": "0x22", - "EventName": "UNC_UPI_POWER_L1_REQ", - "PerPkg": "1", - "PublicDescription": "L1 Req (same as L1 Ack). : Counts the number= of times a link sends/receives a LinkReqAck. When the UPI links would lik= e to change power state, the Tx side initiates a request to the Rx side req= uesting to change states. This requests can either be accepted or denied. = If the Rx side replies with an Ack, the power mode will change. If it rep= lies with NAck, no change will take place. This can be filtered based on R= x and Tx. An Rx LinkReqAck refers to receiving an Ack (meaning this agent'= s Tx originally requested the power change). A Tx LinkReqAck refers to sen= ding this command (meaning the peer agent's Tx originally requested the pow= er change and this agent accepted it).", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0p", - "EventCode": "0x25", - "EventName": "UNC_UPI_RxL0P_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles s= pent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lane= s, decreasing our bandwidth in order to save power. It increases snoop and= data transfer latencies and decreases overall bandwidth. This mode can be= very useful in NUMA optimized workloads that largely only utilize UPI for = snoops and their responses. Use edge detect to count the number of instanc= es when the UPI link entered L0p. Link power states are per link and per d= irection, so for example the Tx direction could be in one state while Rx wa= s in another.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0", - "EventCode": "0x24", - "EventName": "UNC_UPI_RxL0_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Cycles in L0 : Number of UPI qfclk cycles sp= ent in L0 power mode in the Link Layer. L0 is the default mode which provi= des the highest performance with the most power. Use edge detect to count = the number of instances that the link entered L0. Link power states are pe= r link and per direction, so for example the Tx direction could be in one s= tate while Rx was in another. The phy layer sometimes leaves L0 for train= ing, which will not be captured by this event.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Bypass, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Bypass, Match Opcode : Matches on Receive path of a UPI port.\r\nM= atch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Messag= e Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\= r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: D= ual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control type= s are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match= _en cases.\r\nNote: If Message Class is disabled, we expect opcode to also = be disabled.", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard : Matches on Receive path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-C= oherent Standard, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Non-= Coherent Standard, Match Opcode : Matches on Receive path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Reque= st", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Requ= est : Matches on Receive path of a UPI port.\r\nMatch based on UMask specif= ic bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcod= e (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: = Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: = Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, s= lot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Mes= sage Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Reque= st, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Requ= est, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", - "UMask": "0x108", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Conflict", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Conflict : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x1aa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Invalid", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Invalid : Matches on Receive path of a UPI port.\r\nMatch based on U= Mask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\= r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote En= able\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr En= able\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded = (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nN= ote: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x12a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Data", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Data : Matches on Receive path of a UPI port.\r\nMatch based on UMas= k specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\n= W: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enabl= e\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enabl= e\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL= CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote= : If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - Data, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - Data, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch= based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Cl= ass Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT= : Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual = Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types ar= e excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en = cases.\r\nNote: If Message Class is disabled, we expect opcode to also be d= isabled.", - "UMask": "0x10c", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - No Data", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - No Data : Matches on Receive path of a UPI port.\r\nMatch based on U= Mask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\= r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote En= able\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr En= able\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded = (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nN= ote: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Respo= nse - No Data, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Resp= onse - No Data, Match Opcode : Matches on Receive path of a UPI port.\r\nMa= tch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message= Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r= \nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Du= al Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types= are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_= en cases.\r\nNote: If Message Class is disabled, we expect opcode to also b= e disabled.", - "UMask": "0x10a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Snoop= ", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Snoo= p : Matches on Receive path of a UPI port.\r\nMatch based on UMask specific= bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode = (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Da= ta Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Si= ngle Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slo= t NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Messa= ge Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Snoop= , Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Snoo= p, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based on = UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable= \r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote E= nable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr E= nable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded= (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\n= Note: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x109", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Write= back", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Writ= eback : Matches on Receive path of a UPI port.\r\nMatch based on UMask spec= ific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opc= ode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS= : Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP= : Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL,= slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If M= essage Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port : Write= back, Match Opcode", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Receive path of a UPI Port : Writ= eback, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", - "UMask": "0x10d", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 0 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 1 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 2 : Counts t= he number of times that an incoming flit was able to bypass the flit buffer= and pass directly across the BGF and into the Egress. This is a latency o= ptimization, and should generally be the common case. If this value is les= s than the number of flits transferred, it implies that there was queueing = getting onto the ring, and thus the transactions saw higher latency.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "CRC Errors Detected", - "EventCode": "0x0B", - "EventName": "UNC_UPI_RxL_CRC_ERRORS", - "PerPkg": "1", - "PublicDescription": "CRC Errors Detected : Number of CRC errors d= etected in the UPI Agent. Each UPI flit incorporates 8 bits of CRC for err= or detection. This counts the number of flits where the CRC was able to de= tect an error. After an error has been detected, the UPI agent will send a= request to the transmitting socket to resend the flit (as well as any flit= s that came after it).", - "Unit": "UPI LL" - }, - { - "BriefDescription": "LLR Requests Sent", - "EventCode": "0x08", - "EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT", - "PerPkg": "1", - "PublicDescription": "LLR Requests Sent : Number of LLR Requests w= ere transmitted. This should generally be <=3D the number of CRC errors de= tected. If multiple errors are detected before the Rx side receives a LLC_= REQ_ACK from the Tx side, there is no need to send more LLR_REQ_NACKs.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VN0 Credit Consumed", - "EventCode": "0x39", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0", - "PerPkg": "1", - "PublicDescription": "VN0 Credit Consumed : Counts the number of t= imes that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VN1 Credit Consumed", - "EventCode": "0x3A", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1", - "PerPkg": "1", - "PublicDescription": "VN1 Credit Consumed : Counts the number of t= imes that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VNA Credit Consumed", - "EventCode": "0x38", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA", - "PerPkg": "1", - "PublicDescription": "VNA Credit Consumed : Counts the number of t= imes that an RxQ VNA credit was consumed (i.e. message uses a VNA credit fo= r the Rx Buffer). This includes packets that went through the RxQ and thos= e that were bypasssed.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : All Data", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : All Data : Shows lega= l flit time (hides impact of L0p and L0c).", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Null FLITs received fr= om any slot", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Null FLITs received f= rom any slot : Shows legal flit time (hides impact of L0p and L0c).", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Data", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Data : Shows legal fl= it time (hides impact of L0p and L0c). : Count Data Flits (which consume al= l slots), but how much to count is based on Slot0-2 mask, so count can be 0= -3 depending on which slots are enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Null FLITs received fr= om any slot", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Null FLITs received f= rom any slot : Shows legal flit time (hides impact of L0p and L0c).", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : LLCRD Not Empty", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : LLCRD Not Empty : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables counting of LLC= RD (with non-zero payload). This only applies to slot 2 since LLCRD is only= allowed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : LLCTRL", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : LLCTRL : Shows legal = flit time (hides impact of L0p and L0c). : Equivalent to an idle packet. E= nables counting of slot 0 LLCTRL messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : All Non Data", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : All Non Data : Shows = legal flit time (hides impact of L0p and L0c).", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Emp= ty", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.NULL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot NULL or LLCRD Em= pty : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all= zeros is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dua= l slot. This can apply to slot 0,1, or 2.", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Protocol Header", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Protocol Header : Sho= ws legal flit time (hides impact of L0p and L0c). : Enables count of protoc= ol headers in slot 0,1,2 (depending on slot uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot 0", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot 0 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits d= etermine types of headers to count.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot 1", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot 1 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits d= etermine types of headers to count.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received : Slot 2", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Valid Flits Received : Slot 2 : Shows legal = flit time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits d= etermine types of headers to count.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 0", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Allocations : Slot 0 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 1", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Allocations : Slot 1 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 2", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", - "PerPkg": "1", - "PublicDescription": "RxQ Flit Buffer Allocations : Slot 2 : Numbe= r of allocations into the UPI Rx Flit Buffer. Generally, when data is tran= smitted across UPI, it will bypass the RxQ and pass directly to the ring in= terface. If things back up getting transmitted onto the ring, however, it = may need to allocate into this buffer, thus increasing the latency. This e= vent can be used in conjunction with the Flit Buffer Occupancy event in ord= er to calculate the average flit buffer lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 0", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", - "PerPkg": "1", - "PublicDescription": "RxQ Occupancy - All Packets : Slot 0 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 1", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", - "PerPkg": "1", - "PublicDescription": "RxQ Occupancy - All Packets : Slot 1 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 2", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", - "PerPkg": "1", - "PublicDescription": "RxQ Occupancy - All Packets : Slot 2 : Accum= ulates the number of elements in the UPI RxQ in each cycle. Generally, whe= n data is transmitted across UPI, it will bypass the RxQ and pass directly = to the ring interface. If things back up getting transmitted onto the ring= , however, it may need to allocate into this buffer, thus increasing the la= tency. This event can be used in conjunction with the Flit Buffer Not Empt= y event to calculate average occupancy, or with the Flit Buffer Allocations= event to track average lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0p", - "EventCode": "0x27", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles s= pent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lane= s, decreasing our bandwidth in order to save power. It increases snoop and= data transfer latencies and decreases overall bandwidth. This mode can be= very useful in NUMA optimized workloads that largely only utilize UPI for = snoops and their responses. Use edge detect to count the number of instanc= es when the UPI link entered L0p. Link power states are per link and per d= irection, so for example the Tx direction could be in one state while Rx wa= s in another.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", - "EventCode": "0x28", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", - "EventCode": "0x29", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0", - "EventCode": "0x26", - "EventName": "UNC_UPI_TxL0_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Cycles in L0 : Number of UPI qfclk cycles sp= ent in L0 power mode in the Link Layer. L0 is the default mode which provi= des the highest performance with the most power. Use edge detect to count = the number of instances that the link entered L0. Link power states are pe= r link and per direction, so for example the Tx direction could be in one s= tate while Rx was in another. The phy layer sometimes leaves L0 for train= ing, which will not be captured by this event.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Bypass, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Bypass, Match Opcode : Matches on Transmit path of a UPI port.\r\= nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Mess= age Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enabl= e\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ:= Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control ty= pes are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode mat= ch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to als= o be disabled.", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard : Matches on Transmit path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-= Coherent Standard, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Non= -Coherent Standard, Match Opcode : Matches on Transmit path of a UPI port.\= r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Me= ssage Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Ena= ble\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\n= Q: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control = types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode m= atch_en cases.\r\nNote: If Message Class is disabled, we expect opcode to a= lso be disabled.", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Requ= est", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Req= uest : Matches on Transmit path of a UPI port.\r\nMatch based on UMask spec= ific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opc= ode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS= : Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP= : Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL,= slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If M= essage Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Requ= est, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Req= uest, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch based= on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class En= able\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remo= te Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot H= dr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excl= uded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.= \r\nNote: If Message Class is disabled, we expect opcode to also be disable= d.", - "UMask": "0x108", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Conflict", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Conflict : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", - "UMask": "0x1aa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Invalid", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Invalid : Matches on Transmit path of a UPI port.\r\nMatch based on= UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enabl= e\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote = Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr = Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclude= d (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\= nNote: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x12a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Data", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Data : Matches on Transmit path of a UPI port.\r\nMatch based on UM= ask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r= \nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Ena= ble\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Ena= ble\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (= LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNo= te: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - Data, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - Data, Match Opcode : Matches on Transmit path of a UPI port.\r\nMat= ch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message = Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\= nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dua= l Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types = are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_e= n cases.\r\nNote: If Message Class is disabled, we expect opcode to also be= disabled.", - "UMask": "0x10c", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - No Data", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - No Data : Matches on Transmit path of a UPI port.\r\nMatch based on= UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enabl= e\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote = Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr = Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclude= d (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\= nNote: If Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Resp= onse - No Data, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Res= ponse - No Data, Match Opcode : Matches on Transmit path of a UPI port.\r\n= Match based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Messa= ge Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable= \r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: = Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control typ= es are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode matc= h_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also= be disabled.", - "UMask": "0x10a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Snoo= p", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Sno= op : Matches on Transmit path of a UPI port.\r\nMatch based on UMask specif= ic bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcod= e (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: = Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: = Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, s= lot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Mes= sage Class is disabled, we expect opcode to also be disabled.", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Snoo= p, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Sno= op, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch based o= n UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enab= le\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote= Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr= Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are exclud= ed (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r= \nNote: If Message Class is disabled, we expect opcode to also be disabled.= ", - "UMask": "0x109", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Writ= eback", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Wri= teback : Matches on Transmit path of a UPI port.\r\nMatch based on UMask sp= ecific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: O= pcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\= nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\= nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTR= L, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If= Message Class is disabled, we expect opcode to also be disabled.", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port : Writ= eback, Match Opcode", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC", - "PerPkg": "1", - "PublicDescription": "Matches on Transmit path of a UPI Port : Wri= teback, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch bas= ed on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class = Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Re= mote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot= Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are ex= cluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en case= s.\r\nNote: If Message Class is disabled, we expect opcode to also be disab= led.", - "UMask": "0x10d", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Bypassed", - "EventCode": "0x41", - "EventName": "UNC_UPI_TxL_BYPASSED", - "PerPkg": "1", - "PublicDescription": "Tx Flit Buffer Bypassed : Counts the number = of times that an incoming flit was able to bypass the Tx flit buffer and pa= ss directly out the UPI Link. Generally, when data is transmitted across UP= I, it will bypass the TxQ and pass directly to the link. However, the TxQ = will be used with L0p and when LLR occurs, increasing latency to transfer o= ut to the link.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : All Data", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : All Data : Shows legal fl= it time (hides impact of L0p and L0c).", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Null FLITs transmitted to = any slot", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Null FLITs transmitted to= any slot : Shows legal flit time (hides impact of L0p and L0c).", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Data", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Data : Shows legal flit t= ime (hides impact of L0p and L0c). : Count Data Flits (which consume all sl= ots), but how much to count is based on Slot0-2 mask, so count can be 0-3 d= epending on which slots are enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Idle", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Idle : Shows legal flit t= ime (hides impact of L0p and L0c).", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : LLCRD Not Empty", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : LLCRD Not Empty : Shows l= egal flit time (hides impact of L0p and L0c). : Enables counting of LLCRD (= with non-zero payload). This only applies to slot 2 since LLCRD is only all= owed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : LLCTRL", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : LLCTRL : Shows legal flit= time (hides impact of L0p and L0c). : Equivalent to an idle packet. Enabl= es counting of slot 0 LLCTRL messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : All Non Data", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : All Non Data : Shows lega= l flit time (hides impact of L0p and L0c).", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.NULL", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty = : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all zer= os is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dual sl= ot. This can apply to slot 0,1, or 2.", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Protocol Header", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Protocol Header : Shows l= egal flit time (hides impact of L0p and L0c). : Enables count of protocol h= eaders in slot 0,1,2 (depending on slot uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot 0", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot 0 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits deter= mine types of headers to count.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot 1", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot 1 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits deter= mine types of headers to count.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent : Slot 2", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Valid Flits Sent : Slot 2 : Shows legal flit= time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits deter= mine types of headers to count.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Allocations", - "EventCode": "0x40", - "EventName": "UNC_UPI_TxL_INSERTS", - "PerPkg": "1", - "PublicDescription": "Tx Flit Buffer Allocations : Number of alloc= ations into the UPI Tx Flit Buffer. Generally, when data is transmitted ac= ross UPI, it will bypass the TxQ and pass directly to the link. However, t= he TxQ will be used with L0p and when LLR occurs, increasing latency to tra= nsfer out to the link. This event can be used in conjunction with the Flit= Buffer Occupancy event in order to calculate the average flit buffer lifet= ime.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Occupancy", - "EventCode": "0x42", - "EventName": "UNC_UPI_TxL_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Tx Flit Buffer Occupancy : Accumulates the n= umber of flits in the TxQ. Generally, when data is transmitted across UPI,= it will bypass the TxQ and pass directly to the link. However, the TxQ wi= ll be used with L0p and when LLR occurs, increasing latency to transfer out= to the link. This can be used with the cycles not empty event to track ave= rage occupancy, or the allocations event to track average lifetime in the T= xQ.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", - "EventCode": "0x45", - "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VNA Credits Pending Return - Occupancy", - "EventCode": "0x44", - "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "VNA Credits Pending Return - Occupancy : Num= ber of VNA credits in the Rx side that are waitng to be returned back acros= s the link.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", - "EventCode": "0xff", - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : Doorbell", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : Interrupt", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.INT_PRIO", - "PerPkg": "1", - "PublicDescription": "Message Received : Interrupt : Interrupts", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : IPI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : IPI : Inter Processor Int= errupts", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : MSI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : MSI : Message Signaled In= terrupts - interrupts sent by devices (including PCIe via IOxAPIC) (Socket = Mode only)", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : VLW", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : VLW : Virtual Logical Wir= e (legacy) message were received from Uncore.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "IDI Lock/SplitLock Cycles", - "EventCode": "0x44", - "EventName": "UNC_U_LOCK_CYCLES", - "PerPkg": "1", - "PublicDescription": "IDI Lock/SplitLock Cycles : Number of times = an IDI Lock/SplitLock sequence was started", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", - "EventCode": "0x4F", - "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", - "EventCode": "0x4F", - "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "Cycles PHOLD Assert to Ack : Assert to ACK := PHOLD cycles.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDRAND", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDSEED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "RACU Request : Number outstanding register r= equests within message channel tracker", - "Unit": "UBOX" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 948C0C77B61 for ; Thu, 13 Apr 2023 13:33:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231518AbjDMNdp (ORCPT ); Thu, 13 Apr 2023 09:33:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231478AbjDMNdS (ORCPT ); Thu, 13 Apr 2023 09:33:18 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D89C3BBB0 for ; Thu, 13 Apr 2023 06:31:52 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id 84-20020a251457000000b00b8f59a09e1fso1792772ybu.5 for ; Thu, 13 Apr 2023 06:31:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392709; x=1683984709; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=wG9O1dC+0ttn3W0jj9wyMkGiLiurKlSVfjXwIlFb0rc=; b=POifscoRJhKLxIbUYQdFchi5UlEoHj8RBJlrmmAVyZ6azrvSr+OyjDjlX1kxCADXU1 Ak0arnsKwAHr4bCN/NUuxxIFca4BndL2cJRJkqAcfx8tMnubIpPtqK5AETkUaIW72+7N PfaObIA1UWbTydxHTWYQmyVKVxkU9NsyFLMqAIgNlOrmaGk7ACbIdi2W2JojAUnHqRuW ligV/PQwgOpSmgiY5tIoSlmZLRoSi7Fy+5swlhBYyfpEAIN2j+xWsLy4zFb8k10ZqR8W LyANou2jw3XtG6wTlt0FM0lKAOMtEQ5GWBIWD4HKz5hN3n9+v9bgPEJ0WMxnFZuVNoUz GzgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392709; x=1683984709; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=wG9O1dC+0ttn3W0jj9wyMkGiLiurKlSVfjXwIlFb0rc=; b=ACCx38DtgKeHPpjS3AOBSA8uO1sjTvmLyNYfbBC9rB1Ssp5wLNuRACnH9Pj/etI1y2 Vbx6BiJSdw+G1lEH6YodkSK0HkLQqG60e2AWJeFlOTPKLp1/9ighwf+NDIpIwwhxkID2 TUzzcha4HjkTZPhgNuXvf4alolYJhsMepqSim9haLDkleMgkJqx1m3YSy7Mz4c33pNvm QWMBV/RgD+xXjHRN1S5EvEhKlSh068H0rwlTxfAv5HllH4kEd02X5hXmMPQpnCNzawSe ksYHrM3B98ib+hbsTfn54h9eKoogqxf4pe5JTHCDmcw/z2u73rl6XYteWZVQE14N3YnL UszA== X-Gm-Message-State: AAQBX9f6e/sy5cP81Yvr4bQc3xHfFndBeIgVt1XMwrOTxdQ7taRB0WQ8 zAv15LbWJbG5/KPeBd+fjuVrS+dz+h7+ X-Google-Smtp-Source: AKy350Zz3U5qB0AkuBtJntxAlSyMdLGC9gUD8NpA34yEP5xf7qXttSuT4gHmWkchM+ZUgBwFNJFvg0yTUDI2 X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a81:e70d:0:b0:545:62c0:621d with SMTP id x13-20020a81e70d000000b0054562c0621dmr1343167ywl.2.1681392709204; Thu, 13 Apr 2023 06:31:49 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:41 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-14-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 13/21] perf vendor events intel: Fix uncore topics for ivybridge From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache and interconnect. Signed-off-by: Ian Rogers --- .../arch/x86/ivybridge/uncore-cache.json | 50 +++++++++---------- ...re-other.json =3D> uncore-interconnect.json} | 0 2 files changed, 25 insertions(+), 25 deletions(-) rename tools/perf/pmu-events/arch/x86/ivybridge/{uncore-other.json =3D> un= core-interconnect.json} (100%) diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/uncore-cache.json b/t= ools/perf/pmu-events/arch/x86/ivybridge/uncore-cache.json index c538557ba4c0..be9a3ed1a940 100644 --- a/tools/perf/pmu-events/arch/x86/ivybridge/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/ivybridge/uncore-cache.json @@ -5,7 +5,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_ES", "PerPkg": "1", "UMask": "0x86", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in I-state.", @@ -13,7 +13,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_I", "PerPkg": "1", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in M-state.", @@ -21,7 +21,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_M", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in MESI-state.", @@ -29,7 +29,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_MESI", "PerPkg": "1", "UMask": "0x8f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in E or S-state.", @@ -37,7 +37,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_ES", "PerPkg": "1", "UMask": "0x46", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in I-state.", @@ -45,7 +45,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_I", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in M-state.", @@ -53,7 +53,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_M", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in MESI-state.", @@ -61,7 +61,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_MESI", "PerPkg": "1", "UMask": "0x4f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in E or S-state.", @@ -69,7 +69,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_ES", "PerPkg": "1", "UMask": "0x16", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in I-state.", @@ -77,7 +77,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_I", "PerPkg": "1", "UMask": "0x18", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in M-state.", @@ -85,7 +85,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_M", "PerPkg": "1", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in any MESI-state.", @@ -93,7 +93,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_MESI", "PerPkg": "1", "UMask": "0x1f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in E or S-state.", @@ -101,7 +101,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_ES", "PerPkg": "1", "UMask": "0x26", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in I-state.", @@ -109,7 +109,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_I", "PerPkg": "1", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in M-state.", @@ -117,7 +117,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_M", "PerPkg": "1", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in MESI-state.", @@ -125,7 +125,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_MESI", "PerPkg": "1", "UMask": "0x2f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which hits a modified line in some processor core.", @@ -133,7 +133,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EVICTION", "PerPkg": "1", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop hits a modified line in som= e processor core.", @@ -141,7 +141,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EXTERNAL", "PerPkg": "1", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a modified line in some proces= sor core.", @@ -149,7 +149,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which hits a non-modified line in some processor core.", @@ -157,7 +157,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EVICTION", "PerPkg": "1", "UMask": "0x84", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop hits a non-modified line in= some processor core.", @@ -165,7 +165,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EXTERNAL", "PerPkg": "1", "UMask": "0x24", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a non-modified line in some pr= ocessor core.", @@ -173,7 +173,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE", "PerPkg": "1", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which misses in some processor core.", @@ -181,7 +181,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EVICTION", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop misses in some processor co= re.", @@ -189,7 +189,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EXTERNAL", "PerPkg": "1", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which misses in some processor core.", @@ -197,6 +197,6 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/uncore-other.json b/t= ools/perf/pmu-events/arch/x86/ivybridge/uncore-interconnect.json similarity index 100% rename from tools/perf/pmu-events/arch/x86/ivybridge/uncore-other.json rename to tools/perf/pmu-events/arch/x86/ivybridge/uncore-interconnect.json --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46FE3C77B6E for ; Thu, 13 Apr 2023 13:33:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231578AbjDMNdU (ORCPT ); Thu, 13 Apr 2023 09:33:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231217AbjDMNci (ORCPT ); Thu, 13 Apr 2023 09:32:38 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CDD9DBBBB for ; Thu, 13 Apr 2023 06:31:58 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id t66-20020a254645000000b00b74680a7904so15799185yba.15 for ; Thu, 13 Apr 2023 06:31:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392717; x=1683984717; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=mCeF7xTS0ss5IAx6z1SSQLE1XYpIEexKHQ4MMfjLo4E=; b=j+idfgJLnzngC4WGHgPTCQHtH3c4Rt0BGb4cblnp6GS3xvei5BO4lkwLmCZiBBnHBC ZJHm6hymplRzpaGh4/PtlqCmL3XUd4nJ+lVIcKoUOwI2dyqWw3DWT8pIglFwhw4VYcXN golr60KOklL3/3gprPQAzYutgRqCfN5FFz00P4WdKdSXtAVpGCo3PIlBAcJJ6PsQwUj8 RGzqjykuXHb65A/TdyK+brKQO+WfmwtoSvTZt95OuyBfAYPmr2DQSVn7E/NzRhV5Mhlx QZusXFFMdCJ1lDAmek2R80mtmDiZzYBA790J8KGvVuMlZiJqNMcqF3iEB5LeRV+gDtJW oddg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392717; x=1683984717; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=mCeF7xTS0ss5IAx6z1SSQLE1XYpIEexKHQ4MMfjLo4E=; b=RiCjDqUQWWzm/dvkGMZTYwUvJOqXKeHq+rDrZhFDcm0Q8jA+oBxQkCEUns/VNWs5zP lxkjuqzJCp1U0EnThHmRx/6RKsSzg6kHDT39rDnznaYZtnDaVhGCi6ZS/A7dVUZkRMSS eXrioRfrV/EzRcm3QMfECm0ilI8u1HC7JzynQP5x4LwWr3pnlUKKIw4Q3O0GCETzOq/p bJ46PdT/y9KZ3rAPI2DMRbAx7hgs/RULulQnaXERkK/jq36G4qTtAyC8nrKvHL5/XJM8 KzmYB9RXADQgNi/5H5leeV5En5ZDbKK80gs6V9+70jHlDGHQltdvvhuFDrjIpkjhvz/V TX0g== X-Gm-Message-State: AAQBX9dhuIzkyV4Pep6yTJeEX8++6Jndhxm0bU7pnT2llhmK98bKETxo /GEZPPOcLrbTDwN7Zy5fWFJLeBNbIggn X-Google-Smtp-Source: AKy350bFrW9oi1Eq9vO3cGmMpZGp43zHUwzO7Ermoo4Gv9kpHRJ9uaxz1v8HVT05XdDjxeUBppRPNYOvWMRp X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a25:d092:0:b0:b8f:67cd:fc12 with SMTP id h140-20020a25d092000000b00b8f67cdfc12mr107527ybg.13.1681392717574; Thu, 13 Apr 2023 06:31:57 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:42 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-15-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 14/21] perf vendor events intel: Fix uncore topics for ivytown From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/ivytown/uncore-cache.json | 314 +-- .../arch/x86/ivytown/uncore-interconnect.json | 2025 +++++++++++++-- .../arch/x86/ivytown/uncore-io.json | 549 +++++ .../arch/x86/ivytown/uncore-other.json | 2174 ----------------- 4 files changed, 2531 insertions(+), 2531 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/ivytown/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/ivytown/uncore-other.json diff --git a/tools/perf/pmu-events/arch/x86/ivytown/uncore-cache.json b/too= ls/perf/pmu-events/arch/x86/ivytown/uncore-cache.json index 521175881173..8bf2706eb6d5 100644 --- a/tools/perf/pmu-events/arch/x86/ivytown/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/ivytown/uncore-cache.json @@ -3,7 +3,7 @@ "BriefDescription": "Uncore Clocks", "EventName": "UNC_C_CLOCKTICKS", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Counter 0 Occupancy", @@ -11,7 +11,7 @@ "EventName": "UNC_C_COUNTER0_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Any Request", @@ -20,7 +20,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:17] bits correspond to [M'FMESI] state.; Filters for any transaction o= riginating from the IPQ or IRQ. This does not include lookups originating = from the ISMQ.", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Data Read Request", @@ -29,7 +29,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:17] bits correspond to [M'FMESI] state.; Read transactions", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Lookups that Match NID", @@ -38,7 +38,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:17] bits correspond to [M'FMESI] state.; Qualify one of the other sube= vents by the Target NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER.n= id. In conjunction with STATE =3D I, it is possible to monitor misses to = specific NIDs in the system.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; External Snoop Request", @@ -47,7 +47,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:17] bits correspond to [M'FMESI] state.; Filters for only snoop reques= ts coming from the remote socket(s) through the IPQ.", "UMask": "0x9", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Write Requests", @@ -56,7 +56,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:17] bits correspond to [M'FMESI] state.; Writeback transactions from L= 2 to the LLC This includes all write transactions -- both Cacheable and UC= .", "UMask": "0x5", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in E state", @@ -65,7 +65,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -74,7 +74,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in M state", @@ -83,7 +83,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Victimized Lines that Match= NID", @@ -92,7 +92,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.; Qu= alify one of the other subevents by the Target NID. The NID is programmed = in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it is pos= sible to monitor misses to specific NIDs in the system.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in S State", @@ -101,7 +101,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; RFO HitS", @@ -110,7 +110,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Number of = times that an RFO hit in S state. This is useful for determining if it mig= ht be good for a workload to use RspIWB instead of RspSWB.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Silent Snoop Eviction", @@ -119,7 +119,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc", @@ -128,7 +128,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Write Combining Aliasing", @@ -137,7 +137,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 0", @@ -146,7 +146,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 0", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 1", @@ -155,7 +155,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 2", @@ -164,7 +164,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 2", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Age 3", @@ -173,7 +173,7 @@ "PerPkg": "1", "PublicDescription": "How often age was set to 3", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; LRU Bits Decremented", @@ -182,7 +182,7 @@ "PerPkg": "1", "PublicDescription": "How often all LRU bits were decremented by 1= ", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "LRU Queue; Non-0 Aged Victim", @@ -191,7 +191,7 @@ "PerPkg": "1", "PublicDescription": "How often we picked a victim that had a non-= zero age", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Counterclockwise", @@ -200,7 +200,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Clockwise", @@ -209,7 +209,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down", @@ -218,7 +218,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0xcc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Even on Vring 0", @@ -227,7 +227,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Even ring polarity on Virtual Ring 0.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Odd on Vring 0", @@ -236,7 +236,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity on Virtual Ring 0.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Even on VRing 1", @@ -245,7 +245,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Even ring polarity on Virtual Ring 1.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Odd on VRing 1", @@ -254,7 +254,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Down and Odd ring polarity on Virtual Ring 1.", "UMask": "0x80", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up", @@ -263,7 +263,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.", "UMask": "0x33", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Even on Vring 0", @@ -272,7 +272,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity on Virtual Ring 0.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Odd on Vring 0", @@ -281,7 +281,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity on Virtual Ring 0.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Even on VRing 1", @@ -290,7 +290,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Even ring polarity on Virtual Ring 1.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Odd on VRing 1", @@ -299,7 +299,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the UP = direction is on the clockwise ring and DN is on the counter-clockwise ring.= On the right side of the ring, this is reversed. The first half of the C= Bos are on the left side of the ring, and the 2nd half are on the right sid= e of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is = NOT the same ring as CBo 2 UP AD because they are on opposite sides of the = ring.; Filters for the Up and Odd ring polarity on Virtual Ring 1.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Counterclockwise", @@ -308,7 +308,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Clockwise", @@ -317,7 +317,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down", @@ -326,7 +326,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xcc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Even on Vring 0", @@ -335,7 +335,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity on Virtual Ring 0.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Odd on Vring 0", @@ -344,7 +344,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity on Virtual Ring 0.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Even on VRing 1", @@ -353,7 +353,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity on Virtual Ring 1.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Odd on VRing 1", @@ -362,7 +362,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity on Virtual Ring 1.", "UMask": "0x80", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up", @@ -371,7 +371,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x33", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Even on Vring 0", @@ -380,7 +380,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity on Virtual Ring 0.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Odd on Vring 0", @@ -389,7 +389,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity on Virtual Ring 0.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Even on VRing 1", @@ -398,7 +398,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity on Virtual Ring 1.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Odd on VRing 1", @@ -407,7 +407,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity on Virtual Ring 1.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Counterclockwise", @@ -416,7 +416,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Clockwise", @@ -425,7 +425,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down", @@ -434,7 +434,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0xcc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Even on Vring 0", @@ -443,7 +443,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity on Virtual Ring 0.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Odd on Vring 0", @@ -452,7 +452,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity on Virtual Ring 0.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Even on VRing 1", @@ -461,7 +461,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Even ring polarity on Virtual Ring 1.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Odd on VRing 1", @@ -470,7 +470,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Down and Odd ring polarity on Virtual Ring 1.", "UMask": "0x80", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up", @@ -479,7 +479,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.", "UMask": "0x33", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Even on Vring 0", @@ -488,7 +488,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity on Virtual Ring 0.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Odd on Vring 0", @@ -497,7 +497,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity on Virtual Ring 0.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Even on VRing 1", @@ -506,7 +506,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Even ring polarity on Virtual Ring 1.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Odd on VRing 1", @@ -515,7 +515,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the UP di= rection is on the clockwise ring and DN is on the counter-clockwise ring. = On the right side of the ring, this is reversed. The first half of the CBo= s are on the left side of the ring, and the 2nd half are on the right side = of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is NO= T the same ring as CBo 2 UP AD because they are on opposite sides of the ri= ng.; Filters for the Up and Odd ring polarity on Virtual Ring 1.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.", @@ -523,7 +523,7 @@ "EventName": "UNC_C_RING_BOUNCES.AD_IRQ", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Acknowledgements to core", @@ -531,7 +531,7 @@ "EventName": "UNC_C_RING_BOUNCES.AK", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.: Acknowledgements to core", @@ -539,7 +539,7 @@ "EventName": "UNC_C_RING_BOUNCES.AK_CORE", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Data Responses to core", @@ -547,7 +547,7 @@ "EventName": "UNC_C_RING_BOUNCES.BL", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.: Data Responses to core", @@ -555,7 +555,7 @@ "EventName": "UNC_C_RING_BOUNCES.BL_CORE", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", @@ -563,7 +563,7 @@ "EventName": "UNC_C_RING_BOUNCES.IV", "PerPkg": "1", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.: Snoops of processor's cache.", @@ -571,7 +571,7 @@ "EventName": "UNC_C_RING_BOUNCES.IV_CORE", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "IV Ring in Use; Any", @@ -580,7 +580,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters any polarity", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "IV Ring in Use; Down", @@ -589,7 +589,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for Down polarity", "UMask": "0xcc", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "IV Ring in Use; Up", @@ -598,34 +598,34 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for Up polarity", "UMask": "0x33", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x6", "EventName": "UNC_C_RING_SINK_STARVED.AD_IPQ", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x6", "EventName": "UNC_C_RING_SINK_STARVED.AD_IRQ", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x6", "EventName": "UNC_C_RING_SINK_STARVED.IV", "PerPkg": "1", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x7", "EventName": "UNC_C_RING_SRC_THRTL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IRQ", @@ -634,7 +634,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IPQ is externally startved and therefore we are blocking the IRQ.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IPQ", @@ -643,7 +643,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; IRQ is externally starved and therefore we are blocking the IPQ.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; ISMQ_BID", @@ -652,7 +652,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ; Number of times that the ISMQ Bid.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles", @@ -661,7 +661,7 @@ "PerPkg": "1", "PublicDescription": "IRQ is blocking the ingress queue and causin= g the starvation.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IPQ", @@ -670,7 +670,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ", @@ -679,7 +679,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ Rejected", @@ -688,7 +688,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations: IRQ Rejected", @@ -697,7 +697,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; VFIFO", @@ -706,7 +706,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.; Counts the number of allocations into the IRQ= Ordering FIFO. In JKT, it is necessary to keep IO requests in order. The= refore, they are allocated into an ordering FIFO that sits next to the IRQ,= and must be satisfied from the FIFO in order (with respect to each other).= This event, in conjunction with the Occupancy Accumulator event, can be u= sed to calculate average lifetime in the FIFO. Transactions are allocated = into the FIFO as soon as they enter the Cachebo (and the IRQ) and are deall= ocated from the FIFO as soon as they are deallocated from the IRQ.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IPQ", @@ -715,7 +715,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IPQ in Internal S= tarvation.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IRQ", @@ -724,7 +724,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the IRQ in Internal S= tarvation.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; ISMQ", @@ -733,7 +733,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.; Cycles with the ISMQ in Internal = Starvation.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Address Conflict", @@ -742,7 +742,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from an address conflicts. Address conflicts out of the IPQ shou= ld be rare. They will generally only occur if two different sockets are se= nding requests to the same address at the same time. This is a true confli= ct case, unlike the IPQ Address Conflict which is commonly caused by prefet= ching characteristics.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Any Reject", @@ -751,7 +751,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject. TOR rejects from the IPQ can be caused by the Egress being full= or Address Conflicts.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No Egress Credits", @@ -760,7 +760,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.; Counts= the number of times that a request form the IPQ was retried because of a T= OR reject from the Egress being full. IPQ requests make use of the AD Egre= ss for regular responses, the BL egress to forward data, and the AK egress = to return credits.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No QPI Credits", @@ -769,7 +769,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Address Confli= ct", @@ -778,7 +778,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because of an address match in the TOR. In order to= maintain coherency, requests to the same address are not allowed to pass e= ach other up in the Cbo. Therefore, if there is an outstanding request to = a given address, one cannot issue another request to that address until it = is complete. This comes up most commonly with prefetches. Outstanding pre= fetches occasionally will not complete their memory fetch and a demand requ= est to the same address will then sit in the IRQ and get retried until the = prefetch fills the data into the LLC. Therefore, it will not be uncommon t= o see this case in high bandwidth streaming workloads when the LLC Prefetch= er in the core is enabled.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Any Reject", @@ -787,7 +787,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of IRQ retries that occur.= Requests from the IRQ are retried if they are rejected from the TOR pipel= ine for a variety of reasons. Some of the most common reasons include if t= he Egress is full, there are no RTIDs, or there is a Physical Address match= to another outstanding request.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No Egress Cred= its", @@ -796,7 +796,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that a request fr= om the IRQ was retried because it failed to acquire an entry in the Egress.= The egress is the buffer that queues up for allocating onto the ring. IR= Q requests can make use of all four rings and all four Egresses. If any of= the queues that a given request needs to make use of are full, the request= will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No IIO Credits= ", @@ -805,7 +805,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a request attempted to acqui= re the NCS/NCB credit for sending messages on BL to the IIO. There is a si= ngle credit in each CBo that is shared between the NCS and NCB message clas= ses for sending transactions on the BL ring (such as read data) to the IIO.= ", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No QPI Credits= ", @@ -814,7 +814,7 @@ "PerPkg": "1", "PublicDescription": "Number of requests rejects because of lack o= f QPI Ingress credits. These credits are required in order to send transac= tions to the QPI agent. Please see the QPI_IGR_CREDITS events for more inf= ormation.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No RTIDs", @@ -823,7 +823,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that requests fro= m the IRQ were retried because there were no RTIDs available. RTIDs are re= quired after a request misses the LLC and needs to send snoops and/or reque= sts to memory. If there are no RTIDs available, requests will queue up in = the IRQ and retry until one becomes available. Note that there are multipl= e RTID pools for the different sockets. There may be cases where the local= RTIDs are all used, but requests destined for remote memory can still acqu= ire an RTID because there are remote RTIDs available. This event does not = provide any filtering for this case.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; Any Reject", @@ -832,7 +832,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = total number of times that a request from the ISMQ retried because of a TOR= reject. ISMQ requests generally will not need to retry (or at least ISMQ = retries are less common than IRQ retries). ISMQ requests will retry if the= y are not able to acquire a needed Egress credit to get onto the ring, or f= or cache evictions that need to acquire an RTID. Most ISMQ requests alread= y have an RTID, so eviction retries will be less common here.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No Egress Credits", @@ -841,7 +841,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by a lack of Egress credits. The egress is the buffer that queues = up for allocating onto the ring. If any of the Egress queues that a given = request needs to make use of are full, the request will be retried.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No IIO Credits", @@ -850,7 +850,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Number of t= imes a request attempted to acquire the NCS/NCB credit for sending messages= on BL to the IIO. There is a single credit in each CBo that is shared bet= ween the NCS and NCB message classes for sending transactions on the BL rin= g (such as read data) to the IIO.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No QPI Credits", @@ -859,7 +859,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No RTIDs", @@ -868,7 +868,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Counts the = number of times that a request from the ISMQ retried because of a TOR rejec= t caused by no RTIDs. M-state cache evictions are serviced through the ISM= Q, and must acquire an RTID in order to write back to memory. If no RTIDs = are available, they will be retried.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No WB Credits", @@ -877,7 +877,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.; Retries of = writes to local memory due to lack of HT WB credits", "UMask": "0x80", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IPQ", @@ -886,7 +886,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ", @@ -895,7 +895,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ Rejected", @@ -904,7 +904,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "IRQ Rejected", @@ -913,7 +913,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; VFIFO", @@ -922,7 +922,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.; Accumulates the number of used entries in the I= RQ Ordering FIFO in each cycle. In JKT, it is necessary to keep IO request= s in order. Therefore, they are allocated into an ordering FIFO that sits = next to the IRQ, and must be satisfied from the FIFO in order (with respect= to each other). This event, in conjunction with the Allocations event, ca= n be used to calculate average lifetime in the FIFO. This event can be use= d in conjunction with the Not Empty event to calculate average queue occupa= ncy. Transactions are allocated into the FIFO as soon as they enter the Cac= hebo (and the IRQ) and are deallocated from the FIFO as soon as they are de= allocated from the IRQ.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; All", @@ -931,7 +931,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR. This includes requests that reside in the TOR for a shor= t time, such as LLC Hits that do not need to snoop cores or requests that g= et rejected and have to be retried through one of the ingress queues. The = TOR is more commonly a bottleneck in skews with smaller core counts, where = the ratio of RTIDs to TOR entries is larger. Note that there are reserved = TOR entries for various request types, so it is possible that a given reque= st type be blocked with an occupancy that is less than 20. Also note that = generally requests will not be able to arbitrate into the TOR pipeline if t= here are no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Evictions", @@ -940,7 +940,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Eviction transactions in= serted into the TOR. Evictions can be quick, such as when the line is in t= he F, S, or E states and no core valid bits are set. They can also be long= er if either CV bits are set (so the cores need to be snooped) and/or if th= ere is a HitM (in which case it is necessary to write the request out to me= mory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory", @@ -949,7 +949,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Local Memory - Opcode Matched", @@ -958,7 +958,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisf= ied by an opcode, inserted into the TOR that are satisfied by locally HOMe= d memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory", @@ -967,7 +967,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by locally HOMed memory.", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Local Memory - Opcode = Matched", @@ -976,7 +976,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by locally HOMe= d memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Miss Opcode Match", @@ -985,7 +985,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match an opcode.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory", @@ -994,7 +994,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Misses to Remote Memory - Opcode= Matched", @@ -1003,7 +1003,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions, satis= fied by an opcode, inserted into the TOR that are satisfied by remote cach= es or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched", @@ -1012,7 +1012,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched (matches= an RTID destination) transactions inserted into the TOR. The NID is progr= ammed in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE =3D I, it i= s possible to monitor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Evictions", @@ -1021,7 +1021,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched eviction tra= nsactions inserted into the TOR.", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Miss All", @@ -1030,7 +1030,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All NID matched miss req= uests that were inserted into the TOR.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched Miss", @@ -1039,7 +1039,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Miss transactions insert= ed into the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched", @@ -1048,7 +1048,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Writebacks", @@ -1057,7 +1057,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; NID matched write transa= ctions inserted into the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Opcode Match", @@ -1066,7 +1066,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Transactions inserted in= to the TOR that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc)", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory", @@ -1075,7 +1075,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions inserte= d into the TOR that are satisfied by remote caches or remote memory.", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Remote Memory - Opcode Matched", @@ -1084,7 +1084,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; All transactions, satisf= ied by an opcode, inserted into the TOR that are satisfied by remote cache= s or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Writebacks", @@ -1093,7 +1093,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select MISS_OPC_MATCH an= d set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).; Write transactions inser= ted into the TOR. This does not include RFO, but actual operations that c= ontain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Any", @@ -1102,7 +1102,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All valid TO= R entries. This includes requests that reside in the TOR for a short time,= such as LLC Hits that do not need to snoop cores or requests that get reje= cted and have to be retried through one of the ingress queues. The TOR is = more commonly a bottleneck in skews with smaller core counts, where the rat= io of RTIDs to TOR entries is larger. Note that there are reserved TOR ent= ries for various request types, so it is possible that a given request type= be blocked with an occupancy that is less than 20. Also note that general= ly requests will not be able to arbitrate into the TOR pipeline if there ar= e no available TOR slots.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Evictions", @@ -1111,7 +1111,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding eviction transactions in the TOR. Evictions can be quick, such a= s when the line is in the F, S, or E states and no core valid bits are set.= They can also be longer if either CV bits are set (so the cores need to b= e snooped) and/or if there is a HitM (in which case it is necessary to writ= e the request out to memory).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1120,7 +1120,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Local Memory - Opcode Matched", @@ -1129,7 +1129,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by locally HOMed memory.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss All", @@ -1138,7 +1138,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding miss requests in the TOR. 'Miss' means the allocation requires a= n RTID. This generally means that the request was sent to memory or MMIO.", "UMask": "0xa", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1147,7 +1147,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x2a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Local Memory - Opcod= e Matched", @@ -1156,7 +1156,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by locally HOMed memory.", "UMask": "0x23", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss Opcode Match", @@ -1165,7 +1165,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = for miss transactions that match an opcode. This generally means that the r= equest was sent to memory or MMIO.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1174,7 +1174,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x8a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Misses to Remote Memory - Opco= de Matched", @@ -1183,7 +1183,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss transactions, satisfied by an opcode, in the TOR that are sa= tisfied by remote caches or remote memory.", "UMask": "0x83", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1192,7 +1192,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of NI= D matched outstanding requests in the TOR. The NID is programmed in Cn_MSR= _PMON_BOX_FILTER.nid.In conjunction with STATE =3D I, it is possible to mon= itor misses to specific NIDs in the system.", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Evictions", @@ -1201,7 +1201,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding NID matched eviction transactions in the TOR .", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -1210,7 +1210,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID.", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched Miss", @@ -1219,7 +1219,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding Miss requests in the TOR that match a NID and an opcode.", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched", @@ -1228,7 +1228,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match a NID and an opcode.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Writebacks", @@ -1237,7 +1237,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); NID matched = write transactions int the TOR.", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Opcode Match", @@ -1246,7 +1246,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); TOR entries = that match an opcode (matched by Cn_MSR_PMON_BOX_FILTER.opc).", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy", @@ -1255,7 +1255,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Remote Memory - Opcode Matched= ", @@ -1264,7 +1264,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Number of ou= tstanding transactions, satisfied by an opcode, in the TOR that are satis= fied by remote caches or remote memory.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Writebacks", @@ -1273,7 +1273,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); Write transa= ctions in the TOR. This does not include RFO, but actual operations that = contain data being sent from the core.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AD Ring", @@ -1281,7 +1281,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AD", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto AK Ring", @@ -1289,7 +1289,7 @@ "EventName": "UNC_C_TxR_ADS_USED.AK", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Onto BL Ring", @@ -1297,7 +1297,7 @@ "EventName": "UNC_C_TxR_ADS_USED.BL", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Cachebo", @@ -1306,7 +1306,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AD ring. Some example include out= bound requests, snoop requests, and snoop responses.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Corebo", @@ -1315,7 +1315,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AD ring. This is commonly used for= outbound requests.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Cachebo", @@ -1324,7 +1324,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the AK ring. This is commonly used fo= r credit returns and GO responses.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Corebo", @@ -1333,7 +1333,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the AK ring. This is commonly used for= snoop responses coming from the core and destined for a Cachebo.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Cacheno", @@ -1342,7 +1342,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the BL ring. This is commonly used to= send data from the cache to various destinations.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Corebo", @@ -1351,7 +1351,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Corebo destined for the BL ring. This is commonly used for= transferring writeback data to the cache.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; IV - Cachebo", @@ -1360,7 +1360,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.; Ring transa= ctions from the Cachebo destined for the IV ring. This is commonly used fo= r snoops to the cores.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AD Ring (to core)", @@ -1369,7 +1369,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the core AD egress spent in starvation", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AK Ring", @@ -1378,7 +1378,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that both AK egresses spent in starvation", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto IV Ring", @@ -1387,7 +1387,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.; cycles that the cachebo IV egress spent in starvati= on", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BT Bypass", diff --git a/tools/perf/pmu-events/arch/x86/ivytown/uncore-interconnect.jso= n b/tools/perf/pmu-events/arch/x86/ivytown/uncore-interconnect.json index e1b9799e3036..ccf451534d16 100644 --- a/tools/perf/pmu-events/arch/x86/ivytown/uncore-interconnect.json +++ b/tools/perf/pmu-events/arch/x86/ivytown/uncore-interconnect.json @@ -1,11 +1,316 @@ [ + { + "BriefDescription": "Address Match (Conflict) Count; Conflict Merg= es", + "EventCode": "0x17", + "EventName": "UNC_I_ADDRESS_MATCH.MERGE_COUNT", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.; When two requests to the same address = from the same source are received back to back, it is possible to merge the= two of them together.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Address Match (Conflict) Count; Conflict Stal= ls", + "EventCode": "0x17", + "EventName": "UNC_I_ADDRESS_MATCH.STALL_COUNT", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.; When it is not possible to merge two c= onflicting requests, a stall event occurs. This is bad for performance.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Write Ack Pending Occupancy; Any Source", + "EventCode": "0x14", + "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.; Tracks only those requests that= come from the port specified in the IRP_PmonFilter.OrderingQ register. Th= is register allows one to select one specific queue. It is not possible to= monitor multiple queues at a time.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Write Ack Pending Occupancy; Select Source", + "EventCode": "0x14", + "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.; Tracks all requests from any so= urce port.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Ownership Occupancy; Any So= urce", + "EventCode": "0x13", + "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.; Trac= ks all requests from any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Ownership Occupancy; Select= Source", + "EventCode": "0x13", + "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.; Trac= ks only those requests that come from the port specified in the IRP_PmonFil= ter.OrderingQ register. This register allows one to select one specific qu= eue. It is not possible to monitor multiple queues at a time.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Read Occupancy; Any Source", + "EventCode": "0x10", + "EventName": "UNC_I_CACHE_READ_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.; Tracks all requests from any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Read Occupancy; Select Source", + "EventCode": "0x10", + "EventName": "UNC_I_CACHE_READ_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.; Tracks only those requests that come from the port specifie= d in the IRP_PmonFilter.OrderingQ register. This register allows one to se= lect one specific queue. It is not possible to monitor multiple queues at = a time.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy; Any Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy; Select Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Occupancy; Any Source", + "EventCode": "0x11", + "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.; Tracks all requ= ests from any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Occupancy; Select Source", + "EventCode": "0x11", + "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.; Tracks only tho= se requests that come from the port specified in the IRP_PmonFilter.Orderin= gQ register. This register allows one to select one specific queue. It is= not possible to monitor multiple queues at a time.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Clocks in the IRP", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of clocks in the IRP.", + "Unit": "IRP" + }, + { + "EventCode": "0xb", + "EventName": "UNC_I_RxR_AK_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the AK Ingr= ess is full. This queue is where the IRP receives responses from R2PCIe (t= he ring).", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Ingress Occupancy", + "EventCode": "0xa", + "EventName": "UNC_I_RxR_AK_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", + "Unit": "IRP" + }, + { + "EventCode": "0xc", + "EventName": "UNC_I_RxR_AK_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the AK Ingress = in each cycles. This queue is where the IRP receives responses from R2PCIe= (the ring).", + "Unit": "IRP" + }, + { + "EventCode": "0x4", + "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - DRS", + "EventCode": "0x1", + "EventName": "UNC_I_RxR_BL_DRS_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "EventCode": "0x7", + "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "EventCode": "0x5", + "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - NCB", + "EventCode": "0x2", + "EventName": "UNC_I_RxR_BL_NCB_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "EventCode": "0x8", + "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "EventCode": "0x6", + "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - NCS", + "EventCode": "0x3", + "EventName": "UNC_I_RxR_BL_NCS_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "EventCode": "0x9", + "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "Tickle Count; Ownership Lost", + "EventCode": "0x16", + "EventName": "UNC_I_TICKLES.LOST_OWNERSHIP", + "PerPkg": "1", + "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.; Tracks the number of requests that lost ownership as a result of = a tickle. When a tickle comes in, if the request is not at the head of the= queue in the switch, then that request as well as any requests behind it i= n the switch queue will lose ownership and have to re-acquire it later when= they get to the head of the queue. This will therefore track the number o= f requests that lost ownership and not just the number of tickles.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Tickle Count; Data Returned", + "EventCode": "0x16", + "EventName": "UNC_I_TICKLES.TOP_OF_QUEUE", + "PerPkg": "1", + "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.; Tracks the number of cases when a tickle was received but the req= uests was at the head of the queue in the switch. In this case, data is re= turned rather than releasing ownership.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count: Read Prefetches", + "EventCode": "0x15", + "EventName": "UNC_I_TRANSACTIONS.PD_PREFETCHES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Read Prefetches", + "EventCode": "0x15", + "EventName": "UNC_I_TRANSACTIONS.RD_PREFETCHES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Reads", + "EventCode": "0x15", + "EventName": "UNC_I_TRANSACTIONS.READS", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Writes", + "EventCode": "0x15", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD Egress Credit Stalls", + "EventCode": "0x18", + "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x19", + "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xe", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xf", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0xd", + "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumultes the number of outstanding outboun= d requests from the IRP to the switch (towards the devices). This can be u= sed in conjuection with the allocations event in order to calculate average= latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "Write Ordering Stalls", + "EventCode": "0x1a", + "EventName": "UNC_I_WRITE_ORDERING_STALL_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when there are p= ending write ACK's in the switch but the switch->IRP pipeline is not utiliz= ed.", + "Unit": "IRP" + }, { "BriefDescription": "Number of qfclks", "EventCode": "0x14", "EventName": "UNC_Q_CLOCKTICKS", "PerPkg": "1", "PublicDescription": "Counts the number of clocks in the QPI LL. = This clock runs at 1/8th the GT/s speed of the QPI link. For example, a 8G= T/s link will have qfclk or 1GHz. JKT does not support dynamic link speeds= , so this frequency is fixed.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Count of CTO Events", @@ -13,7 +318,7 @@ "EventName": "UNC_Q_CTO_COUNT", "PerPkg": "1", "PublicDescription": "Counts the number of CTO (cluster trigger ou= ts) events that were asserted across the two slots. If both slots trigger = in a given cycle, the event will increment by 2. You can use edge detect t= o count the number of cases when both events triggered.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s Credits", @@ -22,7 +327,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits. Had there been enough credits, the spawn would have worked as th= e RBT bit was set and the RBT tag matched.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss", @@ -31,7 +336,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d there weren't enough Egress credits. The valid bit was set.", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Invalid", @@ -40,7 +345,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because there were not enough Egress= credits AND the RBT bit was not set, but the RBT tag matched.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT Miss, Invalid", @@ -49,7 +354,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match, t= he valid bit was not set and there weren't enough Egress credits.", "UMask": "0x80", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss", @@ -58,7 +363,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match al= though the valid bit was set and there were enough Egress credits.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT I= nvalid", @@ -67,7 +372,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the route-back table (RBT) s= pecified that the transaction should not trigger a direct2core transaction.= This is common for IO transactions. There were enough Egress credits and= the RBT tag matched but the valid bit was not set.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT M= iss and Invalid", @@ -76,7 +381,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn failed because the RBT tag did not match an= d the valid bit was not set although there were enough Egress credits.", "UMask": "0x40", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Success", @@ -85,7 +390,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.; The spawn was successful. There were sufficient cred= its, the RBT valid bit was set and there was an RBT tag match. The message= was marked to spawn direct2core.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L1", @@ -93,205 +398,205 @@ "EventName": "UNC_Q_L1_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L1 power= mode. L1 is a mode that totally shuts down a QPI link. Use edge detect t= o count the number of instances when the QPI link entered L1. Link power s= tates are per link and per direction, so for example the Tx direction could= be in one state while Rx was in another. Because L1 totally shuts down the= link, it takes a good amount of time to exit this mode.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MATCH_MASK", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.AnyDataC", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.AnyResp", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.AnyResp11flits", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.AnyResp9flits", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.DataC_E", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.DataC_E_Cmp", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.DataC_E_FrcAckCnflt", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.DataC_F", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.DataC_F_Cmp", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.DataC_F_FrcAckCnflt", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.DataC_M", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.WbEData", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.WbIData", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.DRS.WbSData", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.AnyReq", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.AnyResp", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.RespFwd", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.RespFwdI", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.RespFwdIWb", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.RespFwdS", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.RespFwdSWb", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.RespIWb", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.HOM.RespSWb", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NCB.AnyInt", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NCB.AnyMsg", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NCB.AnyMsg11flits", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NCB.AnyMsg9flits", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NCS.AnyMsg1or2flits", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NCS.AnyMsg3flits", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NCS.NcRd", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.NDR.AnyCmp", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "EventCode": "0x38", "EventName": "UNC_Q_MESSAGE.SNP.AnySnp", "PerPkg": "1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0p", @@ -299,7 +604,7 @@ "EventName": "UNC_Q_RxL0P_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0", @@ -307,7 +612,7 @@ "EventName": "UNC_Q_RxL0_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Bypassed", @@ -315,7 +620,7 @@ "EventName": "UNC_Q_RxL_BYPASSED", "PerPkg": "1", "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the flit buffer and pass directly across the BGF an= d into the Egress. This is a latency optimization, and should generally be= the common case. If this value is less than the number of flits transferr= ed, it implies that there was queueing getting onto the ring, and thus the = transactions saw higher latency.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "CRC Errors Detected; LinkInit", @@ -324,7 +629,7 @@ "PerPkg": "1", "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during link initialization.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "CRC Errors Detected; Normal Operations", @@ -333,7 +638,7 @@ "PerPkg": "1", "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ; CRC errors detected during normal operation.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; DRS", @@ -342,7 +647,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the DRS message class.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; HOM", @@ -351,7 +656,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the HOM message class.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; NCB", @@ -360,7 +665,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCB message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; NCS", @@ -369,7 +674,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NCS message class.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; NDR", @@ -378,7 +683,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the NDR message class.", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; SNP", @@ -387,7 +692,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN0 credit for the SNP message class.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN1 Credit Consumed; DRS", @@ -396,7 +701,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the DRS message class.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN1 Credit Consumed; HOM", @@ -405,7 +710,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the HOM message class.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN1 Credit Consumed; NCB", @@ -414,7 +719,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCB message class.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN1 Credit Consumed; NCS", @@ -423,7 +728,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NCS message class.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN1 Credit Consumed; NDR", @@ -432,7 +737,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the NDR message class.", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN1 Credit Consumed; SNP", @@ -441,7 +746,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ; VN1 credit for the SNP message class.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VNA Credit Consumed", @@ -449,7 +754,7 @@ "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VNA", "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty", @@ -457,7 +762,7 @@ "EventName": "UNC_Q_RxL_CYCLES_NE", "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN0", @@ -466,7 +771,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN1", @@ -475,7 +780,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors DRS flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN0", @@ -484,7 +789,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN1", @@ -493,7 +798,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors HOM flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN0", @@ -502,7 +807,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN1", @@ -511,7 +816,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCB flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN0", @@ -520,7 +825,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN1", @@ -529,7 +834,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NCS flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN0", @@ -538,7 +843,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN1", @@ -547,7 +852,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors NDR flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN0", @@ -556,7 +861,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN1", @@ -565,7 +870,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy. This monitors SNP flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 0; Data Tx Flits", @@ -574,7 +879,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each f= lit is made up of 80 bits of information (in addition to some ECC data). I= n full-width (L0) mode, flits are made up of four fits, each of which conta= ins 20 bits of data (along with some additional ECC data). In half-width = (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many= fits to transmit a flit. When one talks about QPI speed (for example, 8.0= GT/s), the transfers here refer to fits. Therefore, in L0, the system wil= l transfer 1 flit at the rate of 1/4th the QPI speed. One can calculate th= e bandwidth of the link by taking: flits*80b/time. Note that this is not t= he same as data bandwidth. For example, when we are transferring a 64B cac= heline across QPI, we will break it into 9 flits -- 1 with header informati= on and 8 with 64 bits of actual data and an additional 16 bits of other inf= ormation. To calculate data bandwidth, one should therefore do: data flits= * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data flits re= ceived over QPI. Each flit contains 64b of data. This includes both DRS a= nd NCB data flits (coherent and non-coherent). This can be used to calcula= te the data bandwidth of the QPI link. One can get a good picture of the Q= PI-link characteristics by evaluating the protocol flits, data flits, and i= dle/null flits. This does not include the header flits that go in data pac= kets.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 0; Idle and Null Flits= ", @@ -583,7 +888,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each f= lit is made up of 80 bits of information (in addition to some ECC data). I= n full-width (L0) mode, flits are made up of four fits, each of which conta= ins 20 bits of data (along with some additional ECC data). In half-width = (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many= fits to transmit a flit. When one talks about QPI speed (for example, 8.0= GT/s), the transfers here refer to fits. Therefore, in L0, the system wil= l transfer 1 flit at the rate of 1/4th the QPI speed. One can calculate th= e bandwidth of the link by taking: flits*80b/time. Note that this is not t= he same as data bandwidth. For example, when we are transferring a 64B cac= heline across QPI, we will break it into 9 flits -- 1 with header informati= on and 8 with 64 bits of actual data and an additional 16 bits of other inf= ormation. To calculate data bandwidth, one should therefore do: data flits= * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of flits receive= d over QPI that do not hold protocol payload. When QPI is not in a power s= aving state, it continuously transmits flits across the link. When there a= re no protocol flits to send, it will send IDLE and NULL flits across. Th= ese flits sometimes do carry a payload, such as credit returns, but are gen= erally not considered part of the QPI bandwidth.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 0; Non-Data protocol T= x Flits", @@ -592,7 +897,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each f= lit is made up of 80 bits of information (in addition to some ECC data). I= n full-width (L0) mode, flits are made up of four fits, each of which conta= ins 20 bits of data (along with some additional ECC data). In half-width = (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many= fits to transmit a flit. When one talks about QPI speed (for example, 8.0= GT/s), the transfers here refer to fits. Therefore, in L0, the system wil= l transfer 1 flit at the rate of 1/4th the QPI speed. One can calculate th= e bandwidth of the link by taking: flits*80b/time. Note that this is not t= he same as data bandwidth. For example, when we are transferring a 64B cac= heline across QPI, we will break it into 9 flits -- 1 with header informati= on and 8 with 64 bits of actual data and an additional 16 bits of other inf= ormation. To calculate data bandwidth, one should therefore do: data flits= * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL non-= data flits received across QPI. This basically tracks the protocol overhea= d on the QPI link. One can get a good picture of the QPI-link characterist= ics by evaluating the protocol flits, data flits, and idle/null flits. Thi= s includes the header flits for data packets.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; DRS Flits (both Hea= der and Data)", @@ -601,7 +906,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over QPI on the DRS (Data Respo= nse) channel. DRS flits are used to transmit data with coherency. This do= es not count data flits received over the NCB channel which transmits non-c= oherent data.", "UMask": "0x18", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; DRS Data Flits", @@ -610,7 +915,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of data flits received over QPI on the DRS (Data = Response) channel. DRS flits are used to transmit data with coherency. Th= is does not count data flits received over the NCB channel which transmits = non-coherent data. This includes only the data flits (not the header).", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; DRS Header Flits", @@ -619,7 +924,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of protocol flits received over QPI on the DRS (D= ata Response) channel. DRS flits are used to transmit data with coherency.= This does not count data flits received over the NCB channel which transm= its non-coherent data. This includes only the header flits (not the data).= This includes extended headers.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; HOM Flits", @@ -628,7 +933,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of flits received over QPI on the home channel.", "UMask": "0x6", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; HOM Non-Request Fli= ts", @@ -637,7 +942,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of non-request flits received over QPI on the home chan= nel. These are most commonly snoop responses, and this event can be used a= s a proxy for that.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; HOM Request Flits", @@ -646,7 +951,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of data request received over QPI on the home channel. = This basically counts the number of remote memory requests received over Q= PI. In conjunction with the local read count in the Home Agent, one can ca= lculate the number of LLC Misses.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; SNP Flits", @@ -655,7 +960,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for SNP, HOM, and DRS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the number of snoop request flits received over QPI. These reques= ts are contained in the snoop channel. This does not include snoop respons= es, which are received on the home channel.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent Rx Fli= ts", @@ -664,7 +969,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass flits. These packets are generally used to= transmit non-coherent data across QPI.", "UMask": "0xc", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent data R= x Flits", @@ -673,7 +978,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass data flits. These flits are generally used= to transmit non-coherent data across QPI. This does not include a count o= f the DRS (coherent) data flits. This only counts the data flits, not the = NCB headers.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent non-da= ta Rx Flits", @@ -682,7 +987,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of Non-Coherent Bypass non-data flits. These packets are generall= y used to transmit non-coherent data across QPI, and the flits counted here= are for headers and other non-data flits. This includes extended headers.= ", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent standa= rd Rx Flits", @@ -691,7 +996,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Number of NCS (non-coherent standard) flits received over QPI. This in= cludes extended headers.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AD", @@ -700,7 +1005,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets to the local sock= et which use the AK ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AK", @@ -709,7 +1014,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three groups that allow us to track flits. It i= ncludes filters for NDR, NCB, and NCS message classes. Each flit is made u= p of 80 bits of information (in addition to some ECC data). In full-width = (L0) mode, flits are made up of four fits, each of which contains 20 bits o= f data (along with some additional ECC data). In half-width (L0p) mode, t= he fits are only 10 bits, and therefore it takes twice as many fits to tran= smit a flit. When one talks about QPI speed (for example, 8.0 GT/s), the t= ransfers here refer to fits. Therefore, in L0, the system will transfer 1 = flit at the rate of 1/4th the QPI speed. One can calculate the bandwidth o= f the link by taking: flits*80b/time. Note that this is not the same as da= ta bandwidth. For example, when we are transferring a 64B cacheline across= QPI, we will break it into 9 flits -- 1 with header information and 8 with= 64 bits of actual data and an additional 16 bits of other information. To= calculate data bandwidth, one should therefore do: data flits * 8B / time.= ; Counts the total number of flits received over the NDR (Non-Data Response= ) channel. This channel is used to send a variety of protocol flits includ= ing grants and completions. This is only for NDR packets destined for Rout= e-thru to a remote socket.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations", @@ -717,7 +1022,7 @@ "EventName": "UNC_Q_RxL_INSERTS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - DRS", @@ -725,7 +1030,7 @@ "EventName": "UNC_Q_RxL_INSERTS_DRS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN0", @@ -734,7 +1039,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN1", @@ -743,7 +1048,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - HOM", @@ -751,7 +1056,7 @@ "EventName": "UNC_Q_RxL_INSERTS_HOM", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN0", @@ -760,7 +1065,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN1", @@ -769,7 +1074,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCB", @@ -777,7 +1082,7 @@ "EventName": "UNC_Q_RxL_INSERTS_NCB", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN0", @@ -786,7 +1091,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN1", @@ -795,7 +1100,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCS", @@ -803,7 +1108,7 @@ "EventName": "UNC_Q_RxL_INSERTS_NCS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN0", @@ -812,7 +1117,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN1", @@ -821,7 +1126,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NDR", @@ -829,7 +1134,7 @@ "EventName": "UNC_Q_RxL_INSERTS_NDR", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN0", @@ -838,7 +1143,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN1", @@ -847,7 +1152,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - SNP", @@ -855,7 +1160,7 @@ "EventName": "UNC_Q_RxL_INSERTS_SNP", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN0", @@ -864,7 +1169,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN1", @@ -873,7 +1178,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - All Packets", @@ -881,7 +1186,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - DRS", @@ -889,7 +1194,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_DRS", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - DRS; for VN0", @@ -898,7 +1203,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - DRS; for VN1", @@ -907,7 +1212,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - HOM", @@ -915,7 +1220,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_HOM", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - HOM; for VN0", @@ -924,7 +1229,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - HOM; for VN1", @@ -933,7 +1238,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCB", @@ -941,7 +1246,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_NCB", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCB; for VN0", @@ -950,7 +1255,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCB; for VN1", @@ -959,7 +1264,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCS", @@ -967,7 +1272,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_NCS", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCS; for VN0", @@ -976,7 +1281,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCS; for VN1", @@ -985,7 +1290,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NDR", @@ -993,7 +1298,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_NDR", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NDR; for VN0", @@ -1002,7 +1307,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NDR; for VN1", @@ -1011,7 +1316,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - SNP", @@ -1019,7 +1324,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_SNP", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - SNP; for VN0", @@ -1028,7 +1333,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - SNP; for VN1", @@ -1037,7 +1342,7 @@ "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - H= OM", @@ -1046,7 +1351,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the HOM message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - D= RS", @@ -1055,7 +1360,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the DRS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - S= NP", @@ -1064,7 +1369,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the SNP message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= DR", @@ -1073,7 +1378,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NDR message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CS", @@ -1082,7 +1387,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCS message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - N= CB", @@ -1091,7 +1396,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet from the NCB message class because ther= e were not enough BGF credits. In bypass mode, we will stall on the packet= boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; Egress Credit= s", @@ -1100,7 +1405,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled a packet because there were insufficient BGF cre= dits. For details on a message class granularity, use the Egress Credit Oc= cupancy events.", "UMask": "0x40", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN0; GV", @@ -1109,7 +1414,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 0; Stalled because a GV transition (frequency transition) w= as taking place.", "UMask": "0x80", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - H= OM", @@ -1118,7 +1423,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the HOM message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - D= RS", @@ -1127,7 +1432,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the DRS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - S= NP", @@ -1136,7 +1441,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the SNP message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= DR", @@ -1145,7 +1450,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NDR message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CS", @@ -1154,7 +1459,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCS message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - N= CB", @@ -1163,7 +1468,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI on = Virtual Network 1.; Stalled a packet from the NCB message class because the= re were not enough BGF credits. In bypass mode, we will stall on the packe= t boundary, while in RxQ mode we will stall on the flit boundary.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0p", @@ -1171,7 +1476,7 @@ "EventName": "UNC_Q_TxL0P_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0", @@ -1179,7 +1484,7 @@ "EventName": "UNC_Q_TxL0_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Bypassed", @@ -1187,7 +1492,7 @@ "EventName": "UNC_Q_TxL_BYPASSED", "PerPkg": "1", "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the Tx flit buffer and pass directly out the QPI Li= nk. Generally, when data is transmitted across QPI, it will bypass the TxQ = and pass directly to the link. However, the TxQ will be used with L0p and = when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is al= most full", @@ -1196,7 +1501,7 @@ "PerPkg": "1", "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is almost ful= l, we block some but not all packets.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is fu= ll", @@ -1205,7 +1510,7 @@ "PerPkg": "1", "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.; When LLR is totally fu= ll, we are not allowed to send any packets.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Cycles not Empty", @@ -1213,7 +1518,7 @@ "EventName": "UNC_Q_TxL_CYCLES_NE", "PerPkg": "1", "PublicDescription": "Counts the number of cycles when the TxQ is = not empty. Generally, when data is transmitted across QPI, it will bypass t= he TxQ and pass directly to the link. However, the TxQ will be used with L= 0p and when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 0; Data Tx Flits", @@ -1221,7 +1526,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data fli= ts transmitted over QPI. Each flit contains 64b of data. This includes bo= th DRS and NCB data flits (coherent and non-coherent). This can be used to= calculate the data bandwidth of the QPI link. One can get a good picture = of the QPI-link characteristics by evaluating the protocol flits, data flit= s, and idle/null flits. This does not include the header flits that go in = data packets.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 0; Non-Data protoco= l Tx Flits", @@ -1229,7 +1534,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach flit is made up of 80 bits of information (in addition to some ECC data= ). In full-width (L0) mode, flits are made up of four fits, each of which = contains 20 bits of data (along with some additional ECC data). In half-w= idth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as= many fits to transmit a flit. When one talks about QPI speed (for example= , 8.0 GT/s), the transfers here refer to fits. Therefore, in L0, the syste= m will transfer 1 flit at the rate of 1/4th the QPI speed. One can calcula= te the bandwidth of the link by taking: flits*80b/time. Note that this is = not the same as data bandwidth. For example, when we are transferring a 64= B cacheline across QPI, we will break it into 9 flits -- 1 with header info= rmation and 8 with 64 bits of actual data and an additional 16 bits of othe= r information. To calculate data bandwidth, one should therefore do: data = flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL= non-data flits transmitted across QPI. This basically tracks the protocol= overhead on the QPI link. One can get a good picture of the QPI-link char= acteristics by evaluating the protocol flits, data flits, and idle/null fli= ts. This includes the header flits for data packets.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; DRS Flits (both = Header and Data)", @@ -1237,7 +1542,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over QPI on the DRS (Da= ta Response) channel. DRS flits are used to transmit data with coherency.", "UMask": "0x18", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; DRS Data Flits", @@ -1245,7 +1550,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of data flits transmitted over QPI on the DR= S (Data Response) channel. DRS flits are used to transmit data with cohere= ncy. This does not count data flits transmitted over the NCB channel which= transmits non-coherent data. This includes only the data flits (not the h= eader).", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; DRS Header Flits= ", @@ -1253,7 +1558,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of protocol flits transmitted over QPI on th= e DRS (Data Response) channel. DRS flits are used to transmit data with co= herency. This does not count data flits transmitted over the NCB channel w= hich transmits non-coherent data. This includes only the header flits (not= the data). This includes extended headers.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; HOM Flits", @@ -1261,7 +1566,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of flits transmitted over QPI on the home channel.= ", "UMask": "0x6", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; HOM Non-Request = Flits", @@ -1269,7 +1574,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of non-request flits transmitted over QPI on the h= ome channel. These are most commonly snoop responses, and this event can b= e used as a proxy for that.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; HOM Request Flit= s", @@ -1277,7 +1582,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of data request transmitted over QPI on the home c= hannel. This basically counts the number of remote memory requests transmi= tted over QPI. In conjunction with the local read count in the Home Agent,= one can calculate the number of LLC Misses.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; SNP Flits", @@ -1285,7 +1590,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for SNP, HOM, and DRS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the number of snoop request flits transmitted over QPI. Thes= e requests are contained in the snoop channel. This does not include snoop= responses, which are transmitted on the home channel.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent Byp= ass Tx Flits", @@ -1294,7 +1599,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass flits. These packets are generally us= ed to transmit non-coherent data across QPI.", "UMask": "0xc", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent dat= a Tx Flits", @@ -1303,7 +1608,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass data flits. These flits are generally= used to transmit non-coherent data across QPI. This does not include a co= unt of the DRS (coherent) data flits. This only counts the data flits, not= the NCB headers.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent non= -data Tx Flits", @@ -1312,7 +1617,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of Non-Coherent Bypass non-data flits. These packets are gen= erally used to transmit non-coherent data across QPI, and the flits counted= here are for headers and other non-data flits. This includes extended hea= ders.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent sta= ndard Tx Flits", @@ -1321,7 +1626,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Number of NCS (non-coherent standard) flits transmitted over QPI. = This includes extended headers.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AD", @@ -1330,7 +1635,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets to the lo= cal socket which use the AK ring.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AK", @@ -1339,7 +1644,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three groups that allow us to track flits. = It includes filters for NDR, NCB, and NCS message classes. Each flit is m= ade up of 80 bits of information (in addition to some ECC data). In full-w= idth (L0) mode, flits are made up of four fits, each of which contains 20 b= its of data (along with some additional ECC data). In half-width (L0p) mo= de, the fits are only 10 bits, and therefore it takes twice as many fits to= transmit a flit. When one talks about QPI speed (for example, 8.0 GT/s), = the transfers here refer to fits. Therefore, in L0, the system will transf= er 1 flit at the rate of 1/4th the QPI speed. One can calculate the bandwi= dth of the link by taking: flits*80b/time. Note that this is not the same = as data bandwidth. For example, when we are transferring a 64B cacheline a= cross QPI, we will break it into 9 flits -- 1 with header information and 8= with 64 bits of actual data and an additional 16 bits of other information= . To calculate data bandwidth, one should therefore do: data flits * 8B / = time.; Counts the total number of flits transmitted over the NDR (Non-Data = Response) channel. This channel is used to send a variety of protocol flit= s including grants and completions. This is only for NDR packets destined = for Route-thru to a remote socket.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Allocations", @@ -1347,7 +1652,7 @@ "EventName": "UNC_Q_TxL_INSERTS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Tx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Occupancy", @@ -1355,7 +1660,7 @@ "EventName": "UNC_Q_TxL_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across QPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN0", @@ -1364,7 +1669,7 @@ "PerPkg": "1", "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN1", @@ -1373,7 +1678,7 @@ "PerPkg": "1", "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for H= ome messages on AD.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N0", @@ -1382,7 +1687,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for V= N1", @@ -1391,7 +1696,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for HOM messages on AD.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", @@ -1400,7 +1705,7 @@ "PerPkg": "1", "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", @@ -1409,7 +1714,7 @@ "PerPkg": "1", "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = NDR messages on AD.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N0", @@ -1418,7 +1723,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for V= N1", @@ -1427,7 +1732,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for NDR messages on AD.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN0", @@ -1436,7 +1741,7 @@ "PerPkg": "1", "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN1", @@ -1445,7 +1750,7 @@ "PerPkg": "1", "PublicDescription": "Number of link layer credits into the R3 (fo= r transactions across the BGF) acquired each cycle. Flow Control FIFO for = Snoop messages on AD.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N0", @@ -1454,7 +1759,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for V= N1", @@ -1463,7 +1768,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of li= nk layer credits into the R3 (for transactions across the BGF) available in= each cycle. Flow Control FIFO for Snoop messages on AD.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", @@ -1471,7 +1776,7 @@ "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED", "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. Local NDR message class to AK Egre= ss.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for V= N0", @@ -1480,7 +1785,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. Local NDR message class to AK Egre= ss.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for V= N1", @@ -1489,7 +1794,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. Local NDR message class to AK Egre= ss.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR", @@ -1497,7 +1802,7 @@ "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . Local NDR message class to AK Egress.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for V= N0", @@ -1506,7 +1811,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . Local NDR message class to AK Egress.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for V= N1", @@ -1515,7 +1820,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . Local NDR message class to AK Egress.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN0", @@ -1524,7 +1829,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN1", @@ -1533,7 +1838,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for Shar= ed VN", @@ -1542,7 +1847,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. DRS message class to BL Egress.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N0", @@ -1551,7 +1856,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for V= N1", @@ -1560,7 +1865,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for S= hared VN", @@ -1569,7 +1874,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . DRS message class to BL Egress.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN0", @@ -1578,7 +1883,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN1", @@ -1587,7 +1892,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCB message class to BL Egress.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N0", @@ -1596,7 +1901,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for V= N1", @@ -1605,7 +1910,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCB message class to BL Egress.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN0", @@ -1614,7 +1919,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN1", @@ -1623,7 +1928,7 @@ "PerPkg": "1", "PublicDescription": "Number of credits into the R3 (for transacti= ons across the BGF) acquired each cycle. NCS message class to BL Egress.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N0", @@ -1632,7 +1937,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for V= N1", @@ -1641,7 +1946,7 @@ "PerPkg": "1", "PublicDescription": "Occupancy event that tracks the number of cr= edits into the R3 (for transactions across the BGF) available in each cycle= . NCS message class to BL Egress.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VNA Credits Returned", @@ -1649,7 +1954,7 @@ "EventName": "UNC_Q_VNA_CREDIT_RETURNS", "PerPkg": "1", "PublicDescription": "Number of VNA credits returned.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VNA Credits Pending Return - Occupancy", @@ -1657,6 +1962,1326 @@ "EventName": "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", - "Unit": "QPI LL" + "Unit": "QPI" + }, + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_R3_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2c", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO10", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 10", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2c", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO11", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 11", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2c", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO12", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 12", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2c", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO13", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 13", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2c", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO14", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 14&16", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2c", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO8", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 8", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2c", + "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO9", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 9", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO0", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 0", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO1", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO2", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 2", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO3", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 3", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO4", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 4", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO5", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 5", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO6", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 6", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "CBox AD Credits Empty", + "EventCode": "0x2b", + "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO7", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 7", + "UMask": "0x80", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2f", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA0", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA0", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2f", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA1", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA1", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2f", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCB Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "HA/R2 AD Credits Empty", + "EventCode": "0x2f", + "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCS", + "PerPkg": "1", + "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCS Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x29", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x29", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x29", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x29", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x29", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x29", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 AD Credits Empty", + "EventCode": "0x29", + "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x2d", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x2d", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x2d", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x2d", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x2d", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x2d", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI0 BL Credits Empty", + "EventCode": "0x2d", + "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2a", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2a", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2a", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2a", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2a", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2a", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 AD Credits Empty", + "EventCode": "0x2a", + "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2e", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 HOM Messages", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2e", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 NDR Messages", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2e", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 SNP Messages", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2e", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_HOM", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 HOM Messages", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2e", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_NDR", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 NDR Messages", + "UMask": "0x40", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2e", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 SNP Messages", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "QPI1 BL Credits Empty", + "EventCode": "0x2e", + "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VNA", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xcc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even = on VRing 0", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd o= n VRing 0", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x33", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Even on VRin= g 0", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd on VRing= 0", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xcc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even = on VRing 0", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd o= n VRing 0", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x33", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Even on VRin= g 0", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd on VRing= 0", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xcc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even = on VRing 0", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd o= n VRing 0", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x33", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Even on VRin= g 0", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd on VRing= 0", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R2 IV Ring in Use; Any", + "EventCode": "0xA", + "EventName": "UNC_R3_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters any polarity", + "UMask": "0xff", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R2 IV Ring in Use; Counterclockwise", + "EventCode": "0xa", + "EventName": "UNC_R3_RING_IV_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Counterclockwise polarity", + "UMask": "0xcc", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R2 IV Ring in Use; Clockwise", + "EventCode": "0xa", + "EventName": "UNC_R3_RING_IV_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Clockwise polarity", + "UMask": "0x33", + "Unit": "R3QPI" + }, + { + "BriefDescription": "AD Ingress Bypassed", + "EventCode": "0x12", + "EventName": "UNC_R3_RxR_AD_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the AD Ingre= ss was bypassed and an incoming transaction was bypassed directly across th= e BGF and into the qfclk domain.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Bypassed", + "EventCode": "0x12", + "EventName": "UNC_R3_RxR_BYPASSED.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the Ingress = was bypassed and an incoming transaction was bypassed directly across the B= GF and into the qfclk domain.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; HOM", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NDR", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; SNP", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; DRS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; DRS Ingress= Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; HOM", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; HOM Ingress= Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCB", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCB Ingress= Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCS Ingress= Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NDR", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NDR Ingress= Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; SNP", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; SNP Ingress= Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; DRS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.DRS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; HOM", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.HOM", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; HOM Ingress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; NCB", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; NCS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; NDR", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.NDR", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; NDR Ingress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; SNP", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; SNP Ingress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress NACK; AK CCW", + "EventCode": "0x28", + "EventName": "UNC_R3_TxR_NACK_CCW.AD", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress NACK; BL CW", + "EventCode": "0x28", + "EventName": "UNC_R3_TxR_NACK_CCW.AK", + "PerPkg": "1", + "PublicDescription": "AD Clockwise Egress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress NACK; BL CCW", + "EventCode": "0x28", + "EventName": "UNC_R3_TxR_NACK_CCW.BL", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress NACK; AD CW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK_CW.AD", + "PerPkg": "1", + "PublicDescription": "AD Clockwise Egress Queue", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress NACK; AD CCW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK_CW.AK", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Egress NACK; AK CW", + "EventCode": "0x26", + "EventName": "UNC_R3_TxR_NACK_CW.BL", + "PerPkg": "1", + "PublicDescription": "BL Clockwise Egress Queue", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Data Response (DRS). DRS is generally used to transmit data with coher= ency. For example, remote reads and writes, or cache to cache transfers wi= ll transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for the Home (HOM) message class. HOM is generally used to send requests, = request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Broadcast (NCB). NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Standard (NCS). NCS is commonly used for ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; NDR pac= kets are used to transmit a variety of protocol flits including grants and = completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Snoop (SNP) message class. SNP is used for outgoing snoops. Note that= snoop responses flow on the HOM message class.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; DRS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; HOM Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCB Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NDR Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; SNP Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; DRS Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Data Response (DRS). DRS is generally used to transmit data with coherency= . For example, remote reads and writes, or cache to cache transfers will t= ransmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; HOM Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = the Home (HOM) message class. HOM is generally used to send requests, requ= est responses, and snoop responses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCB Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Broadcast (NCB). NCB is generally used to transmit data witho= ut coherency. For example, non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCS Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Standard (NCS). NCS is commonly used for ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NDR Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; NDR packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Acquisition Failed on DRS; SNP Mes= sage Class", + "EventCode": "0x39", + "EventName": "UNC_R3_VN1_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Snoop (SNP) message class. SNP is used for outgoing snoops. Note that sno= op responses flow on the HOM message class.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; DRS Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; HOM Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; NCB Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; NCS Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; NDR Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN1 Credit Used; SNP Message Class", + "EventCode": "0x38", + "EventName": "UNC_R3_VN1_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA credit Acquisitions", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED", + "PerPkg": "1", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA credit Acquisitions; HOM Message Class", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.AD", + "PerPkg": "1", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA credit Acquisitions; HOM Message Class", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.BL", + "PerPkg": "1", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; DRS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Data Response (DRS). DRS = is generally used to transmit data with coherency. For example, remote rea= ds and writes, or cache to cache transfers will transmit their data using D= RS.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; HOM Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for the Home (HOM) message cla= ss. HOM is generally used to send requests, request responses, and snoop r= esponses.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCB Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Broadcast (NC= B). NCB is generally used to transmit data without coherency. For example= , non-coherent read data returns.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Standard (NCS= ).", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NDR Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; NDR packets are used to transmit a va= riety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; SNP Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Snoop (SNP) message class.= SNP is used for outgoing snoops. Note that snoop responses flow on the H= OM message class.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Cycles with no VNA credits available", + "EventCode": "0x31", + "EventName": "UNC_R3_VNA_CREDIT_CYCLES_OUT", + "PerPkg": "1", + "PublicDescription": "Number of QPI uclk cycles when the transmitt= ed has no VNA credits available and therefore cannot send any requests on t= his channel. Note that this does not mean that no flits can be transmitted= , as those holding VN0 credits will still (potentially) be able to transmit= . Generally it is the goal of the uncore that VNA credits should not run o= ut, as this can substantially throttle back useful QPI bandwidth.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Cycles with 1 or more VNA credits in use", + "EventCode": "0x32", + "EventName": "UNC_R3_VNA_CREDIT_CYCLES_USED", + "PerPkg": "1", + "PublicDescription": "Number of QPI uclk cycles with one or more V= NA credits in use. This event can be used in conjunction with the VNA In-U= se Accumulator to calculate the average number of used VNA credits.", + "Unit": "R3QPI" + }, + { + "EventName": "UNC_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.DISABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.ENABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "IDI Lock/SplitLock Cycles", + "EventCode": "0x44", + "EventName": "UNC_U_LOCK_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "PHOLD cycles. Filter from source CoreID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.CMC", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Livelock", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; LTError", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LTERROR", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Monitor T0", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Monitor T1", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Other", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.OTHER", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Trap", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.TRAP", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.UMC", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x20", + "Unit": "UBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/ivytown/uncore-io.json b/tools/= perf/pmu-events/arch/x86/ivytown/uncore-io.json new file mode 100644 index 000000000000..5887e6ebcfa8 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/ivytown/uncore-io.json @@ -0,0 +1,549 @@ +[ + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_R2_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the DRS message class.= ", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCB message class.= ", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCS message class.= ", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; DRS", + "EventCode": "0x34", + "EventName": "UNC_R2_IIO_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).; Credits to the IIO for the DRS message class.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; DRS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the DRS message = class.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCB", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCB message = class.", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCS message = class.", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xcc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even = on VRing 0", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd o= n VRing 0", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even = on VRing 1", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_VR1_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 1.", + "UMask": "0x40", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd o= n VRing 1", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_VR1_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 1.", + "UMask": "0x80", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x33", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Even on VRin= g 0", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd on VRing= 0", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Even on VRin= g 1", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_VR1_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 1.", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd on VRing= 1", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_VR1_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 1.", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xcc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even = on VRing 0", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd o= n VRing 0", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even = on VRing 1", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_VR1_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 1.", + "UMask": "0x40", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd o= n VRing 1", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_VR1_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 1.", + "UMask": "0x80", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x33", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Even on VRin= g 0", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd on VRing= 0", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Even on VRin= g 1", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_VR1_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 1.", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd on VRing= 1", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_VR1_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 1.", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0xcc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even = on VRing 0", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd o= n VRing 0", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even = on VRing 1", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_VR1_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 1.", + "UMask": "0x40", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd o= n VRing 1", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_VR1_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 1.", + "UMask": "0x80", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x33", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Even on VRin= g 0", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_VR0_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd on VRing= 0", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_VR0_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Even on VRin= g 1", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_VR1_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 1.", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd on VRing= 1", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_VR1_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 1.", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Any", + "EventCode": "0xA", + "EventName": "UNC_R2_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters any polarity", + "UMask": "0xff", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Counterclockwise", + "EventCode": "0xa", + "EventName": "UNC_R2_RING_IV_USED.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Counterclockwise polarity", + "UMask": "0xcc", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Clockwise", + "EventCode": "0xa", + "EventName": "UNC_R2_RING_IV_USED.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Clockwise polarity", + "UMask": "0x33", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced", + "EventCode": "0x12", + "EventName": "UNC_R2_RxR_AK_BOUNCES", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced; Counterclockwise", + "EventCode": "0x12", + "EventName": "UNC_R2_RxR_AK_BOUNCES.CCW", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced; Clockwise", + "EventCode": "0x12", + "EventName": "UNC_R2_RxR_AK_BOUNCES.CW", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCB", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCB Ingress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCS", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCS Ingress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Allocations; NCB", + "EventCode": "0x11", + "EventName": "UNC_R2_RxR_INSERTS.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= B Ingress Queue", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Allocations; NCS", + "EventCode": "0x11", + "EventName": "UNC_R2_RxR_INSERTS.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= S Ingress Queue", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; DRS", + "EventCode": "0x13", + "EventName": "UNC_R2_RxR_OCCUPANCY.DRS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given R2PCIe = Ingress queue in each cycles. This tracks one of the three ring Ingress bu= ffers. This can be used with the R2PCIe Ingress Not Empty event to calcula= te average occupancy or the R2PCIe Ingress Allocations event in order to ca= lculate average queuing latency.; DRS Ingress Queue", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AD", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AD Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AK", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AK Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; BL", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; BL Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AD", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AD Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AK", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AK Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; BL", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; BL Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AD CCW", + "EventCode": "0x28", + "EventName": "UNC_R2_TxR_NACK_CCW.AD", + "PerPkg": "1", + "PublicDescription": "AD CounterClockwise Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; AK CCW", + "EventCode": "0x28", + "EventName": "UNC_R2_TxR_NACK_CCW.AK", + "PerPkg": "1", + "PublicDescription": "AK CounterClockwise Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CCW NACK; BL CCW", + "EventCode": "0x28", + "EventName": "UNC_R2_TxR_NACK_CCW.BL", + "PerPkg": "1", + "PublicDescription": "BL CounterClockwise Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CW NACK; AD CW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.AD", + "PerPkg": "1", + "PublicDescription": "AD Clockwise Egress Queue", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CW NACK; AK CW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.AK", + "PerPkg": "1", + "PublicDescription": "AK Clockwise Egress Queue", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress CW NACK; BL CW", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACK_CW.BL", + "PerPkg": "1", + "PublicDescription": "BL Clockwise Egress Queue", + "UMask": "0x4", + "Unit": "R2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/ivytown/uncore-other.json b/too= ls/perf/pmu-events/arch/x86/ivytown/uncore-other.json deleted file mode 100644 index af9d14a6d145..000000000000 --- a/tools/perf/pmu-events/arch/x86/ivytown/uncore-other.json +++ /dev/null @@ -1,2174 +0,0 @@ -[ - { - "BriefDescription": "Address Match (Conflict) Count; Conflict Merg= es", - "EventCode": "0x17", - "EventName": "UNC_I_ADDRESS_MATCH.MERGE_COUNT", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.; When two requests to the same address = from the same source are received back to back, it is possible to merge the= two of them together.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Address Match (Conflict) Count; Conflict Stal= ls", - "EventCode": "0x17", - "EventName": "UNC_I_ADDRESS_MATCH.STALL_COUNT", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.; When it is not possible to merge two c= onflicting requests, a stall event occurs. This is bad for performance.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Write Ack Pending Occupancy; Any Source", - "EventCode": "0x14", - "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.; Tracks only those requests that= come from the port specified in the IRP_PmonFilter.OrderingQ register. Th= is register allows one to select one specific queue. It is not possible to= monitor multiple queues at a time.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Write Ack Pending Occupancy; Select Source", - "EventCode": "0x14", - "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.; Tracks all requests from any so= urce port.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Ownership Occupancy; Any So= urce", - "EventCode": "0x13", - "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.; Trac= ks all requests from any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Ownership Occupancy; Select= Source", - "EventCode": "0x13", - "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.; Trac= ks only those requests that come from the port specified in the IRP_PmonFil= ter.OrderingQ register. This register allows one to select one specific qu= eue. It is not possible to monitor multiple queues at a time.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Read Occupancy; Any Source", - "EventCode": "0x10", - "EventName": "UNC_I_CACHE_READ_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.; Tracks all requests from any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Read Occupancy; Select Source", - "EventCode": "0x10", - "EventName": "UNC_I_CACHE_READ_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.; Tracks only those requests that come from the port specifie= d in the IRP_PmonFilter.OrderingQ register. This register allows one to se= lect one specific queue. It is not possible to monitor multiple queues at = a time.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Any Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Select Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those req= uests that come from the port specified in the IRP_PmonFilter.OrderingQ reg= ister. This register allows one to select one specific queue. It is not p= ossible to monitor multiple queues at a time.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Occupancy; Any Source", - "EventCode": "0x11", - "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.; Tracks all requ= ests from any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Occupancy; Select Source", - "EventCode": "0x11", - "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.; Tracks only tho= se requests that come from the port specified in the IRP_PmonFilter.Orderin= gQ register. This register allows one to select one specific queue. It is= not possible to monitor multiple queues at a time.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Clocks in the IRP", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of clocks in the IRP.", - "Unit": "IRP" - }, - { - "EventCode": "0xb", - "EventName": "UNC_I_RxR_AK_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the AK Ingr= ess is full. This queue is where the IRP receives responses from R2PCIe (t= he ring).", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Ingress Occupancy", - "EventCode": "0xa", - "EventName": "UNC_I_RxR_AK_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", - "Unit": "IRP" - }, - { - "EventCode": "0xc", - "EventName": "UNC_I_RxR_AK_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the AK Ingress = in each cycles. This queue is where the IRP receives responses from R2PCIe= (the ring).", - "Unit": "IRP" - }, - { - "EventCode": "0x4", - "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - DRS", - "EventCode": "0x1", - "EventName": "UNC_I_RxR_BL_DRS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "EventCode": "0x7", - "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "EventCode": "0x5", - "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCB", - "EventCode": "0x2", - "EventName": "UNC_I_RxR_BL_NCB_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "EventCode": "0x8", - "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "EventCode": "0x6", - "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCS", - "EventCode": "0x3", - "EventName": "UNC_I_RxR_BL_NCS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "EventCode": "0x9", - "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "Tickle Count; Ownership Lost", - "EventCode": "0x16", - "EventName": "UNC_I_TICKLES.LOST_OWNERSHIP", - "PerPkg": "1", - "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.; Tracks the number of requests that lost ownership as a result of = a tickle. When a tickle comes in, if the request is not at the head of the= queue in the switch, then that request as well as any requests behind it i= n the switch queue will lose ownership and have to re-acquire it later when= they get to the head of the queue. This will therefore track the number o= f requests that lost ownership and not just the number of tickles.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Tickle Count; Data Returned", - "EventCode": "0x16", - "EventName": "UNC_I_TICKLES.TOP_OF_QUEUE", - "PerPkg": "1", - "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.; Tracks the number of cases when a tickle was received but the req= uests was at the head of the queue in the switch. In this case, data is re= turned rather than releasing ownership.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count: Read Prefetches", - "EventCode": "0x15", - "EventName": "UNC_I_TRANSACTIONS.PD_PREFETCHES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Read Prefetches", - "EventCode": "0x15", - "EventName": "UNC_I_TRANSACTIONS.RD_PREFETCHES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Reads", - "EventCode": "0x15", - "EventName": "UNC_I_TRANSACTIONS.READS", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Writes", - "EventCode": "0x15", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD Egress Credit Stalls", - "EventCode": "0x18", - "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x19", - "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xe", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xf", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0xd", - "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumultes the number of outstanding outboun= d requests from the IRP to the switch (towards the devices). This can be u= sed in conjuection with the allocations event in order to calculate average= latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "Write Ordering Stalls", - "EventCode": "0x1a", - "EventName": "UNC_I_WRITE_ORDERING_STALL_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when there are p= ending write ACK's in the switch but the switch->IRP pipeline is not utiliz= ed.", - "Unit": "IRP" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R2_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the DRS message class.= ", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCB message class.= ", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).; Credits to the IIO for the NCS message class.= ", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; DRS", - "EventCode": "0x34", - "EventName": "UNC_R2_IIO_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).; Credits to the IIO for the DRS message class.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; DRS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the DRS message = class.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCB", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCB message = class.", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).; Credits to the IIO for the NCS message = class.", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xcc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even = on VRing 0", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd o= n VRing 0", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even = on VRing 1", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_VR1_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 1.", - "UMask": "0x40", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd o= n VRing 1", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_VR1_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 1.", - "UMask": "0x80", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x33", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Even on VRin= g 0", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd on VRing= 0", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Even on VRin= g 1", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_VR1_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 1.", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd on VRing= 1", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_VR1_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 1.", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xcc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even = on VRing 0", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd o= n VRing 0", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even = on VRing 1", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_VR1_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 1.", - "UMask": "0x40", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd o= n VRing 1", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_VR1_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 1.", - "UMask": "0x80", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x33", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Even on VRin= g 0", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd on VRing= 0", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Even on VRin= g 1", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_VR1_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 1.", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd on VRing= 1", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_VR1_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 1.", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xcc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even = on VRing 0", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd o= n VRing 0", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even = on VRing 1", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_VR1_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 1.", - "UMask": "0x40", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd o= n VRing 1", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_VR1_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 1.", - "UMask": "0x80", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x33", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Even on VRin= g 0", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd on VRing= 0", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Even on VRin= g 1", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_VR1_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 1.", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd on VRing= 1", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_VR1_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 1.", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Any", - "EventCode": "0xA", - "EventName": "UNC_R2_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters any polarity", - "UMask": "0xff", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Counterclockwise", - "EventCode": "0xa", - "EventName": "UNC_R2_RING_IV_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Counterclockwise polarity", - "UMask": "0xcc", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Clockwise", - "EventCode": "0xa", - "EventName": "UNC_R2_RING_IV_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Clockwise polarity", - "UMask": "0x33", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced", - "EventCode": "0x12", - "EventName": "UNC_R2_RxR_AK_BOUNCES", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced; Counterclockwise", - "EventCode": "0x12", - "EventName": "UNC_R2_RxR_AK_BOUNCES.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced; Clockwise", - "EventCode": "0x12", - "EventName": "UNC_R2_RxR_AK_BOUNCES.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCB", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCS", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Allocations; NCB", - "EventCode": "0x11", - "EventName": "UNC_R2_RxR_INSERTS.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= B Ingress Queue", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Allocations; NCS", - "EventCode": "0x11", - "EventName": "UNC_R2_RxR_INSERTS.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the R2= PCIe Ingress. This tracks one of the three rings that are used by the R2PC= Ie agent. This can be used in conjunction with the R2PCIe Ingress Occupanc= y Accumulator event in order to calculate average queue latency. Multiple = ingress buffers can be tracked at a given time using multiple counters.; NC= S Ingress Queue", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; DRS", - "EventCode": "0x13", - "EventName": "UNC_R2_RxR_OCCUPANCY.DRS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given R2PCIe = Ingress queue in each cycles. This tracks one of the three ring Ingress bu= ffers. This can be used with the R2PCIe Ingress Not Empty event to calcula= te average occupancy or the R2PCIe Ingress Allocations event in order to ca= lculate average queuing latency.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AD", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AD Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AK", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; AK Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; BL", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.; BL Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AD", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AD Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AK", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; AK Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; BL", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.; BL Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AD CCW", - "EventCode": "0x28", - "EventName": "UNC_R2_TxR_NACK_CCW.AD", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; AK CCW", - "EventCode": "0x28", - "EventName": "UNC_R2_TxR_NACK_CCW.AK", - "PerPkg": "1", - "PublicDescription": "AK CounterClockwise Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CCW NACK; BL CCW", - "EventCode": "0x28", - "EventName": "UNC_R2_TxR_NACK_CCW.BL", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CW NACK; AD CW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.AD", - "PerPkg": "1", - "PublicDescription": "AD Clockwise Egress Queue", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CW NACK; AK CW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.AK", - "PerPkg": "1", - "PublicDescription": "AK Clockwise Egress Queue", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress CW NACK; BL CW", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACK_CW.BL", - "PerPkg": "1", - "PublicDescription": "BL Clockwise Egress Queue", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R3_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2c", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO10", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 10", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2c", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO11", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 11", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2c", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO12", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 12", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2c", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO13", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 13", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2c", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO14", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 14&16", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2c", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO8", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 8", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2c", - "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO9", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes); Cbox 9", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO0", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 0", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO1", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO2", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 2", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO3", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 3", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO4", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 4", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO5", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 5", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO6", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 6", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "CBox AD Credits Empty", - "EventCode": "0x2b", - "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO7", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers lower CBoxes); Cbox 7", - "UMask": "0x80", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2f", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA0", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA0", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2f", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA1", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; HA1", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2f", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCB Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "HA/R2 AD Credits Empty", - "EventCode": "0x2f", - "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCS", - "PerPkg": "1", - "PublicDescription": "No credits available to send to either HA or= R2 on the BL Ring; R2 NCS Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x29", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x29", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x29", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x29", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x29", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x29", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 AD Credits Empty", - "EventCode": "0x29", - "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = AD Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x2d", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x2d", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x2d", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x2d", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x2d", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x2d", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI0 BL Credits Empty", - "EventCode": "0x2d", - "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI0 on the = BL Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2a", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2a", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2a", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2a", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2a", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2a", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 AD Credits Empty", - "EventCode": "0x2a", - "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = AD Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2e", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 HOM Messages", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2e", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 NDR Messages", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2e", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN0 SNP Messages", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2e", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_HOM", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 HOM Messages", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2e", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_NDR", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 NDR Messages", - "UMask": "0x40", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2e", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VN1 SNP Messages", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "QPI1 BL Credits Empty", - "EventCode": "0x2e", - "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to QPI1 on the = BL Ring; VNA", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xcc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even = on VRing 0", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd o= n VRing 0", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x33", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Even on VRin= g 0", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd on VRing= 0", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xcc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even = on VRing 0", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd o= n VRing 0", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x33", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Even on VRin= g 0", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd on VRing= 0", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0xcc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even = on VRing 0", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Even rin= g polarity on Virtual Ring 0.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd o= n VRing 0", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Counterclockwise and Odd ring= polarity on Virtual Ring 0.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x33", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Even on VRin= g 0", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_VR0_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Even ring polar= ity on Virtual Ring 0.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd on VRing= 0", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_VR0_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.; Filters for the Clockwise and Odd ring polari= ty on Virtual Ring 0.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R2 IV Ring in Use; Any", - "EventCode": "0xA", - "EventName": "UNC_R3_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters any polarity", - "UMask": "0xff", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R2 IV Ring in Use; Counterclockwise", - "EventCode": "0xa", - "EventName": "UNC_R3_RING_IV_USED.CCW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Counterclockwise polarity", - "UMask": "0xcc", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R2 IV Ring in Use; Clockwise", - "EventCode": "0xa", - "EventName": "UNC_R3_RING_IV_USED.CW", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.; Filters for Clockwise polarity", - "UMask": "0x33", - "Unit": "R3QPI" - }, - { - "BriefDescription": "AD Ingress Bypassed", - "EventCode": "0x12", - "EventName": "UNC_R3_RxR_AD_BYPASSED", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the AD Ingre= ss was bypassed and an incoming transaction was bypassed directly across th= e BGF and into the qfclk domain.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Bypassed", - "EventCode": "0x12", - "EventName": "UNC_R3_RxR_BYPASSED.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the Ingress = was bypassed and an incoming transaction was bypassed directly across the B= GF and into the qfclk domain.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; HOM", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= OM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NDR", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= DR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; SNP", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= NP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; DRS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; DRS Ingress= Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; HOM", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; HOM Ingress= Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCB", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCB Ingress= Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NCS Ingress= Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NDR", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; NDR Ingress= Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; SNP", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; SNP Ingress= Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; DRS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.DRS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; DRS Ingress Queue", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; HOM", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.HOM", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; HOM Ingress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; NCB", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; NCB Ingress Queue", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; NCS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; NCS Ingress Queue", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; NDR", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.NDR", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; NDR Ingress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; SNP", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.; SNP Ingress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress NACK; AK CCW", - "EventCode": "0x28", - "EventName": "UNC_R3_TxR_NACK_CCW.AD", - "PerPkg": "1", - "PublicDescription": "BL CounterClockwise Egress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress NACK; BL CW", - "EventCode": "0x28", - "EventName": "UNC_R3_TxR_NACK_CCW.AK", - "PerPkg": "1", - "PublicDescription": "AD Clockwise Egress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress NACK; BL CCW", - "EventCode": "0x28", - "EventName": "UNC_R3_TxR_NACK_CCW.BL", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress NACK; AD CW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK_CW.AD", - "PerPkg": "1", - "PublicDescription": "AD Clockwise Egress Queue", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress NACK; AD CCW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK_CW.AK", - "PerPkg": "1", - "PublicDescription": "AD CounterClockwise Egress Queue", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Egress NACK; AK CW", - "EventCode": "0x26", - "EventName": "UNC_R3_TxR_NACK_CW.BL", - "PerPkg": "1", - "PublicDescription": "BL Clockwise Egress Queue", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Data Response (DRS). DRS is generally used to transmit data with coher= ency. For example, remote reads and writes, or cache to cache transfers wi= ll transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for the Home (HOM) message class. HOM is generally used to send requests, = request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Broadcast (NCB). NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Non-Coherent Standard (NCS). NCS is commonly used for ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; NDR pac= kets are used to transmit a variety of protocol flits including grants and = completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.; Filter = for Snoop (SNP) message class. SNP is used for outgoing snoops. Note that= snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; DRS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; HOM Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCB Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NDR Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; SNP Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; DRS Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Data Response (DRS). DRS is generally used to transmit data with coherency= . For example, remote reads and writes, or cache to cache transfers will t= ransmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; HOM Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = the Home (HOM) message class. HOM is generally used to send requests, requ= est responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCB Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Broadcast (NCB). NCB is generally used to transmit data witho= ut coherency. For example, non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCS Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Non-Coherent Standard (NCS). NCS is commonly used for ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NDR Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; NDR packets= are used to transmit a variety of protocol flits including grants and comp= letions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Acquisition Failed on DRS; SNP Mes= sage Class", - "EventCode": "0x39", - "EventName": "UNC_R3_VN1_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a VN1 credit. In order for a request to be transferred across QPI, it must= be guaranteed to have a flit buffer on the remote socket to sink into. Th= ere are two credit pools, VNA and VN1. VNA is a shared pool used to achiev= e high performance. The VN1 pool has reserved entries for each message cla= ss and is used to prevent deadlock. Requests first attempt to acquire a VN= A credit, and then fall back to VN1 if they fail. This therefore counts th= e number of times when a request failed to acquire either a VNA or VN1 cred= it and is delayed. This should generally be a rare situation.; Filter for = Snoop (SNP) message class. SNP is used for outgoing snoops. Note that sno= op responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; DRS Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Data Response (DRS). DRS is generally used to transm= it data with coherency. For example, remote reads and writes, or cache to = cache transfers will transmit their data using DRS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; HOM Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for the Home (HOM) message class. HOM is generally used = to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCB Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Broadcast (NCB). NCB is generally used = to transmit data without coherency. For example, non-coherent read data re= turns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCS Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Non-Coherent Standard (NCS). NCS is commonly used fo= r ?", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; NDR Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; NDR packets are used to transmit a variety of protocol flits inc= luding grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN1 Credit Used; SNP Message Class", - "EventCode": "0x38", - "EventName": "UNC_R3_VN1_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN1. VNA is a shared pool used t= o achieve high performance. The VN1 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN1 if they fail. This counts the = number of times a VN1 credit was used. Note that a single VN1 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN1 will only count a single credit even though it may use multiple= buffers.; Filter for Snoop (SNP) message class. SNP is used for outgoing = snoops. Note that snoop responses flow on the HOM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions; HOM Message Class", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.AD", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions; HOM Message Class", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.BL", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.; Filter for the Home (HOM) message class. = HOM is generally used to send requests, request responses, and snoop respo= nses.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; DRS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Data Response (DRS). DRS = is generally used to transmit data with coherency. For example, remote rea= ds and writes, or cache to cache transfers will transmit their data using D= RS.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; HOM Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for the Home (HOM) message cla= ss. HOM is generally used to send requests, request responses, and snoop r= esponses.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCB Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Broadcast (NC= B). NCB is generally used to transmit data without coherency. For example= , non-coherent read data returns.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Non-Coherent Standard (NCS= ).", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NDR Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; NDR packets are used to transmit a va= riety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; SNP Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.; Filter for Snoop (SNP) message class.= SNP is used for outgoing snoops. Note that snoop responses flow on the H= OM message class.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Cycles with no VNA credits available", - "EventCode": "0x31", - "EventName": "UNC_R3_VNA_CREDIT_CYCLES_OUT", - "PerPkg": "1", - "PublicDescription": "Number of QPI uclk cycles when the transmitt= ed has no VNA credits available and therefore cannot send any requests on t= his channel. Note that this does not mean that no flits can be transmitted= , as those holding VN0 credits will still (potentially) be able to transmit= . Generally it is the goal of the uncore that VNA credits should not run o= ut, as this can substantially throttle back useful QPI bandwidth.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Cycles with 1 or more VNA credits in use", - "EventCode": "0x32", - "EventName": "UNC_R3_VNA_CREDIT_CYCLES_USED", - "PerPkg": "1", - "PublicDescription": "Number of QPI uclk cycles with one or more V= NA credits in use. This event can be used in conjunction with the VNA In-U= se Accumulator to calculate the average number of used VNA credits.", - "Unit": "R3QPI" - }, - { - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.INT_PRIO", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "IDI Lock/SplitLock Cycles", - "EventCode": "0x44", - "EventName": "UNC_U_LOCK_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles. Filter from source CoreID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.CMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Livelock", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; LTError", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LTERROR", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T0", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T1", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; Filter by core", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Other", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.OTHER", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Trap", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.TRAP", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.UMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x20", - "Unit": "UBOX" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 950CCC77B6F for ; Thu, 13 Apr 2023 13:34:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230255AbjDMNeD (ORCPT ); Thu, 13 Apr 2023 09:34:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231499AbjDMNdi (ORCPT ); Thu, 13 Apr 2023 09:33:38 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C016AF05 for ; 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bh=XXimpLffHE1Rblwo7OX38wPtzyjXUfJpALSjGpbz/KU=; b=e8fX+cuUpVhneaQF6VxHtrpXjspdOc3zQWXZLqpfLU1yxq47YLZ2EdRveVM4QEKMpd NCSWxDQ3WL/uD/q1vhj6V3FZvC/DQEd0wjRNuGRqGmFKJxYdnmQsFYtkl2vOm5pCKS9c eLxM/N8XSk3jaUmHfj5l8ux2hSP2z4QzqJLIHDruV9C5U+dqlrMfMNvB7/IRkoL88HeL EJdv9OoLHKFYyNS0FpN6JFptJZQeFoRmPUgZdMrGS+mBK/M6Pmn4CSni+KXETIC+VRI8 dFuXIbPU1Us4fHTpaAu6JFWEPQdXOEOGhbrztp/GWzcK/h3hwX82Mvuk7WkC/UDR34xR e/rQ== X-Gm-Message-State: AAQBX9ejybvhVTC3Y4AH0uIsQwzoHDLbL0pQOcXc1Co0/PfTCzWEh+f3 BOKKNlDogSD0iz1BQ0pREQcIYHww7hyq X-Google-Smtp-Source: AKy350aaMZJXeGzRKeHNi0HjYyp+9DObQVWTausYCqO8PMJmKEHPfydgNQdAIV+dSvjlFBKzFP02NyOxlgY5 X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a81:ad45:0:b0:533:8f19:4576 with SMTP id l5-20020a81ad45000000b005338f194576mr1458033ywk.0.1681392725973; Thu, 13 Apr 2023 06:32:05 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:43 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-16-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 15/21] perf vendor events intel: Fix uncore topics for jaketown From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/jaketown/uncore-cache.json | 194 +-- .../x86/jaketown/uncore-interconnect.json | 1237 ++++++++++++++- .../arch/x86/jaketown/uncore-io.json | 324 ++++ .../arch/x86/jaketown/uncore-other.json | 1393 ----------------- 4 files changed, 1574 insertions(+), 1574 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/jaketown/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/jaketown/uncore-other.js= on diff --git a/tools/perf/pmu-events/arch/x86/jaketown/uncore-cache.json b/to= ols/perf/pmu-events/arch/x86/jaketown/uncore-cache.json index 47830ca5c682..63395e7ee0ce 100644 --- a/tools/perf/pmu-events/arch/x86/jaketown/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/jaketown/uncore-cache.json @@ -3,7 +3,7 @@ "BriefDescription": "Uncore Clocks", "EventName": "UNC_C_CLOCKTICKS", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Counter 0 Occupancy", @@ -11,13 +11,13 @@ "EventName": "UNC_C_COUNTER0_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x21", "EventName": "UNC_C_ISMQ_DRD_MISS_OCC", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Data Read Request", @@ -26,7 +26,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:18] bits correspond to [FMESI] state.", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; RTID", @@ -35,7 +35,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:18] bits correspond to [FMESI] state.", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; External Snoop Request", @@ -44,7 +44,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:18] bits correspond to [FMESI] state.", "UMask": "0x9", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cache Lookups; Write Requests", @@ -53,7 +53,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set filter mask bit 0 and select a sta= te or states to match. Otherwise, the event will count nothing. CBoGlCtr= l[22:18] bits correspond to [FMESI] state.", "UMask": "0x5", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in E state", @@ -62,7 +62,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized", @@ -71,7 +71,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in M state", @@ -80,7 +80,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Victimized Lines that Match= NID", @@ -89,7 +89,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Lines Victimized; Lines in S State", @@ -98,7 +98,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; RFO HitS", @@ -107,7 +107,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Silent Snoop Eviction", @@ -116,7 +116,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc", @@ -125,7 +125,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Cbo Misc; Write Combining Aliasing", @@ -134,7 +134,7 @@ "PerPkg": "1", "PublicDescription": "Miscellaneous events in the Cbo.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Even", @@ -143,7 +143,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the 'UP= ' direction is on the clockwise ring and 'DN' is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Down and Odd", @@ -152,7 +152,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the 'UP= ' direction is on the clockwise ring and 'DN' is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Even", @@ -161,7 +161,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the 'UP= ' direction is on the clockwise ring and 'DN' is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AD Ring In Use; Up and Odd", @@ -170,7 +170,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. We really have two rings in JKT -- a clockwis= e ring and a counter-clockwise ring. On the left side of the ring, the 'UP= ' direction is on the clockwise ring and 'DN' is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Even", @@ -179,7 +179,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the 'UP' = direction is on the clockwise ring and 'DN' is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Down and Odd", @@ -188,7 +188,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the 'UP' = direction is on the clockwise ring and 'DN' is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Even", @@ -197,7 +197,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the 'UP' = direction is on the clockwise ring and 'DN' is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "AK Ring In Use; Up and Odd", @@ -206,7 +206,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise = ring and a counter-clockwise ring. On the left side of the ring, the 'UP' = direction is on the clockwise ring and 'DN' is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Even", @@ -215,7 +215,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the 'UP'= direction is on the clockwise ring and 'DN' is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Down and Odd", @@ -224,7 +224,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the 'UP'= direction is on the clockwise ring and 'DN' is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Even", @@ -233,7 +233,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the 'UP'= direction is on the clockwise ring and 'DN' is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Up and Odd", @@ -242,7 +242,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.We really have two rings in JKT -- a clockwise= ring and a counter-clockwise ring. On the left side of the ring, the 'UP'= direction is on the clockwise ring and 'DN' is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Acknowledgements to core", @@ -250,7 +250,7 @@ "EventName": "UNC_C_RING_BOUNCES.AK_CORE", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Data Responses to core", @@ -258,7 +258,7 @@ "EventName": "UNC_C_RING_BOUNCES.BL_CORE", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Number of LLC responses that bounced on the R= ing.; Snoops of processor's cache.", @@ -266,7 +266,7 @@ "EventName": "UNC_C_RING_BOUNCES.IV_CORE", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "BL Ring in Use; Any", @@ -275,41 +275,41 @@ "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop. There is only 1 IV ring in JKT. Therefore, i= f one wants to monitor the 'Even' ring, they should select both UP_EVEN and= DN_EVEN. To monitor the 'Odd' ring, they should select both UP_ODD and DN= _ODD.", "UMask": "0xf", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x6", "EventName": "UNC_C_RING_SINK_STARVED.AD_CACHE", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x6", "EventName": "UNC_C_RING_SINK_STARVED.AK_CORE", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x6", "EventName": "UNC_C_RING_SINK_STARVED.BL_CORE", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x6", "EventName": "UNC_C_RING_SINK_STARVED.IV_CORE", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x7", "EventName": "UNC_C_RING_SRC_THRTL", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IRQ", @@ -318,7 +318,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; IPQ", @@ -327,7 +327,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; ISMQ", @@ -336,7 +336,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Arbiter Blocking Cycles; ISMQ_BID", @@ -345,7 +345,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in external starvation. This = occurs when one of the ingress queues is being starved by the other queues.= ", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IPQ", @@ -354,7 +354,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ", @@ -363,7 +363,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; IRQ Rejected", @@ -372,7 +372,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Allocations; VFIFO", @@ -381,7 +381,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IPQ", @@ -390,7 +390,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; IRQ", @@ -399,7 +399,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Internal Starvation Cycles; ISMQ", @@ -408,7 +408,7 @@ "PerPkg": "1", "PublicDescription": "Counts cycles in internal starvation. This = occurs when one (or more) of the entries in the ingress queue are being sta= rved out by other entries in that queue.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Address Conflict", @@ -417,7 +417,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; Any Reject", @@ -426,7 +426,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No Egress Credits", @@ -435,7 +435,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Probe Queue Retries; No QPI Credits", @@ -444,7 +444,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a snoop (probe) request had = to retry. Filters exist to cover some of the common cases retries.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Address Confli= ct", @@ -452,7 +452,7 @@ "EventName": "UNC_C_RxR_IRQ_RETRY.ADDR_CONFLICT", "PerPkg": "1", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; Any Reject", @@ -460,7 +460,7 @@ "EventName": "UNC_C_RxR_IRQ_RETRY.ANY", "PerPkg": "1", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No Egress Cred= its", @@ -468,7 +468,7 @@ "EventName": "UNC_C_RxR_IRQ_RETRY.FULL", "PerPkg": "1", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No QPI Credits= ", @@ -476,7 +476,7 @@ "EventName": "UNC_C_RxR_IRQ_RETRY.QPI_CREDITS", "PerPkg": "1", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Request Queue Rejects; No RTIDs", @@ -484,7 +484,7 @@ "EventName": "UNC_C_RxR_IRQ_RETRY.RTID", "PerPkg": "1", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; Any Reject", @@ -493,7 +493,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No Egress Credits", @@ -502,7 +502,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No IIO Credits", @@ -511,7 +511,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No QPI Credits", @@ -520,7 +520,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "ISMQ Retries; No RTIDs", @@ -529,7 +529,7 @@ "PerPkg": "1", "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IPQ", @@ -538,7 +538,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ", @@ -547,7 +547,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; IRQ Rejected", @@ -556,7 +556,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Ingress Occupancy; VFIFO", @@ -565,7 +565,7 @@ "PerPkg": "1", "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Evictions", @@ -574,7 +574,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Miss All", @@ -583,7 +583,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0xa", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Miss Opcode Match", @@ -592,7 +592,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched", @@ -601,7 +601,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Evictions", @@ -610,7 +610,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Miss All", @@ -619,7 +619,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched Miss", @@ -628,7 +628,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID and Opcode Matched", @@ -637,7 +637,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; NID Matched Writebacks", @@ -646,7 +646,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x50", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Opcode Match", @@ -655,7 +655,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Inserts; Writebacks", @@ -664,7 +664,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent. = There are a number of subevent 'filters' but only a subset of the subevent = combinations are valid. Subevents that require an opcode or NID match requ= ire the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. If, for example= , one wanted to count DRD Local Misses, one should select 'MISS_OPC_MATCH' = and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182).", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Any", @@ -673,7 +673,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Evictions", @@ -682,7 +682,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss All", @@ -691,7 +691,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0xa", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Miss Opcode Match", @@ -700,7 +700,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x3", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -709,7 +709,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched Evictions", @@ -718,7 +718,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID Matched", @@ -727,7 +727,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x4a", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched Miss", @@ -736,7 +736,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x43", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; NID and Opcode Matched", @@ -745,7 +745,7 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "TOR Occupancy; Opcode Match", @@ -754,13 +754,13 @@ "PerPkg": "1", "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select 'MI= SS_OPC_MATCH' and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182)", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "EventCode": "0x4", "EventName": "UNC_C_TxR_ADS_USED", "PerPkg": "1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Cachebo", @@ -769,7 +769,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x1", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AD - Corebo", @@ -778,7 +778,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x10", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Cachebo", @@ -787,7 +787,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; AK - Corebo", @@ -796,7 +796,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x20", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Cacheno", @@ -805,7 +805,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; BL - Corebo", @@ -814,7 +814,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x40", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Egress Allocations; IV - Cachebo", @@ -823,7 +823,7 @@ "PerPkg": "1", "PublicDescription": "Number of allocations into the Cbo Egress. = The Egress is used to queue up requests destined for the ring.", "UMask": "0x8", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto AK Ring", @@ -832,7 +832,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", "UMask": "0x2", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "Injection Starvation; Onto BL Ring", @@ -841,7 +841,7 @@ "PerPkg": "1", "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the Egress cannot send a transaction onto the ring for = a long period of time.", "UMask": "0x4", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "HA to iMC Bypass; Not Taken", diff --git a/tools/perf/pmu-events/arch/x86/jaketown/uncore-interconnect.js= on b/tools/perf/pmu-events/arch/x86/jaketown/uncore-interconnect.json index b16bb649225d..874f15ea8228 100644 --- a/tools/perf/pmu-events/arch/x86/jaketown/uncore-interconnect.json +++ b/tools/perf/pmu-events/arch/x86/jaketown/uncore-interconnect.json @@ -1,11 +1,307 @@ [ + { + "BriefDescription": "Address Match (Conflict) Count; Conflict Merg= es", + "EventCode": "0x17", + "EventName": "UNC_I_ADDRESS_MATCH.MERGE_COUNT", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Address Match (Conflict) Count; Conflict Stal= ls", + "EventCode": "0x17", + "EventName": "UNC_I_ADDRESS_MATCH.STALL_COUNT", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Write Ack Pending Occupancy; Any Source", + "EventCode": "0x14", + "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Write Ack Pending Occupancy; Select Source", + "EventCode": "0x14", + "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Ownership Occupancy; Any So= urce", + "EventCode": "0x13", + "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Ownership Occupancy; Select= Source", + "EventCode": "0x13", + "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Read Occupancy; Any Source", + "EventCode": "0x10", + "EventName": "UNC_I_CACHE_READ_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Read Occupancy; Select Source", + "EventCode": "0x10", + "EventName": "UNC_I_CACHE_READ_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy; Any Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy; Select Source", + "EventCode": "0x12", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Occupancy; Any Source", + "EventCode": "0x11", + "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Outstanding Write Occupancy; Select Source", + "EventCode": "0x11", + "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.SOURCE", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Clocks in the IRP", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Number of clocks in the IRP.", + "Unit": "IRP" + }, + { + "EventCode": "0xB", + "EventName": "UNC_I_RxR_AK_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the AK Ingr= ess is full. This queue is where the IRP receives responses from R2PCIe (t= he ring).", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Ingress Occupancy", + "EventCode": "0xA", + "EventName": "UNC_I_RxR_AK_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", + "Unit": "IRP" + }, + { + "EventCode": "0xC", + "EventName": "UNC_I_RxR_AK_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the AK Ingress = in each cycles. This queue is where the IRP receives responses from R2PCIe= (the ring).", + "Unit": "IRP" + }, + { + "EventCode": "0x4", + "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - DRS", + "EventCode": "0x1", + "EventName": "UNC_I_RxR_BL_DRS_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "EventCode": "0x7", + "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "EventCode": "0x5", + "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - NCB", + "EventCode": "0x2", + "EventName": "UNC_I_RxR_BL_NCB_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "EventCode": "0x8", + "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "EventCode": "0x6", + "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "BL Ingress Occupancy - NCS", + "EventCode": "0x3", + "EventName": "UNC_I_RxR_BL_NCS_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", + "Unit": "IRP" + }, + { + "EventCode": "0x9", + "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", + "Unit": "IRP" + }, + { + "BriefDescription": "Tickle Count; Ownership Lost", + "EventCode": "0x16", + "EventName": "UNC_I_TICKLES.LOST_OWNERSHIP", + "PerPkg": "1", + "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Tickle Count; Data Returned", + "EventCode": "0x16", + "EventName": "UNC_I_TICKLES.TOP_OF_QUEUE", + "PerPkg": "1", + "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Read Prefetches", + "EventCode": "0x15", + "EventName": "UNC_I_TRANSACTIONS.PD_PREFETCHES", + "PerPkg": "1", + "PublicDescription": "Counts the number of 'Inbound' transactions = from the IRP to the Uncore. This can be filtered based on request type in = addition to the source queue. Note the special filtering equation. We do = OR-reduction on the request type. If the SOURCE bit is set, then we also d= o AND qualification based on the source portID.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Reads", + "EventCode": "0x15", + "EventName": "UNC_I_TRANSACTIONS.READS", + "PerPkg": "1", + "PublicDescription": "Counts the number of 'Inbound' transactions = from the IRP to the Uncore. This can be filtered based on request type in = addition to the source queue. Note the special filtering equation. We do = OR-reduction on the request type. If the SOURCE bit is set, then we also d= o AND qualification based on the source portID.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Writes", + "EventCode": "0x15", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts the number of 'Inbound' transactions = from the IRP to the Uncore. This can be filtered based on request type in = addition to the source queue. Note the special filtering equation. We do = OR-reduction on the request type. If the SOURCE bit is set, then we also d= o AND qualification based on the source portID.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD Egress Credit Stalls", + "EventCode": "0x18", + "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x19", + "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xE", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xF", + "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0xD", + "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "Write Ordering Stalls", + "EventCode": "0x1A", + "EventName": "UNC_I_WRITE_ORDERING_STALL_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when there are p= ending write ACK's in the switch but the switch->IRP pipeline is not utiliz= ed.", + "Unit": "IRP" + }, { "BriefDescription": "Number of qfclks", "EventCode": "0x14", "EventName": "UNC_Q_CLOCKTICKS", "PerPkg": "1", "PublicDescription": "Counts the number of clocks in the QPI LL. = This clock runs at 1/8th the 'GT/s' speed of the QPI link. For example, a = 8GT/s link will have qfclk or 1GHz. JKT does not support dynamic link spee= ds, so this frequency is fixed.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Count of CTO Events", @@ -13,7 +309,7 @@ "EventName": "UNC_Q_CTO_COUNT", "PerPkg": "1", "PublicDescription": "Counts the number of CTO (cluster trigger ou= ts) events that were asserted across the two slots. If both slots trigger = in a given cycle, the event will increment by 2. You can use edge detect t= o count the number of cases when both events triggered.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s Credits", @@ -22,7 +318,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egres= s and RBT", @@ -31,7 +327,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT N= ot Set", @@ -40,7 +336,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Direct 2 Core Spawning; Spawn Success", @@ -49,7 +345,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of DRS packets that we att= empted to do direct2core on. There are 4 mutually exclusive filters. Filt= er [0] can be used to get successful spawns, while [1:3] provide the differ= ent failure cases. Note that this does not count packets that are not cand= idates for Direct2Core. The only candidates for Direct2Core are DRS packet= s destined for Cbos.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L1", @@ -57,7 +353,7 @@ "EventName": "UNC_Q_L1_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L1 power= mode. L1 is a mode that totally shuts down a QPI link. Use edge detect t= o count the number of instances when the QPI link entered L1. Link power s= tates are per link and per direction, so for example the Tx direction could= be in one state while Rx was in another. Because L1 totally shuts down the= link, it takes a good amount of time to exit this mode.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0p", @@ -65,7 +361,7 @@ "EventName": "UNC_Q_RxL0P_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0", @@ -73,7 +369,7 @@ "EventName": "UNC_Q_RxL0_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Bypassed", @@ -81,7 +377,7 @@ "EventName": "UNC_Q_RxL_BYPASSED", "PerPkg": "1", "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the flit buffer and pass directly across the BGF an= d into the Egress. This is a latency optimization, and should generally be= the common case. If this value is less than the number of flits transferr= ed, it implies that there was queueing getting onto the ring, and thus the = transactions saw higher latency.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "CRC Errors Detected; LinkInit", @@ -90,7 +386,7 @@ "PerPkg": "1", "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "CRC Errors Detected; Normal Operations", @@ -99,7 +395,7 @@ "PerPkg": "1", "PublicDescription": "Number of CRC errors detected in the QPI Age= nt. Each QPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the QPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; DRS", @@ -108,7 +404,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; HOM", @@ -117,7 +413,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; NCB", @@ -126,7 +422,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; NCS", @@ -135,7 +431,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; NDR", @@ -144,7 +440,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VN0 Credit Consumed; SNP", @@ -153,7 +449,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VNA Credit Consumed", @@ -161,7 +457,7 @@ "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VNA", "PerPkg": "1", "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Cycles Not Empty", @@ -169,7 +465,7 @@ "EventName": "UNC_Q_RxL_CYCLES_NE", "PerPkg": "1", "PublicDescription": "Counts the number of cycles that the QPI RxQ= was not empty. Generally, when data is transmitted across QPI, it will by= pass the RxQ and pass directly to the ring interface. If things back up ge= tting transmitted onto the ring, however, it may need to allocate into this= buffer, thus increasing the latency. This event can be used in conjunctio= n with the Flit Buffer Occupancy Accumulator event to calculate the average= occupancy.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 0; Data Tx Flits", @@ -178,7 +474,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each '= flit' is made up of 80 bits of information (in addition to some ECC data). = In full-width (L0) mode, flits are made up of four 'fits', each of which c= ontains 20 bits of data (along with some additional ECC data). In half-wi= dth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as = many fits to transmit a flit. When one talks about QPI 'speed' (for exampl= e, 8.0 GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the = system will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can = calculate the bandwidth of the link by taking: flits*80b/time. Note that t= his is not the same as 'data' bandwidth. For example, when we are transfer= ring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with he= ader information and 8 with 64 bits of actual 'data' and an additional 16 b= its of other information. To calculate 'data' bandwidth, one should theref= ore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 0; Idle and Null Flits= ", @@ -187,7 +483,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each '= flit' is made up of 80 bits of information (in addition to some ECC data). = In full-width (L0) mode, flits are made up of four 'fits', each of which c= ontains 20 bits of data (along with some additional ECC data). In half-wi= dth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as = many fits to transmit a flit. When one talks about QPI 'speed' (for exampl= e, 8.0 GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the = system will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can = calculate the bandwidth of the link by taking: flits*80b/time. Note that t= his is not the same as 'data' bandwidth. For example, when we are transfer= ring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with he= ader information and 8 with 64 bits of actual 'data' and an additional 16 b= its of other information. To calculate 'data' bandwidth, one should theref= ore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 0; Non-Data protocol T= x Flits", @@ -196,7 +492,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. It includes filters for Idle, protocol, and Data Flits. Each '= flit' is made up of 80 bits of information (in addition to some ECC data). = In full-width (L0) mode, flits are made up of four 'fits', each of which c= ontains 20 bits of data (along with some additional ECC data). In half-wi= dth (L0p) mode, the fits are only 10 bits, and therefore it takes twice as = many fits to transmit a flit. When one talks about QPI 'speed' (for exampl= e, 8.0 GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the = system will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can = calculate the bandwidth of the link by taking: flits*80b/time. Note that t= his is not the same as 'data' bandwidth. For example, when we are transfer= ring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with he= ader information and 8 with 64 bits of actual 'data' and an additional 16 b= its of other information. To calculate 'data' bandwidth, one should theref= ore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; DRS Flits (both Hea= der and Data)", @@ -205,7 +501,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for SNP, HOM, and DRS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x18", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; DRS Data Flits", @@ -214,7 +510,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for SNP, HOM, and DRS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; DRS Header Flits", @@ -223,7 +519,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for SNP, HOM, and DRS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; HOM Flits", @@ -232,7 +528,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for SNP, HOM, and DRS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x6", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; HOM Non-Request Fli= ts", @@ -241,7 +537,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for SNP, HOM, and DRS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; HOM Request Flits", @@ -250,7 +546,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for SNP, HOM, and DRS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 1; SNP Flits", @@ -259,7 +555,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for SNP, HOM, and DRS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent Rx Fli= ts", @@ -268,7 +564,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for NDR, NCB, and NCS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0xc", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent data R= x Flits", @@ -277,7 +573,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for NDR, NCB, and NCS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent non-da= ta Rx Flits", @@ -286,7 +582,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for NDR, NCB, and NCS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Coherent standa= rd Rx Flits", @@ -295,7 +591,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for NDR, NCB, and NCS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AD", @@ -304,7 +600,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for NDR, NCB, and NCS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Received - Group 2; Non-Data Response R= x Flits - AK", @@ -313,7 +609,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits received from the= QPI Link. This is one of three 'groups' that allow us to track flits. It= includes filters for NDR, NCB, and NCS message classes. Each 'flit' is ma= de up of 80 bits of information (in addition to some ECC data). In full-wi= dth (L0) mode, flits are made up of four 'fits', each of which contains 20 = bits of data (along with some additional ECC data). In half-width (L0p) m= ode, the fits are only 10 bits, and therefore it takes twice as many fits t= o transmit a flit. When one talks about QPI 'speed' (for example, 8.0 GT/s= ), the 'transfers' here refer to 'fits'. Therefore, in L0, the system will= transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calculate t= he bandwidth of the link by taking: flits*80b/time. Note that this is not = the same as 'data' bandwidth. For example, when we are transferring a 64B = cacheline across QPI, we will break it into 9 flits -- 1 with header inform= ation and 8 with 64 bits of actual 'data' and an additional 16 bits of othe= r information. To calculate 'data' bandwidth, one should therefore do: dat= a flits * 8B / time.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations", @@ -321,7 +617,7 @@ "EventName": "UNC_Q_RxL_INSERTS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - DRS", @@ -329,7 +625,7 @@ "EventName": "UNC_Q_RxL_INSERTS_DRS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only DRS flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - HOM", @@ -337,7 +633,7 @@ "EventName": "UNC_Q_RxL_INSERTS_HOM", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only HOM flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCB", @@ -345,7 +641,7 @@ "EventName": "UNC_Q_RxL_INSERTS_NCB", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCB flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NCS", @@ -353,7 +649,7 @@ "EventName": "UNC_Q_RxL_INSERTS_NCS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NCS flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - NDR", @@ -361,7 +657,7 @@ "EventName": "UNC_Q_RxL_INSERTS_NDR", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only NDR flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Rx Flit Buffer Allocations - SNP", @@ -369,7 +665,7 @@ "EventName": "UNC_Q_RxL_INSERTS_SNP", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Rx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime. This monitors only SNP flits.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - All Packets", @@ -377,7 +673,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - DRS", @@ -385,7 +681,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_DRS", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors DRS flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - HOM", @@ -393,7 +689,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_HOM", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors HOM flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCB", @@ -401,7 +697,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_NCB", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCB flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NCS", @@ -409,7 +705,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_NCS", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NCS flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - NDR", @@ -417,7 +713,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_NDR", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors NDR flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "RxQ Occupancy - SNP", @@ -425,7 +721,7 @@ "EventName": "UNC_Q_RxL_OCCUPANCY_SNP", "PerPkg": "1", "PublicDescription": "Accumulates the number of elements in the QP= I RxQ in each cycle. Generally, when data is transmitted across QPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime. This= monitors SNP flits only.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; BGF Stall - HOM", @@ -434,7 +730,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; BGF Stall - DRS", @@ -443,7 +739,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; BGF Stall - SNP", @@ -452,7 +748,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; BGF Stall - NDR", @@ -461,7 +757,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; BGF Stall - NCS", @@ -470,7 +766,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x20", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; BGF Stall - NCB", @@ -479,7 +775,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; Egress Credits", @@ -488,7 +784,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x40", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Stalls Sending to R3QPI; GV", @@ -497,7 +793,7 @@ "PerPkg": "1", "PublicDescription": "Number of stalls trying to send to R3QPI.", "UMask": "0x80", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0p", @@ -505,7 +801,7 @@ "EventName": "UNC_Q_TxL0P_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0p powe= r mode. L0p is a mode where we disable 1/2 of the QPI lanes, decreasing ou= r bandwidth in order to save power. It increases snoop and data transfer l= atencies and decreases overall bandwidth. This mode can be very useful in = NUMA optimized workloads that largely only utilize QPI for snoops and their= responses. Use edge detect to count the number of instances when the QPI = link entered L0p. Link power states are per link and per direction, so for= example the Tx direction could be in one state while Rx was in another.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles in L0", @@ -513,7 +809,7 @@ "EventName": "UNC_Q_TxL0_POWER_CYCLES", "PerPkg": "1", "PublicDescription": "Number of QPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Bypassed", @@ -521,7 +817,7 @@ "EventName": "UNC_Q_TxL_BYPASSED", "PerPkg": "1", "PublicDescription": "Counts the number of times that an incoming = flit was able to bypass the Tx flit buffer and pass directly out the QPI Li= nk. Generally, when data is transmitted across QPI, it will bypass the TxQ = and pass directly to the link. However, the TxQ will be used with L0p and = when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is al= most full", @@ -530,7 +826,7 @@ "PerPkg": "1", "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is fu= ll", @@ -539,7 +835,7 @@ "PerPkg": "1", "PublicDescription": "Number of cycles when the Tx side ran out of= Link Layer Retry credits, causing the Tx to stall.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Cycles not Empty", @@ -547,7 +843,7 @@ "EventName": "UNC_Q_TxL_CYCLES_NE", "PerPkg": "1", "PublicDescription": "Counts the number of cycles when the TxQ is = not empty. Generally, when data is transmitted across QPI, it will bypass t= he TxQ and pass directly to the link. However, the TxQ will be used with L= 0p and when LLR occurs, increasing latency to transfer out to the link.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 0; Data Tx Flits", @@ -555,7 +851,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach 'flit' is made up of 80 bits of information (in addition to some ECC da= ta). In full-width (L0) mode, flits are made up of four 'fits', each of wh= ich contains 20 bits of data (along with some additional ECC data). In ha= lf-width (L0p) mode, the fits are only 10 bits, and therefore it takes twic= e as many fits to transmit a flit. When one talks about QPI 'speed' (for e= xample, 8.0 GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0,= the system will transfer 1 'flit' at the rate of 1/4th the QPI speed. One= can calculate the bandwidth of the link by taking: flits*80b/time. Note t= hat this is not the same as 'data' bandwidth. For example, when we are tra= nsferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 wi= th header information and 8 with 64 bits of actual 'data' and an additional= 16 bits of other information. To calculate 'data' bandwidth, one should t= herefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 0; Idle and Null Fl= its", @@ -563,7 +859,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach 'flit' is made up of 80 bits of information (in addition to some ECC da= ta). In full-width (L0) mode, flits are made up of four 'fits', each of wh= ich contains 20 bits of data (along with some additional ECC data). In ha= lf-width (L0p) mode, the fits are only 10 bits, and therefore it takes twic= e as many fits to transmit a flit. When one talks about QPI 'speed' (for e= xample, 8.0 GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0,= the system will transfer 1 'flit' at the rate of 1/4th the QPI speed. One= can calculate the bandwidth of the link by taking: flits*80b/time. Note t= hat this is not the same as 'data' bandwidth. For example, when we are tra= nsferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 wi= th header information and 8 with 64 bits of actual 'data' and an additional= 16 bits of other information. To calculate 'data' bandwidth, one should t= herefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 0; Non-Data protoco= l Tx Flits", @@ -571,7 +867,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. It includes filters for Idle, protocol, and Data Flits. E= ach 'flit' is made up of 80 bits of information (in addition to some ECC da= ta). In full-width (L0) mode, flits are made up of four 'fits', each of wh= ich contains 20 bits of data (along with some additional ECC data). In ha= lf-width (L0p) mode, the fits are only 10 bits, and therefore it takes twic= e as many fits to transmit a flit. When one talks about QPI 'speed' (for e= xample, 8.0 GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0,= the system will transfer 1 'flit' at the rate of 1/4th the QPI speed. One= can calculate the bandwidth of the link by taking: flits*80b/time. Note t= hat this is not the same as 'data' bandwidth. For example, when we are tra= nsferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 wi= th header information and 8 with 64 bits of actual 'data' and an additional= 16 bits of other information. To calculate 'data' bandwidth, one should t= herefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; DRS Flits (both = Header and Data)", @@ -579,7 +875,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for SNP, HOM, and DRS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x18", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; DRS Data Flits", @@ -587,7 +883,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for SNP, HOM, and DRS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; DRS Header Flits= ", @@ -595,7 +891,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for SNP, HOM, and DRS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; HOM Flits", @@ -603,7 +899,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for SNP, HOM, and DRS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x6", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; HOM Non-Request = Flits", @@ -611,7 +907,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for SNP, HOM, and DRS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; HOM Request Flit= s", @@ -619,7 +915,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for SNP, HOM, and DRS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 1; SNP Flits", @@ -627,7 +923,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for SNP, HOM, and DRS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent Byp= ass Tx Flits", @@ -636,7 +932,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for NDR, NCB, and NCS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0xc", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent dat= a Tx Flits", @@ -645,7 +941,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for NDR, NCB, and NCS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x4", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent non= -data Tx Flits", @@ -654,7 +950,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for NDR, NCB, and NCS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x8", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Coherent sta= ndard Tx Flits", @@ -663,7 +959,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for NDR, NCB, and NCS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x10", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AD", @@ -672,7 +968,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for NDR, NCB, and NCS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x1", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Flits Transferred - Group 2; Non-Data Respons= e Tx Flits - AK", @@ -681,7 +977,7 @@ "PerPkg": "1", "PublicDescription": "Counts the number of flits transmitted acros= s the QPI Link. This is one of three 'groups' that allow us to track flits= . It includes filters for NDR, NCB, and NCS message classes. Each 'flit' = is made up of 80 bits of information (in addition to some ECC data). In fu= ll-width (L0) mode, flits are made up of four 'fits', each of which contain= s 20 bits of data (along with some additional ECC data). In half-width (L= 0p) mode, the fits are only 10 bits, and therefore it takes twice as many f= its to transmit a flit. When one talks about QPI 'speed' (for example, 8.0= GT/s), the 'transfers' here refer to 'fits'. Therefore, in L0, the system= will transfer 1 'flit' at the rate of 1/4th the QPI speed. One can calcul= ate the bandwidth of the link by taking: flits*80b/time. Note that this is= not the same as 'data' bandwidth. For example, when we are transferring a= 64B cacheline across QPI, we will break it into 9 flits -- 1 with header i= nformation and 8 with 64 bits of actual 'data' and an additional 16 bits of= other information. To calculate 'data' bandwidth, one should therefore do= : data flits * 8B / time.", "UMask": "0x2", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Allocations", @@ -689,7 +985,7 @@ "EventName": "UNC_Q_TxL_INSERTS", "PerPkg": "1", "PublicDescription": "Number of allocations into the QPI Tx Flit B= uffer. Generally, when data is transmitted across QPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "Tx Flit Buffer Occupancy", @@ -697,7 +993,7 @@ "EventName": "UNC_Q_TxL_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across QPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VNA Credits Returned", @@ -705,7 +1001,7 @@ "EventName": "UNC_Q_VNA_CREDIT_RETURNS", "PerPkg": "1", "PublicDescription": "Number of VNA credits returned.", - "Unit": "QPI LL" + "Unit": "QPI" }, { "BriefDescription": "VNA Credits Pending Return - Occupancy", @@ -713,6 +1009,779 @@ "EventName": "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY", "PerPkg": "1", "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", - "Unit": "QPI LL" + "Unit": "QPI" + }, + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_R3_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit Acquired", + "EventCode": "0x20", + "EventName": "UNC_R3_IIO_CREDITS_ACQUIRED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the NCS/NCB/DRS c= redit is acquired in the QPI for sending messages on BL to the IIO. There = is one credit for each of these three message classes (three credits total)= . NCS is used for reads to PCIe space, NCB is used for transferring data w= ithout coherency, and DRS is used for transferring data with coherency (cac= heable PCI transactions). This event can only track one message class at a= time.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit Acquired", + "EventCode": "0x20", + "EventName": "UNC_R3_IIO_CREDITS_ACQUIRED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the NCS/NCB/DRS c= redit is acquired in the QPI for sending messages on BL to the IIO. There = is one credit for each of these three message classes (three credits total)= . NCS is used for reads to PCIe space, NCB is used for transferring data w= ithout coherency, and DRS is used for transferring data with coherency (cac= heable PCI transactions). This event can only track one message class at a= time.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit Acquired", + "EventCode": "0x20", + "EventName": "UNC_R3_IIO_CREDITS_ACQUIRED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the NCS/NCB/DRS c= redit is acquired in the QPI for sending messages on BL to the IIO. There = is one credit for each of these three message classes (three credits total)= . NCS is used for reads to PCIe space, NCB is used for transferring data w= ithout coherency, and DRS is used for transferring data with coherency (cac= heable PCI transactions). This event can only track one message class at a= time.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit Rejected", + "EventCode": "0x21", + "EventName": "UNC_R3_IIO_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that a request at= tempted to acquire an NCS/NCB/DRS credit in the QPI for sending messages on= BL to the IIO but was rejected because no credit was available. There is = one credit for each of these three message classes (three credits total). = NCS is used for reads to PCIe space, NCB is used for transferring data with= out coherency, and DRS is used for transferring data with coherency (cachea= ble PCI transactions). This event can only track one message class at a ti= me.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit Rejected", + "EventCode": "0x21", + "EventName": "UNC_R3_IIO_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that a request at= tempted to acquire an NCS/NCB/DRS credit in the QPI for sending messages on= BL to the IIO but was rejected because no credit was available. There is = one credit for each of these three message classes (three credits total). = NCS is used for reads to PCIe space, NCB is used for transferring data with= out coherency, and DRS is used for transferring data with coherency (cachea= ble PCI transactions). This event can only track one message class at a ti= me.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit Rejected", + "EventCode": "0x21", + "EventName": "UNC_R3_IIO_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that a request at= tempted to acquire an NCS/NCB/DRS credit in the QPI for sending messages on= BL to the IIO but was rejected because no credit was available. There is = one credit for each of these three message classes (three credits total). = NCS is used for reads to PCIe space, NCB is used for transferring data with= out coherency, and DRS is used for transferring data with coherency (cachea= ble PCI transactions). This event can only track one message class at a ti= me.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit In Use", + "EventCode": "0x22", + "EventName": "UNC_R3_IIO_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the NCS/NCB= /DRS credit is in use in the QPI for sending messages on BL to the IIO. Th= ere is one credit for each of these three message classes (three credits to= tal). NCS is used for reads to PCIe space, NCB is used for transferring da= ta without coherency, and DRS is used for transferring data with coherency = (cacheable PCI transactions). This event can only track one message class = at a time.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit In Use", + "EventCode": "0x22", + "EventName": "UNC_R3_IIO_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the NCS/NCB= /DRS credit is in use in the QPI for sending messages on BL to the IIO. Th= ere is one credit for each of these three message classes (three credits to= tal). NCS is used for reads to PCIe space, NCB is used for transferring da= ta without coherency, and DRS is used for transferring data with coherency = (cacheable PCI transactions). This event can only track one message class = at a time.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "to IIO BL Credit In Use", + "EventCode": "0x22", + "EventName": "UNC_R3_IIO_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the NCS/NCB= /DRS credit is in use in the QPI for sending messages on BL to the IIO. Th= ere is one credit for each of these three message classes (three credits to= tal). NCS is used for reads to PCIe space, NCB is used for transferring da= ta without coherency, and DRS is used for transferring data with coherency = (cacheable PCI transactions). This event can only track one message class = at a time.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R3_RING_AD_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R3_RING_AK_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R3_RING_BL_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "R3 IV Ring in Use; Any", + "EventCode": "0xa", + "EventName": "UNC_R3_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.", + "UMask": "0xf", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Bypassed", + "EventCode": "0x12", + "EventName": "UNC_R3_RxR_BYPASSED.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the Ingress = was bypassed and an incoming transaction was bypassed directly across the B= GF and into the qfclk domain.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; DRS", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; HOM", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCB", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCS", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NDR", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; SNP", + "EventCode": "0x10", + "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; DRS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; HOM", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.HOM", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCB", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NCS", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; NDR", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.NDR", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Allocations; SNP", + "EventCode": "0x11", + "EventName": "UNC_R3_RxR_INSERTS.SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; DRS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.DRS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; HOM", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.HOM", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; NCB", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; NCS", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; NDR", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.NDR", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Ingress Occupancy Accumulator; SNP", + "EventCode": "0x13", + "EventName": "UNC_R3_RxR_OCCUPANCY.SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", + "EventCode": "0x37", + "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; DRS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; HOM Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCB Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCS Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; NDR Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VN0 Credit Used; SNP Message Class", + "EventCode": "0x36", + "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA credit Acquisitions", + "EventCode": "0x33", + "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED", + "PerPkg": "1", + "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; DRS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", + "UMask": "0x8", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; HOM Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", + "UMask": "0x1", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCB Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", + "UMask": "0x10", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NCS Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", + "UMask": "0x20", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; NDR Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", + "UMask": "0x4", + "Unit": "R3QPI" + }, + { + "BriefDescription": "VNA Credit Reject; SNP Message Class", + "EventCode": "0x34", + "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", + "PerPkg": "1", + "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", + "UMask": "0x2", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Cycles with no VNA credits available", + "EventCode": "0x31", + "EventName": "UNC_R3_VNA_CREDIT_CYCLES_OUT", + "PerPkg": "1", + "PublicDescription": "Number of QPI uclk cycles when the transmitt= ed has no VNA credits available and therefore cannot send any requests on t= his channel. Note that this does not mean that no flits can be transmitted= , as those holding VN0 credits will still (potentially) be able to transmit= . Generally it is the goal of the uncore that VNA credits should not run o= ut, as this can substantially throttle back useful QPI bandwidth.", + "Unit": "R3QPI" + }, + { + "BriefDescription": "Cycles with 1 or more VNA credits in use", + "EventCode": "0x32", + "EventName": "UNC_R3_VNA_CREDIT_CYCLES_USED", + "PerPkg": "1", + "PublicDescription": "Number of QPI uclk cycles with one or more V= NA credits in use. This event can be used in conjunction with the VNA In-U= se Accumulator to calculate the average number of used VNA credits.", + "Unit": "R3QPI" + }, + { + "EventName": "UNC_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "VLW Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.DISABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.ENABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Filter Match", + "EventCode": "0x41", + "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", + "PerPkg": "1", + "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "IDI Lock/SplitLock Cycles", + "EventCode": "0x44", + "EventName": "UNC_U_LOCK_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", + "Unit": "UBOX" + }, + { + "BriefDescription": "MsgCh Requests by Size; 4B Requests", + "EventCode": "0x47", + "EventName": "UNC_U_MSG_CHNL_SIZE_COUNT.4B", + "PerPkg": "1", + "PublicDescription": "Number of transactions on the message channe= l filtered by request size. This includes both reads and writes.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "MsgCh Requests by Size; 8B Requests", + "EventCode": "0x47", + "EventName": "UNC_U_MSG_CHNL_SIZE_COUNT.8B", + "PerPkg": "1", + "PublicDescription": "Number of transactions on the message channe= l filtered by request size. This includes both reads and writes.", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack; ACK to Deassert", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ACK_TO_DEASSERT", + "PerPkg": "1", + "PublicDescription": "PHOLD cycles. Filter from source CoreID.", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "PHOLD cycles. Filter from source CoreID.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS.COUNT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.CMC", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Livelock", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; LTError", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.LTERROR", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Monitor T0", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Monitor T1", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Other", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.OTHER", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Trap", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.TRAP", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", + "EventCode": "0x43", + "EventName": "UNC_U_U2C_EVENTS.UMC", + "PerPkg": "1", + "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", + "UMask": "0x20", + "Unit": "UBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/jaketown/uncore-io.json b/tools= /perf/pmu-events/arch/x86/jaketown/uncore-io.json new file mode 100644 index 000000000000..b1ce5f77675e --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/jaketown/uncore-io.json @@ -0,0 +1,324 @@ +[ + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_R2_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", + "EventCode": "0x33", + "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; DRS", + "EventCode": "0x34", + "EventName": "UNC_R2_IIO_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; NCB", + "EventCode": "0x34", + "EventName": "UNC_R2_IIO_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; NCS", + "EventCode": "0x34", + "EventName": "UNC_R2_IIO_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; DRS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCB", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2PCIe IIO Credits in Use; NCS", + "EventCode": "0x32", + "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Even", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd", + "EventCode": "0x7", + "EventName": "UNC_R2_RING_AD_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Even", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd", + "EventCode": "0x8", + "EventName": "UNC_R2_RING_AK_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CCW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Even", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd", + "EventCode": "0x9", + "EventName": "UNC_R2_RING_BL_USED.CW_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "R2 IV Ring in Use; Any", + "EventCode": "0xa", + "EventName": "UNC_R2_RING_IV_USED.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.", + "UMask": "0xf", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "AK Ingress Bounced", + "EventCode": "0x12", + "EventName": "UNC_R2_RxR_AK_BOUNCES", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; DRS", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.DRS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.", + "UMask": "0x8", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCB", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.", + "UMask": "0x10", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Ingress Cycles Not Empty; NCS", + "EventCode": "0x10", + "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.", + "UMask": "0x20", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AD", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; AK", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Full; BL", + "EventCode": "0x25", + "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AD", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; AK", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress Cycles Not Empty; BL", + "EventCode": "0x23", + "EventName": "UNC_R2_TxR_CYCLES_NE.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.", + "UMask": "0x4", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress NACK; AD", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACKS.AD", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that the Egress r= eceived a NACK from the ring and could not issue a transaction.", + "UMask": "0x1", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress NACK; AK", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACKS.AK", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that the Egress r= eceived a NACK from the ring and could not issue a transaction.", + "UMask": "0x2", + "Unit": "R2PCIe" + }, + { + "BriefDescription": "Egress NACK; BL", + "EventCode": "0x26", + "EventName": "UNC_R2_TxR_NACKS.BL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that the Egress r= eceived a NACK from the ring and could not issue a transaction.", + "UMask": "0x4", + "Unit": "R2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/jaketown/uncore-other.json b/to= ols/perf/pmu-events/arch/x86/jaketown/uncore-other.json deleted file mode 100644 index ca727c0e1865..000000000000 --- a/tools/perf/pmu-events/arch/x86/jaketown/uncore-other.json +++ /dev/null @@ -1,1393 +0,0 @@ -[ - { - "BriefDescription": "Address Match (Conflict) Count; Conflict Merg= es", - "EventCode": "0x17", - "EventName": "UNC_I_ADDRESS_MATCH.MERGE_COUNT", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Address Match (Conflict) Count; Conflict Stal= ls", - "EventCode": "0x17", - "EventName": "UNC_I_ADDRESS_MATCH.STALL_COUNT", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when an inbound w= rite (from a device to memory or another device) had an address match with = another request in the write cache.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Write Ack Pending Occupancy; Any Source", - "EventCode": "0x14", - "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Write Ack Pending Occupancy; Select Source", - "EventCode": "0x14", - "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes that have a= cquired ownership but have not yet returned their data to the uncore. Thes= e writes are generally queued up in the switch trying to get to the head of= their queues so that they can post their data. The queue occuapancy incre= ments when the ACK is received, and decrements when either the data is retu= rned OR a tickle is received and ownership is released. Note that a single= tickle can result in multiple decrements.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Ownership Occupancy; Any So= urce", - "EventCode": "0x13", - "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Ownership Occupancy; Select= Source", - "EventCode": "0x13", - "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore trying to acquire ownership = in each cycle. This can be used with the write transaction count to calcul= ate the average write latency in the uncore. The occupancy increments when= a write request is issued, and decrements when the data is returned.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Read Occupancy; Any Source", - "EventCode": "0x10", - "EventName": "UNC_I_CACHE_READ_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Read Occupancy; Select Source", - "EventCode": "0x10", - "EventName": "UNC_I_CACHE_READ_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads that are out= standing in the uncore in each cycle. This can be used with the read trans= action count to calculate the average read latency in the uncore. The occu= pancy increments when a read request is issued, and decrements when the dat= a is returned.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Any Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Select Source", - "EventCode": "0x12", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Occupancy; Any Source", - "EventCode": "0x11", - "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Outstanding Write Occupancy; Select Source", - "EventCode": "0x11", - "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.SOURCE", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of writes (and write = prefetches) that are outstanding in the uncore in each cycle. This can be= used with the transaction count event to calculate the average latency in = the uncore. The occupancy increments when the ownership fetch/prefetch is = issued, and decrements the data is returned to the uncore.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Clocks in the IRP", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Number of clocks in the IRP.", - "Unit": "IRP" - }, - { - "EventCode": "0xB", - "EventName": "UNC_I_RxR_AK_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the AK Ingr= ess is full. This queue is where the IRP receives responses from R2PCIe (t= he ring).", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Ingress Occupancy", - "EventCode": "0xA", - "EventName": "UNC_I_RxR_AK_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the AK= Ingress. This queue is where the IRP receives responses from R2PCIe (the = ring).", - "Unit": "IRP" - }, - { - "EventCode": "0xC", - "EventName": "UNC_I_RxR_AK_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the AK Ingress = in each cycles. This queue is where the IRP receives responses from R2PCIe= (the ring).", - "Unit": "IRP" - }, - { - "EventCode": "0x4", - "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - DRS", - "EventCode": "0x1", - "EventName": "UNC_I_RxR_BL_DRS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "EventCode": "0x7", - "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "EventCode": "0x5", - "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCB", - "EventCode": "0x2", - "EventName": "UNC_I_RxR_BL_NCB_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "EventCode": "0x8", - "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "EventCode": "0x6", - "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the BL Ingr= ess is full. This queue is where the IRP receives data from R2PCIe (the ri= ng). It is used for data returns from read requets as well as outbound MMI= O writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "BL Ingress Occupancy - NCS", - "EventCode": "0x3", - "EventName": "UNC_I_RxR_BL_NCS_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the BL= Ingress. This queue is where the IRP receives data from R2PCIe (the ring)= . It is used for data returns from read requets as well as outbound MMIO w= rites.", - "Unit": "IRP" - }, - { - "EventCode": "0x9", - "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of the BL Ingress = in each cycles. This queue is where the IRP receives data from R2PCIe (the= ring). It is used for data returns from read requets as well as outbound = MMIO writes.", - "Unit": "IRP" - }, - { - "BriefDescription": "Tickle Count; Ownership Lost", - "EventCode": "0x16", - "EventName": "UNC_I_TICKLES.LOST_OWNERSHIP", - "PerPkg": "1", - "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Tickle Count; Data Returned", - "EventCode": "0x16", - "EventName": "UNC_I_TICKLES.TOP_OF_QUEUE", - "PerPkg": "1", - "PublicDescription": "Counts the number of tickles that are receiv= ed. This is for both explicit (from Cbo) and implicit (internal conflict) = tickles.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Read Prefetches", - "EventCode": "0x15", - "EventName": "UNC_I_TRANSACTIONS.PD_PREFETCHES", - "PerPkg": "1", - "PublicDescription": "Counts the number of 'Inbound' transactions = from the IRP to the Uncore. This can be filtered based on request type in = addition to the source queue. Note the special filtering equation. We do = OR-reduction on the request type. If the SOURCE bit is set, then we also d= o AND qualification based on the source portID.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Reads", - "EventCode": "0x15", - "EventName": "UNC_I_TRANSACTIONS.READS", - "PerPkg": "1", - "PublicDescription": "Counts the number of 'Inbound' transactions = from the IRP to the Uncore. This can be filtered based on request type in = addition to the source queue. Note the special filtering equation. We do = OR-reduction on the request type. If the SOURCE bit is set, then we also d= o AND qualification based on the source portID.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Writes", - "EventCode": "0x15", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts the number of 'Inbound' transactions = from the IRP to the Uncore. This can be filtered based on request type in = addition to the source queue. Note the special filtering equation. We do = OR-reduction on the request type. If the SOURCE bit is set, then we also d= o AND qualification based on the source portID.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD Egress Credit Stalls", - "EventCode": "0x18", - "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x19", - "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xE", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xF", - "EventName": "UNC_I_TxR_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0xD", - "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "Write Ordering Stalls", - "EventCode": "0x1A", - "EventName": "UNC_I_WRITE_ORDERING_STALL_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when there are p= ending write ACK's in the switch but the switch->IRP pipeline is not utiliz= ed.", - "Unit": "IRP" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R2_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the R2PCIe ucl= k domain. This could be slightly different than the count in the Ubox beca= use of enable/freeze delays. However, because the R2PCIe is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; DRS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCB", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credit Acquired; NCS", - "EventCode": "0x33", - "EventName": "UNC_R2_IIO_CREDITS_ACQUIRED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of credits that are acquir= ed in the R2PCIe agent for sending transactions into the IIO on either NCB = or NCS are in use. Transactions from the BL ring going into the IIO Agent = must first acquire a credit. These credits are for either the NCB or NCS m= essage classes. NCB, or non-coherent bypass messages are used to transmit = data without coherency (and are common). NCS is used for reads to PCIe (an= d should be used sparingly).", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; DRS", - "EventCode": "0x34", - "EventName": "UNC_R2_IIO_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; NCB", - "EventCode": "0x34", - "EventName": "UNC_R2_IIO_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Failed to Acquire a Credit; NCS", - "EventCode": "0x34", - "EventName": "UNC_R2_IIO_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that a request pe= nding in the BL Ingress attempted to acquire either a NCB or NCS credit to = transmit into the IIO, but was rejected because no credits were available. = NCB, or non-coherent bypass messages are used to transmit data without coh= erency (and are common). NCS is used for reads to PCIe (and should be used= sparingly).", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; DRS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCB", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2PCIe IIO Credits in Use; NCS", - "EventCode": "0x32", - "EventName": "UNC_R2_IIO_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when one or more= credits in the R2PCIe agent for sending transactions into the IIO on eithe= r NCB or NCS are in use. Transactions from the BL ring going into the IIO = Agent must first acquire a credit. These credits are for either the NCB or= NCS message classes. NCB, or non-coherent bypass messages are used to tra= nsmit data without coherency (and are common). NCS is used for reads to PC= Ie (and should be used sparingly).", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Counterclockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AD Ring in Use; Clockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R2_RING_AD_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Counterclockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 AK Ring in Use; Clockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R2_RING_AK_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Counterclockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 BL Ring in Use; Clockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R2_RING_BL_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "R2 IV Ring in Use; Any", - "EventCode": "0xa", - "EventName": "UNC_R2_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.", - "UMask": "0xf", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "AK Ingress Bounced", - "EventCode": "0x12", - "EventName": "UNC_R2_RxR_AK_BOUNCES", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when a request de= stined for the AK ingress bounced.", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; DRS", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.", - "UMask": "0x8", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCB", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.", - "UMask": "0x10", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCS", - "EventCode": "0x10", - "EventName": "UNC_R2_RxR_CYCLES_NE.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Ingress is not empty. This tracks one of the three rings that are used by = the R2PCIe agent. This can be used in conjunction with the R2PCIe Ingress = Occupancy Accumulator event in order to calculate average queue occupancy. = Multiple ingress buffers can be tracked at a given time using multiple cou= nters.", - "UMask": "0x20", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AD", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; AK", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Full; BL", - "EventCode": "0x25", - "EventName": "UNC_R2_TxR_CYCLES_FULL.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress buffer is full.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AD", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; AK", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress Cycles Not Empty; BL", - "EventCode": "0x23", - "EventName": "UNC_R2_TxR_CYCLES_NE.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the R2PCIe = Egress is not empty. This tracks one of the three rings that are used by t= he R2PCIe agent. This can be used in conjunction with the R2PCIe Egress Oc= cupancy Accumulator event in order to calculate average queue occupancy. O= nly a single Egress queue can be tracked at any given time. It is not poss= ible to filter based on direction or polarity.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress NACK; AD", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACKS.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that the Egress r= eceived a NACK from the ring and could not issue a transaction.", - "UMask": "0x1", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress NACK; AK", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACKS.AK", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that the Egress r= eceived a NACK from the ring and could not issue a transaction.", - "UMask": "0x2", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Egress NACK; BL", - "EventCode": "0x26", - "EventName": "UNC_R2_TxR_NACKS.BL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that the Egress r= eceived a NACK from the ring and could not issue a transaction.", - "UMask": "0x4", - "Unit": "R2PCIe" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_R3_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the QPI uclk d= omain. This could be slightly different than the count in the Ubox because= of enable/freeze delays. However, because the QPI Agent is close to the U= box, they generally should not diverge by more than a handful of cycles.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit Acquired", - "EventCode": "0x20", - "EventName": "UNC_R3_IIO_CREDITS_ACQUIRED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the NCS/NCB/DRS c= redit is acquired in the QPI for sending messages on BL to the IIO. There = is one credit for each of these three message classes (three credits total)= . NCS is used for reads to PCIe space, NCB is used for transferring data w= ithout coherency, and DRS is used for transferring data with coherency (cac= heable PCI transactions). This event can only track one message class at a= time.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit Acquired", - "EventCode": "0x20", - "EventName": "UNC_R3_IIO_CREDITS_ACQUIRED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the NCS/NCB/DRS c= redit is acquired in the QPI for sending messages on BL to the IIO. There = is one credit for each of these three message classes (three credits total)= . NCS is used for reads to PCIe space, NCB is used for transferring data w= ithout coherency, and DRS is used for transferring data with coherency (cac= heable PCI transactions). This event can only track one message class at a= time.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit Acquired", - "EventCode": "0x20", - "EventName": "UNC_R3_IIO_CREDITS_ACQUIRED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the NCS/NCB/DRS c= redit is acquired in the QPI for sending messages on BL to the IIO. There = is one credit for each of these three message classes (three credits total)= . NCS is used for reads to PCIe space, NCB is used for transferring data w= ithout coherency, and DRS is used for transferring data with coherency (cac= heable PCI transactions). This event can only track one message class at a= time.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit Rejected", - "EventCode": "0x21", - "EventName": "UNC_R3_IIO_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that a request at= tempted to acquire an NCS/NCB/DRS credit in the QPI for sending messages on= BL to the IIO but was rejected because no credit was available. There is = one credit for each of these three message classes (three credits total). = NCS is used for reads to PCIe space, NCB is used for transferring data with= out coherency, and DRS is used for transferring data with coherency (cachea= ble PCI transactions). This event can only track one message class at a ti= me.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit Rejected", - "EventCode": "0x21", - "EventName": "UNC_R3_IIO_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that a request at= tempted to acquire an NCS/NCB/DRS credit in the QPI for sending messages on= BL to the IIO but was rejected because no credit was available. There is = one credit for each of these three message classes (three credits total). = NCS is used for reads to PCIe space, NCB is used for transferring data with= out coherency, and DRS is used for transferring data with coherency (cachea= ble PCI transactions). This event can only track one message class at a ti= me.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit Rejected", - "EventCode": "0x21", - "EventName": "UNC_R3_IIO_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that a request at= tempted to acquire an NCS/NCB/DRS credit in the QPI for sending messages on= BL to the IIO but was rejected because no credit was available. There is = one credit for each of these three message classes (three credits total). = NCS is used for reads to PCIe space, NCB is used for transferring data with= out coherency, and DRS is used for transferring data with coherency (cachea= ble PCI transactions). This event can only track one message class at a ti= me.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit In Use", - "EventCode": "0x22", - "EventName": "UNC_R3_IIO_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the NCS/NCB= /DRS credit is in use in the QPI for sending messages on BL to the IIO. Th= ere is one credit for each of these three message classes (three credits to= tal). NCS is used for reads to PCIe space, NCB is used for transferring da= ta without coherency, and DRS is used for transferring data with coherency = (cacheable PCI transactions). This event can only track one message class = at a time.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit In Use", - "EventCode": "0x22", - "EventName": "UNC_R3_IIO_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the NCS/NCB= /DRS credit is in use in the QPI for sending messages on BL to the IIO. Th= ere is one credit for each of these three message classes (three credits to= tal). NCS is used for reads to PCIe space, NCB is used for transferring da= ta without coherency, and DRS is used for transferring data with coherency = (cacheable PCI transactions). This event can only track one message class = at a time.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "to IIO BL Credit In Use", - "EventCode": "0x22", - "EventName": "UNC_R3_IIO_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the NCS/NCB= /DRS credit is in use in the QPI for sending messages on BL to the IIO. Th= ere is one credit for each of these three message classes (three credits to= tal). NCS is used for reads to PCIe space, NCB is used for transferring da= ta without coherency, and DRS is used for transferring data with coherency = (cacheable PCI transactions). This event can only track one message class = at a time.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Even", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd", - "EventCode": "0x7", - "EventName": "UNC_R3_RING_AD_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AD ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Even", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd", - "EventCode": "0x8", - "EventName": "UNC_R3_RING_AK_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the AK ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CCW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Even", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd", - "EventCode": "0x9", - "EventName": "UNC_R3_RING_BL_USED.CW_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the BL ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sunk, but does not include when packets are be= ing sent from the ring stop.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "R3 IV Ring in Use; Any", - "EventCode": "0xa", - "EventName": "UNC_R3_RING_IV_USED.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the IV ring= is being used at this ring stop. This includes when packets are passing b= y and when packets are being sent, but does not include when packets are be= ing sunk into the ring stop. The IV ring is unidirectional. Whether UP or= DN is used is dependent on the system programming. Thereofore, one should= generally set both the UP and DN bits for a given polarity (or both) at a = given time.", - "UMask": "0xf", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Bypassed", - "EventCode": "0x12", - "EventName": "UNC_R3_RxR_BYPASSED.AD", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the Ingress = was bypassed and an incoming transaction was bypassed directly across the B= GF and into the qfclk domain.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; DRS", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; HOM", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCB", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NCS", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; NDR", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Cycles Not Empty; SNP", - "EventCode": "0x10", - "EventName": "UNC_R3_RxR_CYCLES_NE.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the QPI Ing= ress is not empty. This tracks one of the three rings that are used by the= QPI agent. This can be used in conjunction with the QPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; DRS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.DRS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; HOM", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.HOM", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCB", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NCS", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; NDR", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.NDR", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Allocations; SNP", - "EventCode": "0x11", - "EventName": "UNC_R3_RxR_INSERTS.SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I Ingress. This tracks one of the three rings that are used by the QPI age= nt. This can be used in conjunction with the QPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; DRS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.DRS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; HOM", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.HOM", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; NCB", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; NCS", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; NDR", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.NDR", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Ingress Occupancy Accumulator; SNP", - "EventCode": "0x13", - "EventName": "UNC_R3_RxR_OCCUPANCY.SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given QPI Ing= ress queue in each cycles. This tracks one of the three ring Ingress buffe= rs. This can be used with the QPI Ingress Not Empty event to calculate ave= rage occupancy or the QPI Ingress Allocations event in order to calculate a= verage queuing latency.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Mes= sage Class", - "EventCode": "0x37", - "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a request failed to acquire = a DRS VN0 credit. In order for a request to be transferred across QPI, it = must be guaranteed to have a flit buffer on the remote socket to sink into.= There are two credit pools, VNA and VN0. VNA is a shared pool used to ac= hieve high performance. The VN0 pool has reserved entries for each message= class and is used to prevent deadlock. Requests first attempt to acquire = a VNA credit, and then fall back to VN0 if they fail. This therefore count= s the number of times when a request failed to acquire either a VNA or VN0 = credit and is delayed. This should generally be a rare situation.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; DRS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.DRS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; HOM Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.HOM", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCB Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCS Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; NDR Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.NDR", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VN0 Credit Used; SNP Message Class", - "EventCode": "0x36", - "EventName": "UNC_R3_VN0_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across QPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA credit Acquisitions", - "EventCode": "0x33", - "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED", - "PerPkg": "1", - "PublicDescription": "Number of QPI VNA Credit acquisitions. This= event can be used in conjunction with the VNA In-Use Accumulator to calcul= ate the average lifetime of a credit holder. VNA credits are used by all m= essage classes in order to communicate across QPI. If a packet is unable t= o acquire credits, it will then attempt to use credits from the VN0 pool. = Note that a single packet may require multiple flit buffers (i.e. when data= is being transferred). Therefore, this event will increment by the number= of credits acquired in each cycle. Filtering based on message class is no= t provided. One can count the number of packets transferred in a given mes= sage class using an qfclk event.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; DRS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", - "UMask": "0x8", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; HOM Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", - "UMask": "0x1", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCB Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", - "UMask": "0x10", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NCS Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", - "UMask": "0x20", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; NDR Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", - "UMask": "0x4", - "Unit": "R3QPI" - }, - { - "BriefDescription": "VNA Credit Reject; SNP Message Class", - "EventCode": "0x34", - "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP", - "PerPkg": "1", - "PublicDescription": "Number of attempted VNA credit acquisitions = that were rejected because the VNA credit pool was full (or almost full). = It is possible to filter this event by message class. Some packets use mor= e than one flit buffer, and therefore must acquire multiple credits. There= fore, one could get a reject even if the VNA credits were not fully used up= . The VNA pool is generally used to provide the bulk of the QPI bandwidth = (as opposed to the VN0 pool which is used to guarantee forward progress). = VNA credits can run out if the flit buffer on the receiving side starts to = queue up substantially. This can happen if the rest of the uncore is unabl= e to drain the requests fast enough.", - "UMask": "0x2", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Cycles with no VNA credits available", - "EventCode": "0x31", - "EventName": "UNC_R3_VNA_CREDIT_CYCLES_OUT", - "PerPkg": "1", - "PublicDescription": "Number of QPI uclk cycles when the transmitt= ed has no VNA credits available and therefore cannot send any requests on t= his channel. Note that this does not mean that no flits can be transmitted= , as those holding VN0 credits will still (potentially) be able to transmit= . Generally it is the goal of the uncore that VNA credits should not run o= ut, as this can substantially throttle back useful QPI bandwidth.", - "Unit": "R3QPI" - }, - { - "BriefDescription": "Cycles with 1 or more VNA credits in use", - "EventCode": "0x32", - "EventName": "UNC_R3_VNA_CREDIT_CYCLES_USED", - "PerPkg": "1", - "PublicDescription": "Number of QPI uclk cycles with one or more V= NA credits in use. This event can be used in conjunction with the VNA In-U= se Accumulator to calculate the average number of used VNA credits.", - "Unit": "R3QPI" - }, - { - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.INT_PRIO", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "VLW Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore. Specify the thread to filter on using NCUPMONCTRLGLC= TR.ThreadID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Filter Match", - "EventCode": "0x41", - "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE", - "PerPkg": "1", - "PublicDescription": "Filter match per thread (w/ or w/o Filter En= able). Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "IDI Lock/SplitLock Cycles", - "EventCode": "0x44", - "EventName": "UNC_U_LOCK_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", - "Unit": "UBOX" - }, - { - "BriefDescription": "MsgCh Requests by Size; 4B Requests", - "EventCode": "0x47", - "EventName": "UNC_U_MSG_CHNL_SIZE_COUNT.4B", - "PerPkg": "1", - "PublicDescription": "Number of transactions on the message channe= l filtered by request size. This includes both reads and writes.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "MsgCh Requests by Size; 8B Requests", - "EventCode": "0x47", - "EventName": "UNC_U_MSG_CHNL_SIZE_COUNT.8B", - "PerPkg": "1", - "PublicDescription": "Number of transactions on the message channe= l filtered by request size. This includes both reads and writes.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; ACK to Deassert", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ACK_TO_DEASSERT", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles. Filter from source CoreID.", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles. Filter from source CoreID.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS.COUNT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Correctable Machine Check= ", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.CMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Livelock", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LIVELOCK", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; LTError", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.LTERROR", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T0", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Monitor T1", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Other", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.OTHER", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Trap", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.TRAP", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Che= ck", - "EventCode": "0x43", - "EventName": "UNC_U_U2C_EVENTS.UMC", - "PerPkg": "1", - "PublicDescription": "Events coming from Uncore can be sent to one= or all cores", - "UMask": "0x20", - "Unit": "UBOX" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33CE6C77B61 for ; Thu, 13 Apr 2023 13:34:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230064AbjDMNeH (ORCPT ); Thu, 13 Apr 2023 09:34:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229969AbjDMNdl (ORCPT ); Thu, 13 Apr 2023 09:33:41 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBD32B760 for ; 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bh=rZt20Z7hTMj/DUmjIhsYx65tA/VQTBMfCLcsGtkqEtU=; b=cAqL6lx5xoeOeM1X9/u+0jOQZ2wCWKb+9WutntVHi8uqfdPfE/Z4yo+RC32LQEMqwN h00PeHzD/3FF9914uaenXXmGH3PxwdJEmMONbKyJkkcp13+QSxY9JbKzzPCvGSQALVg2 3eQMf5JT09uJB1DNIDBZGFf8JUpWwhiajJZ9rpkbmaBqBHO9dtXOIu+8j1RR8qQxvpfE X0Scj4RELInTkaSg46b4SyZmmakKUPM8T08E4jCxRGZ06LbPcJdBd/UXljJ6m8+XgA5j mmnaabiOB30wDkOx6URfgulrjY9n58TkYRIKffe58KZrbrYBqnxB0gCfUhE6f+ZDi3Iy fRkw== X-Gm-Message-State: AAQBX9c4Le9uTwwW86tmI8o2BfXIb4tLJopepe69z/U10mHkyU77C3OT 3WnEU2XOYBirODsdcAsYF3ZrT86Yoj7G X-Google-Smtp-Source: AKy350ansSuz41r2u7arlnoYt8KAoGMsAk/8TTI+Ls3Pzt84wdR1NPvMeyhO74xCkjoQj0iSLT9ZBGKHR5WZ X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a17:902:d1d3:b0:1a2:4524:975f with SMTP id g19-20020a170902d1d300b001a24524975fmr637262plb.0.1681392734369; Thu, 13 Apr 2023 06:32:14 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:44 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-17-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 16/21] perf vendor events intel: Fix uncore topics for knightslanding From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, io and memory. Signed-off-by: Ian Rogers --- .../{uncore-other.json =3D> uncore-cache.json} | 260 ------------------ .../arch/x86/knightslanding/uncore-io.json | 194 +++++++++++++ .../x86/knightslanding/uncore-memory.json | 68 +++++ 3 files changed, 262 insertions(+), 260 deletions(-) rename tools/perf/pmu-events/arch/x86/knightslanding/{uncore-other.json = =3D> uncore-cache.json} (91%) create mode 100644 tools/perf/pmu-events/arch/x86/knightslanding/uncore-io= .json diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-other.jso= n b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-cache.json similarity index 91% rename from tools/perf/pmu-events/arch/x86/knightslanding/uncore-other.json rename to tools/perf/pmu-events/arch/x86/knightslanding/uncore-cache.json index fc85e0c95318..1b8dcfa5461c 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-cache.json @@ -55,74 +55,6 @@ "UMask": "0x24", "Unit": "CHA" }, - { - "BriefDescription": "Counts the number of read requests and stream= ing stores that hit in MCDRAM cache and the data in MCDRAM is clean with re= spect to DDR. This event is only valid in cache and hybrid memory mode.", - "EventCode": "0x02", - "EventName": "UNC_E_EDC_ACCESS.HIT_CLEAN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "EDC_UCLK" - }, - { - "BriefDescription": "Counts the number of read requests and stream= ing stores that hit in MCDRAM cache and the data in MCDRAM is dirty with re= spect to DDR. This event is only valid in cache and hybrid memory mode.", - "EventCode": "0x02", - "EventName": "UNC_E_EDC_ACCESS.HIT_DIRTY", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "EDC_UCLK" - }, - { - "BriefDescription": "Counts the number of read requests and stream= ing stores that miss in MCDRAM cache and the data evicted from the MCDRAM i= s clean with respect to DDR. This event is only valid in cache and hybrid m= emory mode.", - "EventCode": "0x02", - "EventName": "UNC_E_EDC_ACCESS.MISS_CLEAN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "EDC_UCLK" - }, - { - "BriefDescription": "Counts the number of read requests and stream= ing stores that miss in MCDRAM cache and the data evicted from the MCDRAM i= s dirty with respect to DDR. This event is only valid in cache and hybrid m= emory mode.", - "EventCode": "0x02", - "EventName": "UNC_E_EDC_ACCESS.MISS_DIRTY", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "EDC_UCLK" - }, - { - "BriefDescription": "Number of EDC Hits or Misses. Miss I", - "EventCode": "0x02", - "EventName": "UNC_E_EDC_ACCESS.MISS_INVALID", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "EDC_UCLK" - }, - { - "BriefDescription": "ECLK count", - "EventName": "UNC_E_E_CLOCKTICKS", - "PerPkg": "1", - "Unit": "EDC_ECLK" - }, - { - "BriefDescription": "Counts the number of read requests received b= y the MCDRAM controller. This event is valid in all three memory modes: fla= t, cache and hybrid. In cache and hybrid memory mode, this event counts all= read requests as well as streaming stores that hit or miss in the MCDRAM c= ache.", - "EventCode": "0x01", - "EventName": "UNC_E_RPQ_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "EDC_ECLK" - }, - { - "BriefDescription": "UCLK count", - "EventName": "UNC_E_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "EDC_UCLK" - }, - { - "BriefDescription": "Counts the number of write requests received = by the MCDRAM controller. This event is valid in all three memory modes: fl= at, cache and hybrid. In cache and hybrid memory mode, this event counts al= l streaming stores, writebacks and, read requests that miss in MCDRAM cache= .", - "EventCode": "0x02", - "EventName": "UNC_E_WPQ_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "EDC_ECLK" - }, { "BriefDescription": "CMS Agent0 AD Credits Acquired For Transgress= 0", "EventCode": "0x80", @@ -3429,197 +3361,5 @@ "PerPkg": "1", "UMask": "0x1", "Unit": "CHA" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AD_0", - "EventCode": "0x25", - "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AD_1", - "EventCode": "0x25", - "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_1", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AK_0", - "EventCode": "0x25", - "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AK_1", - "EventCode": "0x25", - "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. BL_0", - "EventCode": "0x25", - "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. BL_1", - "EventCode": "0x25", - "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AD_0", - "EventCode": "0x23", - "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AD_1", - "EventCode": "0x23", - "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_1", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AK_0", - "EventCode": "0x23", - "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AK_1", - "EventCode": "0x23", - "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. BL_0", - "EventCode": "0x23", - "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. BL_1", - "EventCode": "0x23", - "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AD_0", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.AD_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AD_1", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.AD_1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_0", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.AK_0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_1", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.AK_1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_CRD_0", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_CRD_1", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_1", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. BL_0", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.BL_0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. BL_1", - "EventCode": "0x24", - "EventName": "UNC_M2P_EGRESS_INSERTS.BL_1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.ALL", - "EventCode": "0x10", - "EventName": "UNC_M2P_INGRESS_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.CBO_IDI", - "EventCode": "0x10", - "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_IDI", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.CBO_NCB", - "EventCode": "0x10", - "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.CBO_NCS", - "EventCode": "0x10", - "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" } ] diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-io.json b= /tools/perf/pmu-events/arch/x86/knightslanding/uncore-io.json new file mode 100644 index 000000000000..898f7e425cd4 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-io.json @@ -0,0 +1,194 @@ +[ + { + "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AD_0", + "EventCode": "0x25", + "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AD_1", + "EventCode": "0x25", + "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_1", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AK_0", + "EventCode": "0x25", + "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. AK_1", + "EventCode": "0x25", + "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. BL_0", + "EventCode": "0x25", + "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full. Counts the numbe= r of cycles when the M2PCIe Egress is full. BL_1", + "EventCode": "0x25", + "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AD_0", + "EventCode": "0x23", + "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AD_1", + "EventCode": "0x23", + "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_1", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AK_0", + "EventCode": "0x23", + "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. AK_1", + "EventCode": "0x23", + "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. BL_0", + "EventCode": "0x23", + "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the = number of cycles when the M2PCIe Egress is not empty. BL_1", + "EventCode": "0x23", + "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AD_0", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.AD_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AD_1", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.AD_1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_0", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.AK_0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_1", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.AK_1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_CRD_0", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. AK_CRD_1", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_1", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. BL_0", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.BL_0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress. Counts the number of= number of messages inserted into the the M2PCIe Egress queue. BL_1", + "EventCode": "0x24", + "EventName": "UNC_M2P_EGRESS_INSERTS.BL_1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.ALL", + "EventCode": "0x10", + "EventName": "UNC_M2P_INGRESS_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.CBO_IDI", + "EventCode": "0x10", + "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_IDI", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.CBO_NCB", + "EventCode": "0x10", + "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the nu= mber of cycles when the M2PCIe Ingress is not empty.CBO_NCS", + "EventCode": "0x10", + "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.js= on b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json index 47da947b1a6e..fb752974179b 100644 --- a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json +++ b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json @@ -1,4 +1,72 @@ [ + { + "BriefDescription": "Counts the number of read requests and stream= ing stores that hit in MCDRAM cache and the data in MCDRAM is clean with re= spect to DDR. This event is only valid in cache and hybrid memory mode.", + "EventCode": "0x02", + "EventName": "UNC_E_EDC_ACCESS.HIT_CLEAN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "EDC_UCLK" + }, + { + "BriefDescription": "Counts the number of read requests and stream= ing stores that hit in MCDRAM cache and the data in MCDRAM is dirty with re= spect to DDR. This event is only valid in cache and hybrid memory mode.", + "EventCode": "0x02", + "EventName": "UNC_E_EDC_ACCESS.HIT_DIRTY", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "EDC_UCLK" + }, + { + "BriefDescription": "Counts the number of read requests and stream= ing stores that miss in MCDRAM cache and the data evicted from the MCDRAM i= s clean with respect to DDR. This event is only valid in cache and hybrid m= emory mode.", + "EventCode": "0x02", + "EventName": "UNC_E_EDC_ACCESS.MISS_CLEAN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "EDC_UCLK" + }, + { + "BriefDescription": "Counts the number of read requests and stream= ing stores that miss in MCDRAM cache and the data evicted from the MCDRAM i= s dirty with respect to DDR. This event is only valid in cache and hybrid m= emory mode.", + "EventCode": "0x02", + "EventName": "UNC_E_EDC_ACCESS.MISS_DIRTY", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "EDC_UCLK" + }, + { + "BriefDescription": "Number of EDC Hits or Misses. Miss I", + "EventCode": "0x02", + "EventName": "UNC_E_EDC_ACCESS.MISS_INVALID", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "EDC_UCLK" + }, + { + "BriefDescription": "ECLK count", + "EventName": "UNC_E_E_CLOCKTICKS", + "PerPkg": "1", + "Unit": "EDC_ECLK" + }, + { + "BriefDescription": "Counts the number of read requests received b= y the MCDRAM controller. This event is valid in all three memory modes: fla= t, cache and hybrid. In cache and hybrid memory mode, this event counts all= read requests as well as streaming stores that hit or miss in the MCDRAM c= ache.", + "EventCode": "0x01", + "EventName": "UNC_E_RPQ_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "EDC_ECLK" + }, + { + "BriefDescription": "UCLK count", + "EventName": "UNC_E_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "EDC_UCLK" + }, + { + "BriefDescription": "Counts the number of write requests received = by the MCDRAM controller. This event is valid in all three memory modes: fl= at, cache and hybrid. In cache and hybrid memory mode, this event counts al= l streaming stores, writebacks and, read requests that miss in MCDRAM cache= .", + "EventCode": "0x02", + "EventName": "UNC_E_WPQ_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "EDC_ECLK" + }, { "BriefDescription": "CAS All", "EventCode": "0x03", --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7928CC77B78 for ; Thu, 13 Apr 2023 13:35:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231432AbjDMNfG (ORCPT ); Thu, 13 Apr 2023 09:35:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229782AbjDMNdv (ORCPT ); Thu, 13 Apr 2023 09:33:51 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59D16B45A for ; Thu, 13 Apr 2023 06:32:25 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id c193-20020a25c0ca000000b00b868826cdfeso33963208ybf.0 for ; Thu, 13 Apr 2023 06:32:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392742; x=1683984742; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=DjePygWNzjikF1/0wL8IG/xpima8j1eK/Y93rEybJLQ=; b=GS6jV3v+fTQxf304pBmtb2QF6+oAf40aGTJB7CItdb905njsjwjrRvziffQ/PUKkP1 rGhSGBUr6RtTfAUEx0YtRvCiMACNYn4aRNtQR2X1CjhaO8HrmJZo7I7dM4FfKmN17vMH F4tk6PW71DGeQ8IwQwQ5AUhnwl1CuEYKVzQD2We2s4f8opAhBkwmiUslE03yCiRBo2Tz pOZtVWQDW5sJ5ZD4zmxyzrrjjQi7G3HXIF8J+dh83HP+Etll7u15paYlOC6QqBP7wPxl AVPDmrKoZRYZp0UNyt63RbMpN14XQo3xwe5aVEHUZqFE6VL4UyQGIDQdU0Poi60MkAaX sj0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392742; x=1683984742; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=DjePygWNzjikF1/0wL8IG/xpima8j1eK/Y93rEybJLQ=; b=Q4qnnFdNpeHJwM5ldYBQPtO51hBBCdTGe8vI5m4cjIezoZDrh1xIa/IZKekfmu8pO/ jgdvvmHfA8sE82FG8xWriilggNdPPUzWl4kPtcWz5WrUhoMer9JJsrIwwLvrH3T2sycM jbLeFzZ2LbIEy7V3y/09hzLS5mtBbWbmLwGZb07qijhf4RRrFRUrVZqpmn8ufLNZeDqI gow+N12DzMMf4TCRAX73Iav+uQ7hUpuQ+sYF4oUY9IOS+UMhVntnq5hvsQ1oTyKn+6NH OAFD23KKByPYDBHUjhYRgc3ReId/nROr0SWiAzIyv+LJwN8/VJVpzSV0m367gnChcRM4 3DOA== X-Gm-Message-State: AAQBX9fhlXcdZfLDYzaHCcuu4en344r7d/+pLS4BtaiQJyXuBKxwcDzH dXVUkE6dlxPaMK5m+NY6yxSLrVtYcEQd X-Google-Smtp-Source: AKy350bxdZvQmjXxNMx6pAHLjGhcAaAi1/DkKsTzlpyd3XrnwzP0CUw1FNDebdnn/d16oj0SdSekQhff517X X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a0d:ec47:0:b0:54e:e490:d190 with SMTP id r7-20020a0dec47000000b0054ee490d190mr1366137ywn.4.1681392742282; Thu, 13 Apr 2023 06:32:22 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:45 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-18-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 17/21] perf vendor events intel: Fix uncore topics for sandybridge From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache and interconnect. Signed-off-by: Ian Rogers --- .../arch/x86/sandybridge/uncore-cache.json | 50 +++++++++---------- ...re-other.json =3D> uncore-interconnect.json} | 0 2 files changed, 25 insertions(+), 25 deletions(-) rename tools/perf/pmu-events/arch/x86/sandybridge/{uncore-other.json =3D> = uncore-interconnect.json} (100%) diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/uncore-cache.json b= /tools/perf/pmu-events/arch/x86/sandybridge/uncore-cache.json index c538557ba4c0..be9a3ed1a940 100644 --- a/tools/perf/pmu-events/arch/x86/sandybridge/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/sandybridge/uncore-cache.json @@ -5,7 +5,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_ES", "PerPkg": "1", "UMask": "0x86", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in I-state.", @@ -13,7 +13,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_I", "PerPkg": "1", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in M-state.", @@ -21,7 +21,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_M", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in MESI-state.", @@ -29,7 +29,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_MESI", "PerPkg": "1", "UMask": "0x8f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in E or S-state.", @@ -37,7 +37,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_ES", "PerPkg": "1", "UMask": "0x46", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in I-state.", @@ -45,7 +45,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_I", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in M-state.", @@ -53,7 +53,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_M", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup external snoop request that access = cache and found line in MESI-state.", @@ -61,7 +61,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_MESI", "PerPkg": "1", "UMask": "0x4f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in E or S-state.", @@ -69,7 +69,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_ES", "PerPkg": "1", "UMask": "0x16", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in I-state.", @@ -77,7 +77,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_I", "PerPkg": "1", "UMask": "0x18", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in M-state.", @@ -85,7 +85,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_M", "PerPkg": "1", "UMask": "0x11", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in any MESI-state.", @@ -93,7 +93,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.READ_MESI", "PerPkg": "1", "UMask": "0x1f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in E or S-state.", @@ -101,7 +101,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_ES", "PerPkg": "1", "UMask": "0x26", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in I-state.", @@ -109,7 +109,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_I", "PerPkg": "1", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in M-state.", @@ -117,7 +117,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_M", "PerPkg": "1", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in MESI-state.", @@ -125,7 +125,7 @@ "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_MESI", "PerPkg": "1", "UMask": "0x2f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which hits a modified line in some processor core.", @@ -133,7 +133,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EVICTION", "PerPkg": "1", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop hits a modified line in som= e processor core.", @@ -141,7 +141,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EXTERNAL", "PerPkg": "1", "UMask": "0x28", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a modified line in some proces= sor core.", @@ -149,7 +149,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which hits a non-modified line in some processor core.", @@ -157,7 +157,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EVICTION", "PerPkg": "1", "UMask": "0x84", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop hits a non-modified line in= some processor core.", @@ -165,7 +165,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EXTERNAL", "PerPkg": "1", "UMask": "0x24", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a non-modified line in some pr= ocessor core.", @@ -173,7 +173,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE", "PerPkg": "1", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which misses in some processor core.", @@ -181,7 +181,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EVICTION", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "An external snoop misses in some processor co= re.", @@ -189,7 +189,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EXTERNAL", "PerPkg": "1", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which misses in some processor core.", @@ -197,6 +197,6 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/uncore-other.json b= /tools/perf/pmu-events/arch/x86/sandybridge/uncore-interconnect.json similarity index 100% rename from tools/perf/pmu-events/arch/x86/sandybridge/uncore-other.json rename to tools/perf/pmu-events/arch/x86/sandybridge/uncore-interconnect.js= on --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6709C77B7F for ; Thu, 13 Apr 2023 13:35:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231239AbjDMNfK (ORCPT ); Thu, 13 Apr 2023 09:35:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231496AbjDMNdz (ORCPT ); Thu, 13 Apr 2023 09:33:55 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6DB5CAD09 for ; Thu, 13 Apr 2023 06:32:31 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id c67-20020a254e46000000b00b88f1fd158fso31262564ybb.17 for ; Thu, 13 Apr 2023 06:32:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392750; x=1683984750; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=pUfPUvLoShzw1K1BISvJjLxFPJ+s9EqCiRDe+diC2OM=; b=HncV5JMqwu/eslVmWJFNt1vbGo/I79ZOjHk16mqN3sNZ9nr7NzPJB/WDAXA5FUZFkb Gi5S9XCohLjnlEs3RDOUK6zL1iW6iosXxMUnZvvC8tGgfZNtR8pbrSkyViRBHSr4JTdJ 9ZCsTzXt07sm2ZZT+DUYejLfxPa4KPIoF6Gh+zP5f86cL4NfOdSZ5rMMFqnd+hD4PNC1 CEHfR19yjURUqKpqoahTXyCVR8ZSY8RDXtYf5UhEE+NBP3UiRtDLqRyzxYZev7pdep1o wuop+DxY4Pg/8ou99tLVg2k3+uOk3nwPTryKsBJ10+V1eLpR5Xdp69UlNLO8zOZzrTUn l9LA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392750; x=1683984750; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=pUfPUvLoShzw1K1BISvJjLxFPJ+s9EqCiRDe+diC2OM=; b=EcDQpyz2Vhqm1S84Y8ELDM3cm/r2iGFq5lfW+i0NU5kfN681humSQg/ml8ZT2m5C1S xty/SiEunCTJC+u5dujHwX1JRd4UaEuDbTZKG15h1IVr8BUoqesOeteX3rrZWdlGnreA 7xKrUPB6hcfs7NpvslppJWmFezC/qJ6C17DPbquauDdSNGLsuVVzcg4071cS+a5VNtap 7n+tEbK1JA7L3O38n6XN9u5bpZujKXTEvtysgOdGom5P5NSqBMPh6zlQ0sjnhU9y2xQ3 l61/Q9gLtgltWJR4EOfs+CQNEHOkjWjVA7rNabVRQAwMKzMwWyiMOeuk6xgsmTM5EuIH iE6A== X-Gm-Message-State: AAQBX9f/j1bDOJeLXSn7B7g2k+peQQpxbMsTblXlJQ///qvn71uaZM8P QYPA/nSgh5fAPlHrzq9/SnBncnwcrmat X-Google-Smtp-Source: AKy350aQ6Jewz4zJvJWLFqY2mzftBnR5EJR9IPPP2Z+QWVEdma4wF8BNApqoaG3nsn8Wty19sMs1yTfQcRhf X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a81:9846:0:b0:544:bbd2:74be with SMTP id p67-20020a819846000000b00544bbd274bemr4805857ywg.4.1681392750564; Thu, 13 Apr 2023 06:32:30 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:46 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-19-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 18/21] perf vendor events intel: Fix uncore topics for skylake From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move events from 'uncore-other' topic classification to cache and interconnect. Signed-off-by: Ian Rogers --- .../arch/x86/skylake/uncore-cache.json | 28 ++++---- .../arch/x86/skylake/uncore-interconnect.json | 67 +++++++++++++++++++ .../arch/x86/skylake/uncore-other.json | 65 ------------------ 3 files changed, 81 insertions(+), 79 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/skylake/uncore-interconn= ect.json diff --git a/tools/perf/pmu-events/arch/x86/skylake/uncore-cache.json b/too= ls/perf/pmu-events/arch/x86/skylake/uncore-cache.json index ec9463c94ffe..b4e061477c1a 100644 --- a/tools/perf/pmu-events/arch/x86/skylake/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/skylake/uncore-cache.json @@ -6,7 +6,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in E or S-state.", "UMask": "0x86", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in I-state", @@ -15,7 +15,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in I-state.", "UMask": "0x88", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in M-state", @@ -24,7 +24,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in M-state.", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup any request that access cache and f= ound line in MESI-state", @@ -33,7 +33,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup any request that access cache and = found line in MESI-state.", "UMask": "0x8f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in E or S-state", @@ -42,7 +42,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup read request that access cache and= found line in E or S-state.", "UMask": "0x16", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in I-state", @@ -51,7 +51,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup read request that access cache and= found line in I-state.", "UMask": "0x18", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup read request that access cache and = found line in any MESI-state", @@ -60,7 +60,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup read request that access cache and= found line in any MESI-state.", "UMask": "0x1f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in E or S-state", @@ -69,7 +69,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup write request that access cache an= d found line in E or S-state.", "UMask": "0x26", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in M-state", @@ -78,7 +78,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup write request that access cache an= d found line in M-state.", "UMask": "0x21", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "L3 Lookup write request that access cache and= found line in MESI-state", @@ -87,7 +87,7 @@ "PerPkg": "1", "PublicDescription": "L3 Lookup write request that access cache an= d found line in MESI-state.", "UMask": "0x2f", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a modified line in some proces= sor core.", @@ -95,7 +95,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE", "PerPkg": "1", "UMask": "0x48", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which hits a non-modified line in some pr= ocessor core.", @@ -103,7 +103,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE", "PerPkg": "1", "UMask": "0x44", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop resulted from L3 Eviction = which misses in some processor core.", @@ -111,7 +111,7 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EVICTION", "PerPkg": "1", "UMask": "0x81", - "Unit": "CBO" + "Unit": "CBOX" }, { "BriefDescription": "A cross-core snoop initiated by this Cbox due= to processor core memory request which misses in some processor core.", @@ -119,6 +119,6 @@ "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE", "PerPkg": "1", "UMask": "0x41", - "Unit": "CBO" + "Unit": "CBOX" } ] diff --git a/tools/perf/pmu-events/arch/x86/skylake/uncore-interconnect.jso= n b/tools/perf/pmu-events/arch/x86/skylake/uncore-interconnect.json new file mode 100644 index 000000000000..fe7e19717371 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/skylake/uncore-interconnect.json @@ -0,0 +1,67 @@ +[ + { + "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, Core aperture, etc.", + "EventCode": "0x84", + "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of all Core entries outstanding for th= e memory controller. The outstanding interval starts after LLC miss till re= turn of first data chunk. Accounts for Coherent and non-coherent traffic.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Cycles with at least one request outstanding = is waiting for data return from memory controller. Account for coherent and= non-coherent requests initiated by IA Cores, Processor Graphics Unit, or L= LC.", + "CounterMask": "1", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of Core Data Read entries outstanding = for the memory controller. The outstanding interval starts after LLC miss t= ill return of first data chunk.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.DATA_READ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "UNC_ARB_TRK_REQUESTS.ALL", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of Core coherent Data Read requests se= nt to memory controller whose data is returned directly to requesting agent= .", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.DATA_READ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of Core coherent Data Read requests se= nt to memory controller whose data is returned directly to requesting agent= .", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.DRD_DIRECT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of Writes allocated - any write transa= ctions: full/partials writes and evictions.", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "ARB" + } +] diff --git a/tools/perf/pmu-events/arch/x86/skylake/uncore-other.json b/too= ls/perf/pmu-events/arch/x86/skylake/uncore-other.json index ef804df3f41e..58be90d7cc93 100644 --- a/tools/perf/pmu-events/arch/x86/skylake/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/skylake/uncore-other.json @@ -1,69 +1,4 @@ [ - { - "BriefDescription": "Number of entries allocated. Account for Any = type: e.g. Snoop, Core aperture, etc.", - "EventCode": "0x84", - "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of all Core entries outstanding for th= e memory controller. The outstanding interval starts after LLC miss till re= turn of first data chunk. Accounts for Coherent and non-coherent traffic.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Cycles with at least one request outstanding = is waiting for data return from memory controller. Account for coherent and= non-coherent requests initiated by IA Cores, Processor Graphics Unit, or L= LC.", - "CounterMask": "1", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of Core Data Read entries outstanding = for the memory controller. The outstanding interval starts after LLC miss t= ill return of first data chunk.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.DATA_READ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "UNC_ARB_TRK_REQUESTS.ALL", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of Core coherent Data Read requests se= nt to memory controller whose data is returned directly to requesting agent= .", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.DATA_READ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of Core coherent Data Read requests se= nt to memory controller whose data is returned directly to requesting agent= .", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.DRD_DIRECT", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of Writes allocated - any write transa= ctions: full/partials writes and evictions.", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "ARB" - }, { "BriefDescription": "This 48-bit fixed counter counts the UCLK cyc= les", "EventCode": "0xff", --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F33EDC77B6E for ; Thu, 13 Apr 2023 13:34:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231512AbjDMNd7 (ORCPT ); Thu, 13 Apr 2023 09:33:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231494AbjDMNdi (ORCPT ); Thu, 13 Apr 2023 09:33:38 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2AE8AD10 for ; Thu, 13 Apr 2023 06:32:41 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 81-20020a251854000000b00b8f5b60b760so1590932yby.19 for ; Thu, 13 Apr 2023 06:32:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392759; x=1683984759; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:from:to:cc:subject:date :message-id:reply-to; bh=Mb6Q/PO1rw5Zmb6g3TT1Tz8lKY+5Uaon6ZauhwmC6mI=; b=NmLgKGhLru1TH+5BmgxlBHmzfFyHVm4ezx/ccQ55lu5vwaxhDf1E0cQdJDac5fRLNN x8w4FKusiMufS0nf+wVmtClj/56s2SBZDoPnGAN1lvZUfQ9x93U/eg4oHz5JHoHd3dAU KvQo7mwz9ErTmzu2zTpJnf3bWWzL4gIVXLe20WjvBJXh4KQcX04ydqGuV51vTxMJrOdq b5JtnkG9klKwx8tzwVce+5JmlxVmlGKvRo+JI0qsFliL7AbDlYi6vVkVh87jvdQMMLNi rGpKl4OlH4GYLjIjFbhfEllJ7oi0stK/pv/xRQxM1V0FyWLT+iUJDeM6uvAABsgCVYHS KW7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392759; x=1683984759; h=content-transfer-encoding:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Mb6Q/PO1rw5Zmb6g3TT1Tz8lKY+5Uaon6ZauhwmC6mI=; b=b7tJJPEMta+nvFqxmfsj92Mt4CXsePjtO/9GDVmLqUT79W7v+01TOv4m9YWmwa03XG b5YS7/5KgK1bEk17by7KuYLpp2hdO1Dc0Vj+VeuR/DWzT9vMVhWytr7ewa+QPt0RK23S CtYcrgyvXs1zerAlFxXb6SjwAz9b9wwpp7dXQnU8ga0qyhj/J2C9iFfv8X6Z9VwEoqx8 hGWHUcoPvEEzAdswrFL5T1O5lfy+zwyH6i4zapippd5l2QKycDapD+dWYv1o5QTaF3vl tCDurfK1LdfgURjll8F0ZyTb2titb7SFQf1n3uajXVM51KnDcjBHE6Bpsa0rh1WsTUIP E6mg== X-Gm-Message-State: AAQBX9cUv3y+BFxgeqjLhabO/GHleBf40AwnJkppotVMEwIWxYlMj0qp Kca+Ikf0YQk00W9Mg/uQ98rrLO3+s3NL X-Google-Smtp-Source: AKy350bxzGW0lrLnU+99eQSo4ZC1AP81daFsMwum6oYq1jPHoqby8Vh8usCN6omRtIQNbItTuKJ+6Lczj/Qc X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a81:c602:0:b0:54f:a1cd:d0dc with SMTP id l2-20020a81c602000000b0054fa1cdd0dcmr1353528ywi.6.1681392759027; Thu, 13 Apr 2023 06:32:39 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:47 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-20-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 19/21] perf vendor events intel: Fix uncore topics for skylakex From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect, io and memory. Signed-off-by: Ian Rogers --- .../arch/x86/skylakex/uncore-cache.json | 10649 +++++++ .../x86/skylakex/uncore-interconnect.json | 11248 +++++++ .../arch/x86/skylakex/uncore-io.json | 4250 +++ .../arch/x86/skylakex/uncore-memory.json | 2 +- .../arch/x86/skylakex/uncore-other.json | 26143 ---------------- 5 files changed, 26148 insertions(+), 26144 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/skylakex/uncore-cache.js= on create mode 100644 tools/perf/pmu-events/arch/x86/skylakex/uncore-intercon= nect.json create mode 100644 tools/perf/pmu-events/arch/x86/skylakex/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/skylakex/uncore-other.js= on diff --git a/tools/perf/pmu-events/arch/x86/skylakex/uncore-cache.json b/to= ols/perf/pmu-events/arch/x86/skylakex/uncore-cache.json new file mode 100644 index 000000000000..543dfc1e5ad7 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/skylakex/uncore-cache.json @@ -0,0 +1,10649 @@ +[ + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8A", + "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x84", + "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x86", + "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass; Intermediate bypass Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the intermediate bypass.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass; Not Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that could not take the bypass, and issues a read to memory.= Note that transactions that did not take the bypass but did not issue read= to memory will not be counted.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass; Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the full bypass.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Clockticks of the uncore caching & home agent= (CHA)", + "EventName": "UNC_CHA_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts clockticks of the clock controlling t= he uncore caching and home agent (CHA).", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xC0", + "EventName": "UNC_CHA_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C1 State", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C1_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C1 Transition", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C1_TRANSITION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C6 State", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C6_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; C6 Transition", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.C6_TRANSITION", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Core PMA Events; GV", + "EventCode": "0x17", + "EventName": "UNC_CHA_CORE_PMA.GV", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Any Cycle with Mult= iple Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Any Single Snoop", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Any Snoop to Remote= Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Multiple Core Reque= sts", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Single Core Request= s", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Core Request to Rem= ote Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Multiple Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Single Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Eviction to Remote = Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Multiple External S= noops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; Single External Sno= ops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued; External Snoop to R= emote Node", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "Counter 0 Occupancy", + "EventCode": "0x1F", + "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Not Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", + "PerPkg": "1", + "PublicDescription": "Counts transactions that looked into the mul= ti-socket cacheline Directory state, and therefore did not send a snoop bec= ause the Directory indicated it was not needed", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.SNP", + "PerPkg": "1", + "PublicDescription": "Counts transactions that looked into the mu= lti-socket cacheline Directory state, and sent one or more snoops, because = the Directory indicated it was needed", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from the HA pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.HA", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline Directory= state updates memory writes issued from the HA pipe. This does not include= memory write requests which are for I (Invalid) or E (Exclusive) cacheline= s.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from TOR pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.TOR", + "PerPkg": "1", + "PublicDescription": "Counts only multi-socket cacheline Directory= state updates due to memory writes issued from the TOR pipe which are the = result of remote transaction hitting the SF/LLC and returning data Core2Cor= e. This does not include memory write requests which are for I (Invalid) or= E (Exclusive) cachelines.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", + "EventCode": "0xAE", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", + "EventCode": "0xAE", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "FaST wire asserted; Horizontal", + "EventCode": "0xA5", + "EventName": "UNC_CHA_FAST_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "FaST wire asserted; Vertical", + "EventCode": "0xA5", + "EventName": "UNC_CHA_FAST_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Read request from a remote socket which hit i= n the HitMe Cache to a line In the E state", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.EX_RDS", + "PerPkg": "1", + "PublicDescription": "Counts read requests from a remote socket wh= ich hit in the HitME cache (used to cache the multi-socket Directory state)= to a line in the E(Exclusive) state. This includes the following read opc= odes (RdCode, RdData, RdDataMigratory, RdCur, RdInv*, Inv*)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache; Shared = hit and op is RdInvOwn, RdInv, Inv*", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoE", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.WBMTOE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoI, WbPushMtoI, WbFlush, or WbMtoS", + "EventCode": "0x5F", + "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*", + "EventCode": "0x5E", + "EventName": "UNC_CHA_HITME_LOOKUP.READ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS", + "EventCode": "0x5E", + "EventName": "UNC_CHA_HITME_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache; No SF= /LLC HitS/F and op is RdInvOwn", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache; op is= RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of Misses in HitMe Cache; SF/LL= C HitS/F and op is RdInvOwn", + "EventCode": "0x60", + "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Deallocate HitME$ on Reads without RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a local request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "PerPkg": "1", + "PublicDescription": "Received RspFwdI* for a local request, but c= onverted HitME$ to SF entry", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache on RdInvOwn even if not RspFwdI*", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a remote request", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM", + "PerPkg": "1", + "PublicDescription": "Updated HitME$ on RspFwdI* or local HitM/E r= eceived for a remote request", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache to SHARed", + "EventCode": "0x61", + "EventName": "UNC_CHA_HITME_UPDATE.SHARED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Even", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Even", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", + "EventCode": "0xA7", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Even", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Even", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", + "EventCode": "0xA9", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Even", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Even", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", + "EventCode": "0xAB", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Left", + "EventCode": "0xAD", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Right", + "EventCode": "0xAD", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "HA to iMC Reads Issued; ISOCH", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "PublicDescription": "Count of the number of reads issued to any o= f the memory controller channels. This can be filtered by the priority of = the reads.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line= Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to the any of the memory controller chann= els.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; Full Line= MIG", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Ful= l Line", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; Partial N= on-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; Partial M= IG", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.; Filter for memory c= ontroller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Par= tial", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations", + "EventCode": "0x62", + "EventName": "UNC_CHA_IODC_ALLOC.INVITOM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations dropped due to IODC Full", + "EventCode": "0x62", + "EventName": "UNC_CHA_IODC_ALLOC.IODCFULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IDOC allocation dropped due to OSB gate", + "EventCode": "0x62", + "EventName": "UNC_CHA_IODC_ALLOC.OSBGATED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to any reason", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to conflicting transaction", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.SNPOUT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoE", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoI", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbPushMtoI", + "EventCode": "0x63", + "EventName": "UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", + "PerPkg": "1", + "PublicDescription": "Moved to Cbo section", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ANY", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Read transactions", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Local", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Remote", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", + "UMask": "0x91", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; External Snoo= p Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for only snoop requests c= oming from the remote socket(s) through the IPQ.", + "UMask": "0x9", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Write Request= s", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Writeback transactions from L2 to= the LLC This includes all write transactions -- both Cacheable and UC.", + "UMask": "0x5", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.F_STATE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x2f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in F State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Local - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x8f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in F State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_F", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x88", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Remote - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in E state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in F State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_F", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in M state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized; Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", + "PerPkg": "1", + "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; CV0 Prefetch Miss", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; CV0 Prefetch Victim", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Number of times that an RFO hit in S state.", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RFO_HIT_S", + "PerPkg": "1", + "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; Silent Snoop Eviction", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc; Write Combining Aliasing", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.WC_ALIASING", + "PerPkg": "1", + "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "OSB Snoop Broadcast", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB", + "PerPkg": "1", + "PublicDescription": "Count of OSB snoop broadcasts. Counts by 1 p= er request causing OSB snoops to be broadcast. Does not count all the snoop= s generated by OSB.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC0_SMI2", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC1_SMI3", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC2_SMI4", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC3_SMI5", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC0_SMI0", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC1_SMI1", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a remote socket for exclusive ownership of a cache line without receivi= ng data (INVITOE) to the CHA.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS", + "PerPkg": "1", + "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Read requests from a remote socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Write requests", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "Write Requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Read and Write Requests; Writes Remote", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", + "EventCode": "0xA1", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", + "EventCode": "0xA0", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AD", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AK", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; BL", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; IV", + "EventCode": "0xA3", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; AD", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", + "EventCode": "0xA2", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xA4", + "EventName": "UNC_CHA_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; IPQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; IRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; IRQ Rejected", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; RRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.RRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations; WBQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.WBQ", + "PerPkg": "1", + "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; AD REQ on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; AD RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Non UPI AK Reque= st", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL NCB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL NCS on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL RSP on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; BL WB on VN0", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Non UPI IV Reque= st", + "EventCode": "0x22", + "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Allow Snoop", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; ANY0", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; HA", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Merging these tw= o together to make room for ANY_REJECT_*0", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; LLC Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; PhyAddr Match", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; SF Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress Probe Queue Rejects; Victim", + "EventCode": "0x23", + "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Mer= ging these two together to make room for ANY_REJECT_*0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; AD REQ on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; AD RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; Non UPI AK Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL NCB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL NCS on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; BL WB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; Non UPI IV Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; AD REQ on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; AD RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; Non UPI AK Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL NCB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL NCS on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; BL WB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; Non UPI IV Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; ANY0", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects; HA", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; ANY0", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries; HA", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; IPQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; IRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; RRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.RRQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy; WBQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.WBQ", + "PerPkg": "1", + "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; AD REQ on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; AD RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Non UPI AK Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL NCB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL NCS on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; BL WB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Non UPI IV Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Allow Snoop", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; ANY0", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; HA", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Merging these two together to = make room for ANY_REJECT_*0", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; LLC Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; PhyAddr Match", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; SF Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries; Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= OR SF Way", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; AD REQ on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; AD RSP on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Non UPI AK Request", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL NCB on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL NCS on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL RSP on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; BL WB on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Non UPI IV Request", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Allow Snoop", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; ANY0", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; HA", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Merging these two toge= ther to make room for ANY_REJECT_*0", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; LLC Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; PhyAddr Match", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; SF Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries; Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; AD REQ on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; AD RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Non UPI AK Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL NCB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL NCS on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL RSP on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; BL WB on VN0", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Non UPI IV Request", + "EventCode": "0x26", + "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Allow Snoop", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; ANY0", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; HA", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; LLC Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; PhyAddr Match", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; SF Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RRQ Rejects; Victim", + "EventCode": "0x27", + "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; AD REQ on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; AD RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Non UPI AK Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL NCB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL NCS on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL RSP on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; BL WB on VN0", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Non UPI IV Request", + "EventCode": "0x28", + "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Allow Snoop", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; ANY0", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; HA", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; LLC Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; PhyAddr Match", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; SF Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "WBQ Rejects; Victim", + "EventCode": "0x29", + "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM", + "PerPkg": "1", + "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB4", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Credit", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Credit", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_CHA_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; AK - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation; IV - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Credit", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Credit", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_CHA_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.E_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores cache. Snoop filter capacity e= victions occur when the snoop filter is full and evicts an existing entry t= o track a new entry. Does not count clean evictions such as when a cores ca= che replaces a tracked cacheline with a new cacheline.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.M_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores cache. Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry. Does not count clean evictions such as when a cores cac= he replaces a tracked cacheline with a new cacheline.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.S_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores cache. Snoop filter capacity evic= tions occur when the snoop filter is full and evicts an existing entry to t= rack a new entry. Does not count clean evictions such as when a cores cache= replaces a tracked cacheline with a new cacheline.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; All", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast snoop for Local Reques= ts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA. This filter incl= udes only requests coming from local sockets.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast snoops for Remote Requ= ests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA.This filter inclu= des only requests coming from remote sockets.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Directed snoops for Local Reques= ts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from local sockets.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Directed snoops for Remote Reque= sts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from remote sockets.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Local Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the local socket.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Remote Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE", + "PerPkg": "1", + "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the remote socket.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "RspCnflct* Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCTS", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspCnflct* Snoop Response was received. This is returned when a snoop = finds an existing outstanding transaction in a remote caching agent. This t= riggers conflict resolution hardware. This covers both the opcode RspCnflct= and RspCnflctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received; RspFwd", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Counts the total number of RspI snoop respon= ses received. Whenever a snoops are issued, one or more snoop responses wi= ll be returned depending on the topology of the system. In systems larger= than 2s, when multiple snoops are returned this will count all the snoops = that are received. For example, if 3 snoops were issued and returned RspI,= RspS, and RspSFwd; then each of these sub-events would increment by 1.; Fi= lters for a snoop response of RspFwd to a CA request. This snoop response = is only possible for RdCur when a snoop HITM/E in a remote caching agent an= d it directly forwards data to a requestor without changing the requestor's= cache line state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "RspI Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPI", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe RspI Snoop Response was received which indicates the remote cache does n= ot have the data, or when the remote cache silently evicts data (such as wh= en an RFO: the Read for Ownership issued before a write hits non-modified d= ata).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "RspIFwd Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspIFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data and the requesting agent is able to acquire the dat= a in E (Exclusive) or M (modified) states. This is commonly returned with = RFO (the Read for Ownership issued before a write) transactions. The snoop= could have either been to a cacheline in the M,E,F (Modified, Exclusive or= Forward) states.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received : RspS", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPS", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received : RspS : Counts the= total number of RspI snoop responses received. Whenever a snoops are issu= ed, one or more snoop responses will be returned depending on the topology = of the system. In systems larger than 2s, when multiple snoops are return= ed this will count all the snoops that are received. For example, if 3 sno= ops were issued and returned RspI, RspS, and RspSFwd; then each of these su= b-events would increment by 1. : Filters for snoop responses of RspS. RspS= is returned when a remote cache has data but is not forwarding it. It is = a way to let the requesting socket know that it cannot allocate the data in= E state. No data is sent with S RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "RspSFwd Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Counts when a a transaction with the opcode = type RspSFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data but held on to its current copy. This is common fo= r data and code reads that hit in a remote socket in E (Exclusive) or F (Fo= rward) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Rsp*Fwd*WB Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSP_FWD_WB", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*Fwd*WB Snoop Response was received which indicates the data was writ= ten back to its home socket, and the cacheline was forwarded to the request= or socket. This snoop response is only used in >=3D 4 socket systems. It = is used when a snoop HITM's in a remote caching agent and it directly forwa= rds data to a requestor, and simultaneously returns data to its home socket= to be written back to memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Rsp*WB Snoop Responses Received", + "EventCode": "0x5C", + "EventName": "UNC_CHA_SNOOP_RESP.RSP_WBWB", + "PerPkg": "1", + "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*WB Snoop Response was received which indicates which indicates the d= ata was written back to its home. This is returned when a non-RFO request = hits a cacheline in the Modified state. The Cache can either downgrade the = cacheline to a S (Shared) or I (Invalid) state depending on how the system = has been configured. This response will also be sent when a cache requests= E (Exclusive) ownership of a cache line without receiving data, because th= e cache must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspCnflct", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspConflict to local CA reques= ts. This is returned when a snoop finds an existing outstanding transactio= n in a remote caching agent when it CAMs that caching agent. This triggers= conflict resolution hardware. This covers both RspCnflct and RspCnflctWbI= .", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspFwd to local CA requests. = This snoop response is only possible for RdCur when a snoop HITM/E in a rem= ote caching agent and it directly forwards data to a requestor without chan= ging the requestor's cache line state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspI", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspI to local CA requests. Rs= pI is returned when the remote cache does not have the data, or when the re= mote cache silently evicts data (such as when an RFO hits non-modified data= ).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspIFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspIFwd to local CA requests. = This is returned when a remote caching agent forwards data and the requesti= ng agent is able to acquire the data in E or M states. This is commonly re= turned with RFO transactions. It can be either a HitM or a HitFE.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspS", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspS to local CA requests. Rsp= S is returned when a remote cache has data but is not forwarding it. It is= a way to let the requesting socket know that it cannot allocate the data i= n E state. No data is sent with S RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; RspSFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspSFwd to local CA requests. = This is returned when a remote caching agent forwards data but holds on to= its current copy. This is common for data and code reads that hit in a re= mote socket in E or F state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; Rsp*FWD*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of Rsp*Fwd*WB to local CA request= s. This snoop response is only used in 4s systems. It is used when a snoo= p HITM's in a remote caching agent and it directly forwards data to a reque= stor, and simultaneously returns data to the home to be written back to mem= ory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local; Rsp*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", + "PerPkg": "1", + "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspIWB or RspSWB to local CA r= equests. This is returned when a non-RFO request hits in M state. Data an= d Code Reads can return either RspIWB or RspSWB depending on how the system= has been configured. InvItoE transactions will also return RspIWB because= they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from Local", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x15", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from Local iA and IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL_IO_IA", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests", + "UMask": "0x35", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Misses from Local", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x25", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; SF/LLC Evictions", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.EVICT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; T= OR allocation occurred as a result of SF/LLC evictions (came from the ISMQ)= ", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hit (Not a Miss)", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; H= ITs (hit is defined to be not a miss [see below], as a result for any reque= st allocated into the TOR, one of either HIT or MISS must be true)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests from iA Cores", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that hit the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that missed the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; All from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally generated IO traffic", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Hits from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; ItoM misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", + "Filter": "config1=3D0x49033", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO ItoM requests that mis= s the LLC. An ItoM request is used by IIO to request a data write without f= irst reading the data for ownership.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RdCur misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RDCUR", + "Filter": "config1=3D0x43C33", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RdCur requests and mis= s the LLC. A RdCur request is used by IIO to read data without changing sta= te.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; RFO misses from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RFO requests that miss= the LLC. A read for ownership (RFO) requests a cache line to be cached in = E state with the intent to modify.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; IPQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; IRQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; Miss", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MISS", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; M= isses. (a miss is defined to be any transaction from the IRQ, PRQ, RRQ, IP= Q or (in the victim case) the ISMQ, that required the CHA to spawn a new UP= I/SMI3 request on the UPI fabric (including UPI snoops and/or any RD/WR to = a local memory controller, in the event that the CHA is the home node)). B= asically, if the LLC/SF/MLC complex were not able to service the request wi= thout involving another agent...it is a miss. If only IDI snoops were requ= ired, it is not a miss (that means the SF/MLC com", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; PRQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", + "PerPkg": "1", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.RRQ_HIT", + "PerPkg": "1", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS", + "PerPkg": "1", + "UMask": "0x60", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.WBQ_HIT", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.WBQ_MISS", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from Local", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All remotely= generated requests", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from Local", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x17", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from Local", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x27", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; SF/LLC Evictions", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; TOR allocation occurred as a result of SF/LLC evictions (c= ame from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hit (Not a Miss)", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; HITs (hit is defined to be not a miss [see below], as a re= sult for any request allocated into the TOR, one of either HIT or MISS must= be true)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally initiated requests from iA Cores", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that hit the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", + "Filter": "config1=3D0x40233", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", + "Filter": "config1=3D0x40433", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", + "Filter": "config1=3D0x4b233", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", + "Filter": "config1=3D0x4b433", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefRFO", + "Filter": "config1=3D0x4b033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that missed the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; All from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally generated IO traffic", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Hits from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; ITOM Misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", + "Filter": "config1=3D0x49033", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO ItoM req= uests that miss the LLC. An ItoM is used by IIO to request a data write wit= hout first reading the data for ownership.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RDCUR misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RDCUR", + "Filter": "config1=3D0x43C33", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RdCur re= quests that miss the LLC. A RdCur request is used by IIO to read data witho= ut changing state.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; RFO misses from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", + "Filter": "config1=3D0x40033", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RFO requ= ests that miss the LLC. A read for ownership (RFO) requests data to be cach= ed in E state with the intent to modify.", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; IPQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; IRQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; Miss", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; Misses. (a miss is defined to be any transaction from the= IRQ, PRQ, RRQ, IPQ or (in the victim case) the ISMQ, that required the CHA= to spawn a new UPI/SMI3 request on the UPI fabric (including UPI snoops an= d/or any RD/WR to a local memory controller, in the event that the CHA is t= he home node)). Basically, if the LLC/SF/MLC complex were not able to serv= ice the request without involving another agent...it is a miss. If only ID= I snoops were required, it is not a miss (that means the SF/MLC com", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; PRQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used; IV", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; IV", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; IV", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK.IV", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; IV", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; AD REQ Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; AD RSP VN0 Cr= edits", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL NCB Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL NCS Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL RSP Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; BL DRS Credit= s", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; VN0 Credits", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credit Allocations; VNA Credits", + "EventCode": "0x38", + "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VNA", + "PerPkg": "1", + "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; AD REQ VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_REQ", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; AD RSP VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCB VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCS VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL RSP VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL DRS VN0= Credits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_WB", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; AD VNA Cre= dits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_AD", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "UPI Ingress Credits In Use Cycles; BL VNA Cre= dits", + "EventCode": "0x3B", + "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_BL", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Even", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Odd", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Even", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Odd", + "EventCode": "0xA6", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Even", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Odd", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Even", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Odd", + "EventCode": "0xA8", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Even", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Odd", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Even", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Odd", + "EventCode": "0xAA", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Down", + "EventCode": "0xAC", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Up", + "EventCode": "0xAC", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI; Pushed to LLC", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was able to pu= sh WbPushMToI to LLC", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI; Pushed to Memory", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was unable to = push WbPushMToI to LLC (hence pushed it to MEM)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC0_SMI2", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC1_SMI3", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC2_SMI4", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC3_SMI5", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC0_SMI0", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC1_SMI1", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspIFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd F/E", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd M", + "UMask": "0xf0", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd F/E", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd M", + "UMask": "0xe8", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Any RspHitFSE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response any to Hit F/S/E= ", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd F/E", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd M", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd F/E", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd M", + "UMask": "0x48", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Core RspHitFSE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response any to Hit F/S/= E", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd F/= E", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd M", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdFE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd F/= E", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdM", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd M", + "UMask": "0x88", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; Evict RspHitFSE", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response any to Hit = F/S/E", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspIFwdF= E", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd F/= E", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspIFwdM= ", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd M", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspSFwdF= E", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd F/= E", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspSFwdM= ", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd M", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoop Responses; External RspHitFS= E", + "EventCode": "0x32", + "EventName": "UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", + "PerPkg": "1", + "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response any to Hit = F/S/E", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CLOCKTICKS", + "Deprecated": "1", + "EventName": "UNC_C_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_FAST_ASSERTED.HORZ", + "Deprecated": "1", + "EventCode": "0xA5", + "EventName": "UNC_C_FAST_ASSERTED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.ANY", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.ANY", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.LOCAL", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.REMOTE", + "PerPkg": "1", + "UMask": "0x91", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.REMOTE_SNOOP", + "PerPkg": "1", + "UMask": "0x9", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITE", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.F_STATE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.LOCAL", + "PerPkg": "1", + "UMask": "0x2f", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.REMOTE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", + "Deprecated": "1", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SRC_THRTL", + "Deprecated": "1", + "EventCode": "0xA4", + "EventName": "UNC_C_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.EVICT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.EVICT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.HIT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.HIT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IPQ", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IPQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IRQ", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IRQ_HIT", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.IRQ_MISS", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.LOC_IA", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.LOC_IO", + "PerPkg": "1", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.MISS", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.PRQ", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.PRQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_HIT", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.PRQ_HIT", + "PerPkg": "1", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_MISS", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.PRQ_MISS", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.REM_ALL", + "PerPkg": "1", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.RRQ_HIT", + "PerPkg": "1", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.RRQ_MISS", + "PerPkg": "1", + "UMask": "0x60", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.WBQ_HIT", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_C_TOR_INSERTS.WBQ_MISS", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.EVICT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.HIT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IPQ", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IPQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_HIT", + "PerPkg": "1", + "UMask": "0x18", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_MISS", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IRQ", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_HIT", + "PerPkg": "1", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_MISS", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "UMask": "0x37", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IA", + "PerPkg": "1", + "UMask": "0x31", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IO", + "PerPkg": "1", + "UMask": "0x34", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.MISS", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.PRQ", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_HIT", + "PerPkg": "1", + "UMask": "0x14", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "Deprecated": "1", + "EventCode": "0x36", + "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_MISS", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x80", + "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x82", + "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x88", + "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x8A", + "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x86", + "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", + "Deprecated": "1", + "EventCode": "0x8E", + "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", + "Deprecated": "1", + "EventCode": "0x8C", + "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "Deprecated": "1", + "EventCode": "0x57", + "EventName": "UNC_H_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "Deprecated": "1", + "EventCode": "0x57", + "EventName": "UNC_H_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "Deprecated": "1", + "EventCode": "0x57", + "EventName": "UNC_H_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CMS_CLOCKTICKS", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_H_CLOCK", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_STATE", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C1_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_TRANSITION", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C1_TRANSITION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_STATE", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C6_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_TRANSITION", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.C6_TRANSITION", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.GV", + "Deprecated": "1", + "EventCode": "0x17", + "EventName": "UNC_H_CORE_PMA.GV", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.ANY_REMOTE", + "PerPkg": "1", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.CORE_REMOTE", + "PerPkg": "1", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EVICT_REMOTE", + "PerPkg": "1", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_GTONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_ONE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_REMOTE", + "Deprecated": "1", + "EventCode": "0x33", + "EventName": "UNC_H_CORE_SNP.EXT_REMOTE", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_COUNTER0_OCCUPANCY", + "Deprecated": "1", + "EventCode": "0x1F", + "EventName": "UNC_H_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.NO_SNP", + "Deprecated": "1", + "EventCode": "0x53", + "EventName": "UNC_H_DIR_LOOKUP.NO_SNP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.SNP", + "Deprecated": "1", + "EventCode": "0x53", + "EventName": "UNC_H_DIR_LOOKUP.SNP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.HA", + "Deprecated": "1", + "EventCode": "0x54", + "EventName": "UNC_H_DIR_UPDATE.HA", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.TOR", + "Deprecated": "1", + "EventCode": "0x54", + "EventName": "UNC_H_DIR_UPDATE.TOR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "Deprecated": "1", + "EventCode": "0xAE", + "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "Deprecated": "1", + "EventCode": "0xAE", + "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.EX_RDS", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.EX_RDS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.SHARED_OWNREQ", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.SHARED_OWNREQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOE", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.WBMTOE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOI_OR_S", + "Deprecated": "1", + "EventCode": "0x5F", + "EventName": "UNC_H_HITME_HIT.WBMTOI_OR_S", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.READ", + "Deprecated": "1", + "EventCode": "0x5E", + "EventName": "UNC_H_HITME_LOOKUP.READ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.WRITE", + "Deprecated": "1", + "EventCode": "0x5E", + "EventName": "UNC_H_HITME_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", + "Deprecated": "1", + "EventCode": "0x60", + "EventName": "UNC_H_HITME_MISS.NOTSHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.READ_OR_INV", + "Deprecated": "1", + "EventCode": "0x60", + "EventName": "UNC_H_HITME_MISS.READ_OR_INV", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.SHARED_RDINVOWN", + "Deprecated": "1", + "EventCode": "0x60", + "EventName": "UNC_H_HITME_MISS.SHARED_RDINVOWN", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RDINVOWN", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.RDINVOWN", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RSPFWDI_REM", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.RSPFWDI_REM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.SHARED", + "Deprecated": "1", + "EventCode": "0x61", + "EventName": "UNC_H_HITME_UPDATE.SHARED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "Deprecated": "1", + "EventCode": "0xA7", + "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "Deprecated": "1", + "EventCode": "0xA9", + "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "Deprecated": "1", + "EventCode": "0xAB", + "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", + "Deprecated": "1", + "EventCode": "0xAD", + "EventName": "UNC_H_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", + "Deprecated": "1", + "EventCode": "0xAD", + "EventName": "UNC_H_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.NORMAL", + "Deprecated": "1", + "EventCode": "0x59", + "EventName": "UNC_H_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.PRIORITY", + "Deprecated": "1", + "EventCode": "0x59", + "EventName": "UNC_H_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_MIG", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_MIG", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "Deprecated": "1", + "EventCode": "0x5B", + "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.INVITOM", + "Deprecated": "1", + "EventCode": "0x62", + "EventName": "UNC_H_IODC_ALLOC.INVITOM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.IODCFULL", + "Deprecated": "1", + "EventCode": "0x62", + "EventName": "UNC_H_IODC_ALLOC.IODCFULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.OSBGATED", + "Deprecated": "1", + "EventCode": "0x62", + "EventName": "UNC_H_IODC_ALLOC.OSBGATED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.ALL", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.SNPOUT", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.SNPOUT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOE", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.WBMTOE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOI", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.WBMTOI", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", + "Deprecated": "1", + "EventCode": "0x63", + "EventName": "UNC_H_IODC_DEALLOC.WBPUSHMTOI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_MISS", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_VIC", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RFO_HIT_S", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.RFO_HIT_S", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RSPI_WAS_FSE", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.WC_ALIASING", + "Deprecated": "1", + "EventCode": "0x39", + "EventName": "UNC_H_MISC.WC_ALIASING", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_OSB", + "Deprecated": "1", + "EventCode": "0x55", + "EventName": "UNC_H_OSB", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC0_SMI0", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC1_SMI1", + "Deprecated": "1", + "EventCode": "0x58", + "EventName": "UNC_H_READ_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_LOCAL", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.INVITOE_LOCAL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_REMOTE", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.INVITOE_REMOTE", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "read requests from home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.READS", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "read requests from local home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.READS_LOCAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "read requests from remote home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.READS_REMOTE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "write requests from home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.WRITES", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "write requests from local home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.WRITES_LOCAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "write requests from remote home agent", + "Deprecated": "1", + "EventCode": "0x50", + "EventName": "UNC_H_REQUESTS.WRITES_REMOTE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AD", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AK", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.BL", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.IV", + "Deprecated": "1", + "EventCode": "0xA1", + "EventName": "UNC_H_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AD", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AK", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.BL", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.IV", + "Deprecated": "1", + "EventCode": "0xA0", + "EventName": "UNC_H_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AD", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.BL", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.IV", + "Deprecated": "1", + "EventCode": "0xA3", + "EventName": "UNC_H_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AD", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AK", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.BL", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.IV", + "Deprecated": "1", + "EventCode": "0xA2", + "EventName": "UNC_H_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IPQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.IPQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.IRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ_REJ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.PRQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ_REJ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.RRQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.RRQ", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.WBQ", + "Deprecated": "1", + "EventCode": "0x13", + "EventName": "UNC_H_RxC_INSERTS.WBQ", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x22", + "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.ANY_IPQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x23", + "EventName": "UNC_H_RxC_IPQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x18", + "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.ANY_REJECT_IRQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x19", + "EventName": "UNC_H_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x24", + "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x2C", + "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x25", + "EventName": "UNC_H_RxC_ISMQ1_REJECT.ANY_ISMQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x25", + "EventName": "UNC_H_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "Deprecated": "1", + "EventCode": "0x2D", + "EventName": "UNC_H_RxC_ISMQ1_RETRY.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.HA", + "Deprecated": "1", + "EventCode": "0x2D", + "EventName": "UNC_H_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IPQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.IPQ", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IRQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.IRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.RRQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.RRQ", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.WBQ", + "Deprecated": "1", + "EventCode": "0x11", + "EventName": "UNC_H_RxC_OCCUPANCY.WBQ", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x2E", + "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.HA", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "Deprecated": "1", + "EventCode": "0x2F", + "EventName": "UNC_H_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x20", + "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.ANY_PRQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x21", + "EventName": "UNC_H_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x2A", + "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ANY", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "Deprecated": "1", + "EventCode": "0x2B", + "EventName": "UNC_H_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x26", + "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.ANY_RRQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x27", + "EventName": "UNC_H_RxC_RRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", + "Deprecated": "1", + "EventCode": "0x28", + "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ANY0", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.ANY_WBQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.HA", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.VICTIM", + "Deprecated": "1", + "EventCode": "0x29", + "EventName": "UNC_H_RxC_WBQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB4", + "EventName": "UNC_H_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB2", + "EventName": "UNC_H_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IFV", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB3", + "EventName": "UNC_H_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB1", + "EventName": "UNC_H_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_CRD", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AK_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_CRD", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.IV_BNC", + "Deprecated": "1", + "EventCode": "0xB0", + "EventName": "UNC_H_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.E_STATE", + "Deprecated": "1", + "EventCode": "0x3D", + "EventName": "UNC_H_SF_EVICTION.E_STATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.M_STATE", + "Deprecated": "1", + "EventCode": "0x3D", + "EventName": "UNC_H_SF_EVICTION.M_STATE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.S_STATE", + "Deprecated": "1", + "EventCode": "0x3D", + "EventName": "UNC_H_SF_EVICTION.S_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.ALL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.BCST_LOC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_REMOTE", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.BCST_REM", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.DIRECT_LOC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.DIRECT_REM", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.LOCAL", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.REMOTE", + "Deprecated": "1", + "EventCode": "0x51", + "EventName": "UNC_H_SNOOPS_SENT.REMOTE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPCNFLCTS", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPCNFLCT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPFWD", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPFWD", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPI", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPI", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPIFWD", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPIFWD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPS", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPSFWD", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSPSFWD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_FWD_WB", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSP_FWD_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_WBWB", + "Deprecated": "1", + "EventCode": "0x5C", + "EventName": "UNC_H_SNOOP_RESP.RSP_WB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPFWD", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPI", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPIFWD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPSFWD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_FWD_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", + "Deprecated": "1", + "EventCode": "0x5D", + "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_WB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "Deprecated": "1", + "EventCode": "0xD0", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "Deprecated": "1", + "EventCode": "0xD2", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "Deprecated": "1", + "EventCode": "0xD4", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "Deprecated": "1", + "EventCode": "0xD6", + "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", + "Deprecated": "1", + "EventCode": "0x9D", + "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", + "Deprecated": "1", + "EventCode": "0x9F", + "EventName": "UNC_H_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", + "Deprecated": "1", + "EventCode": "0x96", + "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", + "Deprecated": "1", + "EventCode": "0x97", + "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", + "Deprecated": "1", + "EventCode": "0x95", + "EventName": "UNC_H_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_CRD", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AK_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_CRD", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.IV_BNC", + "Deprecated": "1", + "EventCode": "0x99", + "EventName": "UNC_H_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", + "Deprecated": "1", + "EventCode": "0x94", + "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AD_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AK_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.BL_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.IV_BNC", + "Deprecated": "1", + "EventCode": "0x9B", + "EventName": "UNC_H_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", + "Deprecated": "1", + "EventCode": "0x9C", + "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG0", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG1", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG0", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG1", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG0", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG1", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.IV", + "Deprecated": "1", + "EventCode": "0x9E", + "EventName": "UNC_H_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.IV", + "Deprecated": "1", + "EventCode": "0x92", + "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.IV", + "Deprecated": "1", + "EventCode": "0x93", + "EventName": "UNC_H_TxR_VERT_CYCLES_NE.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG0", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG1", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG0", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG1", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG0", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG1", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.IV", + "Deprecated": "1", + "EventCode": "0x91", + "EventName": "UNC_H_TxR_VERT_INSERTS.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG0", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG1", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG0", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG1", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG0", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG1", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.IV", + "Deprecated": "1", + "EventCode": "0x98", + "EventName": "UNC_H_TxR_VERT_NACK.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.IV", + "Deprecated": "1", + "EventCode": "0x90", + "EventName": "UNC_H_TxR_VERT_OCCUPANCY.IV_AG0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG0", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG1", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG0", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG1", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG0", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG1", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.IV", + "Deprecated": "1", + "EventCode": "0x9A", + "EventName": "UNC_H_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", + "Deprecated": "1", + "EventCode": "0xA6", + "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", + "Deprecated": "1", + "EventCode": "0xA8", + "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", + "Deprecated": "1", + "EventCode": "0xAA", + "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.DN", + "Deprecated": "1", + "EventCode": "0xAC", + "EventName": "UNC_H_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.UP", + "Deprecated": "1", + "EventCode": "0xAC", + "EventName": "UNC_H_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.LLC", + "Deprecated": "1", + "EventCode": "0x56", + "EventName": "UNC_H_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.MEM", + "Deprecated": "1", + "EventCode": "0x56", + "EventName": "UNC_H_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC0_SMI2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC1_SMI3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC2_SMI4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.EDC3_SMI5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.MC0_SMI0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", + "Deprecated": "1", + "EventCode": "0x5A", + "EventName": "UNC_H_WRITE_NO_CREDITS.MC1_SMI1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0xe4", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0xf0", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0xe2", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0xe8", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.ANY_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0xe1", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0x50", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0x48", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.CORE_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0x84", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0x88", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EVICT_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDFE", + "PerPkg": "1", + "UMask": "0x24", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDM", + "PerPkg": "1", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDFE", + "PerPkg": "1", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDM", + "PerPkg": "1", + "UMask": "0x28", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", + "Deprecated": "1", + "EventCode": "0x32", + "EventName": "UNC_H_XSNP_RESP.EXT_RSP_HITFSE", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CHA" + } +] diff --git a/tools/perf/pmu-events/arch/x86/skylakex/uncore-interconnect.js= on b/tools/perf/pmu-events/arch/x86/skylakex/uncore-interconnect.json new file mode 100644 index 000000000000..26a5a20bf37a --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/skylakex/uncore-interconnect.json @@ -0,0 +1,11248 @@ +[ + { + "BriefDescription": "Total Write Cache Occupancy; Any Source", + "EventCode": "0xF", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy; Snoops", + "EventCode": "0xF", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Total IRP occupancy of inbound read and write= requests.", + "EventCode": "0xF", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", + "PerPkg": "1", + "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests. This is effectively the sum of read occupancy and write occupa= ncy.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "IRP Clocks", + "EventCode": "0x1", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CLFlush", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; CRd", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.CRD", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; DRd", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.DRD", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; PCIDCAHin5t", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; PCIRdCur", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", + "PerPkg": "1", + "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.RFO", + "PerPkg": "1", + "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops; WbMtoI", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", + "PerPkg": "1", + "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF RF full", + "EventCode": "0x17", + "EventName": "UNC_I_FAF_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", + "EventCode": "0x18", + "EventName": "UNC_I_FAF_INSERTS", + "PerPkg": "1", + "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Occupancy of the IRP FAF queue.", + "EventCode": "0x19", + "EventName": "UNC_I_FAF_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF allocation -- sent to ADQ", + "EventCode": "0x16", + "EventName": "UNC_I_FAF_TRANSACTIONS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "All Inserts Inbound (p2p + faf + cset)", + "EventCode": "0x1E", + "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x1E", + "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.FAST_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Requests", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.FAST_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.FAST_XFER", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 0", + "EventCode": "0x1C", + "EventName": "UNC_I_MISC0.UNKNOWN", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Lost Forward", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.LOST_FWD", + "PerPkg": "1", + "PublicDescription": "Snoop pulled away ownership before a write w= as committed", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Received Invalid", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Received Valid", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_E", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_M", + "PerPkg": "1", + "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", + "EventCode": "0x1D", + "EventName": "UNC_I_MISC1.SLOW_S", + "PerPkg": "1", + "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Requests", + "EventCode": "0x14", + "EventName": "UNC_I_P2P_INSERTS", + "PerPkg": "1", + "PublicDescription": "P2P requests from the ITC", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Occupancy", + "EventCode": "0x15", + "EventName": "UNC_I_P2P_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "P2P B & S Queue Occupancy", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P completions", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; match if local only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; match if local and target m= atches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P Message", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P reads", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.RD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; Match if remote only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; match if remote and target = matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions; P2P Writes", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.WR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", + "UMask": "0x7e", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", + "UMask": "0x74", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", + "UMask": "0x72", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", + "UMask": "0x78", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", + "UMask": "0x71", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit E or S", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit I", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Hit M", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; Miss", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.MISS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpCode", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpData", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses; SnpInv", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Atomic", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Other", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Read Prefetches", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.RD_PREF", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Reads", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.READS", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count; Writes", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Egress Allocations", + "EventCode": "0xB", + "EventName": "UNC_I_TxC_AK_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Cycles Full", + "EventCode": "0x5", + "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Inserts", + "EventCode": "0x2", + "EventName": "UNC_I_TxC_BL_DRS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Occupancy", + "EventCode": "0x8", + "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Cycles Full", + "EventCode": "0x6", + "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Inserts", + "EventCode": "0x3", + "EventName": "UNC_I_TxC_BL_NCB_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Occupancy", + "EventCode": "0x9", + "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Cycles Full", + "EventCode": "0x7", + "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Inserts", + "EventCode": "0x4", + "EventName": "UNC_I_TxC_BL_NCS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Occupancy", + "EventCode": "0xA", + "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD Egress Credit Stalls", + "EventCode": "0x1A", + "EventName": "UNC_I_TxR2_AD_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x1B", + "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xD", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0xE", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0xC", + "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Traffic in which the M2M to iMC Bypass was no= t taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_Egress.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts traffic in which the M2M (Mesh to Mem= ory) to iMC (Memory Controller) bypass was not taken", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass; Taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_Egress.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass; Not Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass; Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles - at UCLK", + "EventName": "UNC_M2M_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xC0", + "EventName": "UNC_M2M_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to core mode (which bypass= es the CHA) was disabled", + "EventCode": "0x24", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "PublicDescription": "Counts cycles when direct to core mode (whic= h bypasses the CHA) was disabled", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages sent direct to core (bypassing the C= HA)", + "EventCode": "0x23", + "EventName": "UNC_M2M_DIRECT2CORE_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts when messages were sent direct to cor= e (bypassing the CHA)", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action were overridden", + "EventCode": "0x25", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", + "PerPkg": "1", + "PublicDescription": "Counts reads in which direct to core transac= tions (which would have bypassed the CHA) were overridden", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to Intel(R) U= PI transactions were overridden", + "EventCode": "0x28", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", + "PerPkg": "1", + "PublicDescription": "Counts reads in which direct to Intel(R) Ult= ra Path Interconnect (UPI) transactions (which would have bypassed the CHA)= were overridden", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to Intel(R) UPI was disabl= ed", + "EventCode": "0x27", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the ability to send messa= ges direct to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was = disabled", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages sent direct to the Intel(R) UPI", + "EventCode": "0x26", + "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", + "PerPkg": "1", + "PublicDescription": "Counts when messages were sent direct to the= Intel(R) Ultra Path Interconnect (bypassing the CHA)", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads that a message sent direct2 I= ntel(R) UPI was overridden", + "EventCode": "0x29", + "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", + "PerPkg": "1", + "PublicDescription": "Counts when a read message that was sent dir= ect to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was overrid= den", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in A State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in I State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in L State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On NonDirty Line in S State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in A State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in I State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in L State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Hit; On Dirty Line in S State", + "EventCode": "0x2A", + "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (any= state found)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in Any State (A, I, S or unused)", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookups (cac= heline found in A state)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in the A (SnoopAll) state, indicating the cacheline is stored in anothe= r socket in any state, and we must snoop the other sockets to make sure we = get the latest data. The data may be stored in any state in the local sock= et.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in I state)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the I (Invalid) state indicating the cacheline is not stored in ano= ther socket, and so there is no need to snoop the other sockets for the lat= est data. The data may be stored in any state in the local socket.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in S state)", + "EventCode": "0x2D", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the S (Shared) state indicating the cacheline is either stored in a= nother socket in the S(hared) state , and so there is no need to snoop the = other sockets for the latest data. The data may be stored in any state in = the local socket.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in A State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in I State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in L State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On NonDirty Line in S State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in A State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in I State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in L State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Directory Miss; On Dirty Line in S State", + "EventCode": "0x2B", + "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to I", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to I (Invalid= )", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = A to S", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to S (Shared)= ", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from/= to Any state", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory to a new state", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to A", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to A (SnoopAll= )", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = I to S", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to S (Shared)", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to A", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to A (SnoopAll)= ", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Multi-socket cacheline Directory update from = S to I", + "EventCode": "0x2E", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to I (Invalid)", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", + "EventCode": "0xAE", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", + "EventCode": "0xAE", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "FaST wire asserted; Horizontal", + "EventCode": "0xA5", + "EventName": "UNC_M2M_FAST_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "FaST wire asserted; Vertical", + "EventCode": "0xA5", + "EventName": "UNC_M2M_FAST_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Even", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Even", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Even", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Even", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Even", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Even", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Left", + "EventCode": "0xAD", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Right", + "EventCode": "0xAD", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Reads to iMC issued", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ALL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller).", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC; All, regardless of p= riority.", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.FROM_TRANSGRESS", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC; Critical Priority", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ISOCH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Reads to iMC issued at Normal Priority (Non-I= sochronous)", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller). It only counts normal priority non-= isochronous reads.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Writes to iMC issued", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.ALL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = writes to the iMC (Memory Controller).", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FROM_TRANSGRESS", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; Full Line Non-ISOCH= ", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; ISOCH Full Line", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.NI", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Partial Non-Isochronous writes to the iMC", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = partial writes to the iMC (Memory Controller). It only counts normal prior= ity non-isochronous writes.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC; ISOCH Partial", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches; MC Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches; Mesh Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MESH", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full", + "EventCode": "0x53", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty", + "EventCode": "0x54", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch requests that got turn into a demand= request", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_DEMAND_PROMOTIONS", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) promote= s a outstanding request in the prefetch queue due to a subsequent demand re= ad request that entered the M2M with the same address. Explanatory Side No= te: The Prefetch queue is made of CAM (Content Addressable Memory)", + "Unit": "M2M" + }, + { + "BriefDescription": "Inserts into the Memory Controller Prefetch Q= ueue", + "EventCode": "0x57", + "EventName": "UNC_M2M_PREFCAM_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts when the M2M (Mesh to Memory) receive= s a prefetch request and inserts it into its outstanding prefetch queue. E= xplanatory Side Note: the prefect queue is made from CAM: Content Addressab= le Memory", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", + "EventCode": "0xA1", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", + "EventCode": "0xA0", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AD", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AK", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; BL", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; IV", + "EventCode": "0xA3", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; AD", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", + "EventCode": "0xA2", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xA4", + "EventName": "UNC_M2M_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", + "Deprecated": "1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", + "Deprecated": "1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", + "Deprecated": "1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 0", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 1", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 2", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 0", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 2", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Full", + "EventCode": "0x4", + "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Not Empty", + "EventCode": "0x3", + "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Queue Inserts", + "EventCode": "0x1", + "EventName": "UNC_M2M_RxC_AD_INSERTS", + "PerPkg": "1", + "PublicDescription": "Counts when the a new entry is Received(RxC)= and then added to the AD (Address Ring) Ingress Queue from the CMS (Common= Mesh Stop). This is generally used for reads, and", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x2", + "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Full", + "EventCode": "0x8", + "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Not Empty", + "EventCode": "0x7", + "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Allocations", + "EventCode": "0x5", + "EventName": "UNC_M2M_RxC_BL_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Occupancy", + "EventCode": "0x6", + "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M2M_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; AK - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation; IV - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M2M_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Number AD Ingress Credits", + "EventCode": "0x41", + "EventName": "UNC_M2M_TGR_AD_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number BL Ingress Credits", + "EventCode": "0x42", + "EventName": "UNC_M2M_TGR_BL_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full; Channel 0", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full; Channel 1", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full; Channel 2", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty; Channel 0", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty; Channel 1", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty; Channel 2", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts; Channel 0", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts; Channel 1", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts; Channel 2", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy; Channel 0", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy; Channel 1", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy; Channel 2", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Pending Occupancy", + "EventCode": "0x48", + "EventName": "UNC_M2M_TRACKER_PENDING_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credit Acquired", + "EventCode": "0xD", + "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credits Occupancy", + "EventCode": "0xE", + "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Full", + "EventCode": "0xC", + "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Not Empty", + "EventCode": "0xB", + "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Allocations", + "EventCode": "0x9", + "EventName": "UNC_M2M_TxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", + "EventCode": "0xF", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", + "EventCode": "0x10", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Occupancy", + "EventCode": "0xA", + "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK; CRD Transac= tions to Cbo", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.CRD_CBO", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK; NDR Transac= tions", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.NDR", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", + "EventCode": "0x1E", + "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", + "EventCode": "0x1E", + "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; All", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - N= ear Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - F= ar Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", + "PerPkg": "1", + "UMask": "0x88", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; All", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Read Credit Req= uest", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Write Compare R= equest", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty; Write Credit Re= quest", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; All", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Near Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Far Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Prefetch Read= Cam Hit", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Read Credit R= equest", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Write Compare= Request", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations; Write Credit = Request", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; All", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Read Credit Req= uest", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Write Compare R= equest", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy; Write Credit Re= quest", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Sideband", + "EventCode": "0x6B", + "EventName": "UNC_M2M_TxC_AK_SIDEBAND.RD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Sideband", + "EventCode": "0x6B", + "EventName": "UNC_M2M_TxC_AK_SIDEBAND.WR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Cache", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Core", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CORE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to QPI", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_UPI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", + "EventCode": "0x1A", + "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", + "EventCode": "0x1A", + "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full; All", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - N= ear Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - F= ar Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty; All", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations; All", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Near Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Far Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy; All", + "EventCode": "0x16", + "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", + "EventCode": "0x16", + "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", + "EventCode": "0x16", + "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used; IV", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; IV", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; IV", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK.IV", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; IV", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Even", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Even", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Even", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Even", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Even", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Even", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Down", + "EventCode": "0xAC", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Up", + "EventCode": "0xAC", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", + "Deprecated": "1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", + "Deprecated": "1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", + "Deprecated": "1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 0", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 2", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 0", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 1", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 2", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full; Channel 0", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full; Channel 1", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full; Channel 2", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty; Channel 0", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty; Channel 1", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty; Channel 2", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts; Channel 0", + "EventCode": "0x61", + "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts; Channel 1", + "EventCode": "0x61", + "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts; Channel 2", + "EventCode": "0x61", + "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy; Channel 0", + "EventCode": "0x60", + "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy; Channel 1", + "EventCode": "0x60", + "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy; Channel 2", + "EventCode": "0x60", + "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x80", + "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x82", + "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x88", + "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8A", + "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", + "EventCode": "0x84", + "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x86", + "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", + "EventCode": "0x8E", + "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", + "EventCode": "0x8C", + "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; Requests", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; Snoops", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; VNA Messages", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CBox AD Credits Empty; Writebacks", + "EventCode": "0x22", + "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of uclks in domain", + "EventCode": "0x1", + "EventName": "UNC_M3UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts the number of uclks in the M3 uclk do= main. This could be slightly different than the count in the Ubox because = of enable/freeze delays. However, because the M3 is close to the Ubox, the= y generally should not diverge by more than a handful of cycles.", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xC0", + "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2C Sent", + "EventCode": "0x2B", + "EventName": "UNC_M3UPI_D2C_SENT", + "PerPkg": "1", + "PublicDescription": "Count cases BL sends direct to core", + "Unit": "M3UPI" + }, + { + "BriefDescription": "D2U Sent", + "EventCode": "0x2A", + "EventName": "UNC_M3UPI_D2U_SENT", + "PerPkg": "1", + "PublicDescription": "Cases where SMI3 sends D2U command", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", + "EventCode": "0xAE", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", + "EventCode": "0xAE", + "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "FaST wire asserted; Horizontal", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_FAST_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "FaST wire asserted; Vertical", + "EventCode": "0xA5", + "EventName": "UNC_M3UPI_FAST_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Even", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Even", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", + "EventCode": "0xA7", + "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Even", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Even", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", + "EventCode": "0xA9", + "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Even", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Even", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", + "EventCode": "0xAB", + "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Left", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Horizontal IV Ring in Use; Right", + "EventCode": "0xAD", + "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO0 and IIO1 share the = same ring destination. (1 VN0 credit only)", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO0_IIO1_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO2", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO3", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO4", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; IIO5", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; All IIO targets for NCS = are in single mask. ORs them together", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "M2 BL Credits Empty; Selected M2p BL NCS cred= its", + "EventCode": "0x23", + "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL", + "PerPkg": "1", + "PublicDescription": "No vn0 and vna credits available to send to = M2", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AD - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AD - Slot 1", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AD - Slot 2", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AK - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; AK - Slot 2", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Multi Slot Flit Received; BL - Slot 0", + "EventCode": "0x3E", + "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0", + "PerPkg": "1", + "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", + "EventCode": "0xA1", + "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", + "EventCode": "0xA0", + "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AD", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; AK", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; BL", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring; IV", + "EventCode": "0xA3", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; AD", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", + "EventCode": "0xA2", + "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xA4", + "EventName": "UNC_M3UPI_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; REQ on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; RSP on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; SNP on AD", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; NCB on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; NCS on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; RSP on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN0; WB on BL", + "EventCode": "0x4B", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; REQ on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; RSP on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; SNP on AD", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; NCB on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; NCS on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; RSP on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Lost Arb for VN1; WB on BL", + "EventCode": "0x4C", + "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; AD, BL Parallel Win", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN", + "PerPkg": "1", + "PublicDescription": "AD and BL messages won arbitration concurren= tly / in parallel", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn0 messages because slotting stage cannot accept new message", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn1 messages because slotting stage cannot accept new message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn0 messages because slotting stage cannot accept new message", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1", + "PerPkg": "1", + "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn1 messages because slotting stage cannot accept new message", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN0", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN0", + "PerPkg": "1", + "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn0, delaying vn1 win, because vn0 offered parallel ad/bl", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN1", + "EventCode": "0x4D", + "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN1", + "PerPkg": "1", + "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn1, delaying vn0 win, because vn1 offered parallel ad/bl", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; REQ on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; RSP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; SNP on AD", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; NCB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; NCS on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; RSP on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN0; WB on BL", + "EventCode": "0x49", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; REQ on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; RSP on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; SNP on AD", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; NCB on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; NCS on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; RSP on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Can't Arb for VN1; WB on BL", + "EventCode": "0x4A", + "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; REQ on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; RSP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; SNP on AD", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; NCB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; NCS on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; RSP on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN0; WB on BL", + "EventCode": "0x47", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; REQ on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; RSP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; SNP on AD", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; NCB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; NCS on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; RSP on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "No Credits to Arb for VN1; WB on BL", + "EventCode": "0x48", + "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on BL Ar= b", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while b= l message is in arbitration", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on Idle", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while p= ipeline is idle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 1", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 1 while merging with bl = message in same flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 2", + "EventCode": "0x40", + "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT", + "PerPkg": "1", + "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 2 while merging with bl = message in same flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; REQ on AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; RSP on AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; SNP on AD", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; NCB on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; NCS on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; RSP on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message lost contest for flit; WB on BL", + "EventCode": "0x50", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; REQ on AD", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; RSP on AD", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; SNP on AD", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; NCB on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; NCS on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; RSP on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message lost contest for flit; WB on BL", + "EventCode": "0x51", + "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events; Any In BGF FIFO", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO", + "PerPkg": "1", + "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf (fifo only)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events; Any in BGF Path", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH", + "PerPkg": "1", + "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf path (i.e. pipe to fifo)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Miscellaneous Credit Events; No D2K For Arb", + "EventCode": "0x60", + "EventName": "UNC_M3UPI_RxC_CRD_MISC.NO_D2K_FOR_ARB", + "PerPkg": "1", + "PublicDescription": "VN0 or VN1 BL RSP message was blocked from a= rbitration request due to lack of D2K CMP credits", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; D2K Credits", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD", + "PerPkg": "1", + "PublicDescription": "D2K completion fifo credit occupancy (credit= s in use), accumulated across all cycles", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; Packets in BGF FIFO", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO", + "PerPkg": "1", + "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in fifo", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; Packets in BGF Path", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH", + "PerPkg": "1", + "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in path (i.e. pipe to fifo or fifo)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO", + "PerPkg": "1", + "PublicDescription": "count of bl messages in pump-1-pending state= , in completion fifo only", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL", + "PerPkg": "1", + "PublicDescription": "count of bl messages in pump-1-pending state= , in marker table and in fifo", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; Transmit Credits", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD", + "PerPkg": "1", + "PublicDescription": "Link layer transmit queue credit occupancy (= credits in use), accumulated across all cycles", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Credit Occupancy; VNA In Use", + "EventCode": "0x61", + "EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE", + "PerPkg": "1", + "PublicDescription": "Remote UPI VNA credit occupancy (number of c= redits in use), accumulated across all cycles", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", + "EventCode": "0x43", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", + "EventCode": "0x44", + "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent; All", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent; No BGF Credits", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_BGF", + "PerPkg": "1", + "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Data Flit Not Sent; No TxQ Credits", + "EventCode": "0x57", + "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_TXQ", + "PerPkg": "1", + "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 0", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT", + "PerPkg": "1", + "PublicDescription": "pump-1-pending logic is at capacity (pending= table plus completion fifo at limit)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY", + "PerPkg": "1", + "PublicDescription": "pump-1-pending logic is tracking at least on= e message", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL", + "PerPkg": "1", + "PublicDescription": "pump-1-pending completion fifo is full", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0", + "PerPkg": "1", + "PublicDescription": "pump-1-pending logic is at or near capacity,= such that pump-0-only bl messages are getting stalled in slotting stage", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO", + "PerPkg": "1", + "PublicDescription": "a bl message finished but is in limbo and mo= ved to pump-1-pending logic", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 1", + "EventCode": "0x59", + "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC", + "EventCode": "0x5A", + "EventName": "UNC_M3UPI_RxC_FLITS_MISC", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; One Message", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG", + "PerPkg": "1", + "PublicDescription": "One message in flit; VNA or non-VNA flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; One Message in non-VNA", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG_VNX", + "PerPkg": "1", + "PublicDescription": "One message in flit; non-VNA flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; Two Messages", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.2_MSGS", + "PerPkg": "1", + "PublicDescription": "Two messages in flit; VNA flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit; Three Messages", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.3_MSGS", + "PerPkg": "1", + "PublicDescription": "Three messages in flit; VNA flit", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_1", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_2", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Sent Header Flit", + "EventCode": "0x56", + "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_3", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; All", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Needs D= ata Flit", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA", + "PerPkg": "1", + "PublicDescription": "BL message requires data flit sequence", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 0", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT", + "PerPkg": "1", + "PublicDescription": "Waiting for header pump 0", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ", + "PerPkg": "1", + "PublicDescription": "Header pump 1 is not required for flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Bubble", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE", + "PerPkg": "1", + "PublicDescription": "Header pump 1 is not required for flit but f= lit transmission delayed", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Not Avail", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL", + "PerPkg": "1", + "PublicDescription": "Header pump 1 is not required for flit and n= ot available", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 1", + "EventCode": "0x58", + "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT", + "PerPkg": "1", + "PublicDescription": "Waiting for header pump 1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Accumulate", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting control state machine is in any accumulate state= ; multi-message flit may be assembled over multiple cycles", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Accumulate Ready", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; header flit slotting control state machine is in accum_ready state; f= lit is ready to send but transmission is blocked; more messages may be slot= ted into flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Accumulate Wasted", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Flit is being assembled over multiple cycles, but no additional messa= ge is being slotted into flit in current cycle; accumulate cycle is wasted", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Blocked", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting entered run-ahead state; new header flit is star= ted while transmission of prior, fully assembled flit is blocked", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Message", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting is in run-ahead to start new flit, and message i= s actually slotted into new flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Parallel Ok", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; New header flit construction may proceed in parallel with data flit s= equence", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Parallel Flit Finished", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_FLIT", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit finished assembly in parallel with data flit sequence", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 1; Parallel Message", + "EventCode": "0x53", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_MSG", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 1; Message is slotted into header flit in parallel with data flit sequen= ce", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate-matching stall injected", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall - No= Message", + "EventCode": "0x54", + "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG", + "PerPkg": "1", + "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate matching stall injected, but no additional message slotted durin= g stall cycle", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; All", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No BGF Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_CRD", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No BGF Credits + No Extra Me= ssage Slotted", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_NO_MSG", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available; no additional message slotted in= to flit", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No TxQ Credits", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_CRD", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; No TxQ Credits + No Extra Me= ssage Slotted", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_NO_MSG", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available; no additional message slotted in= to flit", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; Sent - One Slot Taken", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ONE_TAKEN", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only one slot taken (two slots fr= ee)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; Sent - Three Slots Taken", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.THREE_TAKEN", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with three slots taken (no slots free)= ", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Header Not Sent; Sent - Two Slots Taken", + "EventCode": "0x55", + "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.TWO_TAKEN", + "PerPkg": "1", + "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only two slots taken (one slots f= ree)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Can't Slot AD", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD", + "PerPkg": "1", + "PublicDescription": "some AD message could not be slotted (logica= l OR of all AD events under INGR_SLOT_CANT_MC_VN{0,1})", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Can't Slot BL", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL", + "PerPkg": "1", + "PublicDescription": "some BL message could not be slotted (logica= l OR of all BL events under INGR_SLOT_CANT_MC_VN{0,1})", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel AD Lost", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_AD_LOST", + "PerPkg": "1", + "PublicDescription": "some AD message lost contest for slot 0 (log= ical OR of all AD events under INGR_SLOT_LOST_MC_VN{0,1})", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel Attempt", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT", + "PerPkg": "1", + "PublicDescription": "ad and bl messages attempted to slot into th= e same flit in parallel", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel BL Lost", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_BL_LOST", + "PerPkg": "1", + "PublicDescription": "some BL message lost contest for slot 0 (log= ical OR of all BL events under INGR_SLOT_LOST_MC_VN{0,1})", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; Parallel Success", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS", + "PerPkg": "1", + "PublicDescription": "ad and bl messages were actually slotted int= o the same flit in paralle", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; VN0", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.VN0", + "PerPkg": "1", + "PublicDescription": "vn0 message(s) that couldn't be slotted into= last vn0 flit are held in slotting stage while processing vn1 flit", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Message Held; VN1", + "EventCode": "0x52", + "EventName": "UNC_M3UPI_RxC_HELD.VN1", + "PerPkg": "1", + "PublicDescription": "vn1 message(s) that couldn't be slotted into= last vn1 flit are held in slotting stage while processing vn0 flit", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; REQ o= n AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Home (REQ) = messages on AD. REQ is generally used to send requests, request responses,= and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on AD. RSP packets are used to transmit a variety of protocol= flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; SNP o= n AD", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Snoops (SNP= ) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCB o= n BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Broadcast (NCB) messages on BL. NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCS o= n BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on BL. RSP packets are used to transmit a variety of protocol = flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; WB on= BL", + "EventCode": "0x41", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Data Respon= se (WB) messages on BL. WB is generally used to transmit data with coheren= cy. For example, remote reads and writes, or cache to cache transfers will= transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; REQ o= n AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; SNP o= n AD", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCB o= n BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCS o= n BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; WB on= BL", + "EventCode": "0x42", + "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; REQ= on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; SNP= on AD", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCB= on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCS= on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; WB = on BL", + "EventCode": "0x45", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; REQ= on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; SNP= on AD", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCB= on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCS= on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; WB = on BL", + "EventCode": "0x46", + "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; REQ on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; RSP on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; SNP on AD", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; NCB on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; NCS on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; RSP on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 message can't slot into flit; WB on BL", + "EventCode": "0x4E", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; REQ on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; RSP on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; SNP on AD", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; NCB on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; NCS on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; RSP on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 message can't slot into flit; WB on BL", + "EventCode": "0x4F", + "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB", + "PerPkg": "1", + "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Lost Arbitration", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARB_LOST", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Arrived", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARRIVED", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Dropped - Old", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_OLD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Dropped - Wrap", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_WRAP", + "PerPkg": "1", + "PublicDescription": "Dropped because it was overwritten by new me= ssage while prefetch queue was full", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "SMI3 Prefetch Messages; Slotted", + "EventCode": "0x62", + "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.SLOTTED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Any In Use", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE", + "PerPkg": "1", + "PublicDescription": "At least one remote vna credit is in use", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Corrected", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED", + "PerPkg": "1", + "PublicDescription": "Number of remote vna credits corrected (loca= l return) per cycle", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Level < 1", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1", + "PerPkg": "1", + "PublicDescription": "Remote vna credit level is less than 1 (i.e.= no vna credits available)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Level < 4", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4", + "PerPkg": "1", + "PublicDescription": "Remote vna credit level is less than 4; bl (= or ad requiring 4 vna) cannot arb on vna", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Level < 5", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5", + "PerPkg": "1", + "PublicDescription": "Remote vna credit level is less than 5; para= llel ad/bl arb on vna not possible", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Remote VNA Credits; Used", + "EventCode": "0x5B", + "EventName": "UNC_M3UPI_RxC_VNA_CRD.USED", + "PerPkg": "1", + "PublicDescription": "Number of remote vna credits consumed per cy= cle", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB4", + "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AD - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; BL - Credit", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", + "EventCode": "0xB2", + "EventName": "UNC_M3UPI_RxR_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AD - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; AK - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; BL - Credit", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Injection Starvation; IV - Bounce", + "EventCode": "0xB3", + "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AD - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; BL - Credit", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", + "EventCode": "0xB1", + "EventName": "UNC_M3UPI_RxR_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", + "EventCode": "0xB0", + "EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN0 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 REQ Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 RSP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 SNP Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for AD; VN1 WB Messages", + "EventCode": "0x30", + "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD arb but no win; arb request asserted but = not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD FlowQ Bypass", + "EventCode": "0x2C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP", + "PerPkg": "1", + "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN0 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 REQ Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 RSP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 SNP Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Not Empty; VN1 WB Messages", + "EventCode": "0x27", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 REQ Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 RSP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 SNP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN0 WB Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN1 REQ Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN1 RSP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Inserts; VN1 SNP Messages", + "EventCode": "0x2D", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 REQ Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 RSP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 SNP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_SNP", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN0 WB Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN1 REQ Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_REQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN1 RSP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AD Flow Q Occupancy; VN1 SNP Messages", + "EventCode": "0x1C", + "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_SNP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; CHA on VN0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_CHA", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to CHA", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_NON_IDLE", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn0 Snpf", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI0", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN0", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI1", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; CHA on VN1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_CHA", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to CHA", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_NON_IDLE", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn1 Snpf", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI0", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI0", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN1", + "EventCode": "0x3C", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI1", + "PerPkg": "1", + "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_NONSNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn0", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_VN2SNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n0 SnpF issued when SnpF pending on Vn1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_NONSNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", + "EventCode": "0x3D", + "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_VN0SNP", + "PerPkg": "1", + "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n1 SnpF issued when SnpF pending on Vn0", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 REQ Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 SNP Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 WB Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 REQ Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 SNP Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 WB Messages", + "EventCode": "0x34", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN0 RE= Q Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN0 SN= P Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN0 WB= Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN1 RE= Q Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN1 SN= P Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - New Message; VN1 WB= Messages", + "EventCode": "0x33", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 REQ = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 RSP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 SNP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN0 WB M= essages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 REQ = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 RSP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 SNP = Messages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD - No Credit; VN1 WB M= essages", + "EventCode": "0x32", + "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_WB", + "PerPkg": "1", + "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Inserts", + "EventCode": "0x2F", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "AK Flow Q Occupancy", + "EventCode": "0x1E", + "EventName": "UNC_M3UPI_TxC_AK_FLQ_OCCUPANCY", + "PerPkg": "1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN0 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 NCS Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 NCB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 RSP Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Failed ARB for BL; VN1 WB Messages", + "EventCode": "0x35", + "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL arb but no win; arb request asserted but = not won", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN0 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 REQ Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 RSP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 SNP Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Not Empty; VN1 WB Messages", + "EventCode": "0x28", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 RSP Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 WB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 NCS Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN0 NCB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1 RSP Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1 WB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1_NCB Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Inserts; VN1_NCS Messages", + "EventCode": "0x2E", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB", + "PerPkg": "1", + "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 NCB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 NCS Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 RSP Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_RSP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN0 WB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_WB", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1_NCS Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1_NCB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1 RSP Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_RSP", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "BL Flow Q Occupancy; VN1 WB Messages", + "EventCode": "0x1D", + "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_WB", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN0 NC= S Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN1 WB= Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN1 NC= B Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for BL - New Message; VN1 RS= P Messages", + "EventCode": "0x38", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCS Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 RSP Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 WB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCS Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCS", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x80", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 RSP Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 WB Messages", + "EventCode": "0x37", + "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_WB", + "PerPkg": "1", + "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", + "EventCode": "0x9D", + "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", + "EventCode": "0x9F", + "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", + "EventCode": "0x96", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", + "EventCode": "0x97", + "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", + "EventCode": "0x95", + "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", + "EventCode": "0x99", + "EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", + "EventCode": "0x94", + "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", + "EventCode": "0x9B", + "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV_BNC", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical ADS Used; IV", + "EventCode": "0x9E", + "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", + "EventCode": "0x92", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", + "EventCode": "0x93", + "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Allocations; IV", + "EventCode": "0x91", + "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs; IV", + "EventCode": "0x98", + "EventName": "UNC_M3UPI_TxR_VERT_NACK.IV", + "PerPkg": "1", + "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy; IV", + "EventCode": "0x90", + "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", + "EventCode": "0x9A", + "EventName": "UNC_M3UPI_TxR_VERT_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN0 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN0 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN0 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN1 REQ Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN1 RSP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VN1 SNP Messages", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 AD Credits Empty; VNA", + "EventCode": "0x20", + "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPIs on the = AD Ring", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN0 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN0 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN0 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN1 RSP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN1 REQ Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VN1 SNP Messages", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x40", + "Unit": "M3UPI" + }, + { + "BriefDescription": "UPI0 BL Credits Empty; VNA", + "EventCode": "0x21", + "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA", + "PerPkg": "1", + "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Prefetches generated by the flow control queu= e of the M3UPI unit.", + "EventCode": "0x29", + "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", + "PerPkg": "1", + "PublicDescription": "Count cases where flow control queue that si= ts between the Intel(R) Ultra Path Interconnect (UPI) and the mesh spawns a= prefetch to the iMC (Memory Controller)", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Even", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Down and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Even", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AD Ring In Use; Up and Odd", + "EventCode": "0xA6", + "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Even", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Down and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Even", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical AK Ring In Use; Up and Odd", + "EventCode": "0xA8", + "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Even", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Down and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Even", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical BL Ring in Use; Up and Odd", + "EventCode": "0xAA", + "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Down", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "Vertical IV Ring in Use; Up", + "EventCode": "0xAC", + "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; WB on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Data Response (WB) messages on BL. WB is generally used to tran= smit data with coherency. For example, remote reads and writes, or cache t= o cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; NCB on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally u= sed to transmit data without coherency. For example, non-coherent read dat= a returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; REQ on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Home (REQ) messages on AD. REQ is generally used to send reques= ts, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; RSP on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on AD. RSP packets are used to transmit= a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; SNP on AD", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 Credit Used; RSP on BL", + "EventCode": "0x5C", + "EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on BL. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; WB on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; NCB on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; REQ on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; RSP on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; SNP on AD", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN0 No Credits; RSP on BL", + "EventCode": "0x5E", + "EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; WB on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Data Response (WB) messages on BL. WB is generally used to trans= mit data with coherency. For example, remote reads and writes, or cache to= cache transfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; NCB on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally us= ed to transmit data without coherency. For example, non-coherent read data= returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; REQ on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Home (REQ) messages on AD. REQ is generally used to send request= s, request responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; RSP on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on AD. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; SNP on AD", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 Credit Used; RSP on BL", + "EventCode": "0x5D", + "EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB", + "PerPkg": "1", + "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on BL. RSP packets are used to transmit a= variety of protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; WB on BL", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", + "UMask": "0x10", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; NCB on BL", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", + "UMask": "0x20", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; REQ on AD", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", + "UMask": "0x1", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; RSP on AD", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", + "UMask": "0x4", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; SNP on AD", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", + "UMask": "0x2", + "Unit": "M3UPI" + }, + { + "BriefDescription": "VN1 No Credits; RSP on BL", + "EventCode": "0x5F", + "EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB", + "PerPkg": "1", + "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", + "UMask": "0x8", + "Unit": "M3UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_TxC_BL.DRS_UPI", + "Deprecated": "1", + "EventCode": "0x40", + "EventName": "UNC_NoUnit_TxC_BL.DRS_UPI", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Clocks of the Intel(R) Ultra Path Interconnec= t (UPI)", + "EventCode": "0x1", + "EventName": "UNC_UPI_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts clockticks of the fixed frequency clo= ck controlling the Intel(R) Ultra Path Interconnect (UPI). This clock runs= at1/8th the 'GT/s' speed of the UPI link. For example, a 9.6GT/s link w= ill have a fixed Frequency of 1.2 Ghz.", + "Unit": "UPI" + }, + { + "BriefDescription": "Data Response packets that go direct to core", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", + "PerPkg": "1", + "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to core bypassing the CHA.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_DIRECT_ATTEMPTS.D2U", + "Deprecated": "1", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Data Response packets that go direct to Intel= (R) UPI", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2U", + "PerPkg": "1", + "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to Intel(R) Ultra Path Interconnect (UPI) bypassing the = CHA .", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "EventCode": "0x18", + "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles Intel(R) UPI is in L1 power mode (shut= down)", + "EventCode": "0x21", + "EventName": "UNC_UPI_L1_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the Intel(R) Ultra Path I= nterconnect (UPI) is in L1 power mode. L1 is a mode that totally shuts dow= n the UPI link. Link power states are per link and per direction, so for e= xample the Tx direction could be in one state while Rx was in another, this= event only coutns when both links are shutdown.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "EventCode": "0x14", + "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "EventCode": "0x16", + "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THR= ESH", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "EventCode": "0x15", + "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1", + "EventCode": "0x20", + "EventName": "UNC_UPI_PHY_INIT_CYCLES", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req Nack", + "EventCode": "0x23", + "EventName": "UNC_UPI_POWER_L1_NACK", + "PerPkg": "1", + "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqNAck. When the UPI links would like to change power state, t= he Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wi= th an Ack, the power mode will change. If it replies with NAck, no change = will take place. This can be filtered based on Rx and Tx. An Rx LinkReqNA= ck refers to receiving an NAck (meaning this agent's Tx originally requeste= d the power change). A Tx LinkReqNAck refers to sending this command (mean= ing the peer agent's Tx originally requested the power change and this agen= t accepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "L1 Req (same as L1 Ack).", + "EventCode": "0x22", + "EventName": "UNC_UPI_POWER_L1_REQ", + "PerPkg": "1", + "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqAck. When the UPI links would like to change power state, th= e Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wit= h an Ack, the power mode will change. If it replies with NAck, no change w= ill take place. This can be filtered based on Rx and Tx. An Rx LinkReqAck= refers to receiving an Ack (meaning this agent's Tx originally requested t= he power change). A Tx LinkReqAck refers to sending this command (meaning = the peer agent's Tx originally requested the power change and this agent ac= cepted it).", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "EventCode": "0x46", + "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles the Rx of the Intel(R) UPI is in L0p p= ower mode", + "EventCode": "0x25", + "EventName": "UNC_UPI_RxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the receive side (Rx) of = the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a mo= de where we disable 60% of the UPI lanes, decreasing our bandwidth in order= to save power.", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0. Receive side.", + "EventCode": "0x24", + "EventName": "UNC_UPI_RxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", + "PerPkg": "1", + "PublicDescription": "REQ Message Class", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t Opcode", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC", + "PerPkg": "1", + "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", + "UMask": "0x108", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Conflict", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT", + "PerPkg": "1", + "UMask": "0x1aa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Invalid", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI", + "PerPkg": "1", + "UMask": "0x12a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10c", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0x10a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Snoop", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", + "PerPkg": "1", + "PublicDescription": "SNP Message Class", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Snoop = Opcode", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC", + "PerPkg": "1", + "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", + "UMask": "0x109", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10d", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot0 RxQ buffer (Receive Queue) and passed directly to t= he Egress. This is a latency optimization, and should generally be the com= mon case. If this value is less than the number of FLITs transferred, it i= mplies that there was queueing getting onto the ring, and thus the transact= ions saw higher latency.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot1 RxQ buffer (Receive Queue) and passed directly acr= oss the BGF and into the Egress. This is a latency optimization, and shoul= d generally be the common case. If this value is less than the number of F= LITs transferred, it implies that there was queueing getting onto the ring,= and thus the transactions saw higher latency.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot2 RxQ buffer (Receive Queue) and passed directly to = the Egress. This is a latency optimization, and should generally be the co= mmon case. If this value is less than the number of FLITs transferred, it = implies that there was queueing getting onto the ring, and thus the transac= tions saw higher latency.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "CRC Errors Detected", + "EventCode": "0xB", + "EventName": "UNC_UPI_RxL_CRC_ERRORS", + "PerPkg": "1", + "PublicDescription": "Number of CRC errors detected in the UPI Age= nt. Each UPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the UPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ", + "Unit": "UPI" + }, + { + "BriefDescription": "LLR Requests Sent", + "EventCode": "0x8", + "EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT", + "PerPkg": "1", + "PublicDescription": "Number of LLR Requests were transmitted. Th= is should generally be <=3D the number of CRC errors detected. If multiple= errors are detected before the Rx side receives a LLC_REQ_ACK from the Tx = side, there is no need to send more LLR_REQ_NACKs.", + "Unit": "UPI" + }, + { + "BriefDescription": "VN0 Credit Consumed", + "EventCode": "0x39", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "UPI" + }, + { + "BriefDescription": "VN1 Credit Consumed", + "EventCode": "0x3A", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credit Consumed", + "EventCode": "0x38", + "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA", + "PerPkg": "1", + "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid data FLITs received from any slot", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Counts valid data FLITs (80 bit FLow contro= l unITs: 64bits of data) received from any of the 3 Intel(R) Ultra Path Int= erconnect (UPI) Receive Queue slots on this UPI unit.", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Null FLITs received from any slot", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", + "PerPkg": "1", + "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) received from any of the 3 Intel(R) Ultra Path Interconnect (UPI) Receive= Queue slots on this UPI unit.", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Data", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Idle", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; LLCRD Not Empty", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; LLCTRL", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Protocol header and credit FLITs received fro= m any slot", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Counts protocol header and credit FLITs (80= bit FLow control unITs) received from any of the 3 UPI slots on this UPI u= nit.", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.ALL_NULL", + "Deprecated": "1", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.NULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Protocol Header", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.PROTHDR", + "Deprecated": "1", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.PROT_HDR", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Slot 0", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Slot 1", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Received; Slot 2", + "EventCode": "0x3", + "EventName": "UNC_UPI_RxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.NCB", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.NCS", + "PerPkg": "1", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.RSP", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.SNP", + "PerPkg": "1", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.WB", + "Deprecated": "1", + "EventCode": "0x5", + "EventName": "UNC_UPI_RxL_HDR_MATCH.WB", + "PerPkg": "1", + "UMask": "0xb", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations; Slot 0", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations; Slot 1", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Flit Buffer Allocations; Slot 2", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets; Slot 0", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets; Slot 1", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "RxQ Occupancy - All Packets; Slot 2", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "EventCode": "0x33", + "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "EventCode": "0x2A", + "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in which the Tx of the Intel(R) Ultra = Path Interconnect (UPI) is in L0p power mode", + "EventCode": "0x27", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Counts cycles when the transmit side (Tx) of= the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a m= ode where we disable 60% of the UPI lanes, decreasing our bandwidth in orde= r to save power.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "EventCode": "0x28", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "EventCode": "0x29", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "Cycles in L0. Transmit side.", + "EventCode": "0x26", + "EventName": "UNC_UPI_TxL0_POWER_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCB", + "UMask": "0x10e", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - NCS", + "UMask": "0x10f", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", + "PerPkg": "1", + "PublicDescription": "REQ Message Class", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st Opcode", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC", + "PerPkg": "1", + "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", + "UMask": "0x108", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Conflict", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT", + "PerPkg": "1", + "UMask": "0x1aa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Invalid", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI", + "PerPkg": "1", + "UMask": "0x12a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10c", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class - RSP", + "UMask": "0x10a", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= ", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", + "PerPkg": "1", + "PublicDescription": "SNP Message Class", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= Opcode", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC", + "PerPkg": "1", + "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", + "UMask": "0x109", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0xd", + "Unit": "UPI" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC", + "PerPkg": "1", + "PublicDescription": "Match Message Class -WB", + "UMask": "0x10d", + "Unit": "UPI" + }, + { + "BriefDescription": "FLITs that bypassed the TxL Buffer", + "EventCode": "0x41", + "EventName": "UNC_UPI_TxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the TxL(transmit) FLIT buffer and pass directly out the UPI L= ink. Generally, when data is transmitted across the Intel(R) Ultra Path Int= erconnect (UPI), it will bypass the TxQ and pass directly to the link. How= ever, the TxQ will be used in L0p (Low Power) mode and (Link Layer Retry) L= LR mode, increasing latency to transfer out to the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid data FLITs transmitted via any slot", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "Null FLITs transmitted from any slot", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", + "PerPkg": "1", + "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) transmitted via any of the 3 Intel(R) Ulra Path Interconnect (UPI) slots = on this UPI unit.", + "UMask": "0x27", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Data", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "Idle FLITs transmitted", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Counts when the Intel Ultra Path Interconnec= t(UPI) transmits an idle FLIT(80 bit FLow control unITs). Every UPI cycle = must be sending either data FLITs, protocol/credit FLITs or idle FLITs.", + "UMask": "0x47", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; LLCRD Not Empty", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; LLCTRL", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", + "UMask": "0x40", + "Unit": "UPI" + }, + { + "BriefDescription": "Protocol header and credit FLITs transmitted = across any slot", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Counts protocol header and credit FLITs (80 = bit FLow control unITs) transmitted across any of the 3 UPI (Ultra Path Int= erconnect) slots on this UPI unit.", + "UMask": "0x97", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.ALL_NULL", + "Deprecated": "1", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.NULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Protocol Header", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.PROTHDR", + "Deprecated": "1", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.PROT_HDR", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Slot 0", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x1", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Slot 1", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x2", + "Unit": "UPI" + }, + { + "BriefDescription": "Valid Flits Sent; Slot 2", + "EventCode": "0x2", + "EventName": "UNC_UPI_TxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", + "UMask": "0x4", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.DATA_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.DUAL_SLOT_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.LOC", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.NCB", + "PerPkg": "1", + "UMask": "0xe", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.NCS", + "PerPkg": "1", + "UMask": "0xf", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.NON_DATA_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.REM", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.REQ", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_DATA", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_NODATA", + "PerPkg": "1", + "UMask": "0xa", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.SGL_SLOT_HDR", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.SNP", + "PerPkg": "1", + "UMask": "0x9", + "Unit": "UPI" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.WB", + "Deprecated": "1", + "EventCode": "0x4", + "EventName": "UNC_UPI_TxL_HDR_MATCH.WB", + "PerPkg": "1", + "UMask": "0xc", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Allocations", + "EventCode": "0x40", + "EventName": "UNC_UPI_TxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Number of allocations into the UPI Tx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", + "Unit": "UPI" + }, + { + "BriefDescription": "Tx Flit Buffer Occupancy", + "EventCode": "0x42", + "EventName": "UNC_UPI_TxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across UPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", + "Unit": "UPI" + }, + { + "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "EventCode": "0x45", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", + "PerPkg": "1", + "Unit": "UPI" + }, + { + "BriefDescription": "VNA Credits Pending Return - Occupancy", + "EventCode": "0x44", + "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", + "Unit": "UPI" + }, + { + "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", + "EventCode": "0xff", + "EventName": "UNC_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received; IPI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Inter Processor Interrupts", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received; MSI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Message Signaled Interrupts - interrupts sent by devi= ces (including PCIe via IOxAPIC) (Socket Mode only)", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received; VLW", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "IDI Lock/SplitLock Cycles", + "EventCode": "0x44", + "EventName": "UNC_U_LOCK_CYCLES", + "PerPkg": "1", + "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "PHOLD cycles.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDRAND", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDSEED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "PublicDescription": "Number outstanding register requests within = message channel tracker", + "Unit": "UBOX" + }, + { + "BriefDescription": "UPI interconnect send bandwidth for payload. = Derived from unc_upi_txl_flits.all_data", + "EventCode": "0x2", + "EventName": "UPI_DATA_BANDWIDTH_TX", + "PerPkg": "1", + "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", + "ScaleUnit": "7.11E-06Bytes", + "UMask": "0xf", + "Unit": "UPI" + } +] diff --git a/tools/perf/pmu-events/arch/x86/skylakex/uncore-io.json b/tools= /perf/pmu-events/arch/x86/skylakex/uncore-io.json new file mode 100644 index 000000000000..2a3a709018bb --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/skylakex/uncore-io.json @@ -0,0 +1,4250 @@ +[ + { + "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_READ", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "MetricName": "LLC_MISSES.PCIE_READ", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "ScaleUnit": "4Bytes", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_WRITE", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "MetricName": "LLC_MISSES.PCIE_WRITE", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "ScaleUnit": "4Bytes", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Clockticks of the IIO Traffic Controller", + "EventCode": "0x1", + "EventName": "UNC_IIO_CLOCKTICKS", + "PerPkg": "1", + "PublicDescription": "Counts clockticks of the 1GHz trafiic contro= ller clock in the IIO unit.", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-3", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x0f", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x01", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x02", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x04", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", + "FCMask": "0x4", + "PerPkg": "1", + "PortMask": "0x08", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 0", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x01", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 1", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x02", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 2", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x04", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts; Port 3", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x08", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0-3", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0xf", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 1", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 2", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 3", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part0", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part0. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part1. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part2", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part2. In the general case, Part2 refers= to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, = but it could refer to any x4 or x8 device attached to the IIO unit and usin= g lanes starting at lane 8 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part3", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part3. In the general case, Part3 refers= to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but i= t could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part0 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part0 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part1 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part1 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part2 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part2 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part2 refer= s to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card,= but it could refer to any x4 or x8 device attached to the IIO unit and usi= ng lanes starting at lane 8 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of 4 bytes made to IIO Part3 by= the CPU", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part3 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part3 refer= s to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but = it could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part0. Does not include requests made by the same IIO unit. In the gener= al case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that = is plugged directly into one of the PCIe slots. Part0 could also refer to a= ny device plugged into the first slot of a PCIe riser card or to a device a= ttached to the IIO unit which starts its use of the bus using lane 0 of the= 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part1. Does not include requests made by the same IIO unit. In the gener= al case, Part1 refers to a x4 PCIe card plugged into the second slot of a P= CIe riser card, but it could refer to any x4 device attached to the IIO uni= t using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part2", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part2. Does not include requests made by the same IIO unit. In the gener= al case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot o= f a PCIe riser card, but it could refer to any x4 or x8 device attached to = the IIO unit and using lanes starting at lane 8 of the 16 lanes supported b= y the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part3", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part3. Does not include requests made by the same IIO unit. In the gener= al case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a P= CIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part0 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gen= eral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) tha= t is plugged directly into one of the PCIe slots. Part0 could also refer to= any device plugged into the first slot of a PCIe riser card or to a device= attached to the IIO unit which starts its use of the bus using lane 0 of t= he 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part1 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part1 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part1 refers to a x4 PCIe card plugged into the second slot of a = PCIe riser card, but it could refer to any x4 device attached to the IIO un= it using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part2 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part2 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot = of a PCIe riser card, but it could refer to any x4 or x8 device attached to= the IIO unit and using lanes starting at lane 8 of the 16 lanes supported = by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part3 by a different IIO unit", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part3 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a = PCIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part1 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part2 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part3 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the IIO= unit using the lanes starting at lane 12 of the 16 lanes supported by the = bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the II= O unit using the lanes starting at lane 12 of the 16 lanes supported by the= bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Num Link Correctable Errors", + "EventCode": "0xF", + "EventName": "UNC_IIO_LINK_NUM_CORR_ERR", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num Link Retries", + "EventCode": "0xE", + "EventName": "UNC_IIO_LINK_NUM_RETRIES", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number packets that passed the Mask/Match Fil= ter", + "EventCode": "0x21", + "EventName": "UNC_IIO_MASK_MATCH", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d !(PCIE bus)", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus; !(Non-PCIE bus)= and PCIE bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus", + "EventCode": "0x2", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if all bits specified by mask match= ", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= !(PCIE bus)", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and PCIE bus", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and !(PCIE bus)", + "EventCode": "0x3", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "Asserted if any bits specified by mask match= ", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Counting disabled", + "EventName": "UNC_IIO_NOTHING", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0x83", + "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC0", + "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Symbol Times on Link", + "EventCode": "0x82", + "EventName": "UNC_IIO_SYMBOL_TIMES", + "PerPkg": "1", + "PublicDescription": "Gen1 - increment once every 4nS, Gen2 - incr= ement once every 2nS, Gen3 - increment once every 1nS", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.MSG.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART2", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART3", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x8", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD0", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x10", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", + "Deprecated": "1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD1", + "FCMask": "0x7", + "PerPkg": "1", + "PortMask": "0x20", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part0", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part0. In the genera= l case, part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part1. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part2", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part2. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part3", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part3. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part0 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part0 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part1 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part1 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part2 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part2 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part3 by the CPU", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part3 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part0", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part0. Does not include requests made by the same I= IO unit. In the general case, part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part1", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part1. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part2", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part2. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part3", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part3. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part0 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part0 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part1 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part1 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part2 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part2 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part3 by a different IIO unit", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part3 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part0 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part0 to the MMIO space of an IIO tar= get. In the general case, Part0 refers to a standard PCIe card of any size = (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 coul= d also refer to any device plugged into the first slot of a PCIe riser card= or to a device attached to the IIO unit which starts its use of the bus us= ing lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part1 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part1 to the MMIO space of an IIO tar= get. In the general case, Part1 refers to a x4 PCIe card plugged into the s= econd slot of a PCIe riser card, but it could refer to any x4 device attach= ed to the IIO unit using lanes starting at lane 4 of the 16 lanes supported= by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part2 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part2 to the MMIO space of an IIO tar= get. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into= the third slot of a PCIe riser card, but it could refer to any x4 or x8 de= vice attached to the IIO unit and using lanes starting at lane 8 of the 16 = lanes supported by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part3 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part3 to the MMIO space of an IIO tar= get. In the general case, Part3 refers to a x4 PCIe card plugged into the f= ourth slot of a PCIe riser card, but it could brefer to any device attached= to the IIO unit using the lanes starting at lane 12 of the 16 lanes suppor= ted by the bus.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part0 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part0 to the MMIO space of a= n IIO target. In the general case, Part0 refers to a standard PCIe card of = any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. P= art0 could also refer to any device plugged into the first slot of a PCIe r= iser card or to a device attached to the IIO unit which starts its use of t= he bus using lane 0 of the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part1 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part1 to the MMIO space of a= n IIO target.In the general case, Part1 refers to a x4 PCIe card plugged in= to the second slot of a PCIe riser card, but it could refer to any x4 devic= e attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s= upported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part2 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part2 to the MMIO space of a= n IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plu= gged into the third slot of a PCIe riser card, but it could refer to any x4= or x8 device attached to the IIO unit and using lanes starting at lane 8 o= f the 16 lanes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part3 to an IIO target", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part3 to the MMIO space of a= n IIO target. In the general case, Part3 refers to a x4 PCIe card plugged i= nto the fourth slot of a PCIe riser card, but it could brefer to any devic= e attached to the IIO unit using the lanes starting at lane 12 of the 16 la= nes supported by the bus.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; context cache miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.CTXT_MISS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; L1 miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L1_MISS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; L2 miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L2_MISS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; L3 miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L3_MISS", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; Vtd hit", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.L4_PAGE_HIT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; TLB miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.TLB1_MISS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; TLB is full", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.TLB_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Access; TLB miss", + "EventCode": "0x41", + "EventName": "UNC_IIO_VTD_ACCESS.TLB_MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "VTd Occupancy", + "EventCode": "0x40", + "EventName": "UNC_IIO_VTD_OCCUPANCY", + "PerPkg": "1", + "Unit": "IIO" + } +] diff --git a/tools/perf/pmu-events/arch/x86/skylakex/uncore-memory.json b/t= ools/perf/pmu-events/arch/x86/skylakex/uncore-memory.json index e0840c24e7aa..6f8ff2262ce7 100644 --- a/tools/perf/pmu-events/arch/x86/skylakex/uncore-memory.json +++ b/tools/perf/pmu-events/arch/x86/skylakex/uncore-memory.json @@ -1952,7 +1952,7 @@ "EventCode": "0x81", "EventName": "UNC_M_WPQ_OCCUPANCY", "PerPkg": "1", - "PublicDescription": "Counts the number of entries in the Write Pe= nding Queue (WPQ) at each cycle. This can then be used to calculate both t= he average queue occupancy (in conjunction with the number of cycles not em= pty) and the average latency (in conjunction with the number of allocations= ). The WPQ is used to schedule writes out to the memory controller and to = track the requests. Requests allocate into the WPQ soon after they enter t= he memory controller, and need credits for an entry in this buffer before b= eing sent from the CHA to the iMC (memory controller). They deallocate aft= er being issued to DRAM. Write requests themselves are able to complete (f= rom the perspective of the rest of the system) as soon they have 'posted' t= o the iMC. This is not to be confused with actually performing the write t= o DRAM. Therefore, the average latency for this queue is actually not usef= ul for deconstruction intermediate write latencies. So, we provide filteri= ng based on if the request has posted or not. By using the 'not posted' fi= lter, we can track how long writes spent in the iMC before completions were= sent to the HA. The 'posted' filter, on the other hand, provides informat= ion about how much queueing is actually happening in the iMC for writes bef= ore they are actually issued to memory. High average occupancies will gene= rally coincide with high write major mode counts. Is there a filter of sort= s???", + "PublicDescription": "Counts the number of entries in the Write Pe= nding Queue (WPQ) at each cycle. This can then be used to calculate both t= he average queue occupancy (in conjunction with the number of cycles not em= pty) and the average latency (in conjunction with the number of allocations= ). The WPQ is used to schedule writes out to the memory controller and to = track the requests. Requests allocate into the WPQ soon after they enter t= he memory controller, and need credits for an entry in this buffer before b= eing sent from the CHA to the iMC (memory controller). They deallocate aft= er being issued to DRAM. Write requests themselves are able to complete (f= rom the perspective of the rest of the system) as soon they have 'posted' t= o the iMC. This is not to be confused with actually performing the write t= o DRAM. Therefore, the average latency for this queue is actually not usef= ul for deconstruction intermediate write latencies. So, we provide filteri= ng based on if the request has posted or not. By using the 'not posted' fi= lter, we can track how long writes spent in the iMC before completions were= sent to the HA. The 'posted' filter, on the other hand, provides informat= ion about how much queueing is actually happening in the iMC for writes bef= ore they are actually issued to memory. High average occupancies will gene= rally coincide with high write major mode counts. Is there a filter of sort= s?", "Unit": "iMC" }, { diff --git a/tools/perf/pmu-events/arch/x86/skylakex/uncore-other.json b/to= ols/perf/pmu-events/arch/x86/skylakex/uncore-other.json deleted file mode 100644 index 92a4bdcd4bd7..000000000000 --- a/tools/perf/pmu-events/arch/x86/skylakex/uncore-other.json +++ /dev/null @@ -1,26143 +0,0 @@ -[ - { - "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_READ", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "MetricName": "LLC_MISSES.PCIE_READ", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "ScaleUnit": "4Bytes", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_WRITE", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "MetricName": "LLC_MISSES.PCIE_WRITE", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "ScaleUnit": "4Bytes", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x80", - "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x82", - "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x88", - "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8A", - "EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass; Intermediate bypass Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the intermediate bypass.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass; Not Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that could not take the bypass, and issues a read to memory.= Note that transactions that did not take the bypass but did not issue read= to memory will not be counted.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass; Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = able to bypass HA pipe on the way to iMC. This is a latency optimization f= or situations when there is light loadings on the memory subsystem. This c= an be filtered by when the bypass was taken and when it was not.; Filter fo= r transactions that succeeded in taking the full bypass.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Clockticks of the uncore caching & home agent= (CHA)", - "EventName": "UNC_CHA_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts clockticks of the clock controlling t= he uncore caching and home agent (CHA).", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xC0", - "EventName": "UNC_CHA_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C1 State", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C1_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C1 Transition", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C1_TRANSITION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C6 State", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C6_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; C6 Transition", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.C6_TRANSITION", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Core PMA Events; GV", - "EventCode": "0x17", - "EventName": "UNC_CHA_CORE_PMA.GV", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Any Cycle with Mult= iple Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Any Single Snoop", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Any Snoop to Remote= Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Multiple Core Reque= sts", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Single Core Request= s", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Core Request to Rem= ote Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Multiple Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Single Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Eviction to Remote = Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Multiple External S= noops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; Single External Sno= ops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued; External Snoop to R= emote Node", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of transactions that trigg= er a configurable number of cross snoops. Cores are snooped if the transac= tion looks up the cache and determines that it is necessary based on the op= eration type and what CoreValid bits are set. For example, if 2 CV bits ar= e set on a data read, the cores must have the data in S state so it is not = necessary to snoop them. However, if only 1 CV bit is set the core my have= modified the data. If the transaction was an RFO, it would need to invali= date the lines. This event can be filtered based on who triggered the init= ial snoop(s).", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "Counter 0 Occupancy", - "EventCode": "0x1F", - "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Since occupancy counts can only be captured = in the Cbo's 0 counter, this event allows a user to capture occupancy relat= ed information by filtering the Cb0 occupancy count captured in Counter 0. = The filtering available is found in the control register - threshold, inv= ert and edge detect. E.g. setting threshold to 1 can effectively monitor = how many cycles the monitored queue has an entry.", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Not Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", - "PerPkg": "1", - "PublicDescription": "Counts transactions that looked into the mul= ti-socket cacheline Directory state, and therefore did not send a snoop bec= ause the Directory indicated it was not needed", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state lookup= s; Snoop Needed", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.SNP", - "PerPkg": "1", - "PublicDescription": "Counts transactions that looked into the mu= lti-socket cacheline Directory state, and sent one or more snoops, because = the Directory indicated it was needed", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from the HA pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.HA", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline Directory= state updates memory writes issued from the HA pipe. This does not include= memory write requests which are for I (Invalid) or E (Exclusive) cacheline= s.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Multi-socket cacheline Directory state update= s; Directory Updated memory write from TOR pipe", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.TOR", - "PerPkg": "1", - "PublicDescription": "Counts only multi-socket cacheline Directory= state updates due to memory writes issued from the TOR pipe which are the = result of remote transaction hitting the SF/LLC and returning data Core2Cor= e. This does not include memory write requests which are for I (Invalid) or= E (Exclusive) cachelines.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", - "EventCode": "0xAE", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", - "EventCode": "0xAE", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "FaST wire asserted; Horizontal", - "EventCode": "0xA5", - "EventName": "UNC_CHA_FAST_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "FaST wire asserted; Vertical", - "EventCode": "0xA5", - "EventName": "UNC_CHA_FAST_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Read request from a remote socket which hit i= n the HitMe Cache to a line In the E state", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.EX_RDS", - "PerPkg": "1", - "PublicDescription": "Counts read requests from a remote socket wh= ich hit in the HitME cache (used to cache the multi-socket Directory state)= to a line in the E(Exclusive) state. This includes the following read opc= odes (RdCode, RdData, RdDataMigratory, RdCur, RdInv*, Inv*)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache; Shared = hit and op is RdInvOwn, RdInv, Inv*", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoE", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.WBMTOE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Hits in HitMe Cache; op is W= bMtoI, WbPushMtoI, WbFlush, or WbMtoS", - "EventCode": "0x5F", - "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*", - "EventCode": "0x5E", - "EventName": "UNC_CHA_HITME_LOOKUP.READ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times HitMe Cache is accesse= d; op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS", - "EventCode": "0x5E", - "EventName": "UNC_CHA_HITME_LOOKUP.WRITE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache; No SF= /LLC HitS/F and op is RdInvOwn", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache; op is= RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of Misses in HitMe Cache; SF/LL= C HitS/F and op is RdInvOwn", - "EventCode": "0x60", - "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Deallocate HitME$ on Reads without RspFwdI*", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a local request", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", - "PerPkg": "1", - "PublicDescription": "Received RspFwdI* for a local request, but c= onverted HitME$ to SF entry", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache on RdInvOwn even if not RspFwdI*", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; op is RspIFwd or RspIFwdWb for a remote request", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM", - "PerPkg": "1", - "PublicDescription": "Updated HitME$ on RspFwdI* or local HitM/E r= eceived for a remote request", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts the number of Allocate/Update to HitMe= Cache; Update HitMe Cache to SHARed", - "EventCode": "0x61", - "EventName": "UNC_CHA_HITME_UPDATE.SHARED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Even", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Even", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", - "EventCode": "0xA7", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Even", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Even", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", - "EventCode": "0xA9", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Even", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Even", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", - "EventCode": "0xAB", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Left", - "EventCode": "0xAD", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Right", - "EventCode": "0xAD", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "HA to iMC Reads Issued; ISOCH", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", - "PerPkg": "1", - "PublicDescription": "Count of the number of reads issued to any o= f the memory controller channels. This can be filtered by the priority of = the reads.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line= Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to the any of the memory controller chann= els.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; Full Line= MIG", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Ful= l Line", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; Partial N= on-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; Partial M= IG", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.; Filter for memory c= ontroller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Par= tial", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "Counts the total number of writes issued fro= m the HA into the memory controller. This counts for all four channels. I= t can be filtered by full/partial and ISOCH/non-ISOCH.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations", - "EventCode": "0x62", - "EventName": "UNC_CHA_IODC_ALLOC.INVITOM", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IODC allocations dropped due to IODC Full", - "EventCode": "0x62", - "EventName": "UNC_CHA_IODC_ALLOC.IODCFULL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts Number of times IODC entry allocation = is attempted; Number of IDOC allocation dropped due to OSB gate", - "EventCode": "0x62", - "EventName": "UNC_CHA_IODC_ALLOC.OSBGATED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to any reason", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to conflicting transaction", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.SNPOUT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoE", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbMtoI", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.WBMTOI", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Counts number of IODC deallocations; IODC dea= llocated due to WbPushMtoI", - "EventCode": "0x63", - "EventName": "UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", - "PerPkg": "1", - "PublicDescription": "Moved to Cbo section", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ANY", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Read transactions", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Local", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Remote", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.", - "UMask": "0x91", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; External Snoo= p Request", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for only snoop requests c= oming from the remote socket(s) through the IPQ.", - "UMask": "0x9", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Write Request= s", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITE", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Writeback transactions from L2 to= the LLC This includes all write transactions -- both Cacheable and UC.", - "UMask": "0x5", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.F_STATE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x2f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in F State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Local - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x8f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in F State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_F", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x88", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Remote - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in E state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in F State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_F", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in M state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized; Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", - "PerPkg": "1", - "PublicDescription": "Counts the number of lines that were victimi= zed on a fill. This can be filtered by the state that the line was in.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; CV0 Prefetch Miss", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; CV0 Prefetch Victim", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Number of times that an RFO hit in S state.", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RFO_HIT_S", - "PerPkg": "1", - "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; Silent Snoop Eviction", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times when a Snoop hit in FSE states and triggered a silent evic= tion. This is useful because this information is lost in the PRE encodings= .", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc; Write Combining Aliasing", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.WC_ALIASING", - "PerPkg": "1", - "PublicDescription": "Miscellaneous events in the Cbo.; Counts the= number of times that a USWC write (WCIL(F)) transaction hit in the LLC in = M state, triggering a WBMtoI followed by the USWC write. This occurs when = there is WC aliasing.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "OSB Snoop Broadcast", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB", - "PerPkg": "1", - "PublicDescription": "Count of OSB snoop broadcasts. Counts by 1 p= er request causing OSB snoops to be broadcast. Does not count all the snoop= s generated by OSB.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC0_SMI2", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC1_SMI3", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC2_SMI4", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC3_SMI5", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC0_SMI0", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty; MC1_SMI1", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending reads from the CHA into the iMC. In order t= o send reads into the memory controller, the HA must first acquire a credit= for the iMC's AD Ingress queue.; Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Local requests for exclusive ownership of a c= ache line without receiving data", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a remote socket for exclusive ownership of a cache line without receivi= ng data (INVITOE) to the CHA.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS", - "PerPkg": "1", - "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests from a unit on this socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a unit on t= his socket made into this CHA. Reads include all read opcodes (including RF= O: the Read for Ownership issued before a write).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Read requests from a remote socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts read requests coming from a remote so= cket made into the CHA. Reads include all read opcodes (including RFO: the = Read for Ownership issued before a write).", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Write requests", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "Write Requests from a unit on this socket", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts write requests coming from a unit on= this socket made into this CHA, including streaming, evictions, HitM (Read= s from another core to a Modified cacheline), etc.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Read and Write Requests; Writes Remote", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of read requests mad= e into the Home Agent. Reads include all read opcodes (including RFO). Wri= tes include all writes (streaming, evictions, HitM, etc).", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", - "EventCode": "0xA1", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", - "EventCode": "0xA0", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AD", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AK", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; BL", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; IV", - "EventCode": "0xA3", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; AD", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", - "EventCode": "0xA2", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xA4", - "EventName": "UNC_CHA_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; IPQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IPQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; IRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; IRQ Rejected", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; RRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.RRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations; WBQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.WBQ", - "PerPkg": "1", - "PublicDescription": "Counts number of allocations per cycle into = the specified Ingress queue.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; AD REQ on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; AD RSP on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Non UPI AK Reque= st", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL NCB on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL NCS on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL RSP on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; BL WB on VN0", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Non UPI IV Reque= st", - "EventCode": "0x22", - "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Allow Snoop", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; ANY0", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; HA", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Merging these tw= o together to make room for ANY_REJECT_*0", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; LLC Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; PhyAddr Match", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; SF Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress Probe Queue Rejects; Victim", - "EventCode": "0x23", - "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Mer= ging these two together to make room for ANY_REJECT_*0", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; AD REQ on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; AD RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; Non UPI AK Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL NCB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL NCS on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; BL WB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; Non UPI IV Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; AD REQ on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; AD RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; Non UPI AK Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL NCB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL NCS on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; BL WB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; Non UPI IV Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; ANY0", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects; HA", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; ANY0", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries; HA", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the ISMQ had to retry. Transaction pass through the ISMQ as responses fo= r requests that already exist in the Cbo. Some examples include: when data= is returned or when snoop responses come back from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; IPQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IPQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; IRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; RRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.RRQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy; WBQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.WBQ", - "PerPkg": "1", - "PublicDescription": "Counts number of entries in the specified In= gress queue in each cycle.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; AD REQ on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; AD RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Non UPI AK Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL NCB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL NCS on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; BL WB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Non UPI IV Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Allow Snoop", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; ANY0", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; HA", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Merging these two together to = make room for ANY_REJECT_*0", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; LLC Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; PhyAddr Match", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; SF Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries; Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Retry Queue Inserts of Transactions that wer= e already in another Retry Q (sub-events encode the reason for the next rej= ect)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = REQ on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD = RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI AK Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = NCS on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL = WB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non= UPI IV Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; All= ow Snoop", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY= 0", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= OR SF Way", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC= Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF = Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Vic= tim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; AD REQ on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; AD RSP on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Non UPI AK Request", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL NCB on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL NCS on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL RSP on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; BL WB on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Non UPI IV Request", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Allow Snoop", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; ANY0", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; HA", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Merging these two toge= ther to make room for ANY_REJECT_*0", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; LLC Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; PhyAddr Match", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; SF Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries; Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ = (everything except for ISMQ)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; AD REQ on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; AD RSP on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Non UPI AK Request", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL NCB on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL NCS on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL RSP on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; BL WB on VN0", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Non UPI IV Request", - "EventCode": "0x26", - "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Allow Snoop", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; ANY0", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; HA", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; LLC Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; PhyAddr Match", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; SF Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RRQ Rejects; Victim", - "EventCode": "0x27", - "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the RRQ (Remote Response Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; AD REQ on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; AD RSP on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Non UPI AK Request", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL NCB on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL NCS on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL RSP on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; BL WB on VN0", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Non UPI IV Request", - "EventCode": "0x28", - "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Allow Snoop", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; ANY0", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; HA", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Merging these two together to ma= ke room for ANY_REJECT_*0", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; LLC Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; PhyAddr Match", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; SF Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "WBQ Rejects; Victim", - "EventCode": "0x29", - "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM", - "PerPkg": "1", - "PublicDescription": "Number of times a transaction flowing throug= h the WBQ (Writeback Queue) had to retry.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB4", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Credit", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Credit", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_CHA_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; AK - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation; IV - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Credit", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Credit", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_CHA_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.E_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores cache. Snoop filter capacity e= victions occur when the snoop filter is full and evicts an existing entry t= o track a new entry. Does not count clean evictions such as when a cores ca= che replaces a tracked cacheline with a new cacheline.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.M_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores cache. Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry. Does not count clean evictions such as when a cores cac= he replaces a tracked cacheline with a new cacheline.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.S_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores cache. Snoop filter capacity evic= tions occur when the snoop filter is full and evicts an existing entry to t= rack a new entry. Does not count clean evictions such as when a cores cache= replaces a tracked cacheline with a new cacheline.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; All", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast snoop for Local Reques= ts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA. This filter incl= udes only requests coming from local sockets.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast snoops for Remote Requ= ests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast snoops issued by the HA.This filter inclu= des only requests coming from remote sockets.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Directed snoops for Local Reques= ts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from local sockets.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Directed snoops for Remote Reque= sts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of directed snoops issued by the HA. This filter inclu= des only requests coming from remote sockets.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Local Requests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the local socket.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent; Broadcast or directed Snoops sen= t for Remote Requests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE", - "PerPkg": "1", - "PublicDescription": "Counts the number of snoops issued by the HA= .; Counts the number of broadcast or directed snoops issued by the HA per r= equest. This filter includes only requests coming from the remote socket.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "RspCnflct* Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCTS", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspCnflct* Snoop Response was received. This is returned when a snoop = finds an existing outstanding transaction in a remote caching agent. This t= riggers conflict resolution hardware. This covers both the opcode RspCnflct= and RspCnflctWbI.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received; RspFwd", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Counts the total number of RspI snoop respon= ses received. Whenever a snoops are issued, one or more snoop responses wi= ll be returned depending on the topology of the system. In systems larger= than 2s, when multiple snoops are returned this will count all the snoops = that are received. For example, if 3 snoops were issued and returned RspI,= RspS, and RspSFwd; then each of these sub-events would increment by 1.; Fi= lters for a snoop response of RspFwd to a CA request. This snoop response = is only possible for RdCur when a snoop HITM/E in a remote caching agent an= d it directly forwards data to a requestor without changing the requestor's= cache line state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "RspI Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPI", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe RspI Snoop Response was received which indicates the remote cache does n= ot have the data, or when the remote cache silently evicts data (such as wh= en an RFO: the Read for Ownership issued before a write hits non-modified d= ata).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "RspIFwd Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspIFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data and the requesting agent is able to acquire the dat= a in E (Exclusive) or M (modified) states. This is commonly returned with = RFO (the Read for Ownership issued before a write) transactions. The snoop= could have either been to a cacheline in the M,E,F (Modified, Exclusive or= Forward) states.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received : RspS", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received : RspS : Counts the= total number of RspI snoop responses received. Whenever a snoops are issu= ed, one or more snoop responses will be returned depending on the topology = of the system. In systems larger than 2s, when multiple snoops are return= ed this will count all the snoops that are received. For example, if 3 sno= ops were issued and returned RspI, RspS, and RspSFwd; then each of these su= b-events would increment by 1. : Filters for snoop responses of RspS. RspS= is returned when a remote cache has data but is not forwarding it. It is = a way to let the requesting socket know that it cannot allocate the data in= E state. No data is sent with S RspS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "RspSFwd Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Counts when a a transaction with the opcode = type RspSFwd Snoop Response was received which indicates a remote caching a= gent forwarded the data but held on to its current copy. This is common fo= r data and code reads that hit in a remote socket in E (Exclusive) or F (Fo= rward) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Rsp*Fwd*WB Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSP_FWD_WB", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*Fwd*WB Snoop Response was received which indicates the data was writ= ten back to its home socket, and the cacheline was forwarded to the request= or socket. This snoop response is only used in >=3D 4 socket systems. It = is used when a snoop HITM's in a remote caching agent and it directly forwa= rds data to a requestor, and simultaneously returns data to its home socket= to be written back to memory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Rsp*WB Snoop Responses Received", - "EventCode": "0x5C", - "EventName": "UNC_CHA_SNOOP_RESP.RSP_WBWB", - "PerPkg": "1", - "PublicDescription": "Counts when a transaction with the opcode ty= pe Rsp*WB Snoop Response was received which indicates which indicates the d= ata was written back to its home. This is returned when a non-RFO request = hits a cacheline in the Modified state. The Cache can either downgrade the = cacheline to a S (Shared) or I (Invalid) state depending on how the system = has been configured. This response will also be sent when a cache requests= E (Exclusive) ownership of a cache line without receiving data, because th= e cache must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspCnflct", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspConflict to local CA reques= ts. This is returned when a snoop finds an existing outstanding transactio= n in a remote caching agent when it CAMs that caching agent. This triggers= conflict resolution hardware. This covers both RspCnflct and RspCnflctWbI= .", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspFwd to local CA requests. = This snoop response is only possible for RdCur when a snoop HITM/E in a rem= ote caching agent and it directly forwards data to a requestor without chan= ging the requestor's cache line state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspI", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoops responses of RspI to local CA requests. Rs= pI is returned when the remote cache does not have the data, or when the re= mote cache silently evicts data (such as when an RFO hits non-modified data= ).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspIFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspIFwd to local CA requests. = This is returned when a remote caching agent forwards data and the requesti= ng agent is able to acquire the data in E or M states. This is commonly re= turned with RFO transactions. It can be either a HitM or a HitFE.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspS", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for snoop responses of RspS to local CA requests. Rsp= S is returned when a remote cache has data but is not forwarding it. It is= a way to let the requesting socket know that it cannot allocate the data i= n E state. No data is sent with S RspS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; RspSFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspSFwd to local CA requests. = This is returned when a remote caching agent forwards data but holds on to= its current copy. This is common for data and code reads that hit in a re= mote socket in E or F state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; Rsp*FWD*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of Rsp*Fwd*WB to local CA request= s. This snoop response is only used in 4s systems. It is used when a snoo= p HITM's in a remote caching agent and it directly forwards data to a reque= stor, and simultaneously returns data to the home to be written back to mem= ory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local; Rsp*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", - "PerPkg": "1", - "PublicDescription": "Number of snoop responses received for a Loc= al request; Filters for a snoop response of RspIWB or RspSWB to local CA r= equests. This is returned when a non-RFO request hits in M state. Data an= d Code Reads can return either RspIWB or RspSWB depending on how the system= has been configured. InvItoE transactions will also return RspIWB because= they must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from Local", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x15", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from Local iA and IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL_IO_IA", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests", - "UMask": "0x35", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Misses from Local", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x25", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; SF/LLC Evictions", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.EVICT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; T= OR allocation occurred as a result of SF/LLC evictions (came from the ISMQ)= ", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hit (Not a Miss)", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; H= ITs (hit is defined to be not a miss [see below], as a result for any reque= st allocated into the TOR, one of either HIT or MISS must be true)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally initiated requests from iA Cores", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that hit the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores t= hat missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores = that missed the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; All from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; A= ll locally generated IO traffic", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Hits from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; ItoM misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", - "Filter": "config1=3D0x49033", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO ItoM requests that mis= s the LLC. An ItoM request is used by IIO to request a data write without f= irst reading the data for ownership.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RdCur misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RDCUR", - "Filter": "config1=3D0x43C33", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RdCur requests and mis= s the LLC. A RdCur request is used by IIO to read data without changing sta= te.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; RFO misses from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that are generated from local IO RFO requests that miss= the LLC. A read for ownership (RFO) requests a cache line to be cached in = E state with the intent to modify.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; IPQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; IRQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; Miss", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MISS", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.; M= isses. (a miss is defined to be any transaction from the IRQ, PRQ, RRQ, IP= Q or (in the victim case) the ISMQ, that required the CHA to spawn a new UP= I/SMI3 request on the UPI fabric (including UPI snoops and/or any RD/WR to = a local memory controller, in the event that the CHA is the home node)). B= asically, if the LLC/SF/MLC complex were not able to service the request wi= thout involving another agent...it is a miss. If only IDI snoops were requ= ired, it is not a miss (that means the SF/MLC com", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; PRQ", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of entries successfully in= serted into the TOR that match qualifications specified by the subevent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", - "PerPkg": "1", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.RRQ_HIT", - "PerPkg": "1", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS", - "PerPkg": "1", - "UMask": "0x60", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.WBQ_HIT", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.WBQ_MISS", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from Local", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. There are a number of subevent 'filters' but only a subset of= the subevent combinations are valid. Subevents that require an opcode or = NID match require the Cn_MSR_PMON_BOX_FILTER.{opc, nid} field to be set. I= f, for example, one wanted to count DRD Local Misses, one should select MIS= S_OPC_MATCH and set Cn_MSR_PMON_BOX_FILTER.opc to DRD (0x182); All remotely= generated requests", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from Local", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x17", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from Local", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x27", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; SF/LLC Evictions", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; TOR allocation occurred as a result of SF/LLC evictions (c= ame from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hit (Not a Miss)", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; HITs (hit is defined to be not a miss [see below], as a re= sult for any request allocated into the TOR, one of either HIT or MISS must= be true)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally initiated requests from iA Cores", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that hit the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", - "Filter": "config1=3D0x40233", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", - "Filter": "config1=3D0x40433", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD", - "Filter": "config1=3D0x4b233", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD", - "Filter": "config1=3D0x4b433", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores= that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefRFO", - "Filter": "config1=3D0x4b033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Core= s that missed the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; All from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; All locally generated IO traffic", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Hits from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; ITOM Misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", - "Filter": "config1=3D0x49033", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO ItoM req= uests that miss the LLC. An ItoM is used by IIO to request a data write wit= hout first reading the data for ownership.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RDCUR misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RDCUR", - "Filter": "config1=3D0x43C33", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RdCur re= quests that miss the LLC. A RdCur request is used by IIO to read data witho= ut changing state.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; RFO misses from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", - "Filter": "config1=3D0x40033", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that are generated from local IO RFO requ= ests that miss the LLC. A read for ownership (RFO) requests data to be cach= ed in E state with the intent to modify.", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; IPQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; IRQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.ALL_FROM_LOC", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; Miss", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T; Misses. (a miss is defined to be any transaction from the= IRQ, PRQ, RRQ, IPQ or (in the victim case) the ISMQ, that required the CHA= to spawn a new UPI/SMI3 request on the UPI fabric (including UPI snoops an= d/or any RD/WR to a local memory controller, in the event that the CHA is t= he home node)). Basically, if the LLC/SF/MLC complex were not able to serv= ice the request without involving another agent...it is a miss. If only ID= I snoops were required, it is not a miss (that means the SF/MLC com", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; PRQ", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "PublicDescription": "For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. T", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used; IV", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; IV", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; IV", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK.IV", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; IV", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; AD REQ Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; AD RSP VN0 Cr= edits", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL NCB Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL NCS Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL RSP Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; BL DRS Credit= s", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; VN0 Credits", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VN0", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credit Allocations; VNA Credits", - "EventCode": "0x38", - "EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VNA", - "PerPkg": "1", - "PublicDescription": "Counts the number of UPI credits acquired fo= r either the AD or BL ring. In order to send snoops, snoop responses, requ= ests, data, etc to the UPI agent on the ring, it is necessary to first acqu= ire a credit for the UPI ingress buffer. This can be used with the Credit = Occupancy event in order to calculate average credit lifetime. This event = supports filtering to cover the VNA/VN0 credits and the different message c= lasses. Note that you must select the link that you would like to monitor = using the link select register, and you can only monitor 1 link at a time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; AD REQ VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_REQ", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; AD RSP VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_AD_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCB VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL NCS VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL RSP VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL DRS VN0= Credits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_WB", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; AD VNA Cre= dits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_AD", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "UPI Ingress Credits In Use Cycles; BL VNA Cre= dits", - "EventCode": "0x3B", - "EventName": "UNC_CHA_UPI_CREDIT_OCCUPANCY.VNA_BL", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of UPI credits availa= ble in each cycle for either the AD or BL ring. In order to send snoops, s= noop responses, requests, data, etc to the UPI agent on the ring, it is nec= essary to first acquire a credit for the UPI ingress buffer. This stat inc= rements by the number of credits that are available each cycle. This can b= e used in conjunction with the Credit Acquired event in order to calculate = average credit lifetime. This event supports filtering for the different t= ypes of credits that are available. Note that you must select the link tha= t you would like to monitor using the link select register, and you can onl= y monitor 1 link at a time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Even", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Odd", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Even", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Odd", - "EventCode": "0xA6", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Even", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Odd", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Even", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Odd", - "EventCode": "0xA8", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Even", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Odd", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Even", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Odd", - "EventCode": "0xAA", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Down", - "EventCode": "0xAC", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Up", - "EventCode": "0xAC", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI; Pushed to LLC", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was able to pu= sh WbPushMToI to LLC", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI; Pushed to Memory", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when the CHA was = received WbPushMtoI; Counts the number of times when the CHA was unable to = push WbPushMToI to LLC (hence pushed it to MEM)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC0_SMI2", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC1_SMI3", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC2_SMI4", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC3_SMI5", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC0_SMI0", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC1_SMI1", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "PublicDescription": "Counts the number of times when there are no= credits available for sending WRITEs from the CHA into the iMC. In order = to send WRITEs into the memory controller, the HA must first acquire a cred= it for the iMC's BL Ingress queue.; Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspIFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd F/E", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response I to Fwd M", - "UMask": "0xf0", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd F/E", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspSFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response S to Fwd M", - "UMask": "0xe8", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Any RspHitFSE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Any Request - Response any to Hit F/S/E= ", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd F/E", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspIFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response I to Fwd M", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd F/E", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspSFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response S to Fwd M", - "UMask": "0x48", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Core RspHitFSE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Core Request - Response any to Hit F/S/= E", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd F/= E", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response I to Fwd M", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdFE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd F/= E", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdM", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response S to Fwd M", - "UMask": "0x88", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; Evict RspHitFSE", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; Eviction Request - Response any to Hit = F/S/E", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspIFwdF= E", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd F/= E", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspIFwdM= ", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response I to Fwd M", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspSFwdF= E", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd F/= E", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspSFwdM= ", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response S to Fwd M", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoop Responses; External RspHitFS= E", - "EventCode": "0x32", - "EventName": "UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", - "PerPkg": "1", - "PublicDescription": "Counts the number of core cross snoops. Cor= es are snooped if the transaction looks up the cache and determines that it= is necessary based on the operation type. This event can be filtered based= on who triggered the initial snoop(s): from Evictions, Core or External = (i.e. from a remote node) Requests. And the event can be filtered based on= the responses: RspX_Fwd/HitY where Y is the state prior to the snoop resp= onse and X is the state following.; External Request - Response any to Hit = F/S/E", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CLOCKTICKS", - "Deprecated": "1", - "EventName": "UNC_C_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_FAST_ASSERTED.HORZ", - "Deprecated": "1", - "EventCode": "0xA5", - "EventName": "UNC_C_FAST_ASSERTED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.ANY", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.ANY", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.DATA_READ", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.LOCAL", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.REMOTE", - "PerPkg": "1", - "UMask": "0x91", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.REMOTE_SNOOP", - "PerPkg": "1", - "UMask": "0x9", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.WRITE", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_C_LLC_LOOKUP.WRITE", - "PerPkg": "1", - "UMask": "0x5", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_E", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.E_STATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_F", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.F_STATE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.LOCAL_ALL", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.LOCAL", - "PerPkg": "1", - "UMask": "0x2f", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_M", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.M_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.REMOTE_ALL", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.REMOTE", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_VICTIMS.TOTAL_S", - "Deprecated": "1", - "EventCode": "0x37", - "EventName": "UNC_C_LLC_VICTIMS.S_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SRC_THRTL", - "Deprecated": "1", - "EventCode": "0xA4", - "EventName": "UNC_C_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.EVICT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.EVICT", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.HIT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.HIT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IPQ", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IPQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IRQ", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_HIT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IRQ_HIT", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA_MISS", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.IRQ_MISS", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IA", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.LOC_IA", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.LOC_IO", - "PerPkg": "1", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.MISS", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.PRQ", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.PRQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_HIT", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.PRQ_HIT", - "PerPkg": "1", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.IO_MISS", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.PRQ_MISS", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.REM_ALL", - "PerPkg": "1", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.RRQ_HIT", - "PerPkg": "1", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.RRQ_MISS", - "PerPkg": "1", - "UMask": "0x60", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.WBQ_HIT", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_C_TOR_INSERTS.WBQ_MISS", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.EVICT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.HIT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IPQ", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IPQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_HIT", - "PerPkg": "1", - "UMask": "0x18", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IPQ_MISS", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IRQ", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_HIT", - "PerPkg": "1", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.IRQ_MISS", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "UMask": "0x37", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IA", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IA", - "PerPkg": "1", - "UMask": "0x31", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.LOC_IO", - "PerPkg": "1", - "UMask": "0x34", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.MISS", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.PRQ", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_HIT", - "PerPkg": "1", - "UMask": "0x14", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "Deprecated": "1", - "EventCode": "0x36", - "EventName": "UNC_C_TOR_OCCUPANCY.PRQ_MISS", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x80", - "EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x82", - "EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x88", - "EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x8A", - "EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x86", - "EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5", - "Deprecated": "1", - "EventCode": "0x8E", - "EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5", - "Deprecated": "1", - "EventCode": "0x8C", - "EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", - "Deprecated": "1", - "EventCode": "0x57", - "EventName": "UNC_H_BYPASS_CHA_IMC.INTERMEDIATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", - "Deprecated": "1", - "EventCode": "0x57", - "EventName": "UNC_H_BYPASS_CHA_IMC.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_BYPASS_CHA_IMC.TAKEN", - "Deprecated": "1", - "EventCode": "0x57", - "EventName": "UNC_H_BYPASS_CHA_IMC.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CMS_CLOCKTICKS", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_H_CLOCK", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_STATE", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C1_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C1_TRANSITION", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C1_TRANSITION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_STATE", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C6_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.C6_TRANSITION", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.C6_TRANSITION", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_PMA.GV", - "Deprecated": "1", - "EventCode": "0x17", - "EventName": "UNC_H_CORE_PMA.GV", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.ANY_GTONE", - "PerPkg": "1", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.ANY_ONE", - "PerPkg": "1", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.ANY_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.ANY_REMOTE", - "PerPkg": "1", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.CORE_GTONE", - "PerPkg": "1", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.CORE_ONE", - "PerPkg": "1", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.CORE_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.CORE_REMOTE", - "PerPkg": "1", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EVICT_GTONE", - "PerPkg": "1", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EVICT_ONE", - "PerPkg": "1", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EVICT_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EVICT_REMOTE", - "PerPkg": "1", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_GTONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EXT_GTONE", - "PerPkg": "1", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_ONE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EXT_ONE", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_CORE_SNP.EXT_REMOTE", - "Deprecated": "1", - "EventCode": "0x33", - "EventName": "UNC_H_CORE_SNP.EXT_REMOTE", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_COUNTER0_OCCUPANCY", - "Deprecated": "1", - "EventCode": "0x1F", - "EventName": "UNC_H_COUNTER0_OCCUPANCY", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.NO_SNP", - "Deprecated": "1", - "EventCode": "0x53", - "EventName": "UNC_H_DIR_LOOKUP.NO_SNP", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_LOOKUP.SNP", - "Deprecated": "1", - "EventCode": "0x53", - "EventName": "UNC_H_DIR_LOOKUP.SNP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.HA", - "Deprecated": "1", - "EventCode": "0x54", - "EventName": "UNC_H_DIR_UPDATE.HA", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_DIR_UPDATE.TOR", - "Deprecated": "1", - "EventCode": "0x54", - "EventName": "UNC_H_DIR_UPDATE.TOR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", - "Deprecated": "1", - "EventCode": "0xAE", - "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", - "Deprecated": "1", - "EventCode": "0xAE", - "EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.EX_RDS", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.EX_RDS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.SHARED_OWNREQ", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.SHARED_OWNREQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOE", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.WBMTOE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_HIT.WBMTOI_OR_S", - "Deprecated": "1", - "EventCode": "0x5F", - "EventName": "UNC_H_HITME_HIT.WBMTOI_OR_S", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.READ", - "Deprecated": "1", - "EventCode": "0x5E", - "EventName": "UNC_H_HITME_LOOKUP.READ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_LOOKUP.WRITE", - "Deprecated": "1", - "EventCode": "0x5E", - "EventName": "UNC_H_HITME_LOOKUP.WRITE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN", - "Deprecated": "1", - "EventCode": "0x60", - "EventName": "UNC_H_HITME_MISS.NOTSHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.READ_OR_INV", - "Deprecated": "1", - "EventCode": "0x60", - "EventName": "UNC_H_HITME_MISS.READ_OR_INV", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_MISS.SHARED_RDINVOWN", - "Deprecated": "1", - "EventCode": "0x60", - "EventName": "UNC_H_HITME_MISS.SHARED_RDINVOWN", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RDINVOWN", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.RDINVOWN", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.RSPFWDI_REM", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.RSPFWDI_REM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HITME_UPDATE.SHARED", - "Deprecated": "1", - "EventCode": "0x61", - "EventName": "UNC_H_HITME_UPDATE.SHARED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "Deprecated": "1", - "EventCode": "0xA7", - "EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "Deprecated": "1", - "EventCode": "0xA9", - "EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "Deprecated": "1", - "EventCode": "0xAB", - "EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", - "Deprecated": "1", - "EventCode": "0xAD", - "EventName": "UNC_H_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", - "Deprecated": "1", - "EventCode": "0xAD", - "EventName": "UNC_H_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.NORMAL", - "Deprecated": "1", - "EventCode": "0x59", - "EventName": "UNC_H_IMC_READS_COUNT.NORMAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_READS_COUNT.PRIORITY", - "Deprecated": "1", - "EventCode": "0x59", - "EventName": "UNC_H_IMC_READS_COUNT.PRIORITY", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.FULL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_MIG", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_MIG", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.FULL_PRIORITY", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_MIG", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "Deprecated": "1", - "EventCode": "0x5B", - "EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.INVITOM", - "Deprecated": "1", - "EventCode": "0x62", - "EventName": "UNC_H_IODC_ALLOC.INVITOM", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.IODCFULL", - "Deprecated": "1", - "EventCode": "0x62", - "EventName": "UNC_H_IODC_ALLOC.IODCFULL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_ALLOC.OSBGATED", - "Deprecated": "1", - "EventCode": "0x62", - "EventName": "UNC_H_IODC_ALLOC.OSBGATED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.ALL", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.SNPOUT", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.SNPOUT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOE", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.WBMTOE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBMTOI", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.WBMTOI", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_IODC_DEALLOC.WBPUSHMTOI", - "Deprecated": "1", - "EventCode": "0x63", - "EventName": "UNC_H_IODC_DEALLOC.WBPUSHMTOI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_MISS", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.CV0_PREF_MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.CV0_PREF_VIC", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.CV0_PREF_VIC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RFO_HIT_S", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.RFO_HIT_S", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.RSPI_WAS_FSE", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.RSPI_WAS_FSE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_MISC.WC_ALIASING", - "Deprecated": "1", - "EventCode": "0x39", - "EventName": "UNC_H_MISC.WC_ALIASING", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_OSB", - "Deprecated": "1", - "EventCode": "0x55", - "EventName": "UNC_H_OSB", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC0_SMI2", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC1_SMI3", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC2_SMI4", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.EDC3_SMI5", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC0_SMI0", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_READ_NO_CREDITS.MC1_SMI1", - "Deprecated": "1", - "EventCode": "0x58", - "EventName": "UNC_H_READ_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_LOCAL", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.INVITOE_LOCAL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_REQUESTS.INVITOE_REMOTE", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.INVITOE_REMOTE", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "read requests from home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.READS", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "read requests from local home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.READS_LOCAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "read requests from remote home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.READS_REMOTE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "write requests from home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.WRITES", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "write requests from local home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.WRITES_LOCAL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "write requests from remote home agent", - "Deprecated": "1", - "EventCode": "0x50", - "EventName": "UNC_H_REQUESTS.WRITES_REMOTE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AD", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.AK", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.BL", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_HORZ.IV", - "Deprecated": "1", - "EventCode": "0xA1", - "EventName": "UNC_H_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AD", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.AK", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.BL", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_BOUNCES_VERT.IV", - "Deprecated": "1", - "EventCode": "0xA0", - "EventName": "UNC_H_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AD", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.BL", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_HORZ.IV", - "Deprecated": "1", - "EventCode": "0xA3", - "EventName": "UNC_H_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AD", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.AK", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.BL", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RING_SINK_STARVED_VERT.IV", - "Deprecated": "1", - "EventCode": "0xA2", - "EventName": "UNC_H_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IPQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.IPQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.IRQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.IRQ_REJ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.IRQ_REJ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.PRQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.PRQ_REJ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.PRQ_REJ", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.RRQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.RRQ", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_INSERTS.WBQ", - "Deprecated": "1", - "EventCode": "0x13", - "EventName": "UNC_H_RxC_INSERTS.WBQ", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x22", - "EventName": "UNC_H_RxC_IPQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.ANY_IPQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IPQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x23", - "EventName": "UNC_H_RxC_IPQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x18", - "EventName": "UNC_H_RxC_IRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.ANY_REJECT_IRQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_IRQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x19", - "EventName": "UNC_H_RxC_IRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x24", - "EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x2C", - "EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x25", - "EventName": "UNC_H_RxC_ISMQ1_REJECT.ANY_ISMQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x25", - "EventName": "UNC_H_RxC_ISMQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.ANY0", - "Deprecated": "1", - "EventCode": "0x2D", - "EventName": "UNC_H_RxC_ISMQ1_RETRY.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_ISMQ1_RETRY.HA", - "Deprecated": "1", - "EventCode": "0x2D", - "EventName": "UNC_H_RxC_ISMQ1_RETRY.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IPQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.IPQ", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.IRQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.IRQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.RRQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.RRQ", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OCCUPANCY.WBQ", - "Deprecated": "1", - "EventCode": "0x11", - "EventName": "UNC_H_RxC_OCCUPANCY.WBQ", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x2E", - "EventName": "UNC_H_RxC_OTHER0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.ANY0", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.HA", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_OTHER1_RETRY.VICTIM", - "Deprecated": "1", - "EventCode": "0x2F", - "EventName": "UNC_H_RxC_OTHER1_RETRY.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x20", - "EventName": "UNC_H_RxC_PRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.ANY_PRQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_PRQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x21", - "EventName": "UNC_H_RxC_PRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x2A", - "EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.ANY", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.HA", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", - "Deprecated": "1", - "EventCode": "0x2B", - "EventName": "UNC_H_RxC_REQ_Q1_RETRY.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x26", - "EventName": "UNC_H_RxC_RRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.ANY_RRQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_RRQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x27", - "EventName": "UNC_H_RxC_RRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0", - "Deprecated": "1", - "EventCode": "0x28", - "EventName": "UNC_H_RxC_WBQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.ANY0", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.ANY_WBQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.HA", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxC_WBQ1_REJECT.VICTIM", - "Deprecated": "1", - "EventCode": "0x29", - "EventName": "UNC_H_RxC_WBQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BUSY_STARVED.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB4", - "EventName": "UNC_H_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_BYPASS.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB2", - "EventName": "UNC_H_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IFV", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_CRD_STARVED.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB3", - "EventName": "UNC_H_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_INSERTS.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB1", - "EventName": "UNC_H_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AD_CRD", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.AK_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.BL_CRD", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_RxR_OCCUPANCY.IV_BNC", - "Deprecated": "1", - "EventCode": "0xB0", - "EventName": "UNC_H_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.E_STATE", - "Deprecated": "1", - "EventCode": "0x3D", - "EventName": "UNC_H_SF_EVICTION.E_STATE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.M_STATE", - "Deprecated": "1", - "EventCode": "0x3D", - "EventName": "UNC_H_SF_EVICTION.M_STATE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SF_EVICTION.S_STATE", - "Deprecated": "1", - "EventCode": "0x3D", - "EventName": "UNC_H_SF_EVICTION.S_STATE", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.ALL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_LOCAL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.BCST_LOC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.BCST_REMOTE", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.BCST_REM", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.DIRECT_LOC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.DIRECT_REM", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.LOCAL", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.LOCAL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOPS_SENT.REMOTE", - "Deprecated": "1", - "EventCode": "0x51", - "EventName": "UNC_H_SNOOPS_SENT.REMOTE", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPCNFLCTS", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPCNFLCT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPFWD", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPFWD", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPI", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPI", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPIFWD", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPIFWD", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPS", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSPSFWD", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSPSFWD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_FWD_WB", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSP_FWD_WB", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP.RSP_WBWB", - "Deprecated": "1", - "EventCode": "0x5C", - "EventName": "UNC_H_SNOOP_RESP.RSP_WB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPCNFLCT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPFWD", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPI", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPI", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPIFWD", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPS", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPSFWD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_FWD_WB", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB", - "Deprecated": "1", - "EventCode": "0x5D", - "EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_WB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "Deprecated": "1", - "EventCode": "0xD0", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "Deprecated": "1", - "EventCode": "0xD2", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "Deprecated": "1", - "EventCode": "0xD4", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "Deprecated": "1", - "EventCode": "0xD6", - "EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", - "Deprecated": "1", - "EventCode": "0x9D", - "EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.AK_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_BYPASS.IV_BNC", - "Deprecated": "1", - "EventCode": "0x9F", - "EventName": "UNC_H_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC", - "Deprecated": "1", - "EventCode": "0x96", - "EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC", - "Deprecated": "1", - "EventCode": "0x97", - "EventName": "UNC_H_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.AK_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_INSERTS.IV_BNC", - "Deprecated": "1", - "EventCode": "0x95", - "EventName": "UNC_H_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AD_CRD", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.AK_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.BL_CRD", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_NACK.IV_BNC", - "Deprecated": "1", - "EventCode": "0x99", - "EventName": "UNC_H_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC", - "Deprecated": "1", - "EventCode": "0x94", - "EventName": "UNC_H_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AD_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.AK_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.BL_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_HORZ_STARVED.IV_BNC", - "Deprecated": "1", - "EventCode": "0x9B", - "EventName": "UNC_H_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG0", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.AK_AG1", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", - "Deprecated": "1", - "EventCode": "0x9C", - "EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG0", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AD_AG1", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG0", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.AK_AG1", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG0", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.BL_AG1", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_BYPASS.IV", - "Deprecated": "1", - "EventCode": "0x9E", - "EventName": "UNC_H_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_FULL.IV", - "Deprecated": "1", - "EventCode": "0x92", - "EventName": "UNC_H_TxR_VERT_CYCLES_FULL.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_CYCLES_NE.IV", - "Deprecated": "1", - "EventCode": "0x93", - "EventName": "UNC_H_TxR_VERT_CYCLES_NE.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG0", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AD_AG1", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG0", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.AK_AG1", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG0", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.BL_AG1", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_INSERTS.IV", - "Deprecated": "1", - "EventCode": "0x91", - "EventName": "UNC_H_TxR_VERT_INSERTS.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG0", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AD_AG1", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG0", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.AK_AG1", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG0", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.BL_AG1", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_NACK.IV", - "Deprecated": "1", - "EventCode": "0x98", - "EventName": "UNC_H_TxR_VERT_NACK.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_OCCUPANCY.IV", - "Deprecated": "1", - "EventCode": "0x90", - "EventName": "UNC_H_TxR_VERT_OCCUPANCY.IV_AG0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG0", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AD_AG1", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG0", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.AK_AG1", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG0", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.BL_AG1", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TxR_VERT_STARVED.IV", - "Deprecated": "1", - "EventCode": "0x9A", - "EventName": "UNC_H_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", - "Deprecated": "1", - "EventCode": "0xA6", - "EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", - "Deprecated": "1", - "EventCode": "0xA8", - "EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", - "Deprecated": "1", - "EventCode": "0xAA", - "EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.DN", - "Deprecated": "1", - "EventCode": "0xAC", - "EventName": "UNC_H_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_VERT_RING_IV_IN_USE.UP", - "Deprecated": "1", - "EventCode": "0xAC", - "EventName": "UNC_H_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.LLC", - "Deprecated": "1", - "EventCode": "0x56", - "EventName": "UNC_H_WB_PUSH_MTOI.LLC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WB_PUSH_MTOI.MEM", - "Deprecated": "1", - "EventCode": "0x56", - "EventName": "UNC_H_WB_PUSH_MTOI.MEM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC0_SMI2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC1_SMI3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC2_SMI4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.EDC3_SMI5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.MC0_SMI0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1", - "Deprecated": "1", - "EventCode": "0x5A", - "EventName": "UNC_H_WRITE_NO_CREDITS.MC1_SMI1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0xe4", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0xf0", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0xe2", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0xe8", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.ANY_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0xe1", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0x50", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0x48", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.CORE_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0x84", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0x88", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EVICT_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDFE", - "PerPkg": "1", - "UMask": "0x24", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDM", - "PerPkg": "1", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDFE", - "PerPkg": "1", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDM", - "PerPkg": "1", - "UMask": "0x28", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE", - "Deprecated": "1", - "EventCode": "0x32", - "EventName": "UNC_H_XSNP_RESP.EXT_RSP_HITFSE", - "PerPkg": "1", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Clockticks of the IIO Traffic Controller", - "EventCode": "0x1", - "EventName": "UNC_IIO_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts clockticks of the 1GHz trafiic contro= ller clock in the IIO unit.", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-3", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x0f", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x01", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x02", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x04", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", - "FCMask": "0x4", - "PerPkg": "1", - "PortMask": "0x08", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 0", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x01", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 1", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x02", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 2", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x04", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts; Port 3", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x08", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0-3", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0xf", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 0", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 1", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 2", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer occupancy of completio= ns with data: Part 3", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x16 card plugged in to stac= k, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x8 card plugged in to Lane = 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; x4 card is plugged in to sl= ot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part0", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part0. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part1. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part2", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part2. In the general case, Part2 refers= to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card, = but it could refer to any x4 or x8 device attached to the IIO unit and usin= g lanes starting at lane 8 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for 4 bytes made by the CPU to I= IO Part3", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by a unit on the main die (generally a core) or by another IIO unit = to the MMIO space of a card on IIO Part3. In the general case, Part3 refers= to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but i= t could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core reading from = Card's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part0 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part0 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part0 refers= to a standard PCIe card of any size (x16,x8,x4) that is plugged directly i= nto one of the PCIe slots. Part0 could also refer to any device plugged int= o the first slot of a PCIe riser card or to a device attached to the IIO un= it which starts its use of the bus using lane 0 of the 16 lanes supported b= y the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part1 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part1 by a unit on the main die (= generally a core) or by another IIO unit. In the general case, Part1 refers= to a x4 PCIe card plugged into the second slot of a PCIe riser card, but i= t could refer to any x4 device attached to the IIO unit using lanes startin= g at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part2 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part2 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part2 refer= s to a x4 or x8 PCIe card plugged into the third slot of a PCIe riser card,= but it could refer to any x4 or x8 device attached to the IIO unit and usi= ng lanes starting at lane 8 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of 4 bytes made to IIO Part3 by= the CPU", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made to the MMIO space of a card on IIO Part3 by a unit on the main die = (generally a core) or by another IIO unit. In the general case, Part3 refer= s to a x4 PCIe card plugged into the fourth slot of a PCIe riser card, but = it could brefer to any device attached to the IIO unit using the lanes star= ting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Core writing to Ca= rd's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part0", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part0. Does not include requests made by the same IIO unit. In the gener= al case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that = is plugged directly into one of the PCIe slots. Part0 could also refer to a= ny device plugged into the first slot of a PCIe riser card or to a device a= ttached to the IIO unit which starts its use of the bus using lane 0 of the= 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part1. Does not include requests made by the same IIO unit. In the gener= al case, Part1 refers to a x4 PCIe card plugged into the second slot of a P= CIe riser card, but it could refer to any x4 device attached to the IIO uni= t using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part2", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part2. Does not include requests made by the same IIO unit. In the gener= al case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot o= f a PCIe riser card, but it could refer to any x4 or x8 device attached to = the IIO unit and using lanes starting at lane 8 of the 16 lanes supported b= y the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= a different IIO unit to IIO Part3", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts ever peer to peer read request for 4 = bytes of data made by a different IIO unit to the MMIO space of a card on I= IO Part3. Does not include requests made by the same IIO unit. In the gener= al case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a P= CIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part0 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part0 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gen= eral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) tha= t is plugged directly into one of the PCIe slots. Part0 could also refer to= any device plugged into the first slot of a PCIe riser card or to a device= attached to the IIO unit which starts its use of the bus using lane 0 of t= he 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part1 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part1 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part1 refers to a x4 PCIe card plugged into the second slot of a = PCIe riser card, but it could refer to any x4 device attached to the IIO un= it using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part2 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part2 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot = of a PCIe riser card, but it could refer to any x4 or x8 device attached to= the IIO unit and using lanes starting at lane 8 of the 16 lanes supported = by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made to= IIO Part3 by a different IIO unit", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made to the MMIO space of a card on IIO Part3 by a different= IIO unit. Does not include requests made by the same IIO unit. In the gene= ral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a = PCIe riser card, but it could brefer to any device attached to the IIO unit= using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU; Another card (diff= erent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests ini= tiated by the main die to the attached device.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Atomic requests ta= rgeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Completion of atom= ic requests targeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part0 to a unit on the main die (generally memory). In the ge= neral case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) th= at is plugged directly into one of the PCIe slots. Part0 could also refer t= o any device plugged into the first slot of a PCIe riser card or to a devic= e attached to the IIO unit which starts its use of the bus using lane 0 of = the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part1 to a unit on the main die (generally memory). In the ge= neral case, Part1 refers to a x4 PCIe card plugged into the second slot of = a PCIe riser card, but it could refer to any x4 device attached to the IIO = unit using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part2 to a unit on the main die (generally memory). In the ge= neral case, Part2 refers to a x4 or x8 PCIe card plugged into the third slo= t of a PCIe riser card, but it could refer to any x4 or x8 device attached = to the IIO unit and using lanes starting at lane 8 of the 16 lanes supporte= d by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of 4 bytes of dat= a made by IIO Part3 to a unit on the main die (generally memory). In the ge= neral case, Part3 refers to a x4 PCIe card plugged into the fourth slot of = a PCIe riser card, but it could brefer to any device attached to the IIO u= nit using the lanes starting at lane 12 of the 16 lanes supported by the bu= s.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to DR= AM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x16 card plugged in to stack, Or x8= card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x8 card plugged in to Lane 2/3, Or = x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; x4 card is plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part1 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part2 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for 4 bytes made by= IIO Part3 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer read request for 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the IIO= unit using the lanes starting at lane 12 of the 16 lanes supported by the = bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card reading from = another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part0 to the MMIO space of an IIO target. In the= general case, Part0 refers to a standard PCIe card of any size (x16,x8,x4)= that is plugged directly into one of the PCIe slots. Part0 could also refe= r to any device plugged into the first slot of a PCIe riser card or to a de= vice attached to the IIO unit which starts its use of the bus using lane 0 = of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part1 to the MMIO space of an IIO target. In the= general case, Part1 refers to a x4 PCIe card plugged into the second slot = of a PCIe riser card, but it could refer to any x4 device attached to the I= IO unit using lanes starting at lane 4 of the 16 lanes supported by the bus= .", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part2 to the MMIO space of an IIO target. In the= general case, Part2 refers to a x4 or x8 PCIe card plugged into the third = slot of a PCIe riser card, but it could refer to any x4 or x8 device attach= ed to the IIO unit and using lanes starting at lane 8 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of 4 bytes made by= IIO Part0 to an IIO target", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of 4= bytes of data made by IIO Part3 to the MMIO space of an IIO target. In the= general case, Part3 refers to a x4 PCIe card plugged into the fourth slot = of a PCIe riser card, but it could brefer to any device attached to the II= O unit using the lanes starting at lane 12 of the 16 lanes supported by the= bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU; Card writing to an= other Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number of double word (4 bytes) requests the= attached device made of the main die.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Num Link Correctable Errors", - "EventCode": "0xF", - "EventName": "UNC_IIO_LINK_NUM_CORR_ERR", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num Link Retries", - "EventCode": "0xE", - "EventName": "UNC_IIO_LINK_NUM_RETRIES", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number packets that passed the Mask/Match Fil= ter", - "EventCode": "0x21", - "EventName": "UNC_IIO_MASK_MATCH", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus an= d !(PCIE bus)", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus; !(Non-PCIE bus)= and PCIE bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus", - "EventCode": "0x2", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if all bits specified by mask match= ", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and= !(PCIE bus)", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and PCIE bus", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) = and !(PCIE bus)", - "EventCode": "0x3", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "Asserted if any bits specified by mask match= ", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Counting disabled", - "EventName": "UNC_IIO_NOTHING", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0x83", - "EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC0", - "EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Symbol Times on Link", - "EventCode": "0x82", - "EventName": "UNC_IIO_SYMBOL_TIMES", - "PerPkg": "1", - "PublicDescription": "Gen1 - increment once every 4nS, Gen2 - incr= ement once every 2nS, Gen3 - increment once every 1nS", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.MSG.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART2", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART3", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x8", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD0", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", - "Deprecated": "1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD1", - "FCMask": "0x7", - "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; x4 card is plugged in = to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part0", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part0. In the genera= l case, part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part1. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part2", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part2. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by the CPU to IIO Part3", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by a unit on the main die (generally a core) or = by another IIO unit to the MMIO space of a card on IIO Part3. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part0 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part0 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part0 refers to a standard PCIe card of any size (x16,x8,x4) that i= s plugged directly into one of the PCIe slots. Part0 could also refer to an= y device plugged into the first slot of a PCIe riser card or to a device at= tached to the IIO unit which starts its use of the bus using lane 0 of the = 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part1 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part1 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part1 refers to a x4 PCIe card plugged into the second slot of a PC= Ie riser card, but it could refer to any x4 device attached to the IIO unit= using lanes starting at lane 4 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part2 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part2 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part2 refers to a x4 or x8 PCIe card plugged into the third slot of= a PCIe riser card, but it could refer to any x4 or x8 device attached to t= he IIO unit and using lanes starting at lane 8 of the 16 lanes supported by= the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made to IIO Part3 by the CPU", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made to the MMIO space of a card on IIO Part3 by a un= it on the main die (generally a core) or by another IIO unit. In the genera= l case, Part3 refers to a x4 PCIe card plugged into the fourth slot of a PC= Ie riser card, but it could brefer to any device attached to the IIO unit = using the lanes starting at lane 12 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Cor= e writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part0", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part0. Does not include requests made by the same I= IO unit. In the general case, part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part1", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part1. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part2", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part2. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request for up to a 64 byte= transaction is made by a different IIO unit to IIO Part3", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer read request for u= p to a 64 byte transaction of data made by a different IIO unit to the MMIO= space of a card on IIO Part3. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part0 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part0 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part0 refers to a standard PCIe card of any s= ize (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 = could also refer to any device plugged into the first slot of a PCIe riser = card or to a device attached to the IIO unit which starts its use of the bu= s using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part1 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part1 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part1 refers to a x4 PCIe card plugged into t= he second slot of a PCIe riser card, but it could refer to any x4 device at= tached to the IIO unit using lanes starting at lane 4 of the 16 lanes suppo= rted by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part2 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part2 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part2 refers to a x4 or x8 PCIe card plugged = into the third slot of a PCIe riser card, but it could refer to any x4 or x= 8 device attached to the IIO unit and using lanes starting at lane 8 of the= 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made to IIO Part3 by a different IIO unit", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made to the MMIO space of a card on IIO = Part3 by a different IIO unit. Does not include requests made by the same I= IO unit. In the general case, Part3 refers to a x4 PCIe card plugged into t= he fourth slot of a PCIe riser card, but it could brefer to any device att= ached to the IIO unit using the lanes starting at lane 12 of the 16 lanes s= upported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU; Ano= ther card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Outbound. Number of requests,= to the attached device, initiated by the main die.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Ato= mic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Com= pletion of atomic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part0 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part1 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part2 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Read request for up to a 64 byte transaction = is made by IIO Part3 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every read request for up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part0 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part0 to a unit on the main die (generall= y memory). In the general case, Part0 refers to a standard PCIe card of any= size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part= 0 could also refer to any device plugged into the first slot of a PCIe rise= r card or to a device attached to the IIO unit which starts its use of the = bus using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part1 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part1 to a unit on the main die (generall= y memory). In the general case, Part1 refers to a x4 PCIe card plugged into= the second slot of a PCIe riser card, but it could refer to any x4 device = attached to the IIO unit using lanes starting at lane 4 of the 16 lanes sup= ported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part2 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part2 to a unit on the main die (generall= y memory). In the general case, Part2 refers to a x4 or x8 PCIe card plugge= d into the third slot of a PCIe riser card, but it could refer to any x4 or= x8 device attached to the IIO unit and using lanes starting at lane 8 of t= he 16 lanes supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Write request of up to a 64 byte transaction = is made by IIO Part3 to Memory", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every write request of up to a 64 byt= e transaction of data made by IIO Part3 to a unit on the main die (generall= y memory). In the general case, Part3 refers to a x4 PCIe card plugged into= the fourth slot of a PCIe riser card, but it could brefer to any device a= ttached to the IIO unit using the lanes starting at lane 12 of the 16 lanes= supported by the bus.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x16 card plugged in to= stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x8 card plugged in to = Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; x4 card is plugged in = to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Mes= sages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part0 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part0 to the MMIO space of an IIO tar= get. In the general case, Part0 refers to a standard PCIe card of any size = (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 coul= d also refer to any device plugged into the first slot of a PCIe riser card= or to a device attached to the IIO unit which starts its use of the bus us= ing lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part1 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part1 to the MMIO space of an IIO tar= get. In the general case, Part1 refers to a x4 PCIe card plugged into the s= econd slot of a PCIe riser card, but it could refer to any x4 device attach= ed to the IIO unit using lanes starting at lane 4 of the 16 lanes supported= by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part2 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part2 to the MMIO space of an IIO tar= get. In the general case, Part2 refers to a x4 or x8 PCIe card plugged into= the third slot of a PCIe riser card, but it could refer to any x4 or x8 de= vice attached to the IIO unit and using lanes starting at lane 8 of the 16 = lanes supported by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer read request of up to a 64 byte = transaction is made by IIO Part3 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer read request of up= to a 64 byte transaction made by IIO Part3 to the MMIO space of an IIO tar= get. In the general case, Part3 refers to a x4 PCIe card plugged into the f= ourth slot of a PCIe riser card, but it could brefer to any device attached= to the IIO unit using the lanes starting at lane 12 of the 16 lanes suppor= ted by the bus.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part0 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part0 to the MMIO space of a= n IIO target. In the general case, Part0 refers to a standard PCIe card of = any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. P= art0 could also refer to any device plugged into the first slot of a PCIe r= iser card or to a device attached to the IIO unit which starts its use of t= he bus using lane 0 of the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part1 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part1 to the MMIO space of a= n IIO target.In the general case, Part1 refers to a x4 PCIe card plugged in= to the second slot of a PCIe riser card, but it could refer to any x4 devic= e attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s= upported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part2 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part2 to the MMIO space of a= n IIO target. In the general case, Part2 refers to a x4 or x8 PCIe card plu= gged into the third slot of a PCIe riser card, but it could refer to any x4= or x8 device attached to the IIO unit and using lanes starting at lane 8 o= f the 16 lanes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Peer to peer write request of up to a 64 byte= transaction is made by IIO Part3 to an IIO target", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Counts every peer to peer write request of u= p to a 64 byte transaction of data made by IIO Part3 to the MMIO space of a= n IIO target. In the general case, Part3 refers to a x4 PCIe card plugged i= nto the fourth slot of a PCIe riser card, but it could brefer to any devic= e attached to the IIO unit using the lanes starting at lane 12 of the 16 la= nes supported by the bus.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU; Car= d writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Also known as Inbound. Number of 64 byte ca= che line requests initiated by the attached device.; VTd - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; context cache miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.CTXT_MISS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; L1 miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L1_MISS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; L2 miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L2_MISS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; L3 miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L3_MISS", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; Vtd hit", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.L4_PAGE_HIT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; TLB miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.TLB1_MISS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; TLB is full", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.TLB_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Access; TLB miss", - "EventCode": "0x41", - "EventName": "UNC_IIO_VTD_ACCESS.TLB_MISS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "VTd Occupancy", - "EventCode": "0x40", - "EventName": "UNC_IIO_VTD_OCCUPANCY", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Any Source", - "EventCode": "0xF", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests f= rom any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy; Snoops", - "EventCode": "0xF", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of reads and writes t= hat are outstanding in the uncore in each cycle. This is effectively the s= um of the READ_OCCUPANCY and WRITE_OCCUPANCY events.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Total IRP occupancy of inbound read and write= requests.", - "EventCode": "0xF", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", - "PerPkg": "1", - "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests. This is effectively the sum of read occupancy and write occupa= ncy.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "IRP Clocks", - "EventCode": "0x1", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CLFlush", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; CRd", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.CRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; DRd", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.DRD", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIDCAHin5t", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; PCIRdCur", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops; WbMtoI", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Counts the number of coherency related opera= tions servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF RF full", - "EventCode": "0x17", - "EventName": "UNC_I_FAF_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", - "EventCode": "0x18", - "EventName": "UNC_I_FAF_INSERTS", - "PerPkg": "1", - "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Occupancy of the IRP FAF queue.", - "EventCode": "0x19", - "EventName": "UNC_I_FAF_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF allocation -- sent to ADQ", - "EventCode": "0x16", - "EventName": "UNC_I_FAF_TRANSACTIONS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "All Inserts Inbound (p2p + faf + cset)", - "EventCode": "0x1E", - "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x1E", - "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic = Transactions as Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Tr= ansactions as Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write T= ransactions as Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Requests", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From = Primary to Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From = Primary to Secondary", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 0", - "EventCode": "0x1C", - "EventName": "UNC_I_MISC0.UNKNOWN", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Lost Forward", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Snoop pulled away ownership before a write w= as committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Invalid", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Received Valid", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did have = sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Snoop took cacheline ownership before write = from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line", - "EventCode": "0x1D", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Secondary received a transfer that did not h= ave sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Requests", - "EventCode": "0x14", - "EventName": "UNC_I_P2P_INSERTS", - "PerPkg": "1", - "PublicDescription": "P2P requests from the ITC", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Occupancy", - "EventCode": "0x15", - "EventName": "UNC_I_P2P_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "P2P B & S Queue Occupancy", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P completions", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; match if local only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; match if local and target m= atches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P Message", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P reads", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.RD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; Match if remote only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; match if remote and target = matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions; P2P Writes", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.WR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", - "UMask": "0x7e", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", - "UMask": "0x74", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", - "UMask": "0x72", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", - "UMask": "0x78", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", - "UMask": "0x71", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit E or S", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit I", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Hit M", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; Miss", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpCode", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpData", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses; SnpInv", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Atomic", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of atomic = transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Other", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of 'other'= kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Read Prefetches", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.RD_PREF", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks the number of read pr= efetches.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Reads", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.READS", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Tracks only read requests (n= ot including read prefetches).", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count; Writes", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts the number of Inbound transactions fr= om the IRP to the Uncore. This can be filtered based on request type in ad= dition to the source queue. Note the special filtering equation. We do OR= -reduction on the request type. If the SOURCE bit is set, then we also do = AND qualification based on the source portID.; Trackes only write requests.= Each write request should have a prefetch, so there is no need to explici= tly track these requests. For writes that are tickled and have to retry, t= he counter will be incremented for each retry.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Egress Allocations", - "EventCode": "0xB", - "EventName": "UNC_I_TxC_AK_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Cycles Full", - "EventCode": "0x5", - "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Inserts", - "EventCode": "0x2", - "EventName": "UNC_I_TxC_BL_DRS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Occupancy", - "EventCode": "0x8", - "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Cycles Full", - "EventCode": "0x6", - "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Inserts", - "EventCode": "0x3", - "EventName": "UNC_I_TxC_BL_NCB_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Occupancy", - "EventCode": "0x9", - "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Cycles Full", - "EventCode": "0x7", - "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Inserts", - "EventCode": "0x4", - "EventName": "UNC_I_TxC_BL_NCS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Occupancy", - "EventCode": "0xA", - "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD Egress Credit Stalls", - "EventCode": "0x1A", - "EventName": "UNC_I_TxR2_AD_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue a request to the R2PCIe because there are no AD Egress Credits= available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x1B", - "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts the number times when it is not possi= ble to issue data to the R2PCIe because there are no BL Egress Credits avai= lable.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xD", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0xE", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of requests issued to the = switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0xC", - "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of outstanding outbou= nd requests from the IRP to the switch (towards the devices). This can be = used in conjunction with the allocations event in order to calculate averag= e latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x82", - "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x88", - "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8A", - "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x84", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Traffic in which the M2M to iMC Bypass was no= t taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_Egress.NOT_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts traffic in which the M2M (Mesh to Mem= ory) to iMC (Memory Controller) bypass was not taken", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass; Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_Egress.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass; Not Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass; Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles - at UCLK", - "EventName": "UNC_M2M_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xC0", - "EventName": "UNC_M2M_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to core mode (which bypass= es the CHA) was disabled", - "EventCode": "0x24", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "PublicDescription": "Counts cycles when direct to core mode (whic= h bypasses the CHA) was disabled", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages sent direct to core (bypassing the C= HA)", - "EventCode": "0x23", - "EventName": "UNC_M2M_DIRECT2CORE_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts when messages were sent direct to cor= e (bypassing the CHA)", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to core trans= action were overridden", - "EventCode": "0x25", - "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", - "PerPkg": "1", - "PublicDescription": "Counts reads in which direct to core transac= tions (which would have bypassed the CHA) were overridden", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to Intel(R) U= PI transactions were overridden", - "EventCode": "0x28", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", - "PerPkg": "1", - "PublicDescription": "Counts reads in which direct to Intel(R) Ult= ra Path Interconnect (UPI) transactions (which would have bypassed the CHA)= were overridden", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to Intel(R) UPI was disabl= ed", - "EventCode": "0x27", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the ability to send messa= ges direct to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was = disabled", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages sent direct to the Intel(R) UPI", - "EventCode": "0x26", - "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", - "PerPkg": "1", - "PublicDescription": "Counts when messages were sent direct to the= Intel(R) Ultra Path Interconnect (bypassing the CHA)", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads that a message sent direct2 I= ntel(R) UPI was overridden", - "EventCode": "0x29", - "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", - "PerPkg": "1", - "PublicDescription": "Counts when a read message that was sent dir= ect to the Intel(R) Ultra Path Interconnect (bypassing the CHA) was overrid= den", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in A State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in I State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in L State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On NonDirty Line in S State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in A State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in I State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in L State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Hit; On Dirty Line in S State", - "EventCode": "0x2A", - "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookups (any= state found)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in Any State (A, I, S or unused)", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookups (cac= heline found in A state)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state, and found the cacheline mar= ked in the A (SnoopAll) state, indicating the cacheline is stored in anothe= r socket in any state, and we must snoop the other sockets to make sure we = get the latest data. The data may be stored in any state in the local sock= et.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in I state)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the I (Invalid) state indicating the cacheline is not stored in ano= ther socket, and so there is no need to snoop the other sockets for the lat= est data. The data may be stored in any state in the local socket.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory lookup (cach= eline found in S state)", - "EventCode": "0x2D", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) looks i= nto the multi-socket cacheline Directory state , and found the cacheline ma= rked in the S (Shared) state indicating the cacheline is either stored in a= nother socket in the S(hared) state , and so there is no need to snoop the = other sockets for the latest data. The data may be stored in any state in = the local socket.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in A State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in I State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in L State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On NonDirty Line in S State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in A State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in I State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in L State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Directory Miss; On Dirty Line in S State", - "EventCode": "0x2B", - "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = A to I", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to I (Invalid= )", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = A to S", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from A (SnoopAll) to S (Shared)= ", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from/= to Any state", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory to a new state", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = I to A", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to A (SnoopAll= )", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = I to S", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from I (Invalid) to S (Shared)", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = S to A", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to A (SnoopAll)= ", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Multi-socket cacheline Directory update from = S to I", - "EventCode": "0x2E", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) updates= the multi-socket cacheline Directory state from S (Shared) to I (Invalid)", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", - "EventCode": "0xAE", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", - "EventCode": "0xAE", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "FaST wire asserted; Horizontal", - "EventCode": "0xA5", - "EventName": "UNC_M2M_FAST_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "FaST wire asserted; Vertical", - "EventCode": "0xA5", - "EventName": "UNC_M2M_FAST_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Even", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Even", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Even", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Even", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Even", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Even", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Left", - "EventCode": "0xAD", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Right", - "EventCode": "0xAD", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Reads to iMC issued", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ALL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller).", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC; All, regardless of p= riority.", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.FROM_TRANSGRESS", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC; Critical Priority", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ISOCH", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Reads to iMC issued at Normal Priority (Non-I= sochronous)", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.NORMAL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = reads to the iMC (Memory Controller). It only counts normal priority non-= isochronous reads.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Writes to iMC issued", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.ALL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = writes to the iMC (Memory Controller).", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FROM_TRANSGRESS", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; Full Line Non-ISOCH= ", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; ISOCH Full Line", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; All, regardless of = priority.", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.NI", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Partial Non-Isochronous writes to the iMC", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) issues = partial writes to the iMC (Memory Controller). It only counts normal prior= ity non-isochronous writes.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC; ISOCH Partial", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches; MC Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches; Mesh Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MESH", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full", - "EventCode": "0x53", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty", - "EventCode": "0x54", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch requests that got turn into a demand= request", - "EventCode": "0x56", - "EventName": "UNC_M2M_PREFCAM_DEMAND_PROMOTIONS", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) promote= s a outstanding request in the prefetch queue due to a subsequent demand re= ad request that entered the M2M with the same address. Explanatory Side No= te: The Prefetch queue is made of CAM (Content Addressable Memory)", - "Unit": "M2M" - }, - { - "BriefDescription": "Inserts into the Memory Controller Prefetch Q= ueue", - "EventCode": "0x57", - "EventName": "UNC_M2M_PREFCAM_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts when the M2M (Mesh to Memory) receive= s a prefetch request and inserts it into its outstanding prefetch queue. E= xplanatory Side Note: the prefect queue is made from CAM: Content Addressab= le Memory", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy", - "EventCode": "0x55", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", - "EventCode": "0xA1", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", - "EventCode": "0xA0", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AD", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AK", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; BL", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; IV", - "EventCode": "0xA3", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; AD", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", - "EventCode": "0xA2", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xA4", - "EventName": "UNC_M2M_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", - "Deprecated": "1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", - "Deprecated": "1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", - "Deprecated": "1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 0", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 1", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Ch= annel 2", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 0", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Ch= annel 2", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Full", - "EventCode": "0x4", - "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Not Empty", - "EventCode": "0x3", - "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Queue Inserts", - "EventCode": "0x1", - "EventName": "UNC_M2M_RxC_AD_INSERTS", - "PerPkg": "1", - "PublicDescription": "Counts when the a new entry is Received(RxC)= and then added to the AD (Address Ring) Ingress Queue from the CMS (Common= Mesh Stop). This is generally used for reads, and", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy", - "EventCode": "0x2", - "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Full", - "EventCode": "0x8", - "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Not Empty", - "EventCode": "0x7", - "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Allocations", - "EventCode": "0x5", - "EventName": "UNC_M2M_RxC_BL_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Occupancy", - "EventCode": "0x6", - "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M2M_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; AK - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation; IV - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M2M_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Number AD Ingress Credits", - "EventCode": "0x41", - "EventName": "UNC_M2M_TGR_AD_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number BL Ingress Credits", - "EventCode": "0x42", - "EventName": "UNC_M2M_TGR_BL_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full; Channel 0", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full; Channel 1", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full; Channel 2", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty; Channel 0", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty; Channel 1", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty; Channel 2", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts; Channel 0", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts; Channel 1", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts; Channel 2", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy; Channel 0", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy; Channel 1", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy; Channel 2", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Pending Occupancy", - "EventCode": "0x48", - "EventName": "UNC_M2M_TRACKER_PENDING_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credit Acquired", - "EventCode": "0xD", - "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credits Occupancy", - "EventCode": "0xE", - "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Full", - "EventCode": "0xC", - "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Not Empty", - "EventCode": "0xB", - "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Allocations", - "EventCode": "0x9", - "EventName": "UNC_M2M_TxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", - "EventCode": "0xF", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", - "EventCode": "0x10", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Occupancy", - "EventCode": "0xA", - "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK; CRD Transac= tions to Cbo", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.CRD_CBO", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK; NDR Transac= tions", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.NDR", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", - "EventCode": "0x1E", - "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", - "EventCode": "0x1E", - "EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; All", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - N= ear Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - F= ar Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Read Credit Request", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", - "PerPkg": "1", - "UMask": "0x88", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Compare Reques= t", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full; Write Credit Request= ", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; All", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Read Credit Req= uest", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Write Compare R= equest", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty; Write Credit Re= quest", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; All", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Near Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh S= top - Far Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Prefetch Read= Cam Hit", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Read Credit R= equest", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Write Compare= Request", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations; Write Credit = Request", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; All", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Read Credit Req= uest", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Write Compare R= equest", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy; Write Credit Re= quest", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Sideband", - "EventCode": "0x6B", - "EventName": "UNC_M2M_TxC_AK_SIDEBAND.RD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Sideband", - "EventCode": "0x6B", - "EventName": "UNC_M2M_TxC_AK_SIDEBAND.WR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Cache", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to Core", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache; Data= to QPI", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_UPI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Near Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Me= sh Stop - Far Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Near Side", - "EventCode": "0x1A", - "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common = Mesh Stop - Far Side", - "EventCode": "0x1A", - "EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full; All", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - N= ear Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - F= ar Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty; All", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Near Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Sto= p - Far Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations; All", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Near Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh S= top - Far Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Near Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Co= mmon Mesh Stop - Far Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Near Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits; Common Mesh Stop - Far Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Occupancy; All", - "EventCode": "0x16", - "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Near Side", - "EventCode": "0x16", - "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Sto= p - Far Side", - "EventCode": "0x16", - "EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used; IV", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; IV", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; IV", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK.IV", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; IV", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Even", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Even", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Even", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Even", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Even", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Even", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Down", - "EventCode": "0xAC", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Up", - "EventCode": "0xAC", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", - "Deprecated": "1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", - "Deprecated": "1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", - "Deprecated": "1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 0", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Chan= nel 2", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 0", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 1", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Chan= nel 2", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full; Channel 0", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full; Channel 1", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full; Channel 2", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty; Channel 0", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty; Channel 1", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty; Channel 2", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts; Channel 0", - "EventCode": "0x61", - "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts; Channel 1", - "EventCode": "0x61", - "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts; Channel 2", - "EventCode": "0x61", - "EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy; Channel 0", - "EventCode": "0x60", - "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy; Channel 1", - "EventCode": "0x60", - "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy; Channel 2", - "EventCode": "0x60", - "EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x80", - "EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x82", - "EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x88", - "EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8A", - "EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 0 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 0", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 1", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 2", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 3", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 4", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgres= s 5", - "EventCode": "0x84", - "EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x86", - "EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 AD credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 0", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 1", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 2", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 3", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 4", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgre= ss 5", - "EventCode": "0x8E", - "EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits in use in a= given cycle, per transgress", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 0", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 1", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 2", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 3", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 4", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgres= s 5", - "EventCode": "0x8C", - "EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of CMS Agent 1 BL credits acquired in= a given cycle, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; Requests", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; Snoops", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; VNA Messages", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CBox AD Credits Empty; Writebacks", - "EventCode": "0x22", - "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to Cbox on the = AD Ring (covers higher CBoxes)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of uclks in domain", - "EventCode": "0x1", - "EventName": "UNC_M3UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts the number of uclks in the M3 uclk do= main. This could be slightly different than the count in the Ubox because = of enable/freeze delays. However, because the M3 is close to the Ubox, the= y generally should not diverge by more than a handful of cycles.", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xC0", - "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2C Sent", - "EventCode": "0x2B", - "EventName": "UNC_M3UPI_D2C_SENT", - "PerPkg": "1", - "PublicDescription": "Count cases BL sends direct to core", - "Unit": "M3UPI" - }, - { - "BriefDescription": "D2U Sent", - "EventCode": "0x2A", - "EventName": "UNC_M3UPI_D2U_SENT", - "PerPkg": "1", - "PublicDescription": "Cases where SMI3 sends D2U command", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Down", - "EventCode": "0xAE", - "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements;= Up", - "EventCode": "0xAE", - "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Counts number of cycles IV was blocked in th= e TGR Egress due to SNP/GO Ordering requirements", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "FaST wire asserted; Horizontal", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_FAST_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "FaST wire asserted; Vertical", - "EventCode": "0xA5", - "EventName": "UNC_M3UPI_FAST_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles either the local= or incoming distress signals are asserted. Incoming distress includes up,= dn and across.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Even", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Left and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Even", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AD Ring In Use; Right and Odd", - "EventCode": "0xA7", - "EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AD ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. We really have two rings -- a cloc= kwise ring and a counter-clockwise ring. On the left side of the ring, the= UP direction is on the clockwise ring and DN is on the counter-clockwise r= ing. On the right side of the ring, this is reversed. The first half of t= he CBos are on the left side of the ring, and the 2nd half are on the right= side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD= is NOT the same ring as CBo 2 UP AD because they are on opposite sides of = the ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Even", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Left and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Even", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal AK Ring In Use; Right and Odd", - "EventCode": "0xA9", - "EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal AK ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clockw= ise ring and a counter-clockwise ring. On the left side of the ring, the U= P direction is on the clockwise ring and DN is on the counter-clockwise rin= g. On the right side of the ring, this is reversed. The first half of the= CBos are on the left side of the ring, and the 2nd half are on the right s= ide of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD i= s NOT the same ring as CBo 2 UP AD because they are on opposite sides of th= e ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Even", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Left and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Even", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal BL Ring in Use; Right and Odd", - "EventCode": "0xAB", - "EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal BL ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop.We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Left", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Horizontal IV Ring in Use; Right", - "EventCode": "0xAD", - "EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Horizon= tal IV ring is being used at this ring stop. This includes when packets ar= e passing by and when packets are being sunk, but does not include when pac= kets are being sent from the ring stop. There is only 1 IV ring. Therefor= e, if one wants to monitor the Even ring, they should select both UP_EVEN a= nd DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN= _ODD.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO0 and IIO1 share the = same ring destination. (1 VN0 credit only)", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO0_IIO1_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO2", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO3", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO4", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; IIO5", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; All IIO targets for NCS = are in single mask. ORs them together", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "M2 BL Credits Empty; Selected M2p BL NCS cred= its", - "EventCode": "0x23", - "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL", - "PerPkg": "1", - "PublicDescription": "No vn0 and vna credits available to send to = M2", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AD - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AD - Slot 1", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AD - Slot 2", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AK - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; AK - Slot 2", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Multi Slot Flit Received; BL - Slot 0", - "EventCode": "0x3E", - "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0", - "PerPkg": "1", - "PublicDescription": "Multi slot flit received - S0, S1 and/or S2 = populated (can use AK S0/S1 masks for AK allocations)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AD", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; AK", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; BL", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= ; IV", - "EventCode": "0xA1", - "EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Horizontal ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = AD", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Acknowledgements to core", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Data Responses to core", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.; = Snoops of processor's cache.", - "EventCode": "0xA0", - "EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles incoming messages from the = Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AD", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; AK", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; Acknowled= gements to Agent 1", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; BL", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring; IV", - "EventCode": "0xA3", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; AD", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Acknowledge= ments to core", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Data Respon= ses to core", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring; Snoops of p= rocessor's cache.", - "EventCode": "0xA2", - "EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xA4", - "EventName": "UNC_M3UPI_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; REQ on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; RSP on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; SNP on AD", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; NCB on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; NCS on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; RSP on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN0; WB on BL", - "EventCode": "0x4B", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; REQ on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; RSP on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; SNP on AD", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; NCB on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; NCS on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; RSP on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Lost Arb for VN1; WB on BL", - "EventCode": "0x4C", - "EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 message requested but lost arbitration; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; AD, BL Parallel Win", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN", - "PerPkg": "1", - "PublicDescription": "AD and BL messages won arbitration concurren= tly / in parallel", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn0 messages because slotting stage cannot accept new message", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending AD = VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g ad vn1 messages because slotting stage cannot accept new message", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn0 messages because slotting stage cannot accept new message", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; No Progress on Pending BL = VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1", - "PerPkg": "1", - "PublicDescription": "Arbitration stage made no progress on pendin= g bl vn1 messages because slotting stage cannot accept new message", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN0", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN0", - "PerPkg": "1", - "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn0, delaying vn1 win, because vn0 offered parallel ad/bl", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Arb Miscellaneous; Parallel Bias to VN1", - "EventCode": "0x4D", - "EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN1", - "PerPkg": "1", - "PublicDescription": "VN0/VN1 arbiter gave second, consecutive win= to vn1, delaying vn0 win, because vn1 offered parallel ad/bl", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; REQ on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; RSP on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; SNP on AD", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; NCB on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; NCS on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; RSP on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN0; WB on BL", - "EventCode": "0x49", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; REQ on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Home (REQ) messages on AD. R= EQ is generally used to send requests, request responses, and snoop respons= es.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; RSP on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on AD= . RSP packets are used to transmit a variety of protocol flits including g= rants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; SNP on AD", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Snoops (SNP) messages on AD. = SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; NCB on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Broadcast (NCB) = messages on BL. NCB is generally used to transmit data without coherency. = For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; NCS on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Non-Coherent Standard (NCS) m= essages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; RSP on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Response (RSP) messages on BL= . RSP packets are used to transmit a variety of protocol flits including gr= ants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Can't Arb for VN1; WB on BL", - "EventCode": "0x4A", - "EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 message was not able to request arbitrat= ion while some other message won arbitration; Data Response (WB) messages o= n BL. WB is generally used to transmit data with coherency. For example, = remote reads and writes, or cache to cache transfers will transmit their da= ta using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; REQ on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; RSP on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; SNP on AD", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; NCB on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; NCS on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; RSP on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN0; WB on BL", - "EventCode": "0x47", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN0 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; REQ on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; RSP on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; SNP on AD", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; NCB on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; NCS on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; RSP on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "No Credits to Arb for VN1; WB on BL", - "EventCode": "0x48", - "EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "VN1 message is blocked from requesting arbit= ration due to lack of remote UPI credits; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on BL Ar= b", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while b= l message is in arbitration", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on Idle", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to slot 0 of independent flit while p= ipeline is idle", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 1", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 1 while merging with bl = message in same flit", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 2", - "EventCode": "0x40", - "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT", - "PerPkg": "1", - "PublicDescription": "Number of times message is bypassed around t= he Ingress Queue; AD is taking bypass to flit slot 2 while merging with bl = message in same flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; REQ on AD", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; RSP on AD", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; SNP on AD", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; NCB on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; NCS on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; RSP on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message lost contest for flit; WB on BL", - "EventCode": "0x50", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN0 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; REQ on AD", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Home (REQ) messages on AD. REQ is generally u= sed to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; RSP on AD", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on AD. RSP packets ar= e used to transmit a variety of protocol flits including grants and complet= ions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; SNP on AD", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Snoops (SNP) messages on AD. SNP is used for = outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; NCB on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Broadcast (NCB) messages on BL. = NCB is generally used to transmit data without coherency. For example, non= -coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; NCS on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Non-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; RSP on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Response (RSP) messages on BL. RSP packets are= used to transmit a variety of protocol flits including grants and completi= ons (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message lost contest for flit; WB on BL", - "EventCode": "0x51", - "EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress VN1 packets lost t= he contest for Flit Slot 0.; Data Response (WB) messages on BL. WB is gene= rally used to transmit data with coherency. For example, remote reads and = writes, or cache to cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events; Any In BGF FIFO", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO", - "PerPkg": "1", - "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf (fifo only)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events; Any in BGF Path", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH", - "PerPkg": "1", - "PublicDescription": "Indication that at least one packet (flit) i= s in the bgf path (i.e. pipe to fifo)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Miscellaneous Credit Events; No D2K For Arb", - "EventCode": "0x60", - "EventName": "UNC_M3UPI_RxC_CRD_MISC.NO_D2K_FOR_ARB", - "PerPkg": "1", - "PublicDescription": "VN0 or VN1 BL RSP message was blocked from a= rbitration request due to lack of D2K CMP credits", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; D2K Credits", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD", - "PerPkg": "1", - "PublicDescription": "D2K completion fifo credit occupancy (credit= s in use), accumulated across all cycles", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; Packets in BGF FIFO", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO", - "PerPkg": "1", - "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in fifo", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; Packets in BGF Path", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH", - "PerPkg": "1", - "PublicDescription": "Occupancy of m3upi ingress -> upi link layer= bgf; packets (flits) in path (i.e. pipe to fifo or fifo)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO", - "PerPkg": "1", - "PublicDescription": "count of bl messages in pump-1-pending state= , in completion fifo only", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL", - "PerPkg": "1", - "PublicDescription": "count of bl messages in pump-1-pending state= , in marker table and in fifo", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; Transmit Credits", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD", - "PerPkg": "1", - "PublicDescription": "Link layer transmit queue credit occupancy (= credits in use), accumulated across all cycles", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Credit Occupancy; VNA In Use", - "EventCode": "0x61", - "EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE", - "PerPkg": "1", - "PublicDescription": "Remote UPI VNA credit occupancy (number of c= redits in use), accumulated across all cycles", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", - "EventCode": "0x43", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles when the UPI Ing= ress is not empty. This tracks one of the three rings that are used by the= UPI agent. This can be used in conjunction with the UPI Ingress Occupancy= Accumulator event in order to calculate average queue occupancy. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; REQ on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; SNP on AD", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCB on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; NCS on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; RSP on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Emp= ty; WB on BL", - "EventCode": "0x44", - "EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent; All", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent; No BGF Credits", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_BGF", - "PerPkg": "1", - "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Data Flit Not Sent; No TxQ Credits", - "EventCode": "0x57", - "EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_TXQ", - "PerPkg": "1", - "PublicDescription": "Data flit is ready for transmission but coul= d not be sent", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 0", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT", - "PerPkg": "1", - "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 0", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT", - "PerPkg": "1", - "PublicDescription": "pump-1-pending logic is at capacity (pending= table plus completion fifo at limit)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY", - "PerPkg": "1", - "PublicDescription": "pump-1-pending logic is tracking at least on= e message", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL", - "PerPkg": "1", - "PublicDescription": "pump-1-pending completion fifo is full", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0", - "PerPkg": "1", - "PublicDescription": "pump-1-pending logic is at or near capacity,= such that pump-0-only bl messages are getting stalled in slotting stage", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO", - "PerPkg": "1", - "PublicDescription": "a bl message finished but is in limbo and mo= ved to pump-1-pending logic", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Generating BL Data Flit Sequence; Wait on Pum= p 1", - "EventCode": "0x59", - "EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT", - "PerPkg": "1", - "PublicDescription": "generating bl data flit sequence; waiting fo= r data pump 1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC", - "EventCode": "0x5A", - "EventName": "UNC_M3UPI_RxC_FLITS_MISC", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; One Message", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG", - "PerPkg": "1", - "PublicDescription": "One message in flit; VNA or non-VNA flit", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; One Message in non-VNA", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG_VNX", - "PerPkg": "1", - "PublicDescription": "One message in flit; non-VNA flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; Two Messages", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.2_MSGS", - "PerPkg": "1", - "PublicDescription": "Two messages in flit; VNA flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit; Three Messages", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.3_MSGS", - "PerPkg": "1", - "PublicDescription": "Three messages in flit; VNA flit", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_1", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_2", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Sent Header Flit", - "EventCode": "0x56", - "EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_3", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; All", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Needs D= ata Flit", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA", - "PerPkg": "1", - "PublicDescription": "BL message requires data flit sequence", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 0", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT", - "PerPkg": "1", - "PublicDescription": "Waiting for header pump 0", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ", - "PerPkg": "1", - "PublicDescription": "Header pump 1 is not required for flit", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Bubble", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE", - "PerPkg": "1", - "PublicDescription": "Header pump 1 is not required for flit but f= lit transmission delayed", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Don't N= eed Pump 1 - Not Avail", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL", - "PerPkg": "1", - "PublicDescription": "Header pump 1 is not required for flit and n= ot available", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Slotting BL Message Into Header Flit; Wait on= Pump 1", - "EventCode": "0x58", - "EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT", - "PerPkg": "1", - "PublicDescription": "Waiting for header pump 1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Accumulate", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting control state machine is in any accumulate state= ; multi-message flit may be assembled over multiple cycles", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Accumulate Ready", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; header flit slotting control state machine is in accum_ready state; f= lit is ready to send but transmission is blocked; more messages may be slot= ted into flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Accumulate Wasted", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Flit is being assembled over multiple cycles, but no additional messa= ge is being slotted into flit in current cycle; accumulate cycle is wasted", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Blocked", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting entered run-ahead state; new header flit is star= ted while transmission of prior, fully assembled flit is blocked", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Run-Ahead - Message", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit slotting is in run-ahead to start new flit, and message i= s actually slotted into new flit", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Parallel Ok", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; New header flit construction may proceed in parallel with data flit s= equence", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Parallel Flit Finished", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_FLIT", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Header flit finished assembly in parallel with data flit sequence", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 1; Parallel Message", - "EventCode": "0x53", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_MSG", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 1; Message is slotted into header flit in parallel with data flit sequen= ce", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate-matching stall injected", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Flit Gen - Header 2; Rate-matching Stall - No= Message", - "EventCode": "0x54", - "EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG", - "PerPkg": "1", - "PublicDescription": "Events related to Header Flit Generation - S= et 2; Rate matching stall injected, but no additional message slotted durin= g stall cycle", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; All", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No BGF Credits", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_CRD", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No BGF Credits + No Extra Me= ssage Slotted", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_NO_MSG", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No BGF credits available; no additional message slotted in= to flit", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No TxQ Credits", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_CRD", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; No TxQ Credits + No Extra Me= ssage Slotted", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_NO_MSG", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; No TxQ credits available; no additional message slotted in= to flit", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; Sent - One Slot Taken", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ONE_TAKEN", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only one slot taken (two slots fr= ee)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; Sent - Three Slots Taken", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.THREE_TAKEN", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with three slots taken (no slots free)= ", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Header Not Sent; Sent - Two Slots Taken", - "EventCode": "0x55", - "EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.TWO_TAKEN", - "PerPkg": "1", - "PublicDescription": "header flit is ready for transmission but co= uld not be sent; sending header flit with only two slots taken (one slots f= ree)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Can't Slot AD", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD", - "PerPkg": "1", - "PublicDescription": "some AD message could not be slotted (logica= l OR of all AD events under INGR_SLOT_CANT_MC_VN{0,1})", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Can't Slot BL", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL", - "PerPkg": "1", - "PublicDescription": "some BL message could not be slotted (logica= l OR of all BL events under INGR_SLOT_CANT_MC_VN{0,1})", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel AD Lost", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_AD_LOST", - "PerPkg": "1", - "PublicDescription": "some AD message lost contest for slot 0 (log= ical OR of all AD events under INGR_SLOT_LOST_MC_VN{0,1})", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel Attempt", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT", - "PerPkg": "1", - "PublicDescription": "ad and bl messages attempted to slot into th= e same flit in parallel", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel BL Lost", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_BL_LOST", - "PerPkg": "1", - "PublicDescription": "some BL message lost contest for slot 0 (log= ical OR of all BL events under INGR_SLOT_LOST_MC_VN{0,1})", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; Parallel Success", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS", - "PerPkg": "1", - "PublicDescription": "ad and bl messages were actually slotted int= o the same flit in paralle", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; VN0", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.VN0", - "PerPkg": "1", - "PublicDescription": "vn0 message(s) that couldn't be slotted into= last vn0 flit are held in slotting stage while processing vn1 flit", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Message Held; VN1", - "EventCode": "0x52", - "EventName": "UNC_M3UPI_RxC_HELD.VN1", - "PerPkg": "1", - "PublicDescription": "vn1 message(s) that couldn't be slotted into= last vn1 flit are held in slotting stage while processing vn0 flit", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; REQ o= n AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Home (REQ) = messages on AD. REQ is generally used to send requests, request responses,= and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on AD. RSP packets are used to transmit a variety of protocol= flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; SNP o= n AD", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Snoops (SNP= ) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCB o= n BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Broadcast (NCB) messages on BL. NCB is generally used to transmit data w= ithout coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCS o= n BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Non-Coheren= t Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP o= n BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Response (R= SP) messages on BL. RSP packets are used to transmit a variety of protocol = flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; WB on= BL", - "EventCode": "0x41", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I Ingress. This tracks one of the three rings that are used by the UPI age= nt. This can be used in conjunction with the UPI Ingress Occupancy Accumul= ator event in order to calculate average queue latency. Multiple ingress b= uffers can be tracked at a given time using multiple counters.; Data Respon= se (WB) messages on BL. WB is generally used to transmit data with coheren= cy. For example, remote reads and writes, or cache to cache transfers will= transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; REQ o= n AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; H= ome (REQ) messages on AD. REQ is generally used to send requests, request = responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on AD. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; SNP o= n AD", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; S= noops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCB o= n BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Broadcast (NCB) messages on BL. NCB is generally used to trans= mit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCS o= n BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; N= on-Coherent Standard (NCS) messages on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP o= n BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; R= esponse (RSP) messages on BL. RSP packets are used to transmit a variety of= protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; WB on= BL", - "EventCode": "0x42", - "EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the UP= I VN1 Ingress. This tracks one of the three rings that are used by the UP= I agent. This can be used in conjunction with the UPI VN1 Ingress Occupan= cy Accumulator event in order to calculate average queue latency. Multiple= ingress buffers can be tracked at a given time using multiple counters.; D= ata Response (WB) messages on BL. WB is generally used to transmit data wi= th coherency. For example, remote reads and writes, or cache to cache tran= sfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; REQ= on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; SNP= on AD", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCB= on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCS= on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP= on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; WB = on BL", - "EventCode": "0x45", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; REQ= on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Home (REQ) messages on AD. REQ is g= enerally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on AD. RSP = packets are used to transmit a variety of protocol flits including grants a= nd completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; SNP= on AD", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Snoops (SNP) messages on AD. SNP is= used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCB= on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Broadcast (NCB) message= s on BL. NCB is generally used to transmit data without coherency. For ex= ample, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCS= on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Non-Coherent Standard (NCS) messages= on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP= on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Response (RSP) messages on BL. RSP p= ackets are used to transmit a variety of protocol flits including grants an= d completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; WB = on BL", - "EventCode": "0x46", - "EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Accumulates the occupancy of a given UPI VN1= Ingress queue in each cycle. This tracks one of the three ring Ingress b= uffers. This can be used with the UPI VN1 Ingress Not Empty event to calc= ulate average occupancy or the UPI VN1 Ingress Allocations event in order = to calculate average queuing latency.; Data Response (WB) messages on BL. = WB is generally used to transmit data with coherency. For example, remote = reads and writes, or cache to cache transfers will transmit their data usin= g WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; REQ on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; RSP on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; SNP on AD", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; NCB on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; NCS on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; RSP on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 message can't slot into flit; WB on BL", - "EventCode": "0x4E", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; REQ on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Home (REQ) messages on AD. REQ i= s generally used to send requests, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; RSP on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on AD. R= SP packets are used to transmit a variety of protocol flits including grant= s and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; SNP on AD", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Snoops (SNP) messages on AD. SNP= is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; NCB on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Broadcast (NCB) mess= ages on BL. NCB is generally used to transmit data without coherency. For= example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; NCS on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Non-Coherent Standard (NCS) messa= ges on BL.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; RSP on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Response (RSP) messages on BL. RS= P packets are used to transmit a variety of protocol flits including grants= and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 message can't slot into flit; WB on BL", - "EventCode": "0x4F", - "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB", - "PerPkg": "1", - "PublicDescription": "Count cases where Ingress has packets to sen= d but did not have time to pack into flit before sending to Agent so slot w= as left NULL which could have been used.; Data Response (WB) messages on BL= . WB is generally used to transmit data with coherency. For example, remo= te reads and writes, or cache to cache transfers will transmit their data u= sing WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Lost Arbitration", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARB_LOST", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Arrived", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARRIVED", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Dropped - Old", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_OLD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Dropped - Wrap", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_WRAP", - "PerPkg": "1", - "PublicDescription": "Dropped because it was overwritten by new me= ssage while prefetch queue was full", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "SMI3 Prefetch Messages; Slotted", - "EventCode": "0x62", - "EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.SLOTTED", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Any In Use", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE", - "PerPkg": "1", - "PublicDescription": "At least one remote vna credit is in use", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Corrected", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED", - "PerPkg": "1", - "PublicDescription": "Number of remote vna credits corrected (loca= l return) per cycle", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Level < 1", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1", - "PerPkg": "1", - "PublicDescription": "Remote vna credit level is less than 1 (i.e.= no vna credits available)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Level < 4", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4", - "PerPkg": "1", - "PublicDescription": "Remote vna credit level is less than 4; bl (= or ad requiring 4 vna) cannot arb on vna", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Level < 5", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5", - "PerPkg": "1", - "PublicDescription": "Remote vna credit level is less than 5; para= llel ad/bl arb on vna not possible", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Remote VNA Credits; Used", - "EventCode": "0x5B", - "EventName": "UNC_M3UPI_RxC_VNA_CRD.USED", - "PerPkg": "1", - "PublicDescription": "Number of remote vna credits consumed per cy= cle", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB4", - "EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, because a mess= age from the other queue has higher priority", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AD - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; AK - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; BL - Credit", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Bypass; IV - Bounce", - "EventCode": "0xB2", - "EventName": "UNC_M3UPI_RxR_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AD - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; AK - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; BL - Credit", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; IFV - Credit= ", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Injection Starvation; IV - Bounce", - "EventCode": "0xB3", - "EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts cycles under injection starvation mod= e. This starvation is triggered when the CMS Ingress cannot send a transac= tion onto the mesh for a long period of time. In this case, the Ingress is= unable to forward to the Egress due to a lack of credit.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AD - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; AK - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; BL - Credit", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Allocations; IV - Bounce", - "EventCode": "0xB1", - "EventName": "UNC_M3UPI_RxR_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the CMS Ingress = The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AD - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; AK - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; BL - Credit", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Transgress Ingress Occupancy; IV - Bounce", - "EventCode": "0xB0", - "EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Ingress buffers in t= he CMS The Ingress is used to queue up requests received from the mesh", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits; For= Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 0 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits; For= Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Agent 1 Egress Buffe= r is stalled waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 REQ Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 RSP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 SNP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN0 WB Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 REQ Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 RSP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 SNP Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for AD; VN1 WB Messages", - "EventCode": "0x30", - "EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD arb but no win; arb request asserted but = not won", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD FlowQ Bypass", - "EventCode": "0x2C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP", - "PerPkg": "1", - "PublicDescription": "Counts cases when the AD flowQ is bypassed (= S0, S1 and S2 indicate which slot was bypassed with S0 having the highest p= riority and S2 the least)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 REQ Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 RSP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 SNP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN0 WB Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 REQ Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 RSP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 SNP Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Not Empty; VN1 WB Messages", - "EventCode": "0x27", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the AD Egress queue is Not = Empty", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 REQ Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 RSP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 SNP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN0 WB Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN1 REQ Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN1 RSP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Inserts; VN1 SNP Messages", - "EventCode": "0x2D", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 REQ Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 RSP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_RSP", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 SNP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_SNP", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN0 WB Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN0_WB", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN1 REQ Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_REQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN1 RSP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_RSP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AD Flow Q Occupancy; VN1 SNP Messages", - "EventCode": "0x1C", - "EventName": "UNC_M3UPI_TxC_AD_FLQ_OCCUPANCY.VN1_SNP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; CHA on VN0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_CHA", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to CHA", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_NON_IDLE", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn0 Snpf", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI0", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI0", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN0", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN0_PEER_UPI1", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN0 Snpf = to peer UPI1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; CHA on VN1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_CHA", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to CHA", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Non Idle cycles on V= N1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_NON_IDLE", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of non-idle = cycles in issuing Vn1 Snpf", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI0 on VN1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI0", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI0", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Number of Snoop Targets; Peer UPI1 on VN1", - "EventCode": "0x3C", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP1_VN1.VN1_PEER_UPI1", - "PerPkg": "1", - "PublicDescription": "Number of snpfanout targets and non-idle cyc= les can be used to calculate average snpfanout latency; Number of VN1 Snpf = to peer UPI1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_NONSNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn0", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_VN2SNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n0 SnpF issued when SnpF pending on Vn1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_NONSNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ t= xn issued when SnpF pending on Vn1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Snoop Arbitration; FlowQ SnpF Won", - "EventCode": "0x3D", - "EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_VN0SNP", - "PerPkg": "1", - "PublicDescription": "Outcome of SnpF pending arbitration; FlowQ V= n1 SnpF issued when SnpF pending on Vn0", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 REQ Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 SNP Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN0 WB Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 REQ Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 SNP Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - Credit Available; = VN1 WB Messages", - "EventCode": "0x34", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request with prior cycle = credit check complete and credit avail", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN0 RE= Q Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN0 SN= P Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN0 WB= Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN1 RE= Q Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN1 SN= P Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - New Message; VN1 WB= Messages", - "EventCode": "0x33", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 REQ = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 RSP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 SNP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN0 WB M= essages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 REQ = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 RSP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 SNP = Messages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD - No Credit; VN1 WB M= essages", - "EventCode": "0x32", - "EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_WB", - "PerPkg": "1", - "PublicDescription": "AD speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AK Flow Q Inserts", - "EventCode": "0x2F", - "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "AK Flow Q Occupancy", - "EventCode": "0x1E", - "EventName": "UNC_M3UPI_TxC_AK_FLQ_OCCUPANCY", - "PerPkg": "1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 NCB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 NCS Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 RSP Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN0 WB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 NCS Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 NCB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 RSP Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Failed ARB for BL; VN1 WB Messages", - "EventCode": "0x35", - "EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL arb but no win; arb request asserted but = not won", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 REQ Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 RSP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 SNP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN0 WB Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 REQ Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 RSP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 SNP Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Not Empty; VN1 WB Messages", - "EventCode": "0x28", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Number of cycles the BL Egress queue is Not = Empty", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 RSP Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 WB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 NCS Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN0 NCB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1 RSP Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1 WB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1_NCB Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Inserts; VN1_NCS Messages", - "EventCode": "0x2E", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB", - "PerPkg": "1", - "PublicDescription": "Counts the number of allocations into the QP= I FlowQ. This can be used in conjunction with the QPI FlowQ Occupancy Accum= ulator event in order to calculate average queue latency. Only a single Fl= owQ queue can be tracked at any given time. It is not possible to filter b= ased on direction or polarity.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 NCB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 NCS Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 RSP Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_RSP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN0 WB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN0_WB", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1_NCS Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1_NCB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1 RSP Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_RSP", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "BL Flow Q Occupancy; VN1 WB Messages", - "EventCode": "0x1D", - "EventName": "UNC_M3UPI_TxC_BL_FLQ_OCCUPANCY.VN1_WB", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN0 NC= S Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN0 WB= Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN1 WB= Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN1 NC= B Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for BL - New Message; VN1 RS= P Messages", - "EventCode": "0x38", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request due to new messag= e arriving on a specific channel (MC/VN)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 NCS Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 RSP Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 0 WB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCS Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 NCB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCS", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x80", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 RSP Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Speculative ARB for AD Failed - No Credit; VN= 1 WB Messages", - "EventCode": "0x37", - "EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_WB", - "PerPkg": "1", - "PublicDescription": "BL speculative arb request asserted due to n= o other channel being active (have a valid entry but don't have credits to = send)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AD - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; AK - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Bounce", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal ADS Used; BL - Credit", - "EventCode": "0x9D", - "EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Horizontal Anti-= Deadlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AD - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; BL - Credit", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce", - "EventCode": "0x9F", - "EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Horizontal E= gress, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= D - Credit", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; A= K - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; B= L - Credit", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; I= V - Bounce", - "EventCode": "0x96", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Full. The egress is used to queue up requests destined for t= he Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AD - Credit", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; AK - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; BL - Credit", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty; IV - Bounce", - "EventCode": "0x97", - "EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Cycles the Transgress buffers in the Common = Mesh Stop are Not-Empty. The egress is used to queue up requests destined = for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce", - "EventCode": "0x95", - "EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Transgress bu= ffers in the Common Mesh Stop The egress is used to queue up requests dest= ined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce", - "EventCode": "0x99", - "EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Horizontal Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce", - "EventCode": "0x94", - "EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Transgress buffers i= n the Common Mesh Stop The egress is used to queue up requests destined fo= r the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= D - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; A= K - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; B= L - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation; I= V - Bounce", - "EventCode": "0x9B", - "EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV_BNC", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Transgress buffer cannot send a transaction ont= o the Horizontal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets using the Vertical Anti-De= adlock Slot, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AD - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; AK - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; BL - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical ADS Used; IV", - "EventCode": "0x9E", - "EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Number of packets bypassing the Vertical Egr= ess, broken down by ring type and CMS Agent.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= D ring. Some example include outbound requests, snoop requests, and snoop = responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= D ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the A= K ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the A= K ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the B= L ring. This is commonly used to send data from the cache to various desti= nations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL = - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 1 destined for the B= L ring. This is commonly used for transferring writeback data to the cache= .", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV", - "EventCode": "0x92", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Full. The Egress is used to queue up requests destined for the Ve= rtical Ring on the Mesh.; Ring transactions from Agent 0 destined for the I= V ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AD ring. Some example include outbound requests, snoop requests, and snoop= responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AD - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; AK - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = BL ring. This is commonly used to send data from the cache to various dest= inations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; BL - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 1 destined for the = BL ring. This is commonly used for transferring writeback data to the cach= e.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= ; IV", - "EventCode": "0x93", - "EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Number of cycles the Common Mesh Stop Egress= was Not Empty. The Egress is used to queue up requests destined for the V= ertical Ring on the Mesh.; Ring transactions from Agent 0 destined for the = IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AD r= ing. Some example include outbound requests, snoop requests, and snoop res= ponses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AD r= ing. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the AK r= ing. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the AK r= ing.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the BL r= ing. This is commonly used to send data from the cache to various destinat= ions.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 1 destined for the BL r= ing. This is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Allocations; IV", - "EventCode": "0x91", - "EventName": "UNC_M3UPI_TxR_VERT_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the Common Mesh S= top Egress. The Egress is used to queue up requests destined for the Verti= cal Ring on the Mesh.; Ring transactions from Agent 0 destined for the IV r= ing. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs; IV", - "EventCode": "0x98", - "EventName": "UNC_M3UPI_TxR_VERT_NACK.IV", - "PerPkg": "1", - "PublicDescription": "Counts number of Egress packets NACK'ed on t= o the Vertical Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AD ring. Some example include outbound requests, snoop requests, and sn= oop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AD ring. This is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he AK ring. This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he AK ring.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he BL ring. This is commonly used to send data from the cache to various d= estinations.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 1 destined for t= he BL ring. This is commonly used for transferring writeback data to the c= ache.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy; IV", - "EventCode": "0x90", - "EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Occupancy event for the Egress buffers in th= e Common Mesh Stop The egress is used to queue up requests destined for th= e Vertical Ring on the Mesh.; Ring transactions from Agent 0 destined for t= he IV ring. This is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AD = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; AK = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; BL = - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation; IV", - "EventCode": "0x9A", - "EventName": "UNC_M3UPI_TxR_VERT_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Counts injection starvation. This starvatio= n is triggered when the CMS Egress cannot send a transaction onto the Verti= cal ring for a long period of time.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN0 REQ Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN0 RSP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN0 SNP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN1 REQ Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN1 RSP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VN1 SNP Messages", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 AD Credits Empty; VNA", - "EventCode": "0x20", - "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPIs on the = AD Ring", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN0 RSP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN0 REQ Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN0 SNP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN1 RSP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN1 REQ Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VN1 SNP Messages", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x40", - "Unit": "M3UPI" - }, - { - "BriefDescription": "UPI0 BL Credits Empty; VNA", - "EventCode": "0x21", - "EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA", - "PerPkg": "1", - "PublicDescription": "No credits available to send to UPI on the B= L Ring (diff between non-SMI and SMI mode)", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Prefetches generated by the flow control queu= e of the M3UPI unit.", - "EventCode": "0x29", - "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", - "PerPkg": "1", - "PublicDescription": "Count cases where flow control queue that si= ts between the Intel(R) Ultra Path Interconnect (UPI) and the mesh spawns a= prefetch to the iMC (Memory Controller)", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Even", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Down and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Even", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AD Ring In Use; Up and Odd", - "EventCode": "0xA6", - "EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AD ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. We really have two rings -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Even", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Down and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Even", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical AK Ring In Use; Up and Odd", - "EventCode": "0xA8", - "EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l AK ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings in -- a clock= wise ring and a counter-clockwise ring. On the left side of the ring, the = UP direction is on the clockwise ring and DN is on the counter-clockwise ri= ng. On the right side of the ring, this is reversed. The first half of th= e CBos are on the left side of the ring, and the 2nd half are on the right = side of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD = is NOT the same ring as CBo 2 UP AD because they are on opposite sides of t= he ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Even", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Down and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Even", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical BL Ring in Use; Up and Odd", - "EventCode": "0xAA", - "EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l BL ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop.We really have two rings -- a clockwi= se ring and a counter-clockwise ring. On the left side of the ring, the UP= direction is on the clockwise ring and DN is on the counter-clockwise ring= . On the right side of the ring, this is reversed. The first half of the = CBos are on the left side of the ring, and the 2nd half are on the right si= de of the ring. In other words (for example), in a 4c part, Cbo 0 UP AD is= NOT the same ring as CBo 2 UP AD because they are on opposite sides of the= ring.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Down", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "Vertical IV Ring in Use; Up", - "EventCode": "0xAC", - "EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Counts the number of cycles that the Vertica= l IV ring is being used at this ring stop. This includes when packets are = passing by and when packets are being sunk, but does not include when packe= ts are being sent from the ring stop. There is only 1 IV ring. Therefore,= if one wants to monitor the Even ring, they should select both UP_EVEN and= DN_EVEN. To monitor the Odd ring, they should select both UP_ODD and DN_O= DD.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; WB on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Data Response (WB) messages on BL. WB is generally used to tran= smit data with coherency. For example, remote reads and writes, or cache t= o cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; NCB on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally u= sed to transmit data without coherency. For example, non-coherent read dat= a returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; REQ on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Home (REQ) messages on AD. REQ is generally used to send reques= ts, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; RSP on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on AD. RSP packets are used to transmit= a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; SNP on AD", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 Credit Used; RSP on BL", - "EventCode": "0x5C", - "EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN0 credit was used on the= DRS message channel. In order for a request to be transferred across UPI,= it must be guaranteed to have a flit buffer on the remote socket to sink i= nto. There are two credit pools, VNA and VN0. VNA is a shared pool used t= o achieve high performance. The VN0 pool has reserved entries for each mes= sage class and is used to prevent deadlock. Requests first attempt to acqu= ire a VNA credit, and then fall back to VN0 if they fail. This counts the = number of times a VN0 credit was used. Note that a single VN0 credit holds= access to potentially multiple flit buffers. For example, a transfer that= uses VNA could use 9 flit buffers and in that case uses 9 credits. A tran= sfer on VN0 will only count a single credit even though it may use multiple= buffers.; Response (RSP) messages on BL. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; WB on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; NCB on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; REQ on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; RSP on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; SNP on AD", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN0 No Credits; RSP on BL", - "EventCode": "0x5E", - "EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN0 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; WB on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Data Response (WB) messages on BL. WB is generally used to trans= mit data with coherency. For example, remote reads and writes, or cache to= cache transfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; NCB on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Non-Coherent Broadcast (NCB) messages on BL. NCB is generally us= ed to transmit data without coherency. For example, non-coherent read data= returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; REQ on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Home (REQ) messages on AD. REQ is generally used to send request= s, request responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; RSP on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on AD. RSP packets are used to transmit = a variety of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; SNP on AD", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 Credit Used; RSP on BL", - "EventCode": "0x5D", - "EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB", - "PerPkg": "1", - "PublicDescription": "Number of times a VN1 credit was used on the= WB message channel. In order for a request to be transferred across QPI, = it must be guaranteed to have a flit buffer on the remote socket to sink in= to. There are two credit pools, VNA and VN1. VNA is a shared pool used to= achieve high performance. The VN1 pool has reserved entries for each mess= age class and is used to prevent deadlock. Requests first attempt to acqui= re a VNA credit, and then fall back to VN1 if they fail. This counts the n= umber of times a VN1 credit was used. Note that a single VN1 credit holds = access to potentially multiple flit buffers. For example, a transfer that = uses VNA could use 9 flit buffers and in that case uses 9 credits. A trans= fer on VN1 will only count a single credit even though it may use multiple = buffers.; Response (RSP) messages on BL. RSP packets are used to transmit a= variety of protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; WB on BL", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Data Response (WB) messages on BL. WB is generally used to transmit data w= ith coherency. For example, remote reads and writes, or cache to cache tra= nsfers will transmit their data using WB.", - "UMask": "0x10", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; NCB on BL", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Non-Coherent Broadcast (NCB) messages on BL. NCB is generally used to tran= smit data without coherency. For example, non-coherent read data returns.", - "UMask": "0x20", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; REQ on AD", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Home (REQ) messages on AD. REQ is generally used to send requests, request= responses, and snoop responses.", - "UMask": "0x1", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; RSP on AD", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on AD. RSP packets are used to transmit a variety = of protocol flits including grants and completions (CMP).", - "UMask": "0x4", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; SNP on AD", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Snoops (SNP) messages on AD. SNP is used for outgoing snoops.", - "UMask": "0x2", - "Unit": "M3UPI" - }, - { - "BriefDescription": "VN1 No Credits; RSP on BL", - "EventCode": "0x5F", - "EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB", - "PerPkg": "1", - "PublicDescription": "Number of Cycles there were no VN1 Credits; = Response (RSP) messages on BL. RSP packets are used to transmit a variety o= f protocol flits including grants and completions (CMP).", - "UMask": "0x8", - "Unit": "M3UPI" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_M2M_TxC_BL.DRS_UPI", - "Deprecated": "1", - "EventCode": "0x40", - "EventName": "UNC_NoUnit_TxC_BL.DRS_UPI", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Clocks of the Intel(R) Ultra Path Interconnec= t (UPI)", - "EventCode": "0x1", - "EventName": "UNC_UPI_CLOCKTICKS", - "PerPkg": "1", - "PublicDescription": "Counts clockticks of the fixed frequency clo= ck controlling the Intel(R) Ultra Path Interconnect (UPI). This clock runs= at1/8th the 'GT/s' speed of the UPI link. For example, a 9.6GT/s link w= ill have a fixed Frequency of 1.2 Ghz.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Data Response packets that go direct to core", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", - "PerPkg": "1", - "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to core bypassing the CHA.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_DIRECT_ATTEMPTS.D2U", - "Deprecated": "1", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Data Response packets that go direct to Intel= (R) UPI", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2U", - "PerPkg": "1", - "PublicDescription": "Counts Data Response (DRS) packets that atte= mpted to go direct to Intel(R) Ultra Path Interconnect (UPI) bypassing the = CHA .", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", - "EventCode": "0x18", - "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles Intel(R) UPI is in L1 power mode (shut= down)", - "EventCode": "0x21", - "EventName": "UNC_UPI_L1_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the Intel(R) Ultra Path I= nterconnect (UPI) is in L1 power mode. L1 is a mode that totally shuts dow= n the UPI link. Link power states are per link and per direction, so for e= xample the Tx direction could be in one state while Rx was in another, this= event only coutns when both links are shutdown.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", - "EventCode": "0x14", - "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED", - "EventCode": "0x16", - "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THR= ESH", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THR= ESH", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", - "EventCode": "0x15", - "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1", - "EventCode": "0x20", - "EventName": "UNC_UPI_PHY_INIT_CYCLES", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "L1 Req Nack", - "EventCode": "0x23", - "EventName": "UNC_UPI_POWER_L1_NACK", - "PerPkg": "1", - "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqNAck. When the UPI links would like to change power state, t= he Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wi= th an Ack, the power mode will change. If it replies with NAck, no change = will take place. This can be filtered based on Rx and Tx. An Rx LinkReqNA= ck refers to receiving an NAck (meaning this agent's Tx originally requeste= d the power change). A Tx LinkReqNAck refers to sending this command (mean= ing the peer agent's Tx originally requested the power change and this agen= t accepted it).", - "Unit": "UPI LL" - }, - { - "BriefDescription": "L1 Req (same as L1 Ack).", - "EventCode": "0x22", - "EventName": "UNC_UPI_POWER_L1_REQ", - "PerPkg": "1", - "PublicDescription": "Counts the number of times a link sends/rece= ives a LinkReqAck. When the UPI links would like to change power state, th= e Tx side initiates a request to the Rx side requesting to change states. = This requests can either be accepted or denied. If the Rx side replies wit= h an Ack, the power mode will change. If it replies with NAck, no change w= ill take place. This can be filtered based on Rx and Tx. An Rx LinkReqAck= refers to receiving an Ack (meaning this agent's Tx originally requested t= he power change). A Tx LinkReqAck refers to sending this command (meaning = the peer agent's Tx originally requested the power change and this agent ac= cepted it).", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", - "EventCode": "0x46", - "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles the Rx of the Intel(R) UPI is in L0p p= ower mode", - "EventCode": "0x25", - "EventName": "UNC_UPI_RxL0P_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the receive side (Rx) of = the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a mo= de where we disable 60% of the UPI lanes, decreasing our bandwidth in order= to save power.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0. Receive side.", - "EventCode": "0x24", - "EventName": "UNC_UPI_RxL0_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Bypass", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Non-Co= herent Standard", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", - "PerPkg": "1", - "PublicDescription": "REQ Message Class", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Reques= t Opcode", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC", - "PerPkg": "1", - "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", - "UMask": "0x108", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Conflict", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT", - "PerPkg": "1", - "UMask": "0x1aa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Invalid", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI", - "PerPkg": "1", - "UMask": "0x12a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10c", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Respon= se - No Data", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0x10a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Snoop", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", - "PerPkg": "1", - "PublicDescription": "SNP Message Class", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Snoop = Opcode", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC", - "PerPkg": "1", - "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", - "UMask": "0x109", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Receive path of a UPI Port; Writeb= ack", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10d", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot0 RxQ buffer (Receive Queue) and passed directly to t= he Egress. This is a latency optimization, and should generally be the com= mon case. If this value is less than the number of FLITs transferred, it i= mplies that there was queueing getting onto the ring, and thus the transact= ions saw higher latency.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot1 RxQ buffer (Receive Queue) and passed directly acr= oss the BGF and into the Egress. This is a latency optimization, and shoul= d generally be the common case. If this value is less than the number of F= LITs transferred, it implies that there was queueing getting onto the ring,= and thus the transactions saw higher latency.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs received which bypassed the Slot0 Recei= ve Buffer", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the slot2 RxQ buffer (Receive Queue) and passed directly to = the Egress. This is a latency optimization, and should generally be the co= mmon case. If this value is less than the number of FLITs transferred, it = implies that there was queueing getting onto the ring, and thus the transac= tions saw higher latency.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "CRC Errors Detected", - "EventCode": "0xB", - "EventName": "UNC_UPI_RxL_CRC_ERRORS", - "PerPkg": "1", - "PublicDescription": "Number of CRC errors detected in the UPI Age= nt. Each UPI flit incorporates 8 bits of CRC for error detection. This co= unts the number of flits where the CRC was able to detect an error. After = an error has been detected, the UPI agent will send a request to the transm= itting socket to resend the flit (as well as any flits that came after it).= ", - "Unit": "UPI LL" - }, - { - "BriefDescription": "LLR Requests Sent", - "EventCode": "0x8", - "EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT", - "PerPkg": "1", - "PublicDescription": "Number of LLR Requests were transmitted. Th= is should generally be <=3D the number of CRC errors detected. If multiple= errors are detected before the Rx side receives a LLC_REQ_ACK from the Tx = side, there is no need to send more LLR_REQ_NACKs.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VN0 Credit Consumed", - "EventCode": "0x39", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN0 c= redit was consumed (i.e. message uses a VN0 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VN1 Credit Consumed", - "EventCode": "0x3A", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VN1 c= redit was consumed (i.e. message uses a VN1 credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VNA Credit Consumed", - "EventCode": "0x38", - "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA", - "PerPkg": "1", - "PublicDescription": "Counts the number of times that an RxQ VNA c= redit was consumed (i.e. message uses a VNA credit for the Rx Buffer). Thi= s includes packets that went through the RxQ and those that were bypasssed.= ", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid data FLITs received from any slot", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Counts valid data FLITs (80 bit FLow contro= l unITs: 64bits of data) received from any of the 3 Intel(R) Ultra Path Int= erconnect (UPI) Receive Queue slots on this UPI unit.", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Null FLITs received from any slot", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", - "PerPkg": "1", - "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) received from any of the 3 Intel(R) Ultra Path Interconnect (UPI) Receive= Queue slots on this UPI unit.", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Data", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Idle", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; LLCRD Not Empty", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; LLCTRL", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Protocol header and credit FLITs received fro= m any slot", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Counts protocol header and credit FLITs (80= bit FLow control unITs) received from any of the 3 UPI slots on this UPI u= nit.", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.ALL_NULL", - "Deprecated": "1", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.NULL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Protocol Header", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_FLITS.PROTHDR", - "Deprecated": "1", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.PROT_HDR", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Slot 0", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Slot 1", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Received; Slot 2", - "EventCode": "0x3", - "EventName": "UNC_UPI_RxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.NCB", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.NCS", - "PerPkg": "1", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.REQ", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.REQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.RSP", - "PerPkg": "1", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.SNP", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.SNP", - "PerPkg": "1", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_RxL_BASIC_HDR_MATCH.WB", - "Deprecated": "1", - "EventCode": "0x5", - "EventName": "UNC_UPI_RxL_HDR_MATCH.WB", - "PerPkg": "1", - "UMask": "0xb", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations; Slot 0", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations; Slot 1", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Flit Buffer Allocations; Slot 2", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Rx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = RxQ and pass directly to the ring interface. If things back up getting tra= nsmitted onto the ring, however, it may need to allocate into this buffer, = thus increasing the latency. This event can be used in conjunction with th= e Flit Buffer Occupancy event in order to calculate the average flit buffer= lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets; Slot 0", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets; Slot 1", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "RxQ Occupancy - All Packets; Slot 2", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of elements in the UP= I RxQ in each cycle. Generally, when data is transmitted across UPI, it wi= ll bypass the RxQ and pass directly to the ring interface. If things back = up getting transmitted onto the ring, however, it may need to allocate into= this buffer, thus increasing the latency. This event can be used in conju= nction with the Flit Buffer Not Empty event to calculate average occupancy,= or with the Flit Buffer Allocations event to track average lifetime.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", - "EventCode": "0x33", - "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", - "EventCode": "0x2A", - "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in which the Tx of the Intel(R) Ultra = Path Interconnect (UPI) is in L0p power mode", - "EventCode": "0x27", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Counts cycles when the transmit side (Tx) of= the Intel(R) Ultra Path Interconnect(UPI) is in L0p power mode. L0p is a m= ode where we disable 60% of the UPI lanes, decreasing our bandwidth in orde= r to save power.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", - "EventCode": "0x28", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", - "EventCode": "0x29", - "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Cycles in L0. Transmit side.", - "EventCode": "0x26", - "EventName": "UNC_UPI_TxL0_POWER_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of UPI qfclk cycles spent in L0 power= mode in the Link Layer. L0 is the default mode which provides the highest= performance with the most power. Use edge detect to count the number of i= nstances that the link entered L0. Link power states are per link and per = direction, so for example the Tx direction could be in one state while Rx w= as in another. The phy layer sometimes leaves L0 for training, which will= not be captured by this event.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Bypass", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCB", - "UMask": "0x10e", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Non-C= oherent Standard", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - NCS", - "UMask": "0x10f", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", - "PerPkg": "1", - "PublicDescription": "REQ Message Class", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Reque= st Opcode", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC", - "PerPkg": "1", - "PublicDescription": "Match REQ Opcodes - Specified in Umask[7:4]", - "UMask": "0x108", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Conflict", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT", - "PerPkg": "1", - "UMask": "0x1aa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Invalid", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI", - "PerPkg": "1", - "UMask": "0x12a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10c", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Respo= nse - No Data", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class - RSP", - "UMask": "0x10a", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= ", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", - "PerPkg": "1", - "PublicDescription": "SNP Message Class", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Snoop= Opcode", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC", - "PerPkg": "1", - "PublicDescription": "Match SNP Opcodes - Specified in Umask[7:4]", - "UMask": "0x109", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0xd", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Matches on Transmit path of a UPI Port; Write= back", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC", - "PerPkg": "1", - "PublicDescription": "Match Message Class -WB", - "UMask": "0x10d", - "Unit": "UPI LL" - }, - { - "BriefDescription": "FLITs that bypassed the TxL Buffer", - "EventCode": "0x41", - "EventName": "UNC_UPI_TxL_BYPASSED", - "PerPkg": "1", - "PublicDescription": "Counts incoming FLITs (FLow control unITs) w= hich bypassed the TxL(transmit) FLIT buffer and pass directly out the UPI L= ink. Generally, when data is transmitted across the Intel(R) Ultra Path Int= erconnect (UPI), it will bypass the TxQ and pass directly to the link. How= ever, the TxQ will be used in L0p (Low Power) mode and (Link Layer Retry) L= LR mode, increasing latency to transfer out to the link.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid data FLITs transmitted via any slot", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", - "PerPkg": "1", - "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Null FLITs transmitted from any slot", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", - "PerPkg": "1", - "PublicDescription": "Counts null FLITs (80 bit FLow control unITs= ) transmitted via any of the 3 Intel(R) Ulra Path Interconnect (UPI) slots = on this UPI unit.", - "UMask": "0x27", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Data", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.DATA", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Data Flits (which consume all slots), but how much to count= is based on Slot0-2 mask, so count can be 0-3 depending on which slots are= enabled for counting..", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Idle FLITs transmitted", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.IDLE", - "PerPkg": "1", - "PublicDescription": "Counts when the Intel Ultra Path Interconnec= t(UPI) transmits an idle FLIT(80 bit FLow control unITs). Every UPI cycle = must be sending either data FLITs, protocol/credit FLITs or idle FLITs.", - "UMask": "0x47", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; LLCRD Not Empty", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.LLCRD", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables counting of LLCRD (with non-zero payload). This only appl= ies to slot 2 since LLCRD is only allowed in slot 2", - "UMask": "0x10", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; LLCTRL", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Equivalent to an idle packet. Enables counting of slot 0 LLCTRL = messages.", - "UMask": "0x40", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Protocol header and credit FLITs transmitted = across any slot", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", - "PerPkg": "1", - "PublicDescription": "Counts protocol header and credit FLITs (80 = bit FLow control unITs) transmitted across any of the 3 UPI (Ultra Path Int= erconnect) slots on this UPI unit.", - "UMask": "0x97", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.ALL_NULL", - "Deprecated": "1", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.NULL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Protocol Header", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Enables count of protocol headers in slot 0,1,2 (depending on slo= t uMask bits)", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_FLITS.PROTHDR", - "Deprecated": "1", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.PROT_HDR", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Slot 0", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.SLOT0", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 0 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Slot 1", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.SLOT1", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 1 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x2", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Valid Flits Sent; Slot 2", - "EventCode": "0x2", - "EventName": "UNC_UPI_TxL_FLITS.SLOT2", - "PerPkg": "1", - "PublicDescription": "Shows legal flit time (hides impact of L0p a= nd L0c).; Count Slot 2 - Other mask bits determine types of headers to coun= t.", - "UMask": "0x4", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.DATA_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.DUAL_SLOT_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.LOC", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.NCB", - "PerPkg": "1", - "UMask": "0xe", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.NCS", - "PerPkg": "1", - "UMask": "0xf", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.NON_DATA_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.REM", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.REQ", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.REQ", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_DATA", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_NODATA", - "PerPkg": "1", - "UMask": "0xa", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.SGL_SLOT_HDR", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.SNP", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.SNP", - "PerPkg": "1", - "UMask": "0x9", - "Unit": "UPI LL" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_UPI_TxL_BASIC_HDR_MATCH.WB", - "Deprecated": "1", - "EventCode": "0x4", - "EventName": "UNC_UPI_TxL_HDR_MATCH.WB", - "PerPkg": "1", - "UMask": "0xc", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Allocations", - "EventCode": "0x40", - "EventName": "UNC_UPI_TxL_INSERTS", - "PerPkg": "1", - "PublicDescription": "Number of allocations into the UPI Tx Flit B= uffer. Generally, when data is transmitted across UPI, it will bypass the = TxQ and pass directly to the link. However, the TxQ will be used with L0p = and when LLR occurs, increasing latency to transfer out to the link. This = event can be used in conjunction with the Flit Buffer Occupancy event in or= der to calculate the average flit buffer lifetime.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Tx Flit Buffer Occupancy", - "EventCode": "0x42", - "EventName": "UNC_UPI_TxL_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Accumulates the number of flits in the TxQ. = Generally, when data is transmitted across UPI, it will bypass the TxQ and= pass directly to the link. However, the TxQ will be used with L0p and whe= n LLR occurs, increasing latency to transfer out to the link. This can be u= sed with the cycles not empty event to track average occupancy, or the allo= cations event to track average lifetime in the TxQ.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", - "EventCode": "0x45", - "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01", - "PerPkg": "1", - "Unit": "UPI LL" - }, - { - "BriefDescription": "VNA Credits Pending Return - Occupancy", - "EventCode": "0x44", - "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Number of VNA credits in the Rx side that ar= e waitng to be returned back across the link.", - "Unit": "UPI LL" - }, - { - "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", - "EventCode": "0xff", - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.INT_PRIO", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received; IPI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Inter Processor Interrupts", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received; MSI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.; Message Signaled Interrupts - interrupts sent by devi= ces (including PCIe via IOxAPIC) (Socket Mode only)", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received; VLW", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", - "PerPkg": "1", - "PublicDescription": "Virtual Logical Wire (legacy) message were r= eceived from Uncore.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "IDI Lock/SplitLock Cycles", - "EventCode": "0x44", - "EventName": "UNC_U_LOCK_CYCLES", - "PerPkg": "1", - "PublicDescription": "Number of times an IDI Lock/SplitLock sequen= ce was started", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "PHOLD cycles.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDRAND", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDSEED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "Number outstanding register requests within = message channel tracker", - "Unit": "UBOX" - }, - { - "BriefDescription": "UPI interconnect send bandwidth for payload. = Derived from unc_upi_txl_flits.all_data", - "EventCode": "0x2", - "EventName": "UPI_DATA_BANDWIDTH_TX", - "PerPkg": "1", - "PublicDescription": "Counts valid data FLITs (80 bit FLow control= unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra P= ath Interconnect (UPI) slots on this UPI unit.", - "ScaleUnit": "7.11E-06Bytes", - "UMask": "0xf", - "Unit": "UPI LL" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48FD3C77B6E for ; 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Thu, 13 Apr 2023 06:32:47 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:48 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-21-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 20/21] perf vendor events intel: Fix uncore topics for snowridgex From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove 'uncore-other' topic classification, move to cache, interconnect and io. Signed-off-by: Ian Rogers --- .../arch/x86/snowridgex/uncore-cache.json | 7100 +++++ .../x86/snowridgex/uncore-interconnect.json | 6016 +++++ .../arch/x86/snowridgex/uncore-io.json | 8944 +++++++ .../arch/x86/snowridgex/uncore-other.json | 22056 ---------------- 4 files changed, 22060 insertions(+), 22056 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.= json create mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-interc= onnect.json create mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-io.json delete mode 100644 tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.= json diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.json b/= tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.json new file mode 100644 index 000000000000..a68a5bb05c22 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-cache.json @@ -0,0 +1,7100 @@ +[ + { + "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.= ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_READ", + "Filter": "config1=3D0x40040e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts= .ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.MMIO_WRITE", + "Filter": "config1=3D0x40041e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_MISSES.UNCACHEABLE", + "Filter": "config1=3D0x40e33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_FULL", + "Filter": "config1=3D0x41833", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "ScaleUnit": "64Bytes", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_cha_tor_inserts.ia_miss", + "EventCode": "0x35", + "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", + "Filter": "config1=3D0x41a33", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "ScaleUnit": "64Bytes", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x88", + "EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS 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Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x8D", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x8D", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x8D", + "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8E", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8F", + "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken= ", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Intermediate bypass Take= n : Counts the number of times when the CHA was able to bypass HA pipe on t= he way to iMC. This is a latency optimization for situations when there is= light loadings on the memory subsystem. This can be filtered by when the = bypass was taken and when it was not. : Filter for transactions that succee= ded in taking the intermediate bypass.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Not Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Not Taken : Counts the n= umber of times when the CHA was able to bypass HA pipe on the way to iMC. = This is a latency optimization for situations when there is light loadings = on the memory subsystem. This can be filtered by when the bypass was taken= and when it was not. : Filter for transactions that could not take the byp= ass, and issues a read to memory. Note that transactions that did not take = the bypass but did not issue read to memory will not be counted.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Bypass : Taken", + "EventCode": "0x57", + "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Bypass : Taken : Counts the numbe= r of times when the CHA was able to bypass HA pipe on the way to iMC. This= is a latency optimization for situations when there is light loadings on t= he memory subsystem. This can be filtered by when the bypass was taken and= when it was not. : Filter for transactions that succeeded in taking the fu= ll bypass.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Uncore cache clock ticks", + "EventName": "UNC_CHA_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_CHA_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Mul= tiple Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Mu= ltiple Snoops : Counts the number of transactions that trigger a configurab= le number of cross snoops. Cores are snooped if the transaction looks up t= he cache and determines that it is necessary based on the operation type an= d what CoreValid bits are set. For example, if 2 CV bits are set on a data= read, the cores must have the data in S state so it is not necessary to sn= oop them. However, if only 1 CV bit is set the core my have modified the d= ata. If the transaction was an RFO, it would need to invalidate the lines.= This event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf2", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop = : Counts the number of transactions that trigger a configurable number of c= ross snoops. Cores are snooped if the transaction looks up the cache and d= etermines that it is necessary based on the operation type and what CoreVal= id bits are set. For example, if 2 CV bits are set on a data read, the cor= es must have the data in S state so it is not necessary to snoop them. How= ever, if only 1 CV bit is set the core my have modified the data. If the t= ransaction was an RFO, it would need to invalidate the lines. This event c= an be filtered based on who triggered the initial snoop(s).", + "UMask": "0xf1", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requ= ests", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Core Req= uests : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x42", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Core Reques= ts", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Core Reque= sts : Counts the number of transactions that trigger a configurable number = of cross snoops. Cores are snooped if the transaction looks up the cache a= nd determines that it is necessary based on the operation type and what Cor= eValid bits are set. For example, if 2 CV bits are set on a data read, the= cores must have the data in S state so it is not necessary to snoop them. = However, if only 1 CV bit is set the core my have modified the data. If t= he transaction was an RFO, it would need to invalidate the lines. This eve= nt can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x41", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple Eviction= : Counts the number of transactions that trigger a configurable number of = cross snoops. Cores are snooped if the transaction looks up the cache and = determines that it is necessary based on the operation type and what CoreVa= lid bits are set. For example, if 2 CV bits are set on a data read, the co= res must have the data in S state so it is not necessary to snoop them. Ho= wever, if only 1 CV bit is set the core my have modified the data. If the = transaction was an RFO, it would need to invalidate the lines. This event = can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x82", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single Eviction", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single Eviction := Counts the number of transactions that trigger a configurable number of cr= oss snoops. Cores are snooped if the transaction looks up the cache and de= termines that it is necessary based on the operation type and what CoreVali= d bits are set. For example, if 2 CV bits are set on a data read, the core= s must have the data in S state so it is not necessary to snoop them. Howe= ver, if only 1 CV bit is set the core my have modified the data. If the tr= ansaction was an RFO, it would need to invalidate the lines. This event ca= n be filtered based on who triggered the initial snoop(s).", + "UMask": "0x81", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Multiple External = Snoops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Multiple External= Snoops : Counts the number of transactions that trigger a configurable num= ber of cross snoops. Cores are snooped if the transaction looks up the cac= he and determines that it is necessary based on the operation type and what= CoreValid bits are set. For example, if 2 CV bits are set on a data read,= the cores must have the data in S state so it is not necessary to snoop th= em. However, if only 1 CV bit is set the core my have modified the data. = If the transaction was an RFO, it would need to invalidate the lines. This= event can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x22", + "Unit": "CHA" + }, + { + "BriefDescription": "Core Cross Snoops Issued : Single External Sn= oops", + "EventCode": "0x33", + "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", + "PerPkg": "1", + "PublicDescription": "Core Cross Snoops Issued : Single External S= noops : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", + "UMask": "0x21", + "Unit": "CHA" + }, + { + "BriefDescription": "Counter 0 Occupancy", + "EventCode": "0x1F", + "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Counter 0 Occupancy : Since occupancy counts= can only be captured in the Cbo's 0 counter, this event allows a user to c= apture occupancy related information by filtering the Cb0 occupancy count c= aptured in Counter 0. The filtering available is found in the control reg= ister - threshold, invert and edge detect. E.g. setting threshold to 1 ca= n effectively monitor how many cycles the monitored queue has an entry.", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6E", + "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Direct GO", + "EventCode": "0x6D", + "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xAF", + "EventName": "UNC_CHA_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xBA", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xBA", + "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xB6", + "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xBB", + "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xB7", + "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xB8", + "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xB9", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xB9", + "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "HA to iMC Reads Issued : ISOCH", + "EventCode": "0x59", + "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", + "PerPkg": "1", + "PublicDescription": "HA to iMC Reads Issued : ISOCH : Count of th= e number of reads issued to any of the memory controller channels. This ca= n be filtered by the priority of the reads.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Lin= e Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", + "PerPkg": "1", + "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to any of the memory controller channels.= ", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Fu= ll Line", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH F= ull Line : Counts the total number of full line writes issued from the HA i= nto the memory controller.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial = Non-ISOCH", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : Partial= Non-ISOCH : Counts the total number of full line writes issued from the HA= into the memory controller.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Pa= rtial", + "EventCode": "0x5B", + "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", + "PerPkg": "1", + "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH P= artial : Counts the total number of full line writes issued from the HA int= o the memory controller.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ALL", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", + "UMask": "0x1fffff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Any local or remote transaction to the LLC, includi= ng prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE", + "PerPkg": "1", + "UMask": "0x1bd0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Code Reads", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Code Reads : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1bd0ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : CRd Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : CRd Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote CRd transactions to the LLC. This = includes CRd prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Code Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Code Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", + "UMask": "0x1bd001", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Local request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Local request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Any local transaction to the LLC, including prefe= tches from the Core", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", + "PerPkg": "1", + "UMask": "0x1bc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1bc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL", + "PerPkg": "1", + "UMask": "0x1fc1ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Request Filter : C= ounts the number of times the LLC was accessed - this includes code, data, = prefetches and hints coming from L2. This has numerous filters available. = Note the non-standard filtering equation. This event will count requests = that lookup the cache multiple times with multiple increments. One must AL= WAYS select a state or states (in the umask field) to match. Otherwise, th= e event will count nothing. : Read transactions.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Data Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Data Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", + "UMask": "0x1bc101", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DMND_READ_LOCAL", + "PerPkg": "1", + "UMask": "0x841ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : E State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Exclusive State", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : F State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : F State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Forward State", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", + "UMask": "0x1a44ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Flush or Invalidate Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Flush or Invalidate Filter := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : I State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.I", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : I State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Miss", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Transactions homed locally Fi= lter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Transactions homed locally F= ilter : Counts the number of times the LLC was accessed - this includes cod= e, data, prefetches and hints coming from L2. This has numerous filters av= ailable. Note the non-standard filtering equation. This event will count = requests that lookup the cache multiple times with multiple increments. On= e must ALWAYS select a state or states (in the umask field) to match. Othe= rwise, the event will count nothing. : Transaction whose address resides in= the local MC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : M State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.M", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : M State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Modified State", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : All Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : All Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1fe001", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Write Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Writeback transactions to the LLC This includes = all write transactions -- both Cacheable and UC.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Reads", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Reads : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS select a state= or states (in the umask field) to match. Otherwise, the event will count = nothing.", + "UMask": "0x1bd9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Locally HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Locally HOMed : Counts the number of times the LLC was accessed - this= includes code, data, prefetches and hints coming from L2. This has numero= us filters available. Note the non-standard filtering equation. This even= t will count requests that lookup the cache multiple times with multiple in= crements. One must ALWAYS select a state or states (in the umask field) to= match. Otherwise, the event will count nothing.", + "UMask": "0x9d9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Remotely HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_REM_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Remotely HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", + "UMask": "0x11d9ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Read Misses : Counts the num= ber of times the LLC was accessed - this includes code, data, prefetches an= d hints coming from L2. This has numerous filters available. Note the non= -standard filtering equation. This event will count requests that lookup t= he cache multiple times with multiple increments. One must ALWAYS select a= state or states (in the umask field) to match. Otherwise, the event will = count nothing.", + "UMask": "0x1bd901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Locally HOMed Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Locally HOMed Read Misses : = Counts the number of times the LLC was accessed - this includes code, data,= prefetches and hints coming from L2. This has numerous filters available.= Note the non-standard filtering equation. This event will count requests= that lookup the cache multiple times with multiple increments. One must A= LWAYS select a state or states (in the umask field) to match. Otherwise, t= he event will count nothing.", + "UMask": "0xbd901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely HOMed Read Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_REM_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely HOMed Read Misses := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", + "UMask": "0x13d901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely requested Read or Sn= oop Misses that are Remotely HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_OR_SNOOP_REMOTE_MISS_REM_HOM= ", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely requested Read or S= noop Misses that are Remotely HOMed : Counts the number of times the LLC wa= s accessed - this includes code, data, prefetches and hints coming from L2.= This has numerous filters available. Note the non-standard filtering equ= ation. This event will count requests that lookup the cache multiple times= with multiple increments. One must ALWAYS select a state or states (in th= e umask field) to match. Otherwise, the event will count nothing.", + "UMask": "0x161901", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Remotely Requested Reads that= are Locally HOMed", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_REMOTE_LOC_HOM", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Remotely Requested Reads tha= t are Locally HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", + "UMask": "0xa19ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Reads that Hit the Snoop Filt= er", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.READ_SF_HIT", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Reads that Hit the Snoop Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing.", + "UMask": "0x1bd90e", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Requests", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", + "UMask": "0x1bc8ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Request Filter", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote RFO transactions to the LLC. This = includes RFO prefetch.", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : RFO Misses", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_MISS", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : RFO Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", + "UMask": "0x1bc801", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.RFO_LOCAL", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.RFO_PREF_LOCAL", + "PerPkg": "1", + "UMask": "0x888ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : S State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Shared State", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - E State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_E", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - E State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Exclusive State", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - H State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_H", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - H State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit HitMe State", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : SnoopFilter - S State", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.SF_S", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : SnoopFilter - S State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Shared State", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cache Lookups : Filters Requests for those th= at write info into the cache", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", + "PerPkg": "1", + "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", + "UMask": "0x1a42ff", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated.", + "Deprecated": "1", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL", + "PerPkg": "1", + "UMask": "0x842ff", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : All Lines Victimized", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.ALL", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : All Lines Victimized : Co= unts the number of lines that were victimized on a fill. This can be filte= red by the state that the line was in.", + "UMask": "0xf", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in E state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in E state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - All Lines", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - All Lines : Count= s the number of lines that were victimized on a fill. This can be filtered= by the state that the line was in.", + "UMask": "0x200f", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in E State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in E State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2002", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in M State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in M State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2001", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local Only", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local Only : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Local - Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Local - Lines in S State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", + "UMask": "0x2004", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in M state", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in M state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Lines Victimized : Lines in S State", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "PublicDescription": "Lines Victimized : Lines in S State : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Miss", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Miss : Miscellaneous= events in the Cbo.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : CV0 Prefetch Victim", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : CV0 Prefetch Victim : Miscellaneo= us events in the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Number of times that an RFO hit in S state.", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RFO_HIT_S", + "PerPkg": "1", + "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Silent Snoop Eviction", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Silent Snoop Eviction : Miscellan= eous events in the Cbo. : Counts the number of times when a Snoop hit in FS= E states and triggered a silent eviction. This is useful because this info= rmation is lost in the PRE encodings.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cbo Misc : Write Combining Aliasing", + "EventCode": "0x39", + "EventName": "UNC_CHA_MISC.WC_ALIASING", + "PerPkg": "1", + "PublicDescription": "Cbo Misc : Write Combining Aliasing : Miscel= laneous events in the Cbo. : Counts the number of times that a USWC write (= WCIL(F)) transaction hit in the LLC in M state, triggering a WBMtoI followe= d by the USWC write. This occurs when there is WC aliasing.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xE6", + "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xE6", + "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ADEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.AKEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ALLRSFWAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.BLEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.FSF_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLOWSNP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLWAYRSV", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_PAMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_WAYMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.HACREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IDX_INPIPE", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IPQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IRQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ISMQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.IVEGRCREDIT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.LLC_WAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.NOTALLOWSNOOP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ONE_FSF_VIC", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.ONE_RSP_CON", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.PTL_INPIPE", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.RMW_SETMATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.RRQ_SETMATCH_VICP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.SETMATCHENTRYWSCT", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.SF_WAYS_RES", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.TOPA_MATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.TORID_MATCH_GO_P", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_REQ", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_RSP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCB", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCS", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_RSP", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_WB", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "Pipe Rejects", + "EventCode": "0x42", + "EventName": "UNC_CHA_PIPE_REJECT.WAY_MATCH", + "PerPkg": "1", + "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC0 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC10", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC10", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC10 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 10 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC11", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC11", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC11 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 11 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC12", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC12", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC12 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 12 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC13", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC13", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC13 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 13 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC2 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC3 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC4 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC5 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC6", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC6", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC6 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 6 only.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC7", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC7", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC7 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 7 only.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC8", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC8", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC8 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 8 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC9", + "EventCode": "0x58", + "EventName": "UNC_CHA_READ_NO_CREDITS.MC9", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC9 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 9 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and remote INVI= TOE requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE", + "PerPkg": "1", + "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", + "UMask": "0x30", + "Unit": "CHA" + }, + { + "BriefDescription": "Local read requests that miss the SF/LLC and = remote read requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS", + "PerPkg": "1", + "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", + "UMask": "0x3", + "Unit": "CHA" + }, + { + "BriefDescription": "Local write requests that miss the SF/LLC and= remote write requests sent to the CHA's home agent", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES", + "PerPkg": "1", + "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", + "UMask": "0xc", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xAC", + "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xAA", + "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xAD", + "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xAB", + "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_CHA_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected= ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : IRQ Rejecte= d : Counts number of allocations per cycle into the specified Ingress queue= .", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Allocations : PRQ", + "EventCode": "0x13", + "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x18", + "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C or SF Way", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : L= LC or SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x19", + "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request", + "EventCode": "0x24", + "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2C", + "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : ANY0", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Rejects - Set 1 : HA", + "EventCode": "0x25", + "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Rejects - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : ANY0", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "ISMQ Retries - Set 1 : HA", + "EventCode": "0x2D", + "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "ISMQ Retries - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Ingress (from CMS) Occupancy : IRQ", + "EventCode": "0x11", + "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Occupancy : IRQ : Counts = number of entries in the specified Ingress queue in each cycle.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD REQ on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : AD RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI AK Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject AK ring me= ssage", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCB on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL NCS on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for generat= ing a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : BL WB on VN0 : Retry= Queue Inserts of Transactions that were already in another Retry Q (sub-ev= ents encode the reason for the next reject) : No BL VN0 credit for generati= ng a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request", + "EventCode": "0x2E", + "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 0 : Non UPI IV Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject IV ring me= ssage", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Allow Snoop", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Allow Snoop : Retry = Queue Inserts of Transactions that were already in another Retry Q (sub-eve= nts encode the reason for the next reject)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : ANY0", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : ANY0 : Retry Queue I= nserts of Transactions that were already in another Retry Q (sub-events enc= ode the reason for the next reject) : Any condition listed in the Other0 Re= ject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : HA", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : HA : Retry Queue Ins= erts of Transactions that were already in another Retry Q (sub-events encod= e the reason for the next reject)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC OR SF Way : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Way conflict with another re= quest that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : LLC Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : LLC Victim : Retry Q= ueue Inserts of Transactions that were already in another Retry Q (sub-even= ts encode the reason for the next reject)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : PhyAddr Match", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : PhyAddr Match : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Address match with an outsta= nding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : SF Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : SF Victim : Retry Qu= eue Inserts of Transactions that were already in another Retry Q (sub-event= s encode the reason for the next reject) : Requests did not generate Snoop = filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Other Retries - Set 1 : Victim", + "EventCode": "0x2F", + "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Other Retries - Set 1 : Victim : Retry Queue= Inserts of Transactions that were already in another Retry Q (sub-events e= ncode the reason for the next reject)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", + "EventCode": "0x20", + "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the PRQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA= ", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", + "EventCode": "0x21", + "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD REQ on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a request", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : AD RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a response", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Re= quest", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI AK R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject AK ring message", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCB on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCB", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL NCS on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCS", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0= ", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for generating a response", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : BL WB on VN0= : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)= : No BL VN0 credit for generating a writeback", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Re= quest", + "EventCode": "0x2A", + "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 0 : Non UPI IV R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject IV ring message", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Allow Snoop = : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : ANY0", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : ANY0 : REQUE= STQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : Any c= ondition listed in the WBQ0 Reject counter was true", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : HA", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : HA : REQUEST= Q includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way= ", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC OR SF Wa= y : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Way conflict with another request that caused the reject", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : LLC Victim := REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match= ", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : PhyAddr Matc= h : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Address match with an outstanding request that was rejected.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : SF Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : SF Victim : = REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : = Requests did not generate Snoop filter victim", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Request Queue Retries - Set 1 : Victim", + "EventCode": "0x2B", + "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", + "PerPkg": "1", + "PublicDescription": "Request Queue Retries - Set 1 : Victim : REQ= UESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xE2", + "EventName": "UNC_CHA_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xE3", + "EventName": "UNC_CHA_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_CHA_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xE1", + "EventName": "UNC_CHA_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xE0", + "EventName": "UNC_CHA_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.E_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores? cache.? Snoop filter capacity= evictions occur when the snoop filter is full and evicts an existing entry= to track a new entry.? Does not count clean evictions such as when a core?= s cache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.M_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores? cache.? Snoop filter capacity = evictions occur when the snoop filter is full and evicts an existing entry = to track a new entry.? Does not count clean evictions such as when a core?s= cache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", + "EventCode": "0x3D", + "EventName": "UNC_CHA_SF_EVICTION.S_STATE", + "PerPkg": "1", + "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores? cache.? Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry.? Does not count clean evictions such as when a core?s c= ache replaces a tracked cacheline with a new cacheline.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : All", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.ALL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : All : Counts the number of sno= ops issued by the HA.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Broadcast snoops for Local Requ= ests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Broadcast snoops for Local Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f broadcast snoops issued by the HA responding to local requests", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Directed snoops for Local Reque= sts", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Directed snoops for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= directed snoops issued by the HA responding to local requests", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoops Sent : Snoops sent for Local Requests", + "EventCode": "0x51", + "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", + "PerPkg": "1", + "PublicDescription": "Snoops Sent : Snoops sent for Local Requests= : Counts the number of snoops issued by the HA. : Counts the number of bro= adcast or directed snoops issued by the HA responding to local requests", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspCnflct", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspCnflct := Number of snoop responses received for a Local request : Filters for snoo= ps responses of RspConflict to local CA requests. This is returned when a = snoop finds an existing outstanding transaction in a remote caching agent w= hen it CAMs that caching agent. This triggers conflict resolution hardware= . This covers both RspCnflct and RspCnflctWbI.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspFwd : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspFwd to local CA requests. This snoop response is only poss= ible for RdCur when a snoop HITM/E in a remote caching agent and it directl= y forwards data to a requestor without changing the requestor's cache line = state.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*FWD*WB = : Number of snoop responses received for a Local request : Filters for a s= noop response of Rsp*Fwd*WB to local CA requests. This snoop response is o= nly used in 4s systems. It is used when a snoop HITM's in a remote caching= agent and it directly forwards data to a requestor, and simultaneously ret= urns data to the home to be written back to memory.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspI", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspI : Numb= er of snoop responses received for a Local request : Filters for snoops re= sponses of RspI to local CA requests. RspI is returned when the remote cac= he does not have the data, or when the remote cache silently evicts data (s= uch as when an RFO hits non-modified data).", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspIFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspIFwd : N= umber of snoop responses received for a Local request : Filters for snoop = responses of RspIFwd to local CA requests. This is returned when a remote = caching agent forwards data and the requesting agent is able to acquire the= data in E or M states. This is commonly returned with RFO transactions. = It can be either a HitM or a HitFE.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspS", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspS : Numb= er of snoop responses received for a Local request : Filters for snoop res= ponses of RspS to local CA requests. RspS is returned when a remote cache = has data but is not forwarding it. It is a way to let the requesting socke= t know that it cannot allocate the data in E state. No data is sent with S= RspS.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : RspSFwd", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : RspSFwd : N= umber of snoop responses received for a Local request : Filters for a snoo= p response of RspSFwd to local CA requests. This is returned when a remote= caching agent forwards data but holds on to its currently copy. This is c= ommon for data and code reads that hit in a remote socket in E or F state.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Snoop Responses Received Local : Rsp*WB", + "EventCode": "0x5D", + "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB", + "PerPkg": "1", + "PublicDescription": "Snoop Responses Received Local : Rsp*WB : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspIWB or RspSWB to local CA requests. This is returned when = a non-RFO request hits in M state. Data and Code Reads can return either R= spIWB or RspSWB depending on how the system has been configured. InvItoE t= ransactions will also return RspIWB because they must acquire ownership.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIData= M", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM= ", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit LLC", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit SF", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t LLC", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t SF", + "EventCode": "0x6B", + "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD0", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD2", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD4", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD6", + "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD1", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD3", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD5", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD7", + "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", + "UMask": "0xc001ffff", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DDR4 Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DDR4 Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.DDR", + "Deprecated": "1", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR4", + "PerPkg": "1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : SF/LLC Evictions", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts. : TOR allocation occurred as a result of SF/LLC e= victions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Hits", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushes issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushOpts issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushOpts issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRDs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRDs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; CRd Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores : = Counts the number of entries successfully inserted into the TOR that match = qualifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es : Counts the number of entries successfully inserted into the TOR that m= atch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores tha= t hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores th= at hit the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that hit the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt issued by iA Cores that= missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt issued by iA Cores tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that missed the LLC : Counts the number of entries successfully inserted= into the TOR that match qualifications specified by the subevent. Does n= ot include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiLF misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts; WCiL misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : UCRdFs issued by iA Cores that= Missed LLC : Counts the number of entries successfully inserted into the T= OR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WiLs issued by iA Cores that M= issed LLC : Counts the number of entries successfully inserted into the TOR= that match qualifications specified by the subevent. Does not include ad= dressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", + "PerPkg": "1", + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc3fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBEFtoIs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI", + "PerPkg": "1", + "PublicDescription": "WbEFtoIs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xcc37ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBMtoEs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE", + "PerPkg": "1", + "PublicDescription": "WbMtoEs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xcc2fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WBStoIs issued by an IA Core. = Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI", + "PerPkg": "1", + "PublicDescription": "WbStoIs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xcc67ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : CLFlushes issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices th= at hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= Hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= hit the LLC : Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All requests from IO Devices th= at missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : RFOs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : WbMtoIs issued by IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : IRQ - Non iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just ISOC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Local Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA and IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts. : All locally initiated requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally initiated requests from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : All from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally generated IO traffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent. Do= es not include addressless requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just Misses", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : MMCFG Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NearMem : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NonCoherent", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Just NotNearMem", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Just NotNearMem : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests such = as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Inserts : PRQ - Non IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent. Does not include addressless requests such a= s locks and interrupts.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DDR4 Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DDR4 Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : SF/LLC Evictions", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts. : TOR allocation occurred as a = result of SF/LLC evictions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Hits", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRDs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRDs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc80fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; CRd Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = : For each cycle, this event accumulates the number of valid entries in the= TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", + "UMask": "0xc827ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores : For each cycle, this event accumulates the number of valid entries i= n the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", + "UMask": "0xc8a7ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88ffd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that hit the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", + "UMask": "0xc837fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores t= hat hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = that hit the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc827fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that hit the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", + "UMask": "0xc8a7fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc807fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc887fd01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc88ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDPTE", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that missed the LLC : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", + "UMask": "0xc837fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt issued by iA Cores th= at missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt issued by iA Cores t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc827fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that missed the LLC : For each cycle, this event accumulates the numbe= r of valid entries in the TOR that match qualifications specified by the su= bevent. Does not include addressless requests such as locks and interru= pts.", + "UMask": "0xc8a7fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy; WCiL misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc807fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc887fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", + "UMask": "0xc807ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc887ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices = that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at Hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", + "UMask": "0xcc43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "UMask": "0xcd43ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All requests from IO Devices = that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", + "UMask": "0xc001fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : IRQ - Non iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just ISOC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Local Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. Does not include addre= ssless requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA and IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts. : All locally initiated= requests", + "UMask": "0xc000ff05", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally initiated reques= ts from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : All from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally generated IO tra= ffic", + "UMask": "0xc000ff04", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. Does not include addressless requests such as locks and int= errupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just Misses", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : MMCFG Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NearMem : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NonCoherent", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Just NotNearMem", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NOT_NEARMEM", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Just NotNearMem : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", + "PerPkg": "1", + "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xA7", + "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xA2", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xA3", + "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xA1", + "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xA4", + "EventName": "UNC_CHA_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xA0", + "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xA5", + "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_CHA_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_CHA_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9A", + "EventName": "UNC_CHA_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_CHA_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xB0", + "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xB4", + "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xB1", + "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xB2", + "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xB3", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xB3", + "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xB5", + "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to LLC", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to LLC : Counts the numb= er of times when the CHA was received WbPushMtoI : Counts the number of tim= es when the CHA was able to push WbPushMToI to LLC", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "WbPushMtoI : Pushed to Memory", + "EventCode": "0x56", + "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", + "PerPkg": "1", + "PublicDescription": "WbPushMtoI : Pushed to Memory : Counts the n= umber of times when the CHA was received WbPushMtoI : Counts the number of = times when the CHA was unable to push WbPushMToI to LLC (hence pushed it to= MEM)", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC0 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 0 only.", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 1 only.", + "UMask": "0x2", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC10", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC10", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC10 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 10 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC11", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC11", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC11 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 11 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC12", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC12", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC12 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 12 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC13", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC13", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC13 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 13 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC2 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 2 only.", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC3 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 3 only.", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC4 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 4 only.", + "UMask": "0x10", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC5 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 5 only.", + "UMask": "0x20", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC6", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC6", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC6 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 6 only.", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC7", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC7", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC7 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 7 only.", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC8", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC8", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC8 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 8 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC9", + "EventCode": "0x5A", + "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC9", + "PerPkg": "1", + "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC9 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 9 only.", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x8", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 0?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x4", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", + "UMask": "0x80", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits= ", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Dropped (on 1?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", + "UMask": "0x40", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 0?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT0", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 0?) : Number of XP= T prefetches sent", + "UMask": "0x1", + "Unit": "CHA" + }, + { + "BriefDescription": "XPT Prefetches : Sent (on 1?)", + "EventCode": "0x6f", + "EventName": "UNC_CHA_XPT_PREF.SENT1", + "PerPkg": "1", + "PublicDescription": "XPT Prefetches : Sent (on 1?) : Number of XP= T prefetches sent", + "UMask": "0x10", + "Unit": "CHA" + } +] diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-interconnect.= json b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-interconnect.json new file mode 100644 index 000000000000..de3840078e21 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-interconnect.json @@ -0,0 +1,6016 @@ +[ + { + "BriefDescription": "Total Write Cache Occupancy : Any Source", + "EventCode": "0x0F", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", + "PerPkg": "1", + "PublicDescription": "Total Write Cache Occupancy : Any Source : A= ccumulates the number of reads and writes that are outstanding in the uncor= e in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRI= TE_OCCUPANCY events. : Tracks all requests from any source port.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Total Write Cache Occupancy : Snoops", + "EventCode": "0x0F", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", + "PerPkg": "1", + "PublicDescription": "Total Write Cache Occupancy : Snoops : Accum= ulates the number of reads and writes that are outstanding in the uncore in= each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_O= CCUPANCY events.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Total IRP occupancy of inbound read and write= requests to coherent memory.", + "EventCode": "0x0f", + "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", + "PerPkg": "1", + "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests to coherent memory. This is effectively the sum of read occupan= cy and write occupancy.", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", + "EventCode": "0x01", + "EventName": "UNC_I_CLOCKTICKS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops : CLFlush", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", + "PerPkg": "1", + "PublicDescription": "Coherent Ops : CLFlush : Counts the number o= f coherency related operations servied by the IRP", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.PCITOM", + "PerPkg": "1", + "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.RFO", + "PerPkg": "1", + "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Coherent Ops : WbMtoI", + "EventCode": "0x10", + "EventName": "UNC_I_COHERENT_OPS.WBMTOI", + "PerPkg": "1", + "PublicDescription": "Coherent Ops : WbMtoI : Counts the number of= coherency related operations servied by the IRP", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF RF full", + "EventCode": "0x17", + "EventName": "UNC_I_FAF_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", + "EventCode": "0x18", + "EventName": "UNC_I_FAF_INSERTS", + "PerPkg": "1", + "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "Occupancy of the IRP FAF queue.", + "EventCode": "0x19", + "EventName": "UNC_I_FAF_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", + "Unit": "IRP" + }, + { + "BriefDescription": "FAF allocation -- sent to ADQ", + "EventCode": "0x16", + "EventName": "UNC_I_FAF_TRANSACTIONS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.EVICTS", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of At= omic Transactions as Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Re= ad Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_RD_INSERT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Wr= ite Transactions as Secondary", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.2ND_WR_INSERT", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.FAST_REJ", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", + "EventCode": "0x1e", + "EventName": "UNC_I_MISC0.FAST_REQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers = From Primary to Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.FAST_XFER", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints = From Primary to Secondary", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.PF_ACK_HINT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn= 't find prefetch", + "EventCode": "0x1E", + "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Lost Forward", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.LOST_FWD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Invalid", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Invalid : Sec= ondary received a transfer that did not have sufficient MESI state", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Received Valid", + "EventCode": "0x1F", + "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Received Valid : Secon= dary received a transfer that did have sufficient MESI state", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_E", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of E Lin= e : Secondary received a transfer that did have sufficient MESI state", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_I", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of I Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_M", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of M Lin= e : Snoop took cacheline ownership before write from data was committed.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line= ", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.SLOW_S", + "PerPkg": "1", + "PublicDescription": "Misc Events - Set 1 : Slow Transfer of S Lin= e : Secondary received a transfer that did not have sufficient MESI state", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Requests", + "EventCode": "0x14", + "EventName": "UNC_I_P2P_INSERTS", + "PerPkg": "1", + "PublicDescription": "P2P Requests : P2P requests from the ITC", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Occupancy", + "EventCode": "0x15", + "EventName": "UNC_I_P2P_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "P2P Occupancy : P2P B & S Queue Occupancy", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P completions", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if local only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if local and target = matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P Message", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P reads", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.RD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : Match if remote only", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : match if remote and target= matches", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "P2P Transactions : P2P Writes", + "EventCode": "0x13", + "EventName": "UNC_I_P2P_TRANSACTIONS.WR", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", + "UMask": "0x7e", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", + "UMask": "0x74", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", + "UMask": "0x72", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", + "UMask": "0x78", + "Unit": "IRP" + }, + { + "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", + "PerPkg": "1", + "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", + "UMask": "0x71", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit E or S", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_ES", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit I", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_I", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Hit M", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.HIT_M", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : Miss", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.MISS", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpCode", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPCODE", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpData", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPDATA", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Snoop Responses : SnpInv", + "EventCode": "0x12", + "EventName": "UNC_I_SNOOP_RESP.SNPINV", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Atomic", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.ATOMIC", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Atomic : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Tracks the number of atomic transactions", + "UMask": "0x10", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Other", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.OTHER", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Other : Counts t= he number of Inbound transactions from the IRP to the Uncore. This can be = filtered based on request type in addition to the source queue. Note the s= pecial filtering equation. We do OR-reduction on the request type. If the= SOURCE bit is set, then we also do AND qualification based on the source p= ortID. : Tracks the number of 'other' kinds of transactions.", + "UMask": "0x20", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound Transaction Count : Writes", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WRITES", + "PerPkg": "1", + "PublicDescription": "Inbound Transaction Count : Writes : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Trackes only write requests. Each write request should have a pr= efetch, so there is no need to explicitly track these requests. For writes= that are tickled and have to retry, the counter will be incremented for ea= ch retry.", + "UMask": "0x2", + "Unit": "IRP" + }, + { + "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "PerPkg": "1", + "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", + "UMask": "0x8", + "Unit": "IRP" + }, + { + "BriefDescription": "AK Egress Allocations", + "EventCode": "0x0B", + "EventName": "UNC_I_TxC_AK_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Cycles Full", + "EventCode": "0x05", + "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Inserts", + "EventCode": "0x02", + "EventName": "UNC_I_TxC_BL_DRS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL DRS Egress Occupancy", + "EventCode": "0x08", + "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Cycles Full", + "EventCode": "0x06", + "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Inserts", + "EventCode": "0x03", + "EventName": "UNC_I_TxC_BL_NCB_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCB Egress Occupancy", + "EventCode": "0x09", + "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Cycles Full", + "EventCode": "0x07", + "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Inserts", + "EventCode": "0x04", + "EventName": "UNC_I_TxC_BL_NCS_INSERTS", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "BL NCS Egress Occupancy", + "EventCode": "0x0A", + "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", + "PerPkg": "1", + "Unit": "IRP" + }, + { + "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "EventCode": "0x1C", + "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": ": Counts the number times when it is not pos= sible to issue a request to the M2PCIe because there are no Egress Credits = available on AD0, A1 or AD0&AD1 both. Stalls on both AD0 and AD1 will count= as 2", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD0 Egress Credits Stalls", + "EventCode": "0x1A", + "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD0 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD0 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No AD1 Egress Credits Stalls", + "EventCode": "0x1B", + "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No AD1 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD1 Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "No BL Egress Credit Stalls", + "EventCode": "0x1D", + "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", + "PerPkg": "1", + "PublicDescription": "No BL Egress Credit Stalls : Counts the numb= er times when it is not possible to issue data to the R2PCIe because there = are no BL Egress Credits available.", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0D", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Read Requests", + "EventCode": "0x0E", + "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", + "PerPkg": "1", + "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", + "Unit": "IRP" + }, + { + "BriefDescription": "Outbound Request Queue Occupancy", + "EventCode": "0x0C", + "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Outbound Request Queue Occupancy : Accumulte= s the number of outstanding outbound requests from the IRP to the switch (t= owards the devices). This can be used in conjuection with the allocations = event in order to calculate average latency of outbound requests.", + "Unit": "IRP" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x80", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x81", + "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x82", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x83", + "EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 6", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 7", + "EventCode": "0x88", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x89", + "EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 0 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8A", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 0 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8B", + "EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 0", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", + "EventCode": "0x84", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", + "EventCode": "0x85", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", + "EventCode": "0x85", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", + "EventCode": "0x85", + "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x86", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x87", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x87", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x87", + "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", + "EventCode": "0x8C", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", + "EventCode": "0x8D", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", + "EventCode": "0x8D", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", + "EventCode": "0x8D", + "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR0", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", + "EventCode": "0x8E", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR7", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8F", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8F", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8F", + "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Not Taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Taken", + "EventCode": "0x22", + "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Not Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC Bypass : Taken", + "EventCode": "0x21", + "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Clockticks of the mesh to memory (M2M)", + "EventName": "UNC_M2M_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2M_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles when direct to core mode, which bypass= es the CHA, was disabled", + "EventCode": "0x24", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "EventCode": "0x60", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number of reads in which direct to core trans= action was overridden", + "EventCode": "0x25", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xAF", + "EventName": "UNC_M2M_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xBA", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xBA", + "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xB6", + "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xBB", + "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xB7", + "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xB8", + "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xB9", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xB9", + "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ALL", + "PerPkg": "1", + "UMask": "0x704", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_ALL", + "PerPkg": "1", + "UMask": "0x104", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR", + "PerPkg": "1", + "UMask": "0x140", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH", + "PerPkg": "1", + "UMask": "0x102", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h0", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL", + "PerPkg": "1", + "UMask": "0x101", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_ALL", + "PerPkg": "1", + "UMask": "0x204", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR", + "PerPkg": "1", + "UMask": "0x240", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH", + "PerPkg": "1", + "UMask": "0x202", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h1", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL", + "PerPkg": "1", + "UMask": "0x201", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : From TGR - All Chan= nels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.FROM_TGR", + "PerPkg": "1", + "UMask": "0x740", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= All Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.ISOCH", + "PerPkg": "1", + "UMask": "0x702", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - A= ll Channels", + "EventCode": "0x37", + "EventName": "UNC_M2M_IMC_READS.NORMAL", + "PerPkg": "1", + "UMask": "0x701", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - All C= hannels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.ALL", + "PerPkg": "1", + "UMask": "0x1c10", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL", + "PerPkg": "1", + "UMask": "0x410", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL", + "PerPkg": "1", + "UMask": "0x401", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x404", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", + "PerPkg": "1", + "UMask": "0x402", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 0", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x408", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL", + "PerPkg": "1", + "UMask": "0x810", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL", + "PerPkg": "1", + "UMask": "0x801", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x804", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL", + "PerPkg": "1", + "UMask": "0x802", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 1", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x808", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : From TGR - All Cha= nnels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL", + "PerPkg": "1", + "UMask": "0x1c01", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", + "PerPkg": "1", + "UMask": "0x1c04", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.NI_MISS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - All Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", + "PerPkg": "1", + "UMask": "0x1c02", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Al= l Channels", + "EventCode": "0x38", + "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", + "PerPkg": "1", + "UMask": "0x1c08", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts", + "EventCode": "0x64", + "EventName": "UNC_M2M_MIRR_WRQ_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x65", + "EventName": "UNC_M2M_MIRR_WRQ_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xE6", + "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xE6", + "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches : MC Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number Packet Header Matches : Mesh Match", + "EventCode": "0x4C", + "EventName": "UNC_M2M_PKT_MATCH.MESH", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS", + "EventCode": "0x73", + "EventName": "UNC_M2M_PREFCAM_CIS_DROPS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : All Channels", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : Channel 0", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Full : Channel 1", + "EventCode": "0x6B", + "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : All Channels", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 0", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 1", + "EventCode": "0x6C", + "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA0_INVAL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA1_INVAL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_MISS_INVAL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_RSP_PDRESET", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA0_INVAL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA1_INVAL", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_MISS_INVAL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Deallocs", + "EventCode": "0x6E", + "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_RSP_PDRESET", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - Ch 0", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - Ch 1", + "EventCode": "0x6F", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped : XPT - All Channels", + "EventCode": "0x6f", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 0", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 0", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 0", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 1", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI - Ch 1", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI- Ch 1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 2", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH2_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 2", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- All Channels", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPTUPI_ALLCH", + "PerPkg": "1", + "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - All Channels", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = All Channels", + "EventCode": "0x74", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 0", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 0", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 0", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 1", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 1", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPTUPI", + "PerPkg": "1", + "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 2", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH2_XPTUPI", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - All Channels", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPTUPI_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - All Channels", + "EventCode": "0x75", + "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.ERRORBLK_RxC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.NOT_PF_SAD_REGION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_HIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_SECURE_DROP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.RPQ_PROXY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.STOP_B2B", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.WPQ_PROXY", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", + "EventCode": "0x70", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.XPT_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.ERRORBLK_RxC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.NOT_PF_SAD_REGION", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_AD_CRD", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_FULL", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_HIT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_SECURE_DROP", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.RPQ_PROXY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.STOP_B2B", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.WPQ_PROXY", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", + "EventCode": "0x71", + "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.XPT_THRESH", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", + "EventCode": "0x6D", + "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", + "PerPkg": "1", + "UMask": "0x15", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : All Channels", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 0", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Prefetch CAM Occupancy : Channel 1", + "EventCode": "0x6A", + "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": ": All Channels", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH", + "PerPkg": "1", + "UMask": "0x7", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 0", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": ": Channel 1", + "EventCode": "0x76", + "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", + "EventCode": "0x79", + "EventName": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "EventCode": "0x7A", + "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_INSERTS", + "EventCode": "0x78", + "EventName": "UNC_M2M_PREFCAM_RxC_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", + "EventCode": "0x77", + "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xAC", + "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xAA", + "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xAD", + "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xAB", + "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_M2M_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 0", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 1", + "EventCode": "0x43", + "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 0", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 1", + "EventCode": "0x44", + "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Full", + "EventCode": "0x04", + "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Not Empty", + "EventCode": "0x03", + "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Allocations", + "EventCode": "0x01", + "EventName": "UNC_M2M_RxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x02", + "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches", + "EventCode": "0x77", + "EventName": "UNC_M2M_RxC_AD_PREF_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x5C", + "EventName": "UNC_M2M_RxC_AK_WR_CMP", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Full", + "EventCode": "0x08", + "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Not Empty", + "EventCode": "0x07", + "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Allocations", + "EventCode": "0x05", + "EventName": "UNC_M2M_RxC_BL_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Ingress (from CMS) Occupancy", + "EventCode": "0x06", + "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE5", + "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xE2", + "EventName": "UNC_M2M_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xE3", + "EventName": "UNC_M2M_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_M2M_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xE1", + "EventName": "UNC_M2M_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xE0", + "EventName": "UNC_M2M_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD0", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD2", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD4", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xD6", + "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD1", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD3", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD5", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xD7", + "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Number AD Ingress Credits", + "EventCode": "0x41", + "EventName": "UNC_M2M_TGR_AD_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Number BL Ingress Credits", + "EventCode": "0x42", + "EventName": "UNC_M2M_TGR_BL_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full : Channel 0", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Full : Channel 1", + "EventCode": "0x45", + "EventName": "UNC_M2M_TRACKER_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 0", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Inserts : Channel 1", + "EventCode": "0x49", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty : Channel 0", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Cycles Not Empty : Channel 1", + "EventCode": "0x46", + "EventName": "UNC_M2M_TRACKER_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 0", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Tracker Occupancy : Channel 1", + "EventCode": "0x47", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credit Acquired", + "EventCode": "0x0d", + "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Credits Occupancy", + "EventCode": "0x0e", + "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Full", + "EventCode": "0x0c", + "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Not Empty", + "EventCode": "0x0b", + "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Allocations", + "EventCode": "0x09", + "EventName": "UNC_M2M_TxC_AD_INSERTS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", + "EventCode": "0x0f", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", + "EventCode": "0x10", + "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AD Egress (to CMS) Occupancy", + "EventCode": "0x0A", + "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK : CRD Transa= ctions to Cbo", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.CRD_CBO", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound Ring Transactions on AK : NDR Transa= ctions", + "EventCode": "0x39", + "EventName": "UNC_M2M_TxC_AK.NDR", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AKC Credits", + "EventCode": "0x5F", + "EventName": "UNC_M2M_TxC_AKC_CREDITS", + "PerPkg": "1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", + "EventCode": "0x1D", + "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : All", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Near Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Far Side", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", + "PerPkg": "1", + "UMask": "0x88", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", + "PerPkg": "1", + "UMask": "0xa0", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Full", + "EventCode": "0x14", + "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", + "PerPkg": "1", + "UMask": "0x90", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : All", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Not Empty", + "EventCode": "0x13", + "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : All", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Allocations", + "EventCode": "0x11", + "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", + "EventCode": "0x1F", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", + "EventCode": "0x20", + "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : All", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Near Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Far Side", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "AK Egress (to CMS) Occupancy", + "EventCode": "0x12", + "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Cache", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Core", + "EventCode": "0x40", + "EventName": "UNC_M2M_TxC_BL.DRS_CORE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", + "EventCode": "0x19", + "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : All", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Near Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Far Side", + "EventCode": "0x18", + "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : All", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", + "EventCode": "0x17", + "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : All", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", + "EventCode": "0x15", + "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", + "EventCode": "0x1B", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", + "EventCode": "0x1C", + "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xA6", + "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xA7", + "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xA2", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xA3", + "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xA1", + "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - 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Uncredited= ", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xA4", + "EventName": "UNC_M2M_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xA0", + "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xA5", + "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9C", + "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9D", + "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9E", + "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2M_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_M2M_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9A", + "EventName": "UNC_M2M_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9B", + "EventName": "UNC_M2M_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xB0", + "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xB4", + "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xB1", + "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xB2", + "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xB3", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xB3", + "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xB5", + "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 0", + "EventCode": "0x58", + "EventName": "UNC_M2M_WPQ_FLUSH.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "WPQ Flush : Channel 1", + "EventCode": "0x58", + "EventName": "UNC_M2M_WPQ_FLUSH.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 0", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 1", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 2", + "EventCode": "0x4D", + "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 0", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 1", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 2", + "EventCode": "0x4E", + "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Channel 0", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Channel 1", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Full : Mirror", + "EventCode": "0x4A", + "EventName": "UNC_M2M_WR_TRACKER_FULL.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 0", + "EventCode": "0x56", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Inserts : Channel 1", + "EventCode": "0x56", + "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Channel 1", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty : Mirror", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Cycles Not Empty", + "EventCode": "0x4B", + "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", + "EventCode": "0x63", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", + "EventCode": "0x63", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", + "EventCode": "0x62", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", + "EventCode": "0x62", + "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Channel 0", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Channel 1", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy : Mirror", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_NONTGR", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Occupancy", + "EventCode": "0x55", + "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_PWR", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 0", + "EventCode": "0x5E", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Inserts : Channel 1", + "EventCode": "0x5E", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", + "EventCode": "0x5D", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2M" + }, + { + "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", + "EventCode": "0x5D", + "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2M" + }, + { + "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", + "EventCode": "0xff", + "EventName": "UNC_U_CLOCKTICKS", + "PerPkg": "1", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : Doorbell", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : Interrupt", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.INT_PRIO", + "PerPkg": "1", + "PublicDescription": "Message Received : Interrupt : Interrupts", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : IPI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : IPI : Inter Processor Int= errupts", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : MSI", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : MSI : Message Signaled In= terrupts - interrupts sent by devices (including PCIe via IOxAPIC) (Socket = Mode only)", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Message Received : VLW", + "EventCode": "0x42", + "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", + "PerPkg": "1", + "PublicDescription": "Message Received : VLW : Virtual Logical Wir= e (legacy) message were received from Uncore.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "IDI Lock/SplitLock Cycles", + "EventCode": "0x44", + "EventName": "UNC_U_LOCK_CYCLES", + "PerPkg": "1", + "PublicDescription": "IDI Lock/SplitLock Cycles : Number of times = an IDI Lock/SplitLock sequence was started", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "EventCode": "0x4D", + "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "EventCode": "0x4E", + "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "EventCode": "0x4F", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "EventCode": "0x4F", + "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK", + "EventCode": "0x45", + "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", + "PerPkg": "1", + "PublicDescription": "Cycles PHOLD Assert to Ack : Assert to ACK := PHOLD cycles.", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDRAND", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "UBOX" + }, + { + "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", + "EventCode": "0x4C", + "EventName": "UNC_U_RACU_DRNG.RDSEED", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "UBOX" + }, + { + "BriefDescription": "RACU Request", + "EventCode": "0x46", + "EventName": "UNC_U_RACU_REQUESTS", + "PerPkg": "1", + "PublicDescription": "RACU Request : Number outstanding register r= equests within message channel tracker", + "Unit": "UBOX" + } +] diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-io.json b/too= ls/perf/pmu-events/arch/x86/snowridgex/uncore-io.json new file mode 100644 index 000000000000..996028071ee4 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/snowridgex/uncore-io.json @@ -0,0 +1,8944 @@ +[ + { + "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_READ", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "MetricName": "LLC_MISSES.PCIE_READ", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", + "ScaleUnit": "4Bytes", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", + "EventCode": "0x83", + "EventName": "LLC_MISSES.PCIE_WRITE", + "FCMask": "0x07", + "Filter": "ch_mask=3D0x1f", + "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "MetricName": "LLC_MISSES.PCIE_WRITE", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", + "ScaleUnit": "4Bytes", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", + "UMask": "0x20", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", + "UMask": "0x21", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", + "UMask": "0x22", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", + "UMask": "0x23", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", + "UMask": "0x24", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", + "UMask": "0x25", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", + "UMask": "0x26", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", + "EventCode": "0xff", + "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", + "PerPkg": "1", + "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", + "UMask": "0x27", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "Clockticks of the integrated IO (IIO) traffic= controller", + "EventCode": "0x01", + "EventName": "UNC_IIO_CLOCKTICKS", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Free running counter that increments for IIO = clocktick", + "EventCode": "0xff", + "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", + "PerPkg": "1", + "PublicDescription": "Free running counter that increments for int= egrated IO (IIO) traffic controller clockticks", + "UMask": "0x10", + "Unit": "iio_free_running" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts : All Ports", + "EventCode": "0xC2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0xff", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0-7", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", + "FCMask": "0x04", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", + "UMask": "0x3", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", + "EventCode": "0xD5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", + "UMask": "0xff", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 1", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 1 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 2", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 2 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 3", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 3 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 4", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 4 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 5", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 5 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 6", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 6 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 7", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", + "FCMask": "0x04", + "PerPkg": "1", + "PublicDescription": "PCIe Completion Buffer Occupancy : Part 7 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1= , Or x4 card is plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5= , Or x4 card is plugged in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, = Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, = Or x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x= 4 card is plugged in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x= 4 card is plugged in to slot 4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 7", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card p= lugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card p= lugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plu= gged in to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plu= gged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugg= ed in to slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", + "EventCode": "0xC0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1,= Or x4 card is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5,= Or x4 card is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 c= ard is plugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 car= d is plugged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged= in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged= in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Messages", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 ca= rd plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is= plugged in to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 ca= rd plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is= plugged in to slot 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card= plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 2", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card= plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is p= lugged in to slot 6", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Passing data = to be written", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Passing data= to be written : How often different queues (e.g. channel / fc) ask to send= request into pipeline : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing final= read or write of line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Issuing fina= l read or write of line : How often different queues (e.g. channel / fc) as= k to send request into pipeline", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Processing re= sponse from IOMMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Processing r= esponse from IOMMU : How often different queues (e.g. channel / fc) ask to = send request into pipeline", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Issuing to IO= MMU", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Issuing to I= OMMU : How often different queues (e.g. channel / fc) ask to send request i= nto pipeline", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Request Owner= ship", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Request Owne= rship : How often different queues (e.g. channel / fc) ask to send request = into pipeline : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests : Writing line", + "EventCode": "0x86", + "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests : Writing line= : How often different queues (e.g. channel / fc) ask to send request into = pipeline : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Passi= ng data to be written", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Pass= ing data to be written : How often different queues (e.g. channel / fc) are= allowed to send request into pipeline : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng final read or write of line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing final read or write of line : How often different queues (e.g. channel = / fc) are allowed to send request into pipeline", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Proce= ssing response from IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Proc= essing response from IOMMU : How often different queues (e.g. channel / fc)= are allowed to send request into pipeline", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Issui= ng to IOMMU", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Issu= ing to IOMMU : How often different queues (e.g. channel / fc) are allowed t= o send request into pipeline", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Reque= st Ownership", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Requ= est Ownership : How often different queues (e.g. channel / fc) are allowed = to send request into pipeline : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Incoming arbitration requests granted : Writi= ng line", + "EventCode": "0x87", + "EventName": "UNC_IIO_INBOUND_ARB_WON.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Incoming arbitration requests granted : Writ= ing line : How often different queues (e.g. channel / fc) are allowed to se= nd request into pipeline : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 1G Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.1G_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 1G Page : Counts if a tran= saction to a 1G page, on its first lookup, hits the IOTLB.", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 2M Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.2M_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 2M Page : Counts if a tran= saction to a 2M page, on its first lookup, hits the IOTLB.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Hits to a 4K Page", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.4K_HITS", + "PerPkg": "1", + "PublicDescription": ": IOTLB Hits to a 4K Page : Counts if a tran= saction to a 4K page, on its first lookup, hits the IOTLB.", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB lookups all", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": IOTLB lookups all : Some transactions have= to look up IOTLB multiple times. Counts every time a request looks up IOT= LB.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache hits", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", + "PerPkg": "1", + "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache lookups", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB lookups first", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOTLB Fills (same as IOTLB miss)", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.MISSES", + "PerPkg": "1", + "PublicDescription": ": IOTLB Fills (same as IOTLB miss) : When a = transaction misses IOTLB, it does a page walk to look up memory and bring i= n the relevant page translation. Counts when this page translation is writt= en to IOTLB.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Cycles PWT full", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.CYC_PWT_FULL", + "PerPkg": "1", + "PublicDescription": ": Cycles PWT full : Counts cycles the IOMMU = has reached its maximum limit for outstanding page walks.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": IOMMU memory access", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", + "PerPkg": "1", + "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 1G page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 2M page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWC Hit to a 4K page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_4K_HITS", + "PerPkg": "1", + "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": PWT Hit to a 256T page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", + "PerPkg": "1", + "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache fill", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache fill : When a transaction m= isses SLPWC, it does a page walk to look up memory and bring in the relevan= t page translation. When this page translation is written to SLPWC, ObsPwcF= illValid_nnnH is asserted.", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": PageWalk cache lookup", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": PageWalk cache lookup : Counts each time a= transaction looks up second level page walk cache.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Interrupt Entry cache hit", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS", + "PerPkg": "1", + "PublicDescription": ": Interrupt Entry cache hit : Counts each ti= me a transaction's first look up hits the IEC.", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": ": Interrupt Entry cache lookup", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS", + "PerPkg": "1", + "PublicDescription": ": Interrupt Entry cache lookup : Counts the = number of transaction looks up that interrupt remapping cache.", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": ": Device-selective Context cache invalidation= cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DEVICE", + "PerPkg": "1", + "PublicDescription": ": Device-selective Context cache invalidatio= n cycles : Counts number of Device selective context cache invalidation eve= nts", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Domain-selective Context cache invalidation= cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DOMAIN", + "PerPkg": "1", + "PublicDescription": ": Domain-selective Context cache invalidatio= n cycles : Counts number of Domain selective context cache invalidation eve= nts", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": ": Context cache global invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_GBL", + "PerPkg": "1", + "PublicDescription": ": Context cache global invalidation cycles := Counts number of Context Cache global invalidation events", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Domain-selective IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_DOMAIN", + "PerPkg": "1", + "PublicDescription": ": Domain-selective IOTLB invalidation cycles= : Counts number of Domain selective invalidation events", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Global IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_GBL", + "PerPkg": "1", + "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Page-selective IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PAGE", + "PerPkg": "1", + "PublicDescription": ": Page-selective IOTLB invalidation cycles := Counts number of Page-selective within Domain Invalidation events", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = : Asserted if all bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : PCIE bus : As= serted if all bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and PCIE bus : Asserted if all bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus)", + "EventCode": "0x02", + "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and !(PCIE bus) : Asserted if all bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus := Asserted if any bits specified by mask match", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : PCIE bus : Ass= erted if any bits specified by mask match", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and PCIE bus", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus : Asserted if any bits specified by mask match", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and !(PCIE bus)", + "EventCode": "0x03", + "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", + "PerPkg": "1", + "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus) : Asserted if any bits specified by mask match", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Counting disabled", + "EventCode": "0x80", + "EventName": "UNC_IIO_NOTHING", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Occupancy of outbound request queue : To devi= ce", + "EventCode": "0xC5", + "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Occupancy of outbound request queue : To dev= ice : Counts number of outbound requests/completions IIO is currently proce= ssing", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Passing data to be written", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Passing data to be written : Only for post= ed requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": ": Issuing final read or write of line", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": ": Processing response from IOMMU", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": ": Issuing to IOMMU", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": ": Request Ownership", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Request Ownership : Only for posted reques= ts", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": ": Writing line", + "EventCode": "0x88", + "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": ": Writing line : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = From IRP", + "EventCode": "0xC2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.IRP", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests sent to PCIe from main die := From IRP : Captures Posted/Non-posted allocations from IRP. i.e. either no= n-confined P2P traffic or from the CPU", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = From ITC", + "EventCode": "0xC2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.ITC", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests sent to PCIe from main die := From ITC : Confined P2P", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests sent to PCIe from main die : = Completion allocations", + "EventCode": "0xc2", + "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.PREALLOC", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests PCIe makes of the main die : = Drop request", + "EventCode": "0x85", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU.ALL.DROP", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests PCIe makes of the main die := Drop request : Counts full PCIe requests before they're broken into a seri= es of cache-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_O= F_CPU. : Packet error detected, must be dropped", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number requests PCIe makes of the main die : = All", + "EventCode": "0x85", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Number requests PCIe makes of the main die := All : Counts full PCIe requests before they're broken into a series of cac= he-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_OF_CPU.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Abort= ", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Confi= ned P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Local= P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Multi= -cast", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Memor= y", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : MsgB", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Remot= e P2P", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Num requests sent by PCIe - by target : Ubox", + "EventCode": "0x8E", + "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "ITC address map 1", + "EventCode": "0x8F", + "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", + "PerPkg": "1", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound cacheline requests issued : 64B requ= ests issued to device", + "EventCode": "0xD0", + "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Outbound cacheline requests issued : 64B req= uests issued to device : Each outbound cacheline granular request may need = to make multiple passes through the pipeline. Each time a cacheline comple= tes all its passes it advances line", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Outbound TLP (transaction layer packet) reque= sts issued : To device", + "EventCode": "0xD1", + "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "Outbound TLP (transaction layer packet) requ= ests issued : To device : Each time an outbound completes all its passes it= advances the pointer", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PWT occupancy", + "EventCode": "0x42", + "EventName": "UNC_IIO_PWT_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Passing d= ata to be written", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Passing = data to be written : Each PCIe request is broken down into a series of cach= eline granular requests and each cacheline size request may need to make mu= ltiple passes through the pipeline (e.g. for posted interrupts or multi-cas= t). Each time a cacheline completes all its passes (e.g. finishes posting= writes to all multi-cast targets) it advances line : Only for posted reque= sts", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Issuing f= inal read or write of line", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Issuing = final read or write of line : Each PCIe request is broken down into a serie= s of cacheline granular requests and each cacheline size request may need t= o make multiple passes through the pipeline (e.g. for posted interrupts or = multi-cast). Each time a cacheline completes all its passes (e.g. finishe= s posting writes to all multi-cast targets) it advances line", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Request O= wnership", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Request = Ownership : Each PCIe request is broken down into a series of cacheline gra= nular requests and each cacheline size request may need to make multiple pa= sses through the pipeline (e.g. for posted interrupts or multi-cast). Eac= h time a cacheline completes all its passes (e.g. finishes posting writes t= o all multi-cast targets) it advances line : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - cacheline complete : Writing l= ine", + "EventCode": "0x91", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - cacheline complete : Writing = line : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes all its passes (e.g. finishes posting writes to all= multi-cast targets) it advances line : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Passing data to be wr= itten", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Passing data to be w= ritten : Each PCIe request is broken down into a series of cacheline granul= ar requests and each cacheline size request may need to make multiple passe= s through the pipeline (e.g. for posted interrupts or multi-cast). Each t= ime a single PCIe request completes all its cacheline granular requests, it= advances pointer. : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Issuing final read or= write of line", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Issuing final read o= r write of line : Each PCIe request is broken down into a series of cacheli= ne granular requests and each cacheline size request may need to make multi= ple passes through the pipeline (e.g. for posted interrupts or multi-cast).= Each time a single PCIe request completes all its cacheline granular req= uests, it advances pointer.", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Processing response f= rom IOMMU", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Processing response = from IOMMU : Each PCIe request is broken down into a series of cacheline gr= anular requests and each cacheline size request may need to make multiple p= asses through the pipeline (e.g. for posted interrupts or multi-cast). Ea= ch time a single PCIe request completes all its cacheline granular requests= , it advances pointer.", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Issuing to IOMMU", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Issuing to IOMMU : E= ach PCIe request is broken down into a series of cacheline granular request= s and each cacheline size request may need to make multiple passes through = the pipeline (e.g. for posted interrupts or multi-cast). Each time a sing= le PCIe request completes all its cacheline granular requests, it advances = pointer.", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Request Ownership", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Request Ownership : = Each PCIe request is broken down into a series of cacheline granular reques= ts and each cacheline size request may need to make multiple passes through= the pipeline (e.g. for posted interrupts or multi-cast). Each time a sin= gle PCIe request completes all its cacheline granular requests, it advances= pointer. : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request complete : Writing line", + "EventCode": "0x92", + "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request complete : Writing line : Each = PCIe request is broken down into a series of cacheline granular requests an= d each cacheline size request may need to make multiple passes through the = pipeline (e.g. for posted interrupts or multi-cast). Each time a single P= CIe request completes all its cacheline granular requests, it advances poin= ter. : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Passing data t= o be written", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Passing data = to be written : Each PCIe request is broken down into a series of cacheline= granular requests and each cacheline size request may need to make multipl= e passes through the pipeline (e.g. for posted interrupts or multi-cast). = Each time a cacheline completes a single pass (e.g. posts a write to singl= e multi-cast target) it advances state : Only for posted requests", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Issuing final = read or write of line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Issuing final= read or write of line : Each PCIe request is broken down into a series of = cacheline granular requests and each cacheline size request may need to mak= e multiple passes through the pipeline (e.g. for posted interrupts or multi= -cast). Each time a cacheline completes a single pass (e.g. posts a write= to single multi-cast target) it advances state", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Request Owners= hip", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Request Owner= ship : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes a single pass (e.g. posts a write to single multi-c= ast target) it advances state : Only for posted requests", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "PCIe Request - pass complete : Writing line", + "EventCode": "0x90", + "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0xFF", + "PublicDescription": "PCIe Request - pass complete : Writing line = : Each PCIe request is broken down into a series of cacheline granular requ= ests and each cacheline size request may need to make multiple passes throu= gh the pipeline (e.g. for posted interrupts or multi-cast). Each time a c= acheline completes a single pass (e.g. posts a write to single multi-cast t= arget) it advances state : Only for posted requests", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Symbol Times on Link", + "EventCode": "0x82", + "EventName": "UNC_IIO_SYMBOL_TIMES", + "PerPkg": "1", + "PublicDescription": "Symbol Times on Link : Gen1 - increment once= every 4nS, Gen2 - increment once every 2nS, Gen3 - increment once every 1n= S", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is= plugged in to slot 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is= plugged in to slot 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugg= ed in to slot 0", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 1", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 3", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugg= ed in to slot 4", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 5", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 7", + "UMask": "0x20", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to La= ne 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot= 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to La= ne 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 5", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot= 6", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 7", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : IOMMU - Type 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane= 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane= 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6= ", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", + "EventCode": "0xC1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 1", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 3", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card= is plugged in to slot 4", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 5", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 7", + "UMask": "0x10", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lan= e 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot = 2", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lan= e 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot = 6", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plug= ged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plug= ged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugge= d in to slot 0", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugge= d in to slot 4", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 5", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 7", + "UMask": "0x1", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 0= /1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 1", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 2/= 3, Or x4 card is plugged in to slot 2", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 3", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 4= /5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot= 4", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART5", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x20", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 5", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART6", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x40", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 6/= 7, Or x4 card is plugged in to slot 6", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART7", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x80", + "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 7", + "UMask": "0x40", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x100", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x200", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x01", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x02", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x04", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in= to slot 2", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x08", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x8", + "Unit": "IIO" + }, + { + "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4", + "FCMask": "0x07", + "PerPkg": "1", + "PortMask": "0x10", + "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. 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"UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 4", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR4", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 5", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR5", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 0 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgr= ess 6", + "EventCode": "0x8a", + "EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR6", + "PerPkg": "1", + "PublicDescription": "CMS Agent0 BL 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"UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 1", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR1", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 2", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR2", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", + "EventCode": "0x84", + "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR3", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 AD 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"UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR10", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR8", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", + "EventCode": "0x8f", + "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR9", + "PerPkg": "1", + "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Clockticks of the mesh to PCI (M2P)", + "EventCode": "0x01", + "EventName": "UNC_M2P_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2P_CMS_CLOCKTICKS", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Local", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_LOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Remote", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_NONLOCAL", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - IV", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_IV", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_NOCRD", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : Horizontal", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.HORZ", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Distress signal asserted : Vertical", + "EventCode": "0xaf", + "EventName": "UNC_M2P_DISTRESS_ASSERTED.VERT", + "PerPkg": "1", + "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", + "EventCode": "0xba", + "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP", + "PerPkg": "1", + "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Even", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Even", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", + "EventCode": "0xb6", + "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xbb", + "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Even", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Even", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", + "EventCode": "0xb7", + "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Even", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Even", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_EVEN", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", + "EventCode": "0xb8", + "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_ODD", + "PerPkg": "1", + "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Left", + "EventCode": "0xb9", + "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.LEFT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Horizontal IV Ring in Use : Right", + "EventCode": "0xb9", + "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.RIGHT", + "PerPkg": "1", + "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCS message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", + "EventCode": "0x33", + "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credit fo= r transfer through CMS Port 0s to the IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the DRS message class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCB message class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS", + "EventCode": "0x34", + "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCS message class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCS me= ssage class.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1= ", + "EventCode": "0x32", + "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1", + "PerPkg": "1", + "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credit for transfer through CMS Port 0s to the IIO for the NCS me= ssage class.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCB", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCS", + "EventCode": "0x46", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCB", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCS", + "EventCode": "0x47", + "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCB", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCS", + "EventCode": "0x19", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCB", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCS", + "EventCode": "0x1a", + "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent0", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent1", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local P2P Shared Credits Returned : Agent2", + "EventCode": "0x17", + "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent0", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent1", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent2", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent3", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent4", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent5", + "EventCode": "0x44", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCB", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCS", + "EventCode": "0x40", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCB", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCS", + "EventCode": "0x41", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCB", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCS", + "EventCode": "0x4a", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS", + "PerPkg": "1", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCB", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCS", + "EventCode": "0x4b", + "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", + "EventCode": "0xe6", + "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", + "EventCode": "0xe6", + "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : All", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Local NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCB", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "P2P Credit Occupancy : Remote NCS", + "EventCode": "0x14", + "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : All", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Local NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCB", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Dedicated Credits Received : Remote NCS", + "EventCode": "0x16", + "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : All", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Local NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCB", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Shared Credits Received : Remote NCS", + "EventCode": "0x15", + "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent0", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent1", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote P2P Shared Credits Returned : Agent2", + "EventCode": "0x18", + "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent0", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent1", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent2", + "EventCode": "0x45", + "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", + "EventCode": "0xac", + "EventName": "UNC_M2P_RING_BOUNCES_HORZ.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AD", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AK", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring.", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.AKC", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.BL", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", + "EventCode": "0xaa", + "EventName": "UNC_M2P_RING_BOUNCES_VERT.IV", + "PerPkg": "1", + "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AD", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : AK", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK_AG1", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : BL", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Horizontal Ring : IV", + "EventCode": "0xad", + "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : AD", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AD", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AK", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AKC", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.BL", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", + "EventCode": "0xab", + "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.IV", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Source Throttle", + "EventCode": "0xae", + "EventName": "UNC_M2P_RING_SRC_THRTL", + "PerPkg": "1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", + "EventCode": "0x10", + "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.ALL", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Ingress (from CMS) Queue Inserts", + "EventCode": "0x11", + "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS", + "PerPkg": "1", + "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xe5", + "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - All", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Credited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AK", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - All", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Credited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Bypass : IV", + "EventCode": "0xe2", + "EventName": "UNC_M2P_RxR_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - All", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : AK", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - All", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.IFV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation : IV", + "EventCode": "0xe3", + "EventName": "UNC_M2P_RxR_CRD_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Injection Starvation", + "EventCode": "0xe4", + "EventName": "UNC_M2P_RxR_CRD_STARVED_1", + "PerPkg": "1", + "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - All", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AK", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - All", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Allocations : IV", + "EventCode": "0xe1", + "EventName": "UNC_M2P_RxR_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - All", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AK", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - All", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Transgress Ingress Occupancy : IV", + "EventCode": "0xe0", + "EventName": "UNC_M2P_RxR_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd0", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd2", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd4", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", + "EventCode": "0xd6", + "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd1", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd3", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd5", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", + "EventCode": "0xd7", + "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", + "PerPkg": "1", + "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ", + "EventCode": "0x2d", + "EventName": "UNC_M2P_TxC_CREDITS.PRQ", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Full", + "EventCode": "0x25", + "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Cycles Not Empty", + "EventCode": "0x23", + "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.BL_0", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Egress (to CMS) Ingress", + "EventCode": "0x24", + "EventName": "UNC_M2P_TxC_INSERTS.BL_1", + "PerPkg": "1", + "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - All", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - All", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", + "EventCode": "0xa6", + "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - All", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AK", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - All", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Bypass Used : IV", + "EventCode": "0xa7", + "EventName": "UNC_M2P_TxR_HORZ_BYPASS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", + "EventCode": "0xa2", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AK", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_ALL", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_CRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", + "EventCode": "0xa3", + "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.IV", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AK", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Inserts : IV", + "EventCode": "0xa1", + "EventName": "UNC_M2P_TxR_HORZ_INSERTS.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AK", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress NACKs : IV", + "EventCode": "0xa4", + "EventName": "UNC_M2P_TxR_HORZ_NACK.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x11", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AK", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", + "UMask": "0x44", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_CRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Occupancy : IV", + "EventCode": "0xa0", + "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AK", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.AKC_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", + "UMask": "0x80", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_ALL", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_UNCRD", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", + "EventCode": "0xa5", + "EventName": "UNC_M2P_TxR_HORZ_STARVED.IV", + "PerPkg": "1", + "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9c", + "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", + "EventCode": "0x9d", + "EventName": "UNC_M2P_TxR_VERT_BYPASS.IV_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", + "EventCode": "0x9e", + "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", + "EventCode": "0x9e", + "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", + "EventCode": "0x94", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", + "EventCode": "0x95", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", + "EventCode": "0x95", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", + "EventCode": "0x96", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", + "EventCode": "0x97", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", + "EventCode": "0x97", + "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", + "EventCode": "0x92", + "EventName": "UNC_M2P_TxR_VERT_INSERTS0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", + "EventCode": "0x93", + "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", + "EventCode": "0x93", + "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : IV", + "EventCode": "0x98", + "EventName": "UNC_M2P_TxR_VERT_NACK0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", + "EventCode": "0x99", + "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", + "EventCode": "0x99", + "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", + "EventCode": "0x90", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", + "EventCode": "0x91", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", + "EventCode": "0x91", + "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x10", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x20", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", + "UMask": "0x40", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", + "EventCode": "0x9a", + "EventName": "UNC_M2P_TxR_VERT_STARVED0.IV_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG0", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG1", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", + "EventCode": "0x9b", + "EventName": "UNC_M2P_TxR_VERT_STARVED1.TGC", + "PerPkg": "1", + "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Even", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Down and Odd", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Even", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AD Ring In Use : Up and Odd", + "EventCode": "0xb0", + "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Even", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Even", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", + "EventCode": "0xb4", + "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Even", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Down and Odd", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Even", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical AK Ring In Use : Up and Odd", + "EventCode": "0xb1", + "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Even", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Down and Odd", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Even", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical BL Ring in Use : Up and Odd", + "EventCode": "0xb2", + "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Down", + "EventCode": "0xb3", + "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.DN", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical IV Ring in Use : Up", + "EventCode": "0xb3", + "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.UP", + "PerPkg": "1", + "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Even", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x4", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", + "UMask": "0x8", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Even", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_EVEN", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", + "UMask": "0x1", + "Unit": "M2PCIe" + }, + { + "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", + "EventCode": "0xb5", + "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_ODD", + "PerPkg": "1", + "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", + "UMask": "0x2", + "Unit": "M2PCIe" + } +] diff --git a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json b/= tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json deleted file mode 100644 index 8bd041bc0c57..000000000000 --- a/tools/perf/pmu-events/arch/x86/snowridgex/uncore-other.json +++ /dev/null @@ -1,22056 +0,0 @@ -[ - { - "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.= ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.MMIO_READ", - "Filter": "config1=3D0x40040e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts= .ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.MMIO_WRITE", - "Filter": "config1=3D0x40041e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO. Derived= from unc_iio_data_req_of_cpu.mem_read.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_READ", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DA= TA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC= _IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "MetricName": "LLC_MISSES.PCIE_READ", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", - "ScaleUnit": "4Bytes", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO. Derived= from unc_iio_data_req_of_cpu.mem_write.part0", - "EventCode": "0x83", - "EventName": "LLC_MISSES.PCIE_WRITE", - "FCMask": "0x07", - "Filter": "ch_mask=3D0x1f", - "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_D= ATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + = UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "MetricName": "LLC_MISSES.PCIE_WRITE", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", - "ScaleUnit": "4Bytes", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . D= erived from unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_MISSES.UNCACHEABLE", - "Filter": "config1=3D0x40e33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "Streaming stores (full cache line). Derived f= rom unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_REFERENCES.STREAMING_FULL", - "Filter": "config1=3D0x41833", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "ScaleUnit": "64Bytes", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "Streaming stores (partial cache line). Derive= d from unc_cha_tor_inserts.ia_miss", - "EventCode": "0x35", - "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", - "Filter": "config1=3D0x41a33", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. 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"UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x84", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x85", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x85", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x85", - "EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x86", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x87", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x87", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x87", - "EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8D", - "EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8E", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8F", - "EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken= ", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Intermediate bypass Take= n : Counts the number of times when the CHA was able to bypass HA pipe on t= he way to iMC. This is a latency optimization for situations when there is= light loadings on the memory subsystem. This can be filtered by when the = bypass was taken and when it was not. : Filter for transactions that succee= ded in taking the intermediate bypass.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Not Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Not Taken : Counts the n= umber of times when the CHA was able to bypass HA pipe on the way to iMC. = This is a latency optimization for situations when there is light loadings = on the memory subsystem. This can be filtered by when the bypass was taken= and when it was not. : Filter for transactions that could not take the byp= ass, and issues a read to memory. Note that transactions that did not take = the bypass but did not issue read to memory will not be counted.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Bypass : Taken", - "EventCode": "0x57", - "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Bypass : Taken : Counts the numbe= r of times when the CHA was able to bypass HA pipe on the way to iMC. This= is a latency optimization for situations when there is light loadings on t= he memory subsystem. This can be filtered by when the bypass was taken and= when it was not. : Filter for transactions that succeeded in taking the fu= ll bypass.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Uncore cache clock ticks", - "EventName": "UNC_CHA_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_CHA_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Mul= tiple Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Mu= ltiple Snoops : Counts the number of transactions that trigger a configurab= le number of cross snoops. Cores are snooped if the transaction looks up t= he cache and determines that it is necessary based on the operation type an= d what CoreValid bits are set. For example, if 2 CV bits are set on a data= read, the cores must have the data in S state so it is not necessary to sn= oop them. However, if only 1 CV bit is set the core my have modified the d= ata. If the transaction was an RFO, it would need to invalidate the lines.= This event can be filtered based on who triggered the initial snoop(s).", - "UMask": "0xf2", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.ANY_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop = : Counts the number of transactions that trigger a configurable number of c= ross snoops. Cores are snooped if the transaction looks up the cache and d= etermines that it is necessary based on the operation type and what CoreVal= id bits are set. For example, if 2 CV bits are set on a data read, the cor= es must have the data in S state so it is not necessary to snoop them. How= ever, if only 1 CV bit is set the core my have modified the data. If the t= ransaction was an RFO, it would need to invalidate the lines. This event c= an be filtered based on who triggered the initial snoop(s).", - "UMask": "0xf1", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requ= ests", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple Core Req= uests : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x42", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single Core Reques= ts", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.CORE_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single Core Reque= sts : Counts the number of transactions that trigger a configurable number = of cross snoops. Cores are snooped if the transaction looks up the cache a= nd determines that it is necessary based on the operation type and what Cor= eValid bits are set. For example, if 2 CV bits are set on a data read, the= cores must have the data in S state so it is not necessary to snoop them. = However, if only 1 CV bit is set the core my have modified the data. If t= he transaction was an RFO, it would need to invalidate the lines. This eve= nt can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x41", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple Eviction= : Counts the number of transactions that trigger a configurable number of = cross snoops. Cores are snooped if the transaction looks up the cache and = determines that it is necessary based on the operation type and what CoreVa= lid bits are set. For example, if 2 CV bits are set on a data read, the co= res must have the data in S state so it is not necessary to snoop them. Ho= wever, if only 1 CV bit is set the core my have modified the data. If the = transaction was an RFO, it would need to invalidate the lines. This event = can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x82", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single Eviction", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single Eviction := Counts the number of transactions that trigger a configurable number of cr= oss snoops. Cores are snooped if the transaction looks up the cache and de= termines that it is necessary based on the operation type and what CoreVali= d bits are set. For example, if 2 CV bits are set on a data read, the core= s must have the data in S state so it is not necessary to snoop them. Howe= ver, if only 1 CV bit is set the core my have modified the data. If the tr= ansaction was an RFO, it would need to invalidate the lines. This event ca= n be filtered based on who triggered the initial snoop(s).", - "UMask": "0x81", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Multiple External = Snoops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Multiple External= Snoops : Counts the number of transactions that trigger a configurable num= ber of cross snoops. Cores are snooped if the transaction looks up the cac= he and determines that it is necessary based on the operation type and what= CoreValid bits are set. For example, if 2 CV bits are set on a data read,= the cores must have the data in S state so it is not necessary to snoop th= em. However, if only 1 CV bit is set the core my have modified the data. = If the transaction was an RFO, it would need to invalidate the lines. This= event can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x22", - "Unit": "CHA" - }, - { - "BriefDescription": "Core Cross Snoops Issued : Single External Sn= oops", - "EventCode": "0x33", - "EventName": "UNC_CHA_CORE_SNP.EXT_ONE", - "PerPkg": "1", - "PublicDescription": "Core Cross Snoops Issued : Single External S= noops : Counts the number of transactions that trigger a configurable numbe= r of cross snoops. Cores are snooped if the transaction looks up the cache= and determines that it is necessary based on the operation type and what C= oreValid bits are set. For example, if 2 CV bits are set on a data read, t= he cores must have the data in S state so it is not necessary to snoop them= . However, if only 1 CV bit is set the core my have modified the data. If= the transaction was an RFO, it would need to invalidate the lines. This e= vent can be filtered based on who triggered the initial snoop(s).", - "UMask": "0x21", - "Unit": "CHA" - }, - { - "BriefDescription": "Counter 0 Occupancy", - "EventCode": "0x1F", - "EventName": "UNC_CHA_COUNTER0_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Counter 0 Occupancy : Since occupancy counts= can only be captured in the Cbo's 0 counter, this event allows a user to c= apture occupancy related information by filtering the Cb0 occupancy count c= aptured in Counter 0. The filtering available is found in the control reg= ister - threshold, invert and edge detect. E.g. setting threshold to 1 ca= n effectively monitor how many cycles the monitored queue has an entry.", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6E", - "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.GO", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Direct GO", - "EventCode": "0x6D", - "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xAF", - "EventName": "UNC_CHA_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xBA", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xBA", - "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xB6", - "EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xBB", - "EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xB7", - "EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xB8", - "EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xB9", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xB9", - "EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Normal priority reads issued to the memory co= ntroller from the CHA", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) read = is issued to any of the memory controller channels from the CHA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "HA to iMC Reads Issued : ISOCH", - "EventCode": "0x59", - "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY", - "PerPkg": "1", - "PublicDescription": "HA to iMC Reads Issued : ISOCH : Count of th= e number of reads issued to any of the memory controller channels. This ca= n be filtered by the priority of the reads.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Lin= e Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL", - "PerPkg": "1", - "PublicDescription": "Counts when a normal (Non-Isochronous) full = line write is issued from the CHA to any of the memory controller channels.= ", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Fu= ll Line", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH F= ull Line : Counts the total number of full line writes issued from the HA i= nto the memory controller.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial = Non-ISOCH", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : Partial= Non-ISOCH : Counts the total number of full line writes issued from the HA= into the memory controller.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Pa= rtial", - "EventCode": "0x5B", - "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY", - "PerPkg": "1", - "PublicDescription": "CHA to iMC Full Line Writes Issued : ISOCH P= artial : Counts the total number of full line writes issued from the HA int= o the memory controller.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Any Request", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ALL", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state.; Filters for any transaction origi= nating from the IPQ or IRQ. This does not include lookups originating from= the ISMQ.", - "UMask": "0x1fffff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : All Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : All Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Any local or remote transaction to the LLC, includi= ng prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.CODE_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE", - "PerPkg": "1", - "UMask": "0x1bd0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Code Reads", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Code Reads : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1bd0ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : CRd Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : CRd Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote CRd transactions to the LLC. This = includes CRd prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Code Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Code Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", - "UMask": "0x1bd001", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Local request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Local request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Any local transaction to the LLC, including prefe= tches from the Core", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", - "PerPkg": "1", - "UMask": "0x1bc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Req= uest", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ", - "PerPkg": "1", - "PublicDescription": "Counts the number of times the LLC was acces= sed - this includes code, data, prefetches and hints coming from L2. This = has numerous filters available. Note the non-standard filtering equation. = This event will count requests that lookup the cache multiple times with m= ultiple increments. One must ALWAYS set umask bit 0 and select a state or = states to match. Otherwise, the event will count nothing. CHAFilter0[24:= 21,17] bits correspond to [FMESI] state. Read transactions", - "UMask": "0x1bc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL", - "PerPkg": "1", - "UMask": "0x1fc1ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Data Read Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Data Read Request Filter : C= ounts the number of times the LLC was accessed - this includes code, data, = prefetches and hints coming from L2. This has numerous filters available. = Note the non-standard filtering equation. This event will count requests = that lookup the cache multiple times with multiple increments. One must AL= WAYS select a state or states (in the umask field) to match. Otherwise, th= e event will count nothing. : Read transactions.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Data Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Data Read Misses : Counts th= e number of times the LLC was accessed - this includes code, data, prefetch= es and hints coming from L2. This has numerous filters available. Note th= e non-standard filtering equation. This event will count requests that loo= kup the cache multiple times with multiple increments. One must ALWAYS sel= ect a state or states (in the umask field) to match. Otherwise, the event = will count nothing.", - "UMask": "0x1bc101", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DMND_READ_LOCAL", - "PerPkg": "1", - "UMask": "0x841ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : E State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.E", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : E State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Exclusive State", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : F State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : F State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Forward State", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate Requests", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS set umask bit = 0 and select a state or states to match. Otherwise, the event will count n= othing.", - "UMask": "0x1a44ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Flush or Invalidate Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Flush or Invalidate Filter := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : I State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.I", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : I State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Miss", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Transactions homed locally Fi= lter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Transactions homed locally F= ilter : Counts the number of times the LLC was accessed - this includes cod= e, data, prefetches and hints coming from L2. This has numerous filters av= ailable. Note the non-standard filtering equation. This event will count = requests that lookup the cache multiple times with multiple increments. On= e must ALWAYS select a state or states (in the umask field) to match. Othe= rwise, the event will count nothing. : Transaction whose address resides in= the local MC.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : M State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.M", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : M State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Modified State", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : All Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : All Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1fe001", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Write Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Write Request Filter : Count= s the number of times the LLC was accessed - this includes code, data, pref= etches and hints coming from L2. This has numerous filters available. Not= e the non-standard filtering equation. This event will count requests that= lookup the cache multiple times with multiple increments. One must ALWAYS= select a state or states (in the umask field) to match. Otherwise, the ev= ent will count nothing. : Writeback transactions to the LLC This includes = all write transactions -- both Cacheable and UC.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Reads", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Reads : Counts the number of= times the LLC was accessed - this includes code, data, prefetches and hint= s coming from L2. This has numerous filters available. Note the non-stand= ard filtering equation. This event will count requests that lookup the cac= he multiple times with multiple increments. One must ALWAYS select a state= or states (in the umask field) to match. Otherwise, the event will count = nothing.", - "UMask": "0x1bd9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Locally HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Locally HOMed : Counts the number of times the LLC was accessed - this= includes code, data, prefetches and hints coming from L2. This has numero= us filters available. Note the non-standard filtering equation. This even= t will count requests that lookup the cache multiple times with multiple in= crements. One must ALWAYS select a state or states (in the umask field) to= match. Otherwise, the event will count nothing.", - "UMask": "0x9d9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally Requested Reads that = are Remotely HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_REM_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally Requested Reads that= are Remotely HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", - "UMask": "0x11d9ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Read Misses : Counts the num= ber of times the LLC was accessed - this includes code, data, prefetches an= d hints coming from L2. This has numerous filters available. Note the non= -standard filtering equation. This event will count requests that lookup t= he cache multiple times with multiple increments. One must ALWAYS select a= state or states (in the umask field) to match. Otherwise, the event will = count nothing.", - "UMask": "0x1bd901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Locally HOMed Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Locally HOMed Read Misses : = Counts the number of times the LLC was accessed - this includes code, data,= prefetches and hints coming from L2. This has numerous filters available.= Note the non-standard filtering equation. This event will count requests= that lookup the cache multiple times with multiple increments. One must A= LWAYS select a state or states (in the umask field) to match. Otherwise, t= he event will count nothing.", - "UMask": "0xbd901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely HOMed Read Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_REM_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely HOMed Read Misses := Counts the number of times the LLC was accessed - this includes code, data= , prefetches and hints coming from L2. This has numerous filters available= . Note the non-standard filtering equation. This event will count request= s that lookup the cache multiple times with multiple increments. One must = ALWAYS select a state or states (in the umask field) to match. Otherwise, = the event will count nothing.", - "UMask": "0x13d901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely requested Read or Sn= oop Misses that are Remotely HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_OR_SNOOP_REMOTE_MISS_REM_HOM= ", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely requested Read or S= noop Misses that are Remotely HOMed : Counts the number of times the LLC wa= s accessed - this includes code, data, prefetches and hints coming from L2.= This has numerous filters available. Note the non-standard filtering equ= ation. This event will count requests that lookup the cache multiple times= with multiple increments. One must ALWAYS select a state or states (in th= e umask field) to match. Otherwise, the event will count nothing.", - "UMask": "0x161901", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Remotely Requested Reads that= are Locally HOMed", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_REMOTE_LOC_HOM", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Remotely Requested Reads tha= t are Locally HOMed : Counts the number of times the LLC was accessed - thi= s includes code, data, prefetches and hints coming from L2. This has numer= ous filters available. Note the non-standard filtering equation. This eve= nt will count requests that lookup the cache multiple times with multiple i= ncrements. One must ALWAYS select a state or states (in the umask field) t= o match. Otherwise, the event will count nothing.", - "UMask": "0xa19ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Reads that Hit the Snoop Filt= er", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.READ_SF_HIT", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Reads that Hit the Snoop Fil= ter : Counts the number of times the LLC was accessed - this includes code,= data, prefetches and hints coming from L2. This has numerous filters avai= lable. Note the non-standard filtering equation. This event will count re= quests that lookup the cache multiple times with multiple increments. One = must ALWAYS select a state or states (in the umask field) to match. Otherw= ise, the event will count nothing.", - "UMask": "0x1bd90e", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Requests", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Requests : Counts the nu= mber of times the LLC was accessed - this includes code, data, prefetches a= nd hints coming from L2. This has numerous filters available. Note the no= n-standard filtering equation. This event will count requests that lookup = the cache multiple times with multiple increments. One must ALWAYS set uma= sk bit 0 and select a state or states to match. Otherwise, the event will = count nothing. : Local or remote RFO transactions to the LLC. This include= s RFO prefetch.", - "UMask": "0x1bc8ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Request Filter", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Request Filter : Counts = the number of times the LLC was accessed - this includes code, data, prefet= ches and hints coming from L2. This has numerous filters available. Note = the non-standard filtering equation. This event will count requests that l= ookup the cache multiple times with multiple increments. One must ALWAYS s= elect a state or states (in the umask field) to match. Otherwise, the even= t will count nothing. : Local or remote RFO transactions to the LLC. This = includes RFO prefetch.", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : RFO Misses", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_MISS", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : RFO Misses : Counts the numb= er of times the LLC was accessed - this includes code, data, prefetches and= hints coming from L2. This has numerous filters available. Note the non-= standard filtering equation. This event will count requests that lookup th= e cache multiple times with multiple increments. One must ALWAYS select a = state or states (in the umask field) to match. Otherwise, the event will c= ount nothing.", - "UMask": "0x1bc801", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_LLC_LOOKUP.RFO_LOCAL", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.RFO_PREF_LOCAL", - "PerPkg": "1", - "UMask": "0x888ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : S State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.S", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : S State : Counts the number = of times the LLC was accessed - this includes code, data, prefetches and hi= nts coming from L2. This has numerous filters available. Note the non-sta= ndard filtering equation. This event will count requests that lookup the c= ache multiple times with multiple increments. One must ALWAYS select a sta= te or states (in the umask field) to match. Otherwise, the event will coun= t nothing. : Hit Shared State", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - E State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_E", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - E State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Exclusive State", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - H State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_H", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - H State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit HitMe State", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : SnoopFilter - S State", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.SF_S", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : SnoopFilter - S State : Coun= ts the number of times the LLC was accessed - this includes code, data, pre= fetches and hints coming from L2. This has numerous filters available. No= te the non-standard filtering equation. This event will count requests tha= t lookup the cache multiple times with multiple increments. One must ALWAY= S select a state or states (in the umask field) to match. Otherwise, the e= vent will count nothing. : SF Hit Shared State", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cache Lookups : Filters Requests for those th= at write info into the cache", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER", - "PerPkg": "1", - "PublicDescription": "Cache Lookups : Write Requests : Counts the = number of times the LLC was accessed - this includes code, data, prefetches= and hints coming from L2. This has numerous filters available. Note the = non-standard filtering equation. This event will count requests that looku= p the cache multiple times with multiple increments. One must ALWAYS set u= mask bit 0 and select a state or states to match. Otherwise, the event wil= l count nothing. : Writeback transactions from L2 to the LLC This includes= all write transactions -- both Cacheable and UC.", - "UMask": "0x1a42ff", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated.", - "Deprecated": "1", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL", - "PerPkg": "1", - "UMask": "0x842ff", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : All Lines Victimized", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.ALL", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : All Lines Victimized : Co= unts the number of lines that were victimized on a fill. This can be filte= red by the state that the line was in.", - "UMask": "0xf", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in E state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in E state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - All Lines", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - All Lines : Count= s the number of lines that were victimized on a fill. This can be filtered= by the state that the line was in.", - "UMask": "0x200f", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in E State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in E State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2002", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in M State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in M State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2001", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local Only", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local Only : Counts the n= umber of lines that were victimized on a fill. This can be filtered by the= state that the line was in.", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Local - Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Local - Lines in S State = : Counts the number of lines that were victimized on a fill. This can be f= iltered by the state that the line was in.", - "UMask": "0x2004", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in M state", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in M state : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Lines Victimized : Lines in S State", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE", - "PerPkg": "1", - "PublicDescription": "Lines Victimized : Lines in S State : Counts= the number of lines that were victimized on a fill. This can be filtered = by the state that the line was in.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : CV0 Prefetch Miss", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_MISS", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : CV0 Prefetch Miss : Miscellaneous= events in the Cbo.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : CV0 Prefetch Victim", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.CV0_PREF_VIC", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : CV0 Prefetch Victim : Miscellaneo= us events in the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Number of times that an RFO hit in S state.", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RFO_HIT_S", - "PerPkg": "1", - "PublicDescription": "Counts when a RFO (the Read for Ownership is= sued before a write) request hit a cacheline in the S (Shared) state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : Silent Snoop Eviction", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : Silent Snoop Eviction : Miscellan= eous events in the Cbo. : Counts the number of times when a Snoop hit in FS= E states and triggered a silent eviction. This is useful because this info= rmation is lost in the PRE encodings.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cbo Misc : Write Combining Aliasing", - "EventCode": "0x39", - "EventName": "UNC_CHA_MISC.WC_ALIASING", - "PerPkg": "1", - "PublicDescription": "Cbo Misc : Write Combining Aliasing : Miscel= laneous events in the Cbo. : Counts the number of times that a USWC write (= WCIL(F)) transaction hit in the LLC in M state, triggering a WBMtoI followe= d by the USWC write. This occurs when there is WC aliasing.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xE6", - "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xE6", - "EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ADEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.AKEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ALLRSFWAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.BLEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.FSF_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLOWSNP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLWAYRSV", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_PAMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_WAYMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.HACREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IDX_INPIPE", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IPQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IRQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ISMQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.IVEGRCREDIT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.LLC_WAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.NOTALLOWSNOOP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ONE_FSF_VIC", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.ONE_RSP_CON", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.PTL_INPIPE", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.RMW_SETMATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.RRQ_SETMATCH_VICP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.SETMATCHENTRYWSCT", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.SF_WAYS_RES", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.TOPA_MATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.TORID_MATCH_GO_P", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_REQ", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_AD_RSP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCB", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCS", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_RSP", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.VN_BL_WB", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "Pipe Rejects", - "EventCode": "0x42", - "EventName": "UNC_CHA_PIPE_REJECT.WAY_MATCH", - "PerPkg": "1", - "PublicDescription": "Pipe Rejects : More Miscellaneous events in = the Cbo.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC0", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC0 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC1", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC10", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC10", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC10 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 10 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC11", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC11", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC11 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 11 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC12", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC12", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC12 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 12 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC13", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC13", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC13 : Cou= nts the number of times when there are no credits available for sending rea= ds from the CHA into the iMC. In order to send reads into the memory contr= oller, the HA must first acquire a credit for the iMC's AD Ingress queue. := Filter for memory controller 13 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC2", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC2 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC3", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC3 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC4", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC4 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC5", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC5 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC6", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC6", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC6 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 6 only.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC7", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC7", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC7 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 7 only.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC8", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC8", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC8 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 8 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC9", - "EventCode": "0x58", - "EventName": "UNC_CHA_READ_NO_CREDITS.MC9", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC9 : Coun= ts the number of times when there are no credits available for sending read= s from the CHA into the iMC. In order to send reads into the memory contro= ller, the HA must first acquire a credit for the iMC's AD Ingress queue. : = Filter for memory controller 9 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "Local INVITOE requests (exclusive ownership o= f a cache line without receiving data) that miss the SF/LLC and remote INVI= TOE requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE", - "PerPkg": "1", - "PublicDescription": "Counts the total number of requests coming f= rom a unit on this socket for exclusive ownership of a cache line without r= eceiving data (INVITOE) to the CHA.", - "UMask": "0x30", - "Unit": "CHA" - }, - { - "BriefDescription": "Local read requests that miss the SF/LLC and = remote read requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS", - "PerPkg": "1", - "PublicDescription": "Counts read requests made into this CHA. Rea= ds include all read opcodes (including RFO: the Read for Ownership issued b= efore a write) .", - "UMask": "0x3", - "Unit": "CHA" - }, - { - "BriefDescription": "Local write requests that miss the SF/LLC and= remote write requests sent to the CHA's home agent", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES", - "PerPkg": "1", - "PublicDescription": "Counts write requests made into the CHA, inc= luding streaming, evictions, HitM (Reads from another core to a Modified ca= cheline), etc.", - "UMask": "0xc", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xAC", - "EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xAA", - "EventName": "UNC_CHA_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xAD", - "EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xAB", - "EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_CHA_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : IRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : IRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected= ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : IRQ Rejecte= d : Counts number of allocations per cycle into the specified Ingress queue= .", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Allocations : PRQ", - "EventCode": "0x13", - "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Allocations : PRQ : Count= s number of allocations per cycle into the specified Ingress queue.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", - "EventCode": "0x18", - "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the IRQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA= ", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C or SF Way", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : L= LC or SF Way : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Request Queue Rejects; Phy= Addr Match", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "IRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", - "EventCode": "0x19", - "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request", - "EventCode": "0x24", - "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : AD REQ on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : AD RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : Non UPI AK Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL NCB on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL NCS on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL RSP on VN0 : Numbe= r of times a transaction flowing through the ISMQ had to retry. Transactio= n pass through the ISMQ as responses for requests that already exist in the= Cbo. Some examples include: when data is returned or when snoop responses= come back from the cores. : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : BL WB on VN0 : Number= of times a transaction flowing through the ISMQ had to retry. Transaction= pass through the ISMQ as responses for requests that already exist in the = Cbo. Some examples include: when data is returned or when snoop responses = come back from the cores. : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request", - "EventCode": "0x2C", - "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 0 : Non UPI IV Request : = Number of times a transaction flowing through the ISMQ had to retry. Trans= action pass through the ISMQ as responses for requests that already exist i= n the Cbo. Some examples include: when data is returned or when snoop resp= onses come back from the cores. : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 1 : ANY0", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Rejects - Set 1 : HA", - "EventCode": "0x25", - "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA", - "PerPkg": "1", - "PublicDescription": "ISMQ Rejects - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 1 : ANY0", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 1 : ANY0 : Number of time= s a transaction flowing through the ISMQ had to retry. Transaction pass th= rough the ISMQ as responses for requests that already exist in the Cbo. So= me examples include: when data is returned or when snoop responses come bac= k from the cores. : Any condition listed in the ISMQ0 Reject counter was tr= ue", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "ISMQ Retries - Set 1 : HA", - "EventCode": "0x2D", - "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "ISMQ Retries - Set 1 : HA : Number of times = a transaction flowing through the ISMQ had to retry. Transaction pass thro= ugh the ISMQ as responses for requests that already exist in the Cbo. Some= examples include: when data is returned or when snoop responses come back = from the cores.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Ingress (from CMS) Occupancy : IRQ", - "EventCode": "0x11", - "EventName": "UNC_CHA_RxC_OCCUPANCY.IRQ", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Occupancy : IRQ : Counts = number of entries in the specified Ingress queue in each cycle.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : AD REQ on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : AD RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No AD VN0 credit for generat= ing a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : Non UPI AK Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject AK ring me= ssage", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL NCB on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL NCS on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL RSP on VN0 : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : No BL VN0 credit for generat= ing a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : BL WB on VN0 : Retry= Queue Inserts of Transactions that were already in another Retry Q (sub-ev= ents encode the reason for the next reject) : No BL VN0 credit for generati= ng a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request", - "EventCode": "0x2E", - "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 0 : Non UPI IV Request := Retry Queue Inserts of Transactions that were already in another Retry Q (= sub-events encode the reason for the next reject) : Can't inject IV ring me= ssage", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : Allow Snoop", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : Allow Snoop : Retry = Queue Inserts of Transactions that were already in another Retry Q (sub-eve= nts encode the reason for the next reject)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : ANY0", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : ANY0 : Retry Queue I= nserts of Transactions that were already in another Retry Q (sub-events enc= ode the reason for the next reject) : Any condition listed in the Other0 Re= ject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : HA", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : HA : Retry Queue Ins= erts of Transactions that were already in another Retry Q (sub-events encod= e the reason for the next reject)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : LLC OR SF Way : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Way conflict with another re= quest that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : LLC Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : LLC Victim : Retry Q= ueue Inserts of Transactions that were already in another Retry Q (sub-even= ts encode the reason for the next reject)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : PhyAddr Match", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : PhyAddr Match : Retr= y Queue Inserts of Transactions that were already in another Retry Q (sub-e= vents encode the reason for the next reject) : Address match with an outsta= nding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : SF Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : SF Victim : Retry Qu= eue Inserts of Transactions that were already in another Retry Q (sub-event= s encode the reason for the next reject) : Requests did not generate Snoop = filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Other Retries - Set 1 : Victim", - "EventCode": "0x2F", - "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Other Retries - Set 1 : Victim : Retry Queue= Inserts of Transactions that were already in another Retry Q (sub-events e= ncode the reason for the next reject)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= REQ on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D REQ on VN0 : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD= RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : A= D RSP on VN0 : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI AK Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI AK Request : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCB on VN0 : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= NCS on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L NCS on VN0 : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= RSP on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L RSP on VN0 : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL= WB on VN0", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : B= L WB on VN0 : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : No= n UPI IV Request", - "EventCode": "0x20", - "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 0 : N= on UPI IV Request : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Al= low Snoop", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : AN= Y0", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : A= NY0 : Any condition listed in the PRQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA= ", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C OR SF Way", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : L= LC OR SF Way : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LL= C Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Ph= yAddr Match", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : P= hyAddr Match : Address match with an outstanding request that was rejected.= ", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF= Victim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "PRQ Requests (from CMS) Rejected - Set 1 : S= F Victim : Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Vi= ctim", - "EventCode": "0x21", - "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : AD REQ on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a request", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : AD RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No AD VN0 credit for generating a response", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Re= quest", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : Non UPI AK R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject AK ring message", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL NCB on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCB", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL NCS on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for NCS", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0= ", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL RSP on VN= 0 : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : No BL VN0 credit for generating a response", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : BL WB on VN0= : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)= : No BL VN0 credit for generating a writeback", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Re= quest", - "EventCode": "0x2A", - "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 0 : Non UPI IV R= equest : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for= ISMQ) : Can't inject IV ring message", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : Allow Snoop = : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : ANY0", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : ANY0 : REQUE= STQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : Any c= ondition listed in the WBQ0 Reject counter was true", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : HA", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : HA : REQUEST= Q includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way= ", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : LLC OR SF Wa= y : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Way conflict with another request that caused the reject", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : LLC Victim := REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match= ", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : PhyAddr Matc= h : REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ= ) : Address match with an outstanding request that was rejected.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : SF Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : SF Victim : = REQUESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ) : = Requests did not generate Snoop filter victim", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Request Queue Retries - Set 1 : Victim", - "EventCode": "0x2B", - "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM", - "PerPkg": "1", - "PublicDescription": "Request Queue Retries - Set 1 : Victim : REQ= UESTQ includes: IRQ, PRQ, IPQ, RRQ, WBQ (everything except for ISMQ)", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xE2", - "EventName": "UNC_CHA_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xE3", - "EventName": "UNC_CHA_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_CHA_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xE1", - "EventName": "UNC_CHA_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xE0", - "EventName": "UNC_CHA_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for E-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.E_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking exclusive lines in the cores? cache.? Snoop filter capacity= evictions occur when the snoop filter is full and evicts an existing entry= to track a new entry.? Does not count clean evictions such as when a core?= s cache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for M-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.M_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking modified lines in the cores? cache.? Snoop filter capacity = evictions occur when the snoop filter is full and evicts an existing entry = to track a new entry.? Does not count clean evictions such as when a core?s= cache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop filter capacity evictions for S-state e= ntries.", - "EventCode": "0x3D", - "EventName": "UNC_CHA_SF_EVICTION.S_STATE", - "PerPkg": "1", - "PublicDescription": "Counts snoop filter capacity evictions for e= ntries tracking shared lines in the cores? cache.? Snoop filter capacity ev= ictions occur when the snoop filter is full and evicts an existing entry to= track a new entry.? Does not count clean evictions such as when a core?s c= ache replaces a tracked cacheline with a new cacheline.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : All", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.ALL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : All : Counts the number of sno= ops issued by the HA.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Broadcast snoops for Local Requ= ests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Broadcast snoops for Local Req= uests : Counts the number of snoops issued by the HA. : Counts the number o= f broadcast snoops issued by the HA responding to local requests", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Directed snoops for Local Reque= sts", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Directed snoops for Local Requ= ests : Counts the number of snoops issued by the HA. : Counts the number of= directed snoops issued by the HA responding to local requests", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoops Sent : Snoops sent for Local Requests", - "EventCode": "0x51", - "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL", - "PerPkg": "1", - "PublicDescription": "Snoops Sent : Snoops sent for Local Requests= : Counts the number of snoops issued by the HA. : Counts the number of bro= adcast or directed snoops issued by the HA responding to local requests", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspCnflct", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspCnflct := Number of snoop responses received for a Local request : Filters for snoo= ps responses of RspConflict to local CA requests. This is returned when a = snoop finds an existing outstanding transaction in a remote caching agent w= hen it CAMs that caching agent. This triggers conflict resolution hardware= . This covers both RspCnflct and RspCnflctWbI.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspFwd : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspFwd to local CA requests. This snoop response is only poss= ible for RdCur when a snoop HITM/E in a remote caching agent and it directl= y forwards data to a requestor without changing the requestor's cache line = state.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : Rsp*FWD*WB = : Number of snoop responses received for a Local request : Filters for a s= noop response of Rsp*Fwd*WB to local CA requests. This snoop response is o= nly used in 4s systems. It is used when a snoop HITM's in a remote caching= agent and it directly forwards data to a requestor, and simultaneously ret= urns data to the home to be written back to memory.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspI", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspI : Numb= er of snoop responses received for a Local request : Filters for snoops re= sponses of RspI to local CA requests. RspI is returned when the remote cac= he does not have the data, or when the remote cache silently evicts data (s= uch as when an RFO hits non-modified data).", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspIFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspIFwd : N= umber of snoop responses received for a Local request : Filters for snoop = responses of RspIFwd to local CA requests. This is returned when a remote = caching agent forwards data and the requesting agent is able to acquire the= data in E or M states. This is commonly returned with RFO transactions. = It can be either a HitM or a HitFE.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspS", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspS : Numb= er of snoop responses received for a Local request : Filters for snoop res= ponses of RspS to local CA requests. RspS is returned when a remote cache = has data but is not forwarding it. It is a way to let the requesting socke= t know that it cannot allocate the data in E state. No data is sent with S= RspS.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : RspSFwd", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : RspSFwd : N= umber of snoop responses received for a Local request : Filters for a snoo= p response of RspSFwd to local CA requests. This is returned when a remote= caching agent forwards data but holds on to its currently copy. This is c= ommon for data and code reads that hit in a remote socket in E or F state.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Snoop Responses Received Local : Rsp*WB", - "EventCode": "0x5D", - "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB", - "PerPkg": "1", - "PublicDescription": "Snoop Responses Received Local : Rsp*WB : Nu= mber of snoop responses received for a Local request : Filters for a snoop= response of RspIWB or RspSWB to local CA requests. This is returned when = a non-RFO request hits in M state. Data and Code Reads can return either R= spIWB or RspSWB depending on how the system has been configured. InvItoE t= ransactions will also return RspIWB because they must acquire ownership.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : MtoI RspIData= M", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM= ", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit LLC", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : Pull Data Par= tial - Hit SF", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t LLC", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hi= t SF", - "EventCode": "0x6B", - "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD0", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD2", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD4", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD6", - "EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD1", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD3", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD5", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD7", - "EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All : Counts the number of ent= ries successfully inserted into the TOR that match qualifications specified= by the subevent. Does not include addressless requests such as locks and= interrupts.", - "UMask": "0xc001ffff", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DDR4 Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DDR4 Access : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_CHA_TOR_INSERTS.DDR", - "Deprecated": "1", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR4", - "PerPkg": "1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : SF/LLC Evictions", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts. : TOR allocation occurred as a result of SF/LLC e= victions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Hits", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Hits : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushes issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushOpts issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushOpts issued by iA Cores= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRDs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRDs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; CRd Pref from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Code read prefetch from local I= A that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc837ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores : = Counts the number of entries successfully inserted into the TOR that match = qualifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es : Counts the number of entries successfully inserted into the TOR that m= atch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to page walks that hit the LLC : Counts the number of entries successfull= y inserted into the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc837fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores tha= t hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opts issued by iA Cores th= at hit the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that hit the LLC : Counts the number of entries successfully inserted in= to the TOR that match qualifications specified by the subevent. Does not = include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hi= t the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that H= it the LLC : Counts the number of entries successfully inserted into the TO= R that match qualifications specified by the subevent. Does not include a= ddressless requests such as locks and interrupts.", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from iA Cores that= Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from iA Cores tha= t Missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRds issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRds issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores th= at Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CRd_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores tha= t Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores du= e to a page walk that missed the LLC : Counts the number of entries success= fully inserted into the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc837fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt issued by iA Cores that= missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt issued by iA Cores tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Core= s that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cor= es that missed the LLC : Counts the number of entries successfully inserted= into the TOR that match qualifications specified by the subevent. Does n= ot include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiLF misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts; WCiL misses from local IA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts; Data read from local IA that mi= sses in the snoop filter", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Mi= ssed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that M= issed the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores th= at Missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores t= hat Missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that = Missed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : UCRdFs issued by iA Cores that= Missed LLC : Counts the number of entries successfully inserted into the T= OR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that M= issed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores that = Missed the LLC : Counts the number of entries successfully inserted into th= e TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Mi= ssed LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WiLs issued by iA Cores that M= issed LLC : Counts the number of entries successfully inserted into the TOR= that match qualifications specified by the subevent. Does not include ad= dressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by iA Cores : Coun= ts the number of entries successfully inserted into the TOR that match qual= ifications specified by the subevent. Does not include addressless reques= ts such as locks and interrupts.", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFO_Prefs issued by iA Cores := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", - "PerPkg": "1", - "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc3fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBEFtoIs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI", - "PerPkg": "1", - "PublicDescription": "WbEFtoIs issued by iA Cores . (Non Modified= Write Backs) :Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xcc37ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBMtoEs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE", - "PerPkg": "1", - "PublicDescription": "WbMtoEs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xcc2fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. = Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Writ= e Backs) :Counts the number of entries successfully inserted into the TOR = that match qualifications specified by the subevent. Does not include addr= essless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WBStoIs issued by an IA Core. = Non Modified Write Backs", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI", - "PerPkg": "1", - "PublicDescription": "WbStoIs issued by iA Cores . (Non Modified = Write Backs) :Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xcc67ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLs issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WCiLF issued by iA Cores : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : CLFlushes issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices th= at hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat hit the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= Hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t Hit the LLC : Counts the number of entries successfully inserted into the= TOR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that hit the LLC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that hit the LLC : Counts the number of entries successfully inserted into= the TOR that match qualifications specified by the subevent. Does not in= clude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = hit the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= hit the LLC : Counts the number of entries successfully inserted into the = TOR that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices : C= ounts the number of entries successfully inserted into the TOR that match q= ualifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts.", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xcd43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All requests from IO Devices th= at missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All requests from IO Devices t= hat missed the LLC : Counts the number of entries successfully inserted int= o the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that= missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMs issued by IO Devices tha= t missed the LLC : Counts the number of entries successfully inserted into = the TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a pa= rtial write request, from IO Devices that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a p= artial write request, from IO Devices that missed the LLC : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices = that missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= that missed the LLC : Counts the number of entries successfully inserted i= nto the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices that = missed the LLC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that= missed the LLC : Counts the number of entries successfully inserted into t= he TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices= : Counts the number of entries successfully inserted into the TOR that mat= ch qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : RFOs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Co= unts the number of entries successfully inserted into the TOR that match qu= alifications specified by the subevent. Does not include addressless requ= ests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : WbMtoIs issued by IO Devices := Counts the number of entries successfully inserted into the TOR that match= qualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number o= f entries successfully inserted into the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lock= s and interrupts. : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : IRQ - Non iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just ISOC", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just ISOC : Counts the number = of entries successfully inserted into the TOR that match qualifications spe= cified by the subevent. Does not include addressless requests such as loc= ks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Local Targets", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Local Targets : Counts th= e number of entries successfully inserted into the TOR that match qualifica= tions specified by the subevent. Does not include addressless requests su= ch as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA and IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA and IO : Cou= nts the number of entries successfully inserted into the TOR that match qua= lifications specified by the subevent. Does not include addressless reque= sts such as locks and interrupts. : All locally initiated requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local iA", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local iA : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally initiated requests from iA Cores", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : All from Local IO", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : All from Local IO : Counts the= number of entries successfully inserted into the TOR that match qualificat= ions specified by the subevent. Does not include addressless requests suc= h as locks and interrupts. : All locally generated IO traffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of= the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] o= f the extended umask field : Counts the number of entries successfully inse= rted into the TOR that match qualifications specified by the subevent. Do= es not include addressless requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just Misses", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just Misses : Counts the numbe= r of entries successfully inserted into the TOR that match qualifications s= pecified by the subevent. Does not include addressless requests such as l= ocks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : MMCFG Access", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : MMCFG Access : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NearMem", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NearMem : Counts the numb= er of entries successfully inserted into the TOR that match qualifications = specified by the subevent. Does not include addressless requests such as = locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NonCoherent", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the = number of entries successfully inserted into the TOR that match qualificati= ons specified by the subevent. Does not include addressless requests such= as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Just NotNearMem", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Just NotNearMem : Counts the n= umber of entries successfully inserted into the TOR that match qualificatio= ns specified by the subevent. Does not include addressless requests such = as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in = b[29:19] of the extended umask field", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in= b[29:19] of the extended umask field : Counts the number of entries succes= sfully inserted into the TOR that match qualifications specified by the sub= event. Does not include addressless requests such as locks and interrupts= .", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number= of entries successfully inserted into the TOR that match qualifications sp= ecified by the subevent. Does not include addressless requests such as lo= cks and interrupts. : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Inserts : PRQ - Non IOSF", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the nu= mber of entries successfully inserted into the TOR that match qualification= s specified by the subevent. Does not include addressless requests such a= s locks and interrupts.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DDR4 Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DDR4 Access : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : SF/LLC Evictions", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts. : TOR allocation occurred as a = result of SF/LLC evictions (came from the ISMQ)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Hits", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xc001ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc8c7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Core= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cor= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8d7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRDs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRDs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc80fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; CRd Pref from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Code read prefetch from local= IA that misses in the snoop filter", - "UMask": "0xc88fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc837ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = : For each cycle, this event accumulates the number of valid entries in the= TOR that match qualifications specified by the subevent. Does not incl= ude addressless requests such as locks and interrupts.", - "UMask": "0xc827ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores : For each cycle, this event accumulates the number of valid entries i= n the TOR that match qualifications specified by the subevent. Does not= include addressless requests such as locks and interrupts.", - "UMask": "0xc8a7ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc88ffd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that hit the LLC : For each cycle, this event accumulates = the number of valid entries in the TOR that match qualifications specified = by the subevent. Does not include addressless requests such as locks an= d interrupts.", - "UMask": "0xc837fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opts issued by iA Cores t= hat hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opts issued by iA Cores = that hit the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc827fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that hit the LLC : For each cycle, this event accumulates the number o= f valid entries in the TOR that match qualifications specified by the subev= ent. Does not include addressless requests such as locks and interrupts= .", - "UMask": "0xc8a7fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Hit the LLC : For each cycle, this event accumulates the number of valid e= ntries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc807fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc887fd01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from iA Cores th= at Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from iA Cores t= hat Missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRds issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc80ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores = that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc88ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRdPte issued by iA Cores due= to a page walk that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRDPTE", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRdPte issued by iA Cores du= e to a page walk that missed the LLC : For each cycle, this event accumulat= es the number of valid entries in the TOR that match qualifications specifi= ed by the subevent. Does not include addressless requests such as locks= and interrupts.", - "UMask": "0xc837fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt issued by iA Cores th= at missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt issued by iA Cores t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc827fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA Co= res that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : DRd_Opt_Prefs issued by iA C= ores that missed the LLC : For each cycle, this event accumulates the numbe= r of valid entries in the TOR that match qualifications specified by the su= bevent. Does not include addressless requests such as locks and interru= pts.", - "UMask": "0xc8a7fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiLF misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_FULL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy; WCiL misses from local IA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_PARTIAL_STREAMING_WR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy; Data read from local IA that = misses in the snoop filter", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores that = Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that= Missed the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc807fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores = that Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= that Missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc887fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores tha= t Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores th= at Missed LLC : For each cycle, this event accumulates the number of valid = entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc877de01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc86ffe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that= Missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores tha= t Missed the LLC : For each cycle, this event accumulates the number of val= id entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc867fe01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that = Missed LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that= Missed LLC : For each cycle, this event accumulates the number of valid en= tries in the TOR that match qualifications specified by the subevent. D= oes not include addressless requests such as locks and interrupts.", - "UMask": "0xc87fde01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores : Fo= r each cycle, this event accumulates the number of valid entries in the TOR= that match qualifications specified by the subevent. Does not include = addressless requests such as locks and interrupts.", - "UMask": "0xc807ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFO_Prefs issued by iA Cores= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc887ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc27ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc86fff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts.", - "UMask": "0xc867ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xc001ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Device= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8c3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices = that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that hit the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc001fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at Hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat Hit the LLC : For each cycle, this event accumulates the number of vali= d entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that hit the LLC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "UMask": "0xcd43fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that hit the LLC : For each cycle, this event accumulates the number of = valid entries in the TOR that match qualifications specified by the subeven= t. Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc8f3fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t hit the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at hit the LLC : For each cycle, this event accumulates the number of valid= entries in the TOR that match qualifications specified by the subevent. = Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fd04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices := For each cycle, this event accumulates the number of valid entries in the = TOR that match qualifications specified by the subevent. Does not inclu= de addressless requests such as locks and interrupts.", - "UMask": "0xcc43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", - "UMask": "0xcd43ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All requests from IO Devices = that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All requests from IO Devices= that missed the LLC : For each cycle, this event accumulates the number of= valid entries in the TOR that match qualifications specified by the subeve= nt. Does not include addressless requests such as locks and interrupts.= ", - "UMask": "0xc001fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMs issued by IO Devices th= at missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices t= hat missed the LLC : For each cycle, this event accumulates the number of v= alid entries in the TOR that match qualifications specified by the subevent= . Does not include addressless requests such as locks and interrupts.", - "UMask": "0xcc43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a = partial write request, from IO Devices that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a= partial write request, from IO Devices that missed the LLC : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0xcd43fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s that missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es that missed the LLC : For each cycle, this event accumulates the number = of valid entries in the TOR that match qualifications specified by the sube= vent. Does not include addressless requests such as locks and interrupt= s.", - "UMask": "0xc8f3fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices tha= t missed the LLC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices th= at missed the LLC : For each cycle, this event accumulates the number of va= lid entries in the TOR that match qualifications specified by the subevent.= Does not include addressless requests such as locks and interrupts.", - "UMask": "0xc803fe04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PCIRdCurs issued by IO Device= s", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devic= es : For each cycle, this event accumulates the number of valid entries in = the TOR that match qualifications specified by the subevent. Does not i= nclude addressless requests such as locks and interrupts.", - "UMask": "0xc8f3ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : RFOs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : = For each cycle, this event accumulates the number of valid entries in the T= OR that match qualifications specified by the subevent. Does not includ= e addressless requests such as locks and interrupts.", - "UMask": "0xc803ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices= : For each cycle, this event accumulates the number of valid entries in th= e TOR that match qualifications specified by the subevent. Does not inc= lude addressless requests such as locks and interrupts.", - "UMask": "0xcc23ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, t= his event accumulates the number of valid entries in the TOR that match qua= lifications specified by the subevent. Does not include addressless req= uests such as locks and interrupts. : From an iA Core", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : IRQ - Non iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just ISOC", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, = this event accumulates the number of valid entries in the TOR that match qu= alifications specified by the subevent. Does not include addressless re= quests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Local Targets", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Local Targets : For eac= h cycle, this event accumulates the number of valid entries in the TOR that= match qualifications specified by the subevent. Does not include addre= ssless requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA and IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA and IO : F= or each cycle, this event accumulates the number of valid entries in the TO= R that match qualifications specified by the subevent. Does not include= addressless requests such as locks and interrupts. : All locally initiated= requests", - "UMask": "0xc000ff05", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local iA", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local iA : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally initiated reques= ts from iA Cores", - "UMask": "0xc000ff01", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : All from Local IO", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : All from Local IO : For each= cycle, this event accumulates the number of valid entries in the TOR that = match qualifications specified by the subevent. Does not include addres= sless requests such as locks and interrupts. : All locally generated IO tra= ffic", - "UMask": "0xc000ff04", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] = of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19]= of the extended umask field : For each cycle, this event accumulates the n= umber of valid entries in the TOR that match qualifications specified by th= e subevent. Does not include addressless requests such as locks and int= errupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just Misses", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just Misses : For each cycle= , this event accumulates the number of valid entries in the TOR that match = qualifications specified by the subevent. Does not include addressless = requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : MMCFG Access", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NearMem", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NearMem : For each cycl= e, this event accumulates the number of valid entries in the TOR that match= qualifications specified by the subevent. Does not include addressless= requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NonCoherent", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NonCoherent : For each = cycle, this event accumulates the number of valid entries in the TOR that m= atch qualifications specified by the subevent. Does not include address= less requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Just NotNearMem", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NOT_NEARMEM", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Just NotNearMem : For each c= ycle, this event accumulates the number of valid entries in the TOR that ma= tch qualifications specified by the subevent. Does not include addressl= ess requests such as locks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode i= n b[29:19] of the extended umask field", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode = in b[29:19] of the extended umask field : For each cycle, this event accumu= lates the number of valid entries in the TOR that match qualifications spec= ified by the subevent. Does not include addressless requests such as lo= cks and interrupts.", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle,= this event accumulates the number of valid entries in the TOR that match q= ualifications specified by the subevent. Does not include addressless r= equests such as locks and interrupts. : From a PCIe Device", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", - "PerPkg": "1", - "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cy= cle, this event accumulates the number of valid entries in the TOR that mat= ch qualifications specified by the subevent. Does not include addressle= ss requests such as locks and interrupts.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xA7", - "EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xA2", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xA3", - "EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xA1", - "EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xA4", - "EventName": "UNC_CHA_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xA0", - "EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xA5", - "EventName": "UNC_CHA_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_CHA_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_CHA_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_CHA_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9A", - "EventName": "UNC_CHA_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_CHA_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xB0", - "EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xB4", - "EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xB1", - "EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xB2", - "EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xB3", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xB3", - "EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xB5", - "EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI : Pushed to LLC", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC", - "PerPkg": "1", - "PublicDescription": "WbPushMtoI : Pushed to LLC : Counts the numb= er of times when the CHA was received WbPushMtoI : Counts the number of tim= es when the CHA was able to push WbPushMToI to LLC", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "WbPushMtoI : Pushed to Memory", - "EventCode": "0x56", - "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM", - "PerPkg": "1", - "PublicDescription": "WbPushMtoI : Pushed to Memory : Counts the n= umber of times when the CHA was received WbPushMtoI : Counts the number of = times when the CHA was unable to push WbPushMToI to LLC (hence pushed it to= MEM)", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC0 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 0 only.", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 1 only.", - "UMask": "0x2", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC10", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC10", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC10 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 10 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC11", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC11", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC11 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 11 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC12", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC12", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC12 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 12 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC13", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC13", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC13 : Co= unts the number of times when there are no credits available for sending WR= ITEs from the CHA into the iMC. In order to send WRITEs into the memory co= ntroller, the HA must first acquire a credit for the iMC's BL Ingress queue= . : Filter for memory controller 13 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC2 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 2 only.", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC3 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 3 only.", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC4 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 4 only.", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC5 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 5 only.", - "UMask": "0x20", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC6", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC6", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC6 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 6 only.", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC7", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC7", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC7 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 7 only.", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC8", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC8", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC8 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 8 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC9", - "EventCode": "0x5A", - "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC9", - "PerPkg": "1", - "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC9 : Cou= nts the number of times when there are no credits available for sending WRI= TEs from the CHA into the iMC. In order to send WRITEs into the memory con= troller, the HA must first acquire a credit for the iMC's BL Ingress queue.= : Filter for memory controller 9 only.", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 0?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", - "UMask": "0x8", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits= ", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 0?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", - "UMask": "0x4", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 1?) - Conflict = : Number of XPT prefetches dropped due to AD CMS write port contention", - "UMask": "0x80", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits= ", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Dropped (on 1?) - No Credit= s : Number of XPT prefetches dropped due to lack of XPT AD egress credits", - "UMask": "0x40", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Sent (on 0?)", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.SENT0", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Sent (on 0?) : Number of XP= T prefetches sent", - "UMask": "0x1", - "Unit": "CHA" - }, - { - "BriefDescription": "XPT Prefetches : Sent (on 1?)", - "EventCode": "0x6f", - "EventName": "UNC_CHA_XPT_PREF.SENT1", - "PerPkg": "1", - "PublicDescription": "XPT Prefetches : Sent (on 1?) : Number of XP= T prefetches sent", - "UMask": "0x10", - "Unit": "CHA" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN", - "UMask": "0x20", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN", - "UMask": "0x21", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN", - "UMask": "0x22", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN", - "UMask": "0x23", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN", - "UMask": "0x24", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN", - "UMask": "0x25", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN", - "UMask": "0x26", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Free running counter that increments for ever= y 32 bytes of data sent from the IO agent to the SOC", - "EventCode": "0xff", - "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", - "PerPkg": "1", - "PublicDescription": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN", - "UMask": "0x27", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "Clockticks of the integrated IO (IIO) traffic= controller", - "EventCode": "0x01", - "EventName": "UNC_IIO_CLOCKTICKS", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Free running counter that increments for IIO = clocktick", - "EventCode": "0xff", - "EventName": "UNC_IIO_CLOCKTICKS_FREERUN", - "PerPkg": "1", - "PublicDescription": "Free running counter that increments for int= egrated IO (IIO) traffic controller clockticks", - "UMask": "0x10", - "Unit": "iio_free_running" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts : All Ports", - "EventCode": "0xC2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0-7", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0xff", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0-7", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 0", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 1", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 1", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 2", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 2", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 3", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 3", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 4", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 4", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 5", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 5", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 6", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 6", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Inserts of completions= with data: Part 7", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", - "FCMask": "0x04", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "PCIe Completion Buffer Inserts of completion= s with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plug= ged in to Lane 0/1, Or x4 card is plugged in to slot 7", - "UMask": "0x3", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", - "EventCode": "0xD5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0-7", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7", - "UMask": "0xff", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 0", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 1", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 1 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 2", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 2 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 3", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 3 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 4", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 4 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 5", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 5 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 6", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 6 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Completion Buffer Occupancy of completio= ns with data : Part 7", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7", - "FCMask": "0x04", - "PerPkg": "1", - "PublicDescription": "PCIe Completion Buffer Occupancy : Part 7 : = x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or = x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1= , Or x4 card is plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5= , Or x4 card is plugged in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. = Includes all requests initiated by the main die, including reads and write= s. : x4 card is plugged in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : IOMMU - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, = Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, = Or x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's PCICFG space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's PCICFG space : Number of DWs (4 bytes) requested by the main die. I= ncludes all requests initiated by the main die, including reads and writes.= : x4 card is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reading from= Card's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reading fro= m Card's IO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : I= OMMU - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x= 4 card is plugged in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x= 4 card is plugged in to slot 4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's IO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's IO space : Number of DWs (4 bytes) requested by the main die. Inclu= des all requests initiated by the main die, including reads and writes. : x= 4 card is plugged in to slot 7", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : IOMMU - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core reporting co= mpletion of Card read from Core DRAM", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core reporting c= ompletion of Card read from Core DRAM : Number of DWs (4 bytes) requested b= y the main die. Includes all requests initiated by the main die, including= reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := IOMMU - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or= x4 card is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or= x4 card is plugged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Core writing to C= ard's MMIO space", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Core writing to = Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Inc= ludes all requests initiated by the main die, including reads and writes. := x4 card is plugged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card p= lugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plu= gged in to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card p= lugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plu= gged in to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) reading from this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) reading from this card. : Number of DWs (4 bytes) reques= ted by the main die. Includes all requests initiated by the main die, incl= uding reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plu= gged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugg= ed in to slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plu= gged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugg= ed in to slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested by the CPU : Another card (dif= ferent IIO stack) writing to this card.", - "EventCode": "0xC0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested by the CPU : Another card (di= fferent IIO stack) writing to this card. : Number of DWs (4 bytes) requeste= d by the main die. Includes all requests initiated by the main die, includ= ing reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : IOMMU - Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1,= Or x4 card is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5,= Or x4 card is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Atomic requests t= argeting DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Atomic requests = targeting DRAM : Number of DWs (4 bytes) the card requests of the main die.= Includes all requests initiated by the Card, including reads and writes= . : x4 card is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugge= d in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged = in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugge= d in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged = in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : CmpD - device sen= ding completion to CPU request", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : CmpD - device se= nding completion to CPU request : Number of DWs (4 bytes) the card requests= of the main die. Includes all requests initiated by the Card, including= reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : IOMM= U - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 c= ard is plugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x16 = card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 c= ard is plugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x8 c= ard plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card read= ing from DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card reading fro= m DRAM : Number of DWs (4 bytes) the card requests of the main die. Incl= udes all requests initiated by the Card, including reads and writes. : x4 c= ard is plugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : IOMMU = - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 0", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 car= d is plugged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x16 ca= rd plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 car= d is plugged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x8 car= d plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Four byte data request of the CPU : Card writ= ing to DRAM", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card writing to = DRAM : Number of DWs (4 bytes) the card requests of the main die. Includ= es all requests initiated by the Card, including reads and writes. : x4 car= d is plugged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged= in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x16 card plugged i= n to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged= in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x8 card plugged in= to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Messages", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Messages : Numbe= r of DWs (4 bytes) the card requests of the main die. Includes all reque= sts initiated by the Card, including reads and writes. : x4 card is plugged= in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 ca= rd plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is= plugged in to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 ca= rd plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is= plugged in to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card reading from= another Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card reading fro= m another Card (same or different stack) : Number of DWs (4 bytes) the card= requests of the main die. Includes all requests initiated by the Card, = including reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card= plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is p= lugged in to slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card= plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is p= lugged in to slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Data requested of the CPU : Card writing to a= nother Card (same or different stack)", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Data requested of the CPU : Card writing to = another Card (same or different stack) : Number of DWs (4 bytes) the card r= equests of the main die. Includes all requests initiated by the Card, in= cluding reads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Passing data = to be written", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Passing data= to be written : How often different queues (e.g. channel / fc) ask to send= request into pipeline : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Issuing final= read or write of line", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Issuing fina= l read or write of line : How often different queues (e.g. channel / fc) as= k to send request into pipeline", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Processing re= sponse from IOMMU", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Processing r= esponse from IOMMU : How often different queues (e.g. channel / fc) ask to = send request into pipeline", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Issuing to IO= MMU", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Issuing to I= OMMU : How often different queues (e.g. channel / fc) ask to send request i= nto pipeline", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Request Owner= ship", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Request Owne= rship : How often different queues (e.g. channel / fc) ask to send request = into pipeline : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests : Writing line", - "EventCode": "0x86", - "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests : Writing line= : How often different queues (e.g. channel / fc) ask to send request into = pipeline : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Passi= ng data to be written", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Pass= ing data to be written : How often different queues (e.g. channel / fc) are= allowed to send request into pipeline : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Issui= ng final read or write of line", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Issu= ing final read or write of line : How often different queues (e.g. channel = / fc) are allowed to send request into pipeline", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Proce= ssing response from IOMMU", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Proc= essing response from IOMMU : How often different queues (e.g. channel / fc)= are allowed to send request into pipeline", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Issui= ng to IOMMU", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Issu= ing to IOMMU : How often different queues (e.g. channel / fc) are allowed t= o send request into pipeline", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Reque= st Ownership", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Requ= est Ownership : How often different queues (e.g. channel / fc) are allowed = to send request into pipeline : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Incoming arbitration requests granted : Writi= ng line", - "EventCode": "0x87", - "EventName": "UNC_IIO_INBOUND_ARB_WON.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Incoming arbitration requests granted : Writ= ing line : How often different queues (e.g. channel / fc) are allowed to se= nd request into pipeline : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 1G Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.1G_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 1G Page : Counts if a tran= saction to a 1G page, on its first lookup, hits the IOTLB.", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 2M Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.2M_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 2M Page : Counts if a tran= saction to a 2M page, on its first lookup, hits the IOTLB.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Hits to a 4K Page", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.4K_HITS", - "PerPkg": "1", - "PublicDescription": ": IOTLB Hits to a 4K Page : Counts if a tran= saction to a 4K page, on its first lookup, hits the IOTLB.", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB lookups all", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": IOTLB lookups all : Some transactions have= to look up IOTLB multiple times. Counts every time a request looks up IOT= LB.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache hits", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", - "PerPkg": "1", - "PublicDescription": ": Context cache hits : Counts each time a fi= rst look up of the transaction hits the RCC.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache lookups", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": Context cache lookups : Counts each time a= transaction looks up root context cache.", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB lookups first", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": IOTLB lookups first : Some transactions ha= ve to look up IOTLB multiple times. Counts the first time a request looks = up IOTLB.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOTLB Fills (same as IOTLB miss)", - "EventCode": "0x40", - "EventName": "UNC_IIO_IOMMU0.MISSES", - "PerPkg": "1", - "PublicDescription": ": IOTLB Fills (same as IOTLB miss) : When a = transaction misses IOTLB, it does a page walk to look up memory and bring i= n the relevant page translation. Counts when this page translation is writt= en to IOTLB.", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Cycles PWT full", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.CYC_PWT_FULL", - "PerPkg": "1", - "PublicDescription": ": Cycles PWT full : Counts cycles the IOMMU = has reached its maximum limit for outstanding page walks.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": IOMMU memory access", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", - "PerPkg": "1", - "PublicDescription": ": IOMMU memory access : IOMMU sends out memo= ry fetches when it misses the cache look up which is indicated by this sign= al. M2IOSF only uses low priority channel", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 1G page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 1G page : Counts each time a = transaction's first look up hits the SLPWC at the 1G level", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 2M page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 2M page : Counts each time a = transaction's first look up hits the SLPWC at the 2M level", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWC Hit to a 4K page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_4K_HITS", - "PerPkg": "1", - "PublicDescription": ": PWC Hit to a 4K page : Counts each time a = transaction's first look up hits the SLPWC at the 4K level", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": PWT Hit to a 256T page", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", - "PerPkg": "1", - "PublicDescription": ": PWT Hit to a 256T page : Counts each time = a transaction's first look up hits the SLPWC at the 512G level", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": PageWalk cache fill", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS", - "PerPkg": "1", - "PublicDescription": ": PageWalk cache fill : When a transaction m= isses SLPWC, it does a page walk to look up memory and bring in the relevan= t page translation. When this page translation is written to SLPWC, ObsPwcF= illValid_nnnH is asserted.", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": PageWalk cache lookup", - "EventCode": "0x41", - "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": PageWalk cache lookup : Counts each time a= transaction looks up second level page walk cache.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Interrupt Entry cache hit", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS", - "PerPkg": "1", - "PublicDescription": ": Interrupt Entry cache hit : Counts each ti= me a transaction's first look up hits the IEC.", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": ": Interrupt Entry cache lookup", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS", - "PerPkg": "1", - "PublicDescription": ": Interrupt Entry cache lookup : Counts the = number of transaction looks up that interrupt remapping cache.", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": ": Device-selective Context cache invalidation= cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DEVICE", - "PerPkg": "1", - "PublicDescription": ": Device-selective Context cache invalidatio= n cycles : Counts number of Device selective context cache invalidation eve= nts", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Domain-selective Context cache invalidation= cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DOMAIN", - "PerPkg": "1", - "PublicDescription": ": Domain-selective Context cache invalidatio= n cycles : Counts number of Domain selective context cache invalidation eve= nts", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": ": Context cache global invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_GBL", - "PerPkg": "1", - "PublicDescription": ": Context cache global invalidation cycles := Counts number of Context Cache global invalidation events", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Domain-selective IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_DOMAIN", - "PerPkg": "1", - "PublicDescription": ": Domain-selective IOTLB invalidation cycles= : Counts number of Domain selective invalidation events", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Global IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_GBL", - "PerPkg": "1", - "PublicDescription": ": Global IOTLB invalidation cycles : Indicat= es that IOMMU is doing global invalidation.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Page-selective IOTLB invalidation cycles", - "EventCode": "0x43", - "EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PAGE", - "PerPkg": "1", - "PublicDescription": ": Page-selective IOTLB invalidation cycles := Counts number of Page-selective within Domain Invalidation events", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = : Asserted if all bits specified by mask match", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and PCIE bus : Asserted if all bits specified by mask match", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus)", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : Non-PCIE bus = and !(PCIE bus) : Asserted if all bits specified by mask match", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : PCIE bus : As= serted if all bits specified by mask match", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and PCIE bus : Asserted if all bits specified by mask match", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus)", - "EventCode": "0x02", - "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "AND Mask/match for debug bus : !(Non-PCIE bu= s) and !(PCIE bus) : Asserted if all bits specified by mask match", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus := Asserted if any bits specified by mask match", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd PCIE bus : Asserted if any bits specified by mask match", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus an= d !(PCIE bus)", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : Non-PCIE bus a= nd !(PCIE bus) : Asserted if any bits specified by mask match", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : PCIE bus : Ass= erted if any bits specified by mask match", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and PCIE bus", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and PCIE bus : Asserted if any bits specified by mask match", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus)= and !(PCIE bus)", - "EventCode": "0x03", - "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1", - "PerPkg": "1", - "PublicDescription": "OR Mask/match for debug bus : !(Non-PCIE bus= ) and !(PCIE bus) : Asserted if any bits specified by mask match", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Counting disabled", - "EventCode": "0x80", - "EventName": "UNC_IIO_NOTHING", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Occupancy of outbound request queue : To devi= ce", - "EventCode": "0xC5", - "EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Occupancy of outbound request queue : To dev= ice : Counts number of outbound requests/completions IIO is currently proce= ssing", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Passing data to be written", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Passing data to be written : Only for post= ed requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": ": Issuing final read or write of line", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": ": Processing response from IOMMU", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": ": Issuing to IOMMU", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": ": Request Ownership", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Request Ownership : Only for posted reques= ts", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": ": Writing line", - "EventCode": "0x88", - "EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": ": Writing line : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = From IRP", - "EventCode": "0xC2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.IRP", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests sent to PCIe from main die := From IRP : Captures Posted/Non-posted allocations from IRP. i.e. either no= n-confined P2P traffic or from the CPU", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = From ITC", - "EventCode": "0xC2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.ITC", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests sent to PCIe from main die := From ITC : Confined P2P", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests sent to PCIe from main die : = Completion allocations", - "EventCode": "0xc2", - "EventName": "UNC_IIO_NUM_REQ_FROM_CPU.PREALLOC", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests PCIe makes of the main die : = Drop request", - "EventCode": "0x85", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU.ALL.DROP", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests PCIe makes of the main die := Drop request : Counts full PCIe requests before they're broken into a seri= es of cache-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_O= F_CPU. : Packet error detected, must be dropped", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number requests PCIe makes of the main die : = All", - "EventCode": "0x85", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Number requests PCIe makes of the main die := All : Counts full PCIe requests before they're broken into a series of cac= he-line size requests as measured by DATA_REQ_OF_CPU and TXN_REQ_OF_CPU.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Abort= ", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Confi= ned P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Local= P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Multi= -cast", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Memor= y", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : MsgB", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Remot= e P2P", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Num requests sent by PCIe - by target : Ubox", - "EventCode": "0x8E", - "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "ITC address map 1", - "EventCode": "0x8F", - "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU", - "PerPkg": "1", - "Unit": "IIO" - }, - { - "BriefDescription": "Outbound cacheline requests issued : 64B requ= ests issued to device", - "EventCode": "0xD0", - "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Outbound cacheline requests issued : 64B req= uests issued to device : Each outbound cacheline granular request may need = to make multiple passes through the pipeline. Each time a cacheline comple= tes all its passes it advances line", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Outbound TLP (transaction layer packet) reque= sts issued : To device", - "EventCode": "0xD1", - "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "Outbound TLP (transaction layer packet) requ= ests issued : To device : Each time an outbound completes all its passes it= advances the pointer", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PWT occupancy", - "EventCode": "0x42", - "EventName": "UNC_IIO_PWT_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "PWT occupancy : Indicates how many page walk= s are outstanding at any point in time.", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Passing d= ata to be written", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Passing = data to be written : Each PCIe request is broken down into a series of cach= eline granular requests and each cacheline size request may need to make mu= ltiple passes through the pipeline (e.g. for posted interrupts or multi-cas= t). Each time a cacheline completes all its passes (e.g. finishes posting= writes to all multi-cast targets) it advances line : Only for posted reque= sts", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Issuing f= inal read or write of line", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Issuing = final read or write of line : Each PCIe request is broken down into a serie= s of cacheline granular requests and each cacheline size request may need t= o make multiple passes through the pipeline (e.g. for posted interrupts or = multi-cast). Each time a cacheline completes all its passes (e.g. finishe= s posting writes to all multi-cast targets) it advances line", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Request O= wnership", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Request = Ownership : Each PCIe request is broken down into a series of cacheline gra= nular requests and each cacheline size request may need to make multiple pa= sses through the pipeline (e.g. for posted interrupts or multi-cast). Eac= h time a cacheline completes all its passes (e.g. finishes posting writes t= o all multi-cast targets) it advances line : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - cacheline complete : Writing l= ine", - "EventCode": "0x91", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - cacheline complete : Writing = line : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes all its passes (e.g. finishes posting writes to all= multi-cast targets) it advances line : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Passing data to be wr= itten", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Passing data to be w= ritten : Each PCIe request is broken down into a series of cacheline granul= ar requests and each cacheline size request may need to make multiple passe= s through the pipeline (e.g. for posted interrupts or multi-cast). Each t= ime a single PCIe request completes all its cacheline granular requests, it= advances pointer. : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Issuing final read or= write of line", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Issuing final read o= r write of line : Each PCIe request is broken down into a series of cacheli= ne granular requests and each cacheline size request may need to make multi= ple passes through the pipeline (e.g. for posted interrupts or multi-cast).= Each time a single PCIe request completes all its cacheline granular req= uests, it advances pointer.", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Processing response f= rom IOMMU", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Processing response = from IOMMU : Each PCIe request is broken down into a series of cacheline gr= anular requests and each cacheline size request may need to make multiple p= asses through the pipeline (e.g. for posted interrupts or multi-cast). Ea= ch time a single PCIe request completes all its cacheline granular requests= , it advances pointer.", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Issuing to IOMMU", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Issuing to IOMMU : E= ach PCIe request is broken down into a series of cacheline granular request= s and each cacheline size request may need to make multiple passes through = the pipeline (e.g. for posted interrupts or multi-cast). Each time a sing= le PCIe request completes all its cacheline granular requests, it advances = pointer.", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Request Ownership", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Request Ownership : = Each PCIe request is broken down into a series of cacheline granular reques= ts and each cacheline size request may need to make multiple passes through= the pipeline (e.g. for posted interrupts or multi-cast). Each time a sin= gle PCIe request completes all its cacheline granular requests, it advances= pointer. : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request complete : Writing line", - "EventCode": "0x92", - "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request complete : Writing line : Each = PCIe request is broken down into a series of cacheline granular requests an= d each cacheline size request may need to make multiple passes through the = pipeline (e.g. for posted interrupts or multi-cast). Each time a single P= CIe request completes all its cacheline granular requests, it advances poin= ter. : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Passing data t= o be written", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Passing data = to be written : Each PCIe request is broken down into a series of cacheline= granular requests and each cacheline size request may need to make multipl= e passes through the pipeline (e.g. for posted interrupts or multi-cast). = Each time a cacheline completes a single pass (e.g. posts a write to singl= e multi-cast target) it advances state : Only for posted requests", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Issuing final = read or write of line", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Issuing final= read or write of line : Each PCIe request is broken down into a series of = cacheline granular requests and each cacheline size request may need to mak= e multiple passes through the pipeline (e.g. for posted interrupts or multi= -cast). Each time a cacheline completes a single pass (e.g. posts a write= to single multi-cast target) it advances state", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Request Owners= hip", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Request Owner= ship : Each PCIe request is broken down into a series of cacheline granular= requests and each cacheline size request may need to make multiple passes = through the pipeline (e.g. for posted interrupts or multi-cast). Each tim= e a cacheline completes a single pass (e.g. posts a write to single multi-c= ast target) it advances state : Only for posted requests", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "PCIe Request - pass complete : Writing line", - "EventCode": "0x90", - "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0xFF", - "PublicDescription": "PCIe Request - pass complete : Writing line = : Each PCIe request is broken down into a series of cacheline granular requ= ests and each cacheline size request may need to make multiple passes throu= gh the pipeline (e.g. for posted interrupts or multi-cast). Each time a c= acheline completes a single pass (e.g. posts a write to single multi-cast t= arget) it advances state : Only for posted requests", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Symbol Times on Link", - "EventCode": "0x82", - "EventName": "UNC_IIO_SYMBOL_TIMES", - "PerPkg": "1", - "PublicDescription": "Symbol Times on Link : Gen1 - increment once= every 4nS, Gen2 - increment once every 2nS, Gen3 - increment once every 1n= S", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : IOMMU - Ty= pe 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is= plugged in to slot 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x16 card p= lugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is= plugged in to slot 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x8 card pl= ugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's PCICFG space : Also known as Outbound. Number of r= equests initiated by the main die, including reads and writes. : x4 card is= plugged in to slot 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's PCICFG space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's PCICFG space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's IO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : IOMMU - Type 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugg= ed in to slot 0", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 1", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 3", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x16 card plugged= in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugg= ed in to slot 4", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 5", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x8 card plugged = in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's IO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's IO space : Also known as Outbound. Number of request= s initiated by the main die, including reads and writes. : x4 card is plugg= ed in to slot 7", - "UMask": "0x20", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : IOMMU - Type= 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is p= lugged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x16 card plu= gged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is p= lugged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x8 card plug= ged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re reading from Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore reading from Card's MMIO space : Also known as Outbound. Number of req= uests initiated by the main die, including reads and writes. : x4 card is p= lugged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 0= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : IOMMU - Type 1= ", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plu= gged in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x16 card plugg= ed in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plu= gged in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x8 card plugge= d in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : Co= re writing to Card's MMIO space", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : C= ore writing to Card's MMIO space : Also known as Outbound. Number of reque= sts initiated by the main die, including reads and writes. : x4 card is plu= gged in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to La= ne 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot= 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to La= ne 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot= 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) reading from this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) reading from this card. : Also known as O= utbound. Number of requests initiated by the main die, including reads and= writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane= 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane= 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6= ", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested by the CPU : An= other card (different IIO stack) writing to this card.", - "EventCode": "0xC1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested by the CPU : A= nother card (different IIO stack) writing to this card. : Also known as Out= bound. Number of requests initiated by the main die, including reads and w= rites. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : IOMMU -= Type 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card= is plugged in to slot 0", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 1", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 3", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x16 car= d plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card= is plugged in to slot 4", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 5", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x8 card= plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : At= omic requests targeting DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : A= tomic requests targeting DRAM : Also known as Inbound. Number of 64B cache= line requests initiated by the Card, including reads and writes. : x4 card= is plugged in to slot 7", - "UMask": "0x10", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : IOMMU - Type 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lan= e 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 1", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot = 2", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 3", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lan= e 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 5", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot = 6", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Cm= pD - device sending completion to CPU request", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= mpD - device sending completion to CPU request : Also known as Inbound. Nu= mber of 64B cache line requests initiated by the Card, including reads and = writes. : x4 card is plugged in to slot 7", - "UMask": "0x80", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plug= ged in to slot 0", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 1", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 3", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x16 card plugge= d in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plug= ged in to slot 4", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 5", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x8 card plugged= in to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from DRAM : Also known as Inbound. Number of 64B cache line re= quests initiated by the Card, including reads and writes. : x4 card is plug= ged in to slot 7", - "UMask": "0x4", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugge= d in to slot 0", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 1", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 2/3, Or x4 card is plugged in to slot 2", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 3", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x16 card plugged = in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugge= d in to slot 4", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 5", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x8 card plugged i= n to Lane 6/7, Or x4 card is plugged in to slot 6", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to DRAM", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to DRAM : Also known as Inbound. Number of 64B cache line requ= ests initiated by the Card, including reads and writes. : x4 card is plugge= d in to slot 7", - "UMask": "0x1", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : IOMMU - Type 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 0= /1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot= 0", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 1", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 2/= 3, Or x4 card is plugged in to slot 2", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 3", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x16 card plugged in to Lane 4= /5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot= 4", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 5", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x8 card plugged in to Lane 6/= 7, Or x4 card is plugged in to slot 6", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Me= ssages", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : M= essages : Also known as Inbound. Number of 64B cache line requests initiat= ed by the Card, including reads and writes. : x4 card is plugged in to slot= 7", - "UMask": "0x40", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : IOMMU - Type 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged = in to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 1", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in= to slot 2", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 3", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged = in to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 5", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in= to slot 6", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd reading from another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard reading from another Card (same or different stack) : Also known as Inb= ound. Number of 64B cache line requests initiated by the Card, including r= eads and writes. : x4 card is plugged in to slot 7", - "UMask": "0x8", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x100", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x200", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : IOMMU - Type 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x01", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in= to Lane 0/1, Or x4 card is plugged in to slot 0", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x02", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 1", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x04", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in t= o slot 2", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x08", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 3", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x10", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in= to Lane 4/5, Or x4 card is plugged in to slot 4", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x20", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 5", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x40", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in t= o slot 6", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Number Transactions requested of the CPU : Ca= rd writing to another Card (same or different stack)", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", - "PerPkg": "1", - "PortMask": "0x80", - "PublicDescription": "Number Transactions requested of the CPU : C= ard writing to another Card (same or different stack) : Also known as Inbou= nd. Number of 64B cache line requests initiated by the Card, including rea= ds and writes. : x4 card is plugged in to slot 7", - "UMask": "0x2", - "Unit": "IIO" - }, - { - "BriefDescription": "Total Write Cache Occupancy : Any Source", - "EventCode": "0x0F", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY", - "PerPkg": "1", - "PublicDescription": "Total Write Cache Occupancy : Any Source : A= ccumulates the number of reads and writes that are outstanding in the uncor= e in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRI= TE_OCCUPANCY events. : Tracks all requests from any source port.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Total Write Cache Occupancy : Snoops", - "EventCode": "0x0F", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q", - "PerPkg": "1", - "PublicDescription": "Total Write Cache Occupancy : Snoops : Accum= ulates the number of reads and writes that are outstanding in the uncore in= each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_O= CCUPANCY events.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Total IRP occupancy of inbound read and write= requests to coherent memory.", - "EventCode": "0x0f", - "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM", - "PerPkg": "1", - "PublicDescription": "Total IRP occupancy of inbound read and writ= e requests to coherent memory. This is effectively the sum of read occupan= cy and write occupancy.", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", - "EventCode": "0x01", - "EventName": "UNC_I_CLOCKTICKS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops : CLFlush", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.CLFLUSH", - "PerPkg": "1", - "PublicDescription": "Coherent Ops : CLFlush : Counts the number o= f coherency related operations servied by the IRP", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "PCIITOM request issued by the IRP unit to the= mesh with the intention of writing a full cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.PCITOM", - "PerPkg": "1", - "PublicDescription": "PCIITOM request issued by the IRP unit to th= e mesh with the intention of writing a full cacheline to coherent memory, w= ithout a RFO. PCIITOM is a speculative Invalidate to Modified command that= requests ownership of the cacheline and does not move data from the mesh t= o IRP cache.", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "RFO request issued by the IRP unit to the mes= h with the intention of writing a partial cacheline.", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.RFO", - "PerPkg": "1", - "PublicDescription": "RFO request issued by the IRP unit to the me= sh with the intention of writing a partial cacheline to coherent memory. R= FO is a Read For Ownership command that requests ownership of the cacheline= and moves data from the mesh to IRP cache.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Coherent Ops : WbMtoI", - "EventCode": "0x10", - "EventName": "UNC_I_COHERENT_OPS.WBMTOI", - "PerPkg": "1", - "PublicDescription": "Coherent Ops : WbMtoI : Counts the number of= coherency related operations servied by the IRP", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF RF full", - "EventCode": "0x17", - "EventName": "UNC_I_FAF_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound read requests received by the IRP and= inserted into the FAF queue.", - "EventCode": "0x18", - "EventName": "UNC_I_FAF_INSERTS", - "PerPkg": "1", - "PublicDescription": "Inbound read requests to coherent memory, re= ceived by the IRP and inserted into the Fire and Forget queue (FAF), a queu= e used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "Occupancy of the IRP FAF queue.", - "EventCode": "0x19", - "EventName": "UNC_I_FAF_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Occupancy of the IRP Fire and Forget (FAF) q= ueue, a queue used for processing inbound reads in the IRP.", - "Unit": "IRP" - }, - { - "BriefDescription": "FAF allocation -- sent to ADQ", - "EventCode": "0x16", - "EventName": "UNC_I_FAF_TRANSACTIONS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.EVICTS", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of At= omic Transactions as Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Re= ad Transactions as Secondary", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.2ND_RD_INSERT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Wr= ite Transactions as Secondary", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.2ND_WR_INSERT", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.FAST_REJ", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", - "EventCode": "0x1e", - "EventName": "UNC_I_MISC0.FAST_REQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers = From Primary to Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.FAST_XFER", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints = From Primary to Secondary", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.PF_ACK_HINT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn= 't find prefetch", - "EventCode": "0x1E", - "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Lost Forward", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.LOST_FWD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop p= ulled away ownership before a write was committed", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Received Invalid", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Received Invalid : Sec= ondary received a transfer that did not have sufficient MESI state", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Received Valid", - "EventCode": "0x1F", - "EventName": "UNC_I_MISC1.SEC_RCVD_VLD", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Received Valid : Secon= dary received a transfer that did have sufficient MESI state", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_E", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of E Lin= e : Secondary received a transfer that did have sufficient MESI state", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_I", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of I Lin= e : Snoop took cacheline ownership before write from data was committed.", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_M", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of M Lin= e : Snoop took cacheline ownership before write from data was committed.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line= ", - "EventCode": "0x1f", - "EventName": "UNC_I_MISC1.SLOW_S", - "PerPkg": "1", - "PublicDescription": "Misc Events - Set 1 : Slow Transfer of S Lin= e : Secondary received a transfer that did not have sufficient MESI state", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Requests", - "EventCode": "0x14", - "EventName": "UNC_I_P2P_INSERTS", - "PerPkg": "1", - "PublicDescription": "P2P Requests : P2P requests from the ITC", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Occupancy", - "EventCode": "0x15", - "EventName": "UNC_I_P2P_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "P2P Occupancy : P2P B & S Queue Occupancy", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P completions", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.CMPL", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if local only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if local and target = matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P Message", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.MSG", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P reads", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.RD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : Match if remote only", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : match if remote and target= matches", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "P2P Transactions : P2P Writes", - "EventCode": "0x13", - "EventName": "UNC_I_P2P_TRANSACTIONS.WR", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M, E= , S or I line in the IIO", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M, E, S or I line in the IIO", - "UMask": "0x7e", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit E or= S line in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit E or S line in the IIO cache", - "UMask": "0x74", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit I li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit I line in the IIO cache", - "UMask": "0x72", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that hit M li= ne in the IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that hit M line in the IIO cache", - "UMask": "0x78", - "Unit": "IRP" - }, - { - "BriefDescription": "Responses to snoops of any type that miss the= IIO cache", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.ALL_MISS", - "PerPkg": "1", - "PublicDescription": "Responses to snoops of any type (code, data,= invalidate) that miss the IIO cache", - "UMask": "0x71", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit E or S", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_ES", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit I", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_I", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Hit M", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.HIT_M", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : Miss", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.MISS", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpCode", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPCODE", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpData", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPDATA", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Snoop Responses : SnpInv", - "EventCode": "0x12", - "EventName": "UNC_I_SNOOP_RESP.SNPINV", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Atomic", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.ATOMIC", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Atomic : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Tracks the number of atomic transactions", - "UMask": "0x10", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Other", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.OTHER", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Other : Counts t= he number of Inbound transactions from the IRP to the Uncore. This can be = filtered based on request type in addition to the source queue. Note the s= pecial filtering equation. We do OR-reduction on the request type. If the= SOURCE bit is set, then we also do AND qualification based on the source p= ortID. : Tracks the number of 'other' kinds of transactions.", - "UMask": "0x20", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound Transaction Count : Writes", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WRITES", - "PerPkg": "1", - "PublicDescription": "Inbound Transaction Count : Writes : Counts = the number of Inbound transactions from the IRP to the Uncore. This can be= filtered based on request type in addition to the source queue. Note the = special filtering equation. We do OR-reduction on the request type. If th= e SOURCE bit is set, then we also do AND qualification based on the source = portID. : Trackes only write requests. Each write request should have a pr= efetch, so there is no need to explicitly track these requests. For writes= that are tickled and have to retry, the counter will be incremented for ea= ch retry.", - "UMask": "0x2", - "Unit": "IRP" - }, - { - "BriefDescription": "Inbound write (fast path) requests received b= y the IRP.", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", - "PerPkg": "1", - "PublicDescription": "Inbound write (fast path) requests to cohere= nt memory, received by the IRP resulting in write ownership requests issued= by IRP to the mesh.", - "UMask": "0x8", - "Unit": "IRP" - }, - { - "BriefDescription": "AK Egress Allocations", - "EventCode": "0x0B", - "EventName": "UNC_I_TxC_AK_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Cycles Full", - "EventCode": "0x05", - "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Inserts", - "EventCode": "0x02", - "EventName": "UNC_I_TxC_BL_DRS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL DRS Egress Occupancy", - "EventCode": "0x08", - "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Cycles Full", - "EventCode": "0x06", - "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Inserts", - "EventCode": "0x03", - "EventName": "UNC_I_TxC_BL_NCB_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCB Egress Occupancy", - "EventCode": "0x09", - "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Cycles Full", - "EventCode": "0x07", - "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Inserts", - "EventCode": "0x04", - "EventName": "UNC_I_TxC_BL_NCS_INSERTS", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "BL NCS Egress Occupancy", - "EventCode": "0x0A", - "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY", - "PerPkg": "1", - "Unit": "IRP" - }, - { - "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", - "EventCode": "0x1C", - "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": ": Counts the number times when it is not pos= sible to issue a request to the M2PCIe because there are no Egress Credits = available on AD0, A1 or AD0&AD1 both. Stalls on both AD0 and AD1 will count= as 2", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD0 Egress Credits Stalls", - "EventCode": "0x1A", - "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No AD0 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD0 Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No AD1 Egress Credits Stalls", - "EventCode": "0x1B", - "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No AD1 Egress Credits Stalls : Counts the nu= mber times when it is not possible to issue a request to the M2PCIe because= there are no AD1 Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "No BL Egress Credit Stalls", - "EventCode": "0x1D", - "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES", - "PerPkg": "1", - "PublicDescription": "No BL Egress Credit Stalls : Counts the numb= er times when it is not possible to issue data to the R2PCIe because there = are no BL Egress Credits available.", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0x0D", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCB", - "PerPkg": "1", - "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Read Requests", - "EventCode": "0x0E", - "EventName": "UNC_I_TxS_DATA_INSERTS_NCS", - "PerPkg": "1", - "PublicDescription": "Outbound Read Requests : Counts the number o= f requests issued to the switch (towards the devices).", - "Unit": "IRP" - }, - { - "BriefDescription": "Outbound Request Queue Occupancy", - "EventCode": "0x0C", - "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY", - "PerPkg": "1", - "PublicDescription": "Outbound Request Queue Occupancy : Accumulte= s the number of outstanding outbound requests from the IRP to the switch (t= owards the devices). This can be used in conjuection with the allocations = event in order to calculate average latency of outbound requests.", - "Unit": "IRP" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 2", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x80", - "EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 5", - 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"UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x85", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x85", - "EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x86", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x87", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x87", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x87", - "EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8C", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8D", - "EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8E", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8F", - "EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Not Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Taken", - "EventCode": "0x22", - "EventName": "UNC_M2M_BYPASS_M2M_EGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Not Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC Bypass : Taken", - "EventCode": "0x21", - "EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Clockticks of the mesh to memory (M2M)", - "EventName": "UNC_M2M_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M2M_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles when direct to core mode, which bypass= es the CHA, was disabled", - "EventCode": "0x24", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", - "EventCode": "0x60", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number of reads in which direct to core trans= action was overridden", - "EventCode": "0x25", - "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xAF", - "EventName": "UNC_M2M_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xBA", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xBA", - "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xB6", - "EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xBB", - "EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xB7", - "EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xB8", - "EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xB9", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xB9", - "EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ALL", - "PerPkg": "1", - "UMask": "0x704", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_ALL", - "PerPkg": "1", - "UMask": "0x104", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR", - "PerPkg": "1", - "UMask": "0x140", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH", - "PerPkg": "1", - "UMask": "0x102", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h0", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL", - "PerPkg": "1", - "UMask": "0x101", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : All, regardless of = priority. - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_ALL", - "PerPkg": "1", - "UMask": "0x204", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR", - "PerPkg": "1", - "UMask": "0x240", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= Ch1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH", - "PerPkg": "1", - "UMask": "0x202", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - C= h1", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL", - "PerPkg": "1", - "UMask": "0x201", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : From TGR - All Chan= nels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.FROM_TGR", - "PerPkg": "1", - "UMask": "0x740", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Critical Priority -= All Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.ISOCH", - "PerPkg": "1", - "UMask": "0x702", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Reads Issued to iMC : Normal Priority - A= ll Channels", - "EventCode": "0x37", - "EventName": "UNC_M2M_IMC_READS.NORMAL", - "PerPkg": "1", - "UMask": "0x701", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - All C= hannels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.ALL", - "PerPkg": "1", - "UMask": "0x1c10", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL", - "PerPkg": "1", - "UMask": "0x410", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL", - "PerPkg": "1", - "UMask": "0x401", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x404", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL", - "PerPkg": "1", - "UMask": "0x402", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 0", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x408", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL", - "PerPkg": "1", - "UMask": "0x810", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL", - "PerPkg": "1", - "UMask": "0x801", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x804", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - Ch1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL", - "PerPkg": "1", - "UMask": "0x802", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch= 1", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x808", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : From TGR - All Cha= nnels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOC= H - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL", - "PerPkg": "1", - "UMask": "0x1c01", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - = All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH", - "PerPkg": "1", - "UMask": "0x1c04", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss= - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.NI_MISS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH = - All Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL", - "PerPkg": "1", - "UMask": "0x1c02", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Al= l Channels", - "EventCode": "0x38", - "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH", - "PerPkg": "1", - "UMask": "0x1c08", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts", - "EventCode": "0x64", - "EventName": "UNC_M2M_MIRR_WRQ_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy", - "EventCode": "0x65", - "EventName": "UNC_M2M_MIRR_WRQ_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xE6", - "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xE6", - "EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches : MC Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number Packet Header Matches : Mesh Match", - "EventCode": "0x4C", - "EventName": "UNC_M2M_PKT_MATCH.MESH", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS", - "EventCode": "0x73", - "EventName": "UNC_M2M_PREFCAM_CIS_DROPS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : All Channels", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : Channel 0", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Full : Channel 1", - "EventCode": "0x6B", - "EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : All Channels", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 0", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 1", - "EventCode": "0x6C", - "EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA0_INVAL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA1_INVAL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_MISS_INVAL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_RSP_PDRESET", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA0_INVAL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA1_INVAL", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_MISS_INVAL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Deallocs", - "EventCode": "0x6E", - "EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_RSP_PDRESET", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - Ch 0", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - Ch 1", - "EventCode": "0x6F", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped : XPT - All Channels", - "EventCode": "0x6f", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 0", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 0", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 0", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = Ch 1", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI - Ch 1", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI- Ch 1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- Ch 2", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH2_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - Ch 2", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT & = UPI- All Channels", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPTUPI_ALLCH", - "PerPkg": "1", - "PublicDescription": "Demands Merged with CAMed Prefetches : XPT &= UPI - All Channels", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Merged with CAMed Prefetches : XPT - = All Channels", - "EventCode": "0x74", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 0", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 0", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 0", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - Ch 1", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 1", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPTUPI", - "PerPkg": "1", - "PublicDescription": "Demands Not Merged with CAMed Prefetches : X= PT & UPI- Ch 1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - Ch 2", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH2_XPTUPI", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T & UPI - All Channels", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPTUPI_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Demands Not Merged with CAMed Prefetches : XP= T - All Channels", - "EventCode": "0x75", - "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.ERRORBLK_RxC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.NOT_PF_SAD_REGION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_HIT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_SECURE_DROP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.RPQ_PROXY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.STOP_B2B", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.WPQ_PROXY", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch0 - Reasons", - "EventCode": "0x70", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.XPT_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.ERRORBLK_RxC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.NOT_PF_SAD_REGION", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_AD_CRD", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_FULL", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_HIT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_SECURE_DROP", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.RPQ_PROXY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.STOP_B2B", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.WPQ_PROXY", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Data Prefetches Dropped Ch1 - Reasons", - "EventCode": "0x71", - "EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.XPT_THRESH", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", - "EventCode": "0x6D", - "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", - "PerPkg": "1", - "UMask": "0x15", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : All Channels", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : Channel 0", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Prefetch CAM Occupancy : Channel 1", - "EventCode": "0x6A", - "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": ": All Channels", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH", - "PerPkg": "1", - "UMask": "0x7", - "Unit": "M2M" - }, - { - "BriefDescription": ": Channel 0", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": ": Channel 1", - "EventCode": "0x76", - "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", - "EventCode": "0x79", - "EventName": "UNC_M2M_PREFCAM_RxC_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", - "EventCode": "0x7A", - "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_INSERTS", - "EventCode": "0x78", - "EventName": "UNC_M2M_PREFCAM_RxC_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", - "EventCode": "0x77", - "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xAC", - "EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xAA", - "EventName": "UNC_M2M_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xAD", - "EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xAB", - "EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_M2M_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 0", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : C= hannel 1", - "EventCode": "0x43", - "EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 0", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : C= hannel 1", - "EventCode": "0x44", - "EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Full", - "EventCode": "0x04", - "EventName": "UNC_M2M_RxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Not Empty", - "EventCode": "0x03", - "EventName": "UNC_M2M_RxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Allocations", - "EventCode": "0x01", - "EventName": "UNC_M2M_RxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy", - "EventCode": "0x02", - "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches", - "EventCode": "0x77", - "EventName": "UNC_M2M_RxC_AD_PREF_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x5C", - "EventName": "UNC_M2M_RxC_AK_WR_CMP", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Full", - "EventCode": "0x08", - "EventName": "UNC_M2M_RxC_BL_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Not Empty", - "EventCode": "0x07", - "EventName": "UNC_M2M_RxC_BL_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Allocations", - "EventCode": "0x05", - "EventName": "UNC_M2M_RxC_BL_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Ingress (from CMS) Occupancy", - "EventCode": "0x06", - "EventName": "UNC_M2M_RxC_BL_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE5", - "EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xE2", - "EventName": "UNC_M2M_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xE3", - "EventName": "UNC_M2M_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_M2M_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xE1", - "EventName": "UNC_M2M_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xE0", - "EventName": "UNC_M2M_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD0", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD2", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD4", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xD6", - "EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD1", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD3", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD5", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xD7", - "EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Number AD Ingress Credits", - "EventCode": "0x41", - "EventName": "UNC_M2M_TGR_AD_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Number BL Ingress Credits", - "EventCode": "0x42", - "EventName": "UNC_M2M_TGR_BL_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full : Channel 0", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Full : Channel 1", - "EventCode": "0x45", - "EventName": "UNC_M2M_TRACKER_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 0", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Inserts : Channel 1", - "EventCode": "0x49", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty : Channel 0", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Cycles Not Empty : Channel 1", - "EventCode": "0x46", - "EventName": "UNC_M2M_TRACKER_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 0", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Tracker Occupancy : Channel 1", - "EventCode": "0x47", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credit Acquired", - "EventCode": "0x0d", - "EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Credits Occupancy", - "EventCode": "0x0e", - "EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Full", - "EventCode": "0x0c", - "EventName": "UNC_M2M_TxC_AD_CYCLES_FULL", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Not Empty", - "EventCode": "0x0b", - "EventName": "UNC_M2M_TxC_AD_CYCLES_NE", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Allocations", - "EventCode": "0x09", - "EventName": "UNC_M2M_TxC_AD_INSERTS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AD Egress (to CMS) Credits", - "EventCode": "0x0f", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Cre= dits", - "EventCode": "0x10", - "EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AD Egress (to CMS) Occupancy", - "EventCode": "0x0A", - "EventName": "UNC_M2M_TxC_AD_OCCUPANCY", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK : CRD Transa= ctions to Cbo", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.CRD_CBO", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound Ring Transactions on AK : NDR Transa= ctions", - "EventCode": "0x39", - "EventName": "UNC_M2M_TxC_AK.NDR", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AKC Credits", - "EventCode": "0x5F", - "EventName": "UNC_M2M_TxC_AKC_CREDITS", - "PerPkg": "1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", - "EventCode": "0x1D", - "EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : All", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Near Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - = Far Side", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1", - "PerPkg": "1", - "UMask": "0x88", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1", - "PerPkg": "1", - "UMask": "0xa0", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Full", - "EventCode": "0x14", - "EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1", - "PerPkg": "1", - "UMask": "0x90", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : All", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Not Empty", - "EventCode": "0x13", - "EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : All", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Allocations", - "EventCode": "0x11", - "EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No AK Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", - "EventCode": "0x1F", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", - "EventCode": "0x20", - "EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : All", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Near Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh St= op - Far Side", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "AK Egress (to CMS) Occupancy", - "EventCode": "0x12", - "EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Cache", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CACHE", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Outbound DRS Ring Transactions to Cache : Dat= a to Core", - "EventCode": "0x40", - "EventName": "UNC_M2M_TxC_BL.DRS_CORE", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Near Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Credit Acquired : Common M= esh Stop - Far Side", - "EventCode": "0x19", - "EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : All", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Near Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - = Far Side", - "EventCode": "0x18", - "EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : All", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Near Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh St= op - Far Side", - "EventCode": "0x17", - "EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : All", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.ALL", - "PerPkg": "1", - "UMask": "0x3", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Near Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh = Stop - Far Side", - "EventCode": "0x15", - "EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Near Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles with No BL Egress (to CMS) Credits : C= ommon Mesh Stop - Far Side", - "EventCode": "0x1B", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Near Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Cre= dits : Common Mesh Stop - Far Side", - "EventCode": "0x1C", - "EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xA6", - "EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xA7", - "EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xA2", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xA3", - "EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xA1", - "EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xA4", - "EventName": "UNC_M2M_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xA0", - "EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xA5", - "EventName": "UNC_M2M_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9C", - "EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9D", - "EventName": "UNC_M2M_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9E", - "EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2M_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_M2M_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9A", - "EventName": "UNC_M2M_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9B", - "EventName": "UNC_M2M_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xB0", - "EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xB4", - "EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xB1", - "EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xB2", - "EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xB3", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xB3", - "EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xB5", - "EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "WPQ Flush : Channel 0", - "EventCode": "0x58", - "EventName": "UNC_M2M_WPQ_FLUSH.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "WPQ Flush : Channel 1", - "EventCode": "0x58", - "EventName": "UNC_M2M_WPQ_FLUSH.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 0", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 1", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : = Channel 2", - "EventCode": "0x4D", - "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 0", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 1", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : = Channel 2", - "EventCode": "0x4E", - "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Channel 0", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Channel 1", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Full : Mirror", - "EventCode": "0x4A", - "EventName": "UNC_M2M_WR_TRACKER_FULL.MIRR", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts : Channel 0", - "EventCode": "0x56", - "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Inserts : Channel 1", - "EventCode": "0x56", - "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty : Channel 1", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty : Mirror", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Cycles Not Empty", - "EventCode": "0x4B", - "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0", - "EventCode": "0x63", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1", - "EventCode": "0x63", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 0", - "EventCode": "0x62", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel = 1", - "EventCode": "0x62", - "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy : Channel 0", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy : Channel 1", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy : Mirror", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_NONTGR", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Occupancy", - "EventCode": "0x55", - "EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_PWR", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Inserts : Channel 0", - "EventCode": "0x5E", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Inserts : Channel 1", - "EventCode": "0x5E", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Occupancy : Channel 0", - "EventCode": "0x5D", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2M" - }, - { - "BriefDescription": "Write Tracker Posted Occupancy : Channel 1", - "EventCode": "0x5D", - "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2M" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 0", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgre= ss 1", - "EventCode": "0x80", - "EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 0 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - 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"UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 3", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 4", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 5", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 6", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 6 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 7", - "EventCode": "0x84", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 7 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 10", - "EventCode": "0x85", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 8", - "EventCode": "0x85", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgre= ss 9", - "EventCode": "0x85", - "EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 AD credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x86", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x87", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 AD credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x87", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x87", - "EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 AD Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 AD credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 0", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 0 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 1", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 1 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 2", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 2 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 3", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 3 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 4", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 4 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 5", - "EventCode": "0x8c", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 5 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 10", - "EventCode": "0x8d", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 10 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tr= ansgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 8", - "EventCode": "0x8d", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 8 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgre= ss 9", - "EventCode": "0x8d", - "EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Acquired : For Transgr= ess 9 : Number of CMS Agent 1 BL credits acquired in a given cycle, per tra= nsgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 0", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR0", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 0 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 1", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR1", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 1 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 2", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR2", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 2 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 3", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR3", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 3 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 4", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR4", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 4 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 5", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR5", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 5 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 6", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR6", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 6 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 7", - "EventCode": "0x8e", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR7", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 7 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 10", - "EventCode": "0x8f", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR10", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 10 : Number of CMS Agent 1 BL credits in use in a given cycle, per tra= nsgress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 8", - "EventCode": "0x8f", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR8", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 8 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgr= ess 9", - "EventCode": "0x8f", - "EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR9", - "PerPkg": "1", - "PublicDescription": "CMS Agent1 BL Credits Occupancy : For Transg= ress 9 : Number of CMS Agent 1 BL credits in use in a given cycle, per tran= sgress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Clockticks of the mesh to PCI (M2P)", - "EventCode": "0x01", - "EventName": "UNC_M2P_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Clockticks", - "EventCode": "0xc0", - "EventName": "UNC_M2P_CMS_CLOCKTICKS", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Local", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_LOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Local : Count= s the number of cycles either the local or incoming distress signals are as= serted. : Dynamic Prefetch Throttle triggered by this tile", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Remote", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_NONLOCAL", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Remote : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : Dynamic Prefetch Throttle received by this tile", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - IV", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_IV", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - IV = : Counts the number of cycles either the local or incoming distress signals= are asserted. : DPT occurred while regular IVs were received, causing DPT = to be stalled", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : DPT Stalled - No = Credit", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_NOCRD", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : DPT Stalled - No= Credit : Counts the number of cycles either the local or incoming distress= signals are asserted. : DPT occurred while credit not available causing DP= T to be stalled", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : Horizontal", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.HORZ", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Horizontal : Coun= ts the number of cycles either the local or incoming distress signals are a= sserted. : If TGR egress is full, then agents will throttle outgoing AD IDI= transactions", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Distress signal asserted : Vertical", - "EventCode": "0xaf", - "EventName": "UNC_M2P_DISTRESS_ASSERTED.VERT", - "PerPkg": "1", - "PublicDescription": "Distress signal asserted : Vertical : Counts= the number of cycles either the local or incoming distress signals are ass= erted. : If IRQ egress is full, then agents will throttle outgoing AD IDI t= ransactions", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Down", - "EventCode": "0xba", - "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Down : Counts number of cycles IV was blocked in the TGR Egress due to S= NP/GO Ordering requirements", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress Blocking due to Ordering requirements = : Up", - "EventCode": "0xba", - "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP", - "PerPkg": "1", - "PublicDescription": "Egress Blocking due to Ordering requirements= : Up : Counts number of cycles IV was blocked in the TGR Egress due to SNP= /GO Ordering requirements", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Even", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Left and Odd", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AD ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop. We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Even", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AD ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop. We really have two rings -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AD Ring In Use : Right and Odd", - "EventCode": "0xb6", - "EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AD Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AD ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop. We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AKC ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings in JKT -- a clockwise ring and a counter-c= lockwise ring. On the left side of the ring, the UP direction is on the cl= ockwise ring and DN is on the counter-clockwise ring. On the right side of= the ring, this is reversed. The first half of the CBos are on the left si= de of the ring, and the 2nd half are on the right side of the ring. In oth= er words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as C= Bo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AKC ring is being used at = this ring stop. This includes when packets are passing by and when packets= are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings in JKT -- a clockwise ring and a counter= -clockwise ring. On the left side of the ring, the UP direction is on the = clockwise ring and DN is on the counter-clockwise ring. On the right side = of the ring, this is reversed. The first half of the CBos are on the left = side of the ring, and the 2nd half are on the right side of the ring. In o= ther words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as= CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xbb", - "EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AKC ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings in JKT -- a clockwise ring and a counter-= clockwise ring. On the left side of the ring, the UP direction is on the c= lockwise ring and DN is on the counter-clockwise ring. On the right side o= f the ring, this is reversed. The first half of the CBos are on the left s= ide of the ring, and the 2nd half are on the right side of the ring. In ot= her words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as = CBo 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Even", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Even : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Left and Odd", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Left and Odd : C= ounts the number of cycles that the Horizontal AK ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the rin= g stop.We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Even", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Even := Counts the number of cycles that the Horizontal AK ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal AK Ring In Use : Right and Odd", - "EventCode": "0xb7", - "EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal AK Ring In Use : Right and Odd : = Counts the number of cycles that the Horizontal AK ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Even", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Even : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Left and Odd", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Left and Odd : C= ounts the number of cycles that the Horizontal BL ring is being used at thi= s ring stop. This includes when packets are passing by and when packets ar= e being sunk, but does not include when packets are being sent from the ri= ng stop.We really have two rings -- a clockwise ring and a counter-clockwis= e ring. On the left side of the ring, the UP direction is on the clockwise= ring and DN is on the counter-clockwise ring. On the right side of the ri= ng, this is reversed. The first half of the CBos are on the left side of t= he ring, and the 2nd half are on the right side of the ring. In other word= s (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP= AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Even", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_EVEN", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Even := Counts the number of cycles that the Horizontal BL ring is being used at t= his ring stop. This includes when packets are passing by and when packets = are being sunk, but does not include when packets are being sent from the = ring stop.We really have two rings -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal BL Ring in Use : Right and Odd", - "EventCode": "0xb8", - "EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_ODD", - "PerPkg": "1", - "PublicDescription": "Horizontal BL Ring in Use : Right and Odd : = Counts the number of cycles that the Horizontal BL ring is being used at th= is ring stop. This includes when packets are passing by and when packets a= re being sunk, but does not include when packets are being sent from the r= ing stop.We really have two rings -- a clockwise ring and a counter-clockwi= se ring. On the left side of the ring, the UP direction is on the clockwis= e ring and DN is on the counter-clockwise ring. On the right side of the r= ing, this is reversed. The first half of the CBos are on the left side of = the ring, and the 2nd half are on the right side of the ring. In other wor= ds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 U= P AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Left", - "EventCode": "0xb9", - "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.LEFT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Left : Counts th= e number of cycles that the Horizontal IV ring is being used at this ring s= top. This includes when packets are passing by and when packets are being = sunk, but does not include when packets are being sent from the ring stop. = There is only 1 IV ring. Therefore, if one wants to monitor the Even ring= , they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, th= ey should select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Horizontal IV Ring in Use : Right", - "EventCode": "0xb9", - "EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.RIGHT", - "PerPkg": "1", - "PublicDescription": "Horizontal IV Ring in Use : Right : Counts t= he number of cycles that the Horizontal IV ring is being used at this ring = stop. This includes when packets are passing by and when packets are being= sunk, but does not include when packets are being sent from the ring stop.= There is only 1 IV ring. Therefore, if one wants to monitor the Even rin= g, they should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, t= hey should select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : DRS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : DRS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the DRS message class.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCB", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCB : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCB message class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credits f= or transfer through CMS Port 0 to the IIO for the NCS message class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credit Acquired : NCS", - "EventCode": "0x33", - "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credit Acquired : NCS : Counts th= e number of credits that are acquired in the M2PCIe agent for sending trans= actions into the IIO on either NCB or NCS are in use. Transactions from th= e BL ring going into the IIO Agent must first acquire a credit. These cred= its are for either the NCB or NCS message classes. NCB, or non-coherent by= pass messages are used to transmit data without coherency (and are common).= NCS is used for reads to PCIe (and should be used sparingly). : Credit fo= r transfer through CMS Port 0s to the IIO for the NCS message class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the DRS message class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCB message class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS", - "EventCode": "0x34", - "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS = : Counts the number of times that a request pending in the BL Ingress attem= pted to acquire either a NCB or NCS credit to transmit into the IIO, but wa= s rejected because no credits were available. NCB, or non-coherent bypass = messages are used to transmit data without coherency (and are common). NCS= is used for reads to PCIe (and should be used sparingly). : Credits to the= IIO for the NCS message class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the DRS me= ssage class.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCB me= ssage class.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 0 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credits for transfer through CMS Port 0 to the IIO for the NCS me= ssage class.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1= ", - "EventCode": "0x32", - "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1", - "PerPkg": "1", - "PublicDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port = 1 : Counts the number of cycles when one or more credits in the M2PCIe agen= t for sending transactions into the IIO on either NCB or NCS are in use. T= ransactions from the BL ring going into the IIO Agent must first acquire a = credit. These credits are for either the NCB or NCS message classes. NCB,= or non-coherent bypass messages are used to transmit data without coherenc= y (and are common). NCS is used for reads to PCIe (and should be used spar= ingly). : Credit for transfer through CMS Port 0s to the IIO for the NCS me= ssage class.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 0 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 1 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 2 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCB", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF= 3 - NCS", - "EventCode": "0x46", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCB", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 4 - NCS", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCB", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF= 5 - NCS", - "EventCode": "0x47", - "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF0 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF1 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF2 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCB", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2= IOSF3 - NCS", - "EventCode": "0x19", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCB", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF4 - NCS", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCB", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2= IOSF5 - NCS", - "EventCode": "0x1a", - "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent0", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent1", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local P2P Shared Credits Returned : Agent2", - "EventCode": "0x17", - "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent0", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent1", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent2", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent3", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent4", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Returned to credit ri= ng : Agent5", - "EventCode": "0x44", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCB", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 -= NCS", - "EventCode": "0x40", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCB", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 -= NCS", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCB", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 -= NCS", - "EventCode": "0x41", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF0 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF1 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF2 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCB", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IO= SF3 - NCS", - "EventCode": "0x4a", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCB", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF4 - NCS", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCB", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IO= SF5 - NCS", - "EventCode": "0x4b", - "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI0", - "EventCode": "0xe6", - "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : N= umber of cycles MBE is high for MS2IDI1", - "EventCode": "0xe6", - "EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : All", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Local NCB", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Local NCS", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Remote NCB", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "P2P Credit Occupancy : Remote NCS", - "EventCode": "0x14", - "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : All", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Local NCB", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Local NCS", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Remote NCB", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Dedicated Credits Received : Remote NCS", - "EventCode": "0x16", - "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : All", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Local NCB", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Local NCS", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Remote NCB", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Shared Credits Received : Remote NCS", - "EventCode": "0x15", - "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent0", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent1", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote P2P Shared Credits Returned : Agent2", - "EventCode": "0x18", - "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent0", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent1", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Remote Shared P2P Credit Returned to credit r= ing : Agent2", - "EventCode": "0x45", - "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AD", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AD : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : AK", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : AK : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : BL", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : BL : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Horizontal Ring.= : IV", - "EventCode": "0xac", - "EventName": "UNC_M2P_RING_BOUNCES_HORZ.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Horizontal Ring= . : IV : Number of cycles incoming messages from the Horizontal ring that w= ere bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := AD", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AD", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : AD : Number of cycles incoming messages from the Vertical ring that were = bounced, by ring type.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Acknowledgements to core", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AK", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Acknowledgements to core : Number of cycles incoming messages from the Ve= rtical ring that were bounced, by ring type.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring.", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.AKC", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Number of cycles incoming messages from the Vertical ring that were bounc= ed, by ring type.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Data Responses to core", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.BL", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Data Responses to core : Number of cycles incoming messages from the Vert= ical ring that were bounced, by ring type.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Messages that bounced on the Vertical Ring. := Snoops of processor's cache.", - "EventCode": "0xaa", - "EventName": "UNC_M2P_RING_BOUNCES_VERT.IV", - "PerPkg": "1", - "PublicDescription": "Messages that bounced on the Vertical Ring. = : Snoops of processor's cache. : Number of cycles incoming messages from th= e Vertical ring that were bounced, by ring type.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AD", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : AK", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : Acknowle= dgements to Agent 1", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK_AG1", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : BL", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Horizontal Ring : IV", - "EventCode": "0xad", - "EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : AD", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AD", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Acknowledg= ements to core", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AK", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AKC", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Data Respo= nses to core", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.BL", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Sink Starvation on Vertical Ring : Snoops of = processor's cache.", - "EventCode": "0xab", - "EventName": "UNC_M2P_RING_SINK_STARVED_VERT.IV", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Source Throttle", - "EventCode": "0xae", - "EventName": "UNC_M2P_RING_SRC_THRTL", - "PerPkg": "1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty", - "EventCode": "0x10", - "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Cycles Not Empty : = Counts the number of cycles when the M2PCIe Ingress is not empty.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.ALL", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Ingress (from CMS) Queue Inserts", - "EventCode": "0x11", - "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS", - "PerPkg": "1", - "PublicDescription": "Ingress (from CMS) Queue Inserts : Counts th= e number of entries inserted into the M2PCIe Ingress Queue. This can be us= ed in conjunction with the M2PCIe Ingress Occupancy Accumulator event in or= der to calculate average queue latency.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, because a message from the other queue has h= igher priority : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, because a message from the other queue = has higher priority", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xe5", - "EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, because a message from the other queu= e has higher priority", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - All", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Credited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AD - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AD - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AK", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AK : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : AKC - Uncredited= : Number of packets bypassing the CMS Ingress", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - All", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - All : Numbe= r of packets bypassing the CMS Ingress : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Credited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Credited : = Number of packets bypassing the CMS Ingress", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : BL - Uncredited", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : BL - Uncredited = : Number of packets bypassing the CMS Ingress", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Bypass : IV", - "EventCode": "0xe2", - "EventName": "UNC_M2P_RxR_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Bypass : IV : Number of p= ackets bypassing the CMS Ingress", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - All", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Credit= ed", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AD - Uncred= ited", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AD - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : AK", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : AK : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - All", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - All := Counts cycles under injection starvation mode. This starvation is trigger= ed when the CMS Ingress cannot send a transaction onto the mesh for a long = period of time. In this case, the Ingress is unable to forward to the Egre= ss due to a lack of credit. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Credit= ed", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Credi= ted : Counts cycles under injection starvation mode. This starvation is tr= iggered when the CMS Ingress cannot send a transaction onto the mesh for a = long period of time. In this case, the Ingress is unable to forward to the= Egress due to a lack of credit.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : BL - Uncred= ited", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : BL - Uncre= dited : Counts cycles under injection starvation mode. This starvation is = triggered when the CMS Ingress cannot send a transaction onto the mesh for = a long period of time. In this case, the Ingress is unable to forward to t= he Egress due to a lack of credit.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : IFV - Credi= ted", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.IFV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IFV - Cred= ited : Counts cycles under injection starvation mode. This starvation is t= riggered when the CMS Ingress cannot send a transaction onto the mesh for a= long period of time. In this case, the Ingress is unable to forward to th= e Egress due to a lack of credit.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation : IV", - "EventCode": "0xe3", - "EventName": "UNC_M2P_RxR_CRD_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : IV : Count= s cycles under injection starvation mode. This starvation is triggered whe= n the CMS Ingress cannot send a transaction onto the mesh for a long period= of time. In this case, the Ingress is unable to forward to the Egress due= to a lack of credit.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Injection Starvation", - "EventCode": "0xe4", - "EventName": "UNC_M2P_RxR_CRD_STARVED_1", - "PerPkg": "1", - "PublicDescription": "Transgress Injection Starvation : Counts cyc= les under injection starvation mode. This starvation is triggered when the= CMS Ingress cannot send a transaction onto the mesh for a long period of t= ime. In this case, the Ingress is unable to forward to the Egress due to a= lack of credit.", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - All", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Credite= d", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AD - Uncredi= ted", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AD - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AK", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AK : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : AKC - Uncred= ited", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : AKC - Uncre= dited : Number of allocations into the CMS Ingress The Ingress is used to = queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - All", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - All : = Number of allocations into the CMS Ingress The Ingress is used to queue up= requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Credite= d", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Credit= ed : Number of allocations into the CMS Ingress The Ingress is used to que= ue up requests received from the mesh", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : BL - Uncredi= ted", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : BL - Uncred= ited : Number of allocations into the CMS Ingress The Ingress is used to q= ueue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Allocations : IV", - "EventCode": "0xe1", - "EventName": "UNC_M2P_RxR_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Allocations : IV : Number= of allocations into the CMS Ingress The Ingress is used to queue up reque= sts received from the mesh", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - All", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Credited", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AD - Uncredite= d", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AD - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AK", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AK : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredit= ed", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : AKC - Uncredi= ted : Occupancy event for the Ingress buffers in the CMS The Ingress is us= ed to queue up requests received from the mesh", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - All", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - All : Oc= cupancy event for the Ingress buffers in the CMS The Ingress is used to qu= eue up requests received from the mesh : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Credited", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Credited= : Occupancy event for the Ingress buffers in the CMS The Ingress is used = to queue up requests received from the mesh", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : BL - Uncredite= d", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : BL - Uncredit= ed : Occupancy event for the Ingress buffers in the CMS The Ingress is use= d to queue up requests received from the mesh", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Transgress Ingress Occupancy : IV", - "EventCode": "0xe0", - "EventName": "UNC_M2P_RxR_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "Transgress Ingress Occupancy : IV : Occupanc= y event for the Ingress buffers in the CMS The Ingress is used to queue up= requests received from the mesh", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd0", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd2", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd4", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 0", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 0 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 1", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 1 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 2", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 2 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 3", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 3 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 4", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 4 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 5", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 5 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 6", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 6 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 7", - "EventCode": "0xd6", - "EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 7 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd1", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the AD Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No AD Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd3", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No AD Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the AD Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 0 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent0 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd5", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent0 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 0 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 10", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 10 : Number of cycles the BL Agent 1 Egress Buffer is stalled= waiting for a TGR credit to become available, per transgress.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 8", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 8 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Stall on No BL Agent1 Transgress Credits : Fo= r Transgress 9", - "EventCode": "0xd7", - "EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9", - "PerPkg": "1", - "PublicDescription": "Stall on No BL Agent1 Transgress Credits : F= or Transgress 9 : Number of cycles the BL Agent 1 Egress Buffer is stalled = waiting for a TGR credit to become available, per transgress.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ", - "EventCode": "0x2d", - "EventName": "UNC_M2P_TxC_CREDITS.PRQ", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Full", - "EventCode": "0x25", - "EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Full : Counts the num= ber of cycles when the M2PCIe Egress is full. This tracks messages for one= of the two CMS ports that are used by the M2PCIe agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.AK_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Cycles Not Empty", - "EventCode": "0x23", - "EventName": "UNC_M2P_TxC_CYCLES_NE.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Cycles Not Empty : Counts th= e number of cycles when the M2PCIe Egress is not empty. This tracks messag= es for one of the two CMS ports that are used by the M2PCIe agent. This ca= n be used in conjunction with the M2PCIe Ingress Occupancy Accumulator even= t in order to calculate average queue occupancy. Multiple egress buffers c= an be tracked at a given time using multiple counters.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.BL_0", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Egress (to CMS) Ingress", - "EventCode": "0x24", - "EventName": "UNC_M2P_TxC_INSERTS.BL_1", - "PerPkg": "1", - "PublicDescription": "Egress (to CMS) Ingress : Counts the number = of number of messages inserted into the the M2PCIe Egress queue. This tra= cks messages for one of the two CMS ports that are used by the M2PCIe agent= . This can be used in conjunction with the M2PCIe Ingress Occupancy Accumu= lator event in order to calculate average queue occupancy.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - All", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Credited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : AD - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - All", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - All : Number = of packets using the Horizontal Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Credited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Credited : Nu= mber of packets using the Horizontal Anti-Deadlock Slot, broken down by rin= g type and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited", - "EventCode": "0xa6", - "EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal ADS Used : BL - Uncredited : = Number of packets using the Horizontal Anti-Deadlock Slot, broken down by r= ing type and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - All", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Credited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AD - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AK", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AK : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited= ", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : AKC - Uncredite= d : Number of packets bypassing the Horizontal Egress, broken down by ring = type and CMS Agent.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - All", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - All : Numb= er of packets bypassing the Horizontal Egress, broken down by ring type and= CMS Agent. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Credited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Credited := Number of packets bypassing the Horizontal Egress, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : BL - Uncredited= : Number of packets bypassing the Horizontal Egress, broken down by ring t= ype and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Bypass Used : IV", - "EventCode": "0xa7", - "EventName": "UNC_M2P_TxR_HORZ_BYPASS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Bypass Used : IV : Number of = packets bypassing the Horizontal Egress, broken down by ring type and CMS A= gent.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - All", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Credited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AD - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AD - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AK", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AK : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = AKC - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop a= re Full. The egress is used to queue up requests destined for the Horizont= al Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - All", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - All : Cycles the Transgress buffers in the Common Mesh Stop are Full.= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Credited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop are = Full. The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = BL - Uncredited", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := BL - Uncredited : Cycles the Transgress buffers in the Common Mesh Stop ar= e Full. The egress is used to queue up requests destined for the Horizonta= l Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : = IV", - "EventCode": "0xa2", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Full := IV : Cycles the Transgress buffers in the Common Mesh Stop are Full. The = egress is used to queue up requests destined for the Horizontal Ring on the= Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - All", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Credited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AD - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AD - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AK", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AK", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AK : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : AKC - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : AKC - Uncredited : Cycles the Transgress buffers in the Common Mesh S= top are Not-Empty. The egress is used to queue up requests destined for th= e Horizontal Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - All", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_ALL", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - All : Cycles the Transgress buffers in the Common Mesh Stop are = Not-Empty. The egress is used to queue up requests destined for the Horizo= ntal Ring on the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Credited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_CRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Credited : Cycles the Transgress buffers in the Common Mesh Stop= are Not-Empty. The egress is used to queue up requests destined for the H= orizontal Ring on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : BL - Uncredited", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : BL - Uncredited : Cycles the Transgress buffers in the Common Mesh St= op are Not-Empty. The egress is used to queue up requests destined for the= Horizontal Ring on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Emp= ty : IV", - "EventCode": "0xa3", - "EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.IV", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Horizontal Egress Queue is Not Em= pty : IV : Cycles the Transgress buffers in the Common Mesh Stop are Not-Em= pty. The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - All", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited= ", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredit= ed", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AD - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AK", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AK : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredi= ted", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : AKC - Uncred= ited : Number of allocations into the Transgress buffers in the Common Mesh= Stop The egress is used to queue up requests destined for the Horizontal = Ring on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - All", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - All : N= umber of allocations into the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited= ", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Credite= d : Number of allocations into the Transgress buffers in the Common Mesh St= op The egress is used to queue up requests destined for the Horizontal Rin= g on the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredit= ed", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : BL - Uncredi= ted : Number of allocations into the Transgress buffers in the Common Mesh = Stop The egress is used to queue up requests destined for the Horizontal R= ing on the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Inserts : IV", - "EventCode": "0xa1", - "EventName": "UNC_M2P_TxR_HORZ_INSERTS.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Inserts : IV : Number = of allocations into the Transgress buffers in the Common Mesh Stop The egr= ess is used to queue up requests destined for the Horizontal Ring on the Me= sh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - All", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited= ", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AD - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AK", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AK : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredite= d", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : AKC - Uncredit= ed : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - All", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - All : Cou= nts number of Egress packets NACK'ed on to the Horizontal Ring : All =3D=3D= Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Credited = : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited= ", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : BL - Uncredite= d : Counts number of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress NACKs : IV", - "EventCode": "0xa4", - "EventName": "UNC_M2P_TxR_HORZ_NACK.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress NACKs : IV : Counts nu= mber of Egress packets NACK'ed on to the Horizontal Ring", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - All", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x11", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credit= ed", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncred= ited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AD - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AK", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AK : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncre= dited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : AKC - Uncr= edited : Occupancy event for the Transgress buffers in the Common Mesh Stop= The egress is used to queue up requests destined for the Horizontal Ring = on the Mesh.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - All", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - All := Occupancy event for the Transgress buffers in the Common Mesh Stop The eg= ress is used to queue up requests destined for the Horizontal Ring on the M= esh. : All =3D=3D Credited + Uncredited", - "UMask": "0x44", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credit= ed", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_CRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Credi= ted : Occupancy event for the Transgress buffers in the Common Mesh Stop T= he egress is used to queue up requests destined for the Horizontal Ring on = the Mesh.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncred= ited", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : BL - Uncre= dited : Occupancy event for the Transgress buffers in the Common Mesh Stop = The egress is used to queue up requests destined for the Horizontal Ring o= n the Mesh.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Occupancy : IV", - "EventCode": "0xa0", - "EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Occupancy : IV : Occup= ancy event for the Transgress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Horizontal Ring on the Mesh.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - All", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AD - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AD - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AK", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AK", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AK : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = AKC - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.AKC_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := AKC - Uncredited : Counts injection starvation. This starvation is trigge= red when the CMS Transgress buffer cannot send a transaction onto the Horiz= ontal ring for a long period of time.", - "UMask": "0x80", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - All", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_ALL", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - All : Counts injection starvation. This starvation is triggered when= the CMS Transgress buffer cannot send a transaction onto the Horizontal ri= ng for a long period of time. : All =3D=3D Credited + Uncredited", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = BL - Uncredited", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_UNCRD", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := BL - Uncredited : Counts injection starvation. This starvation is trigger= ed when the CMS Transgress buffer cannot send a transaction onto the Horizo= ntal ring for a long period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Horizontal Egress Injection Starvation : = IV", - "EventCode": "0xa5", - "EventName": "UNC_M2P_TxR_HORZ_STARVED.IV", - "PerPkg": "1", - "PublicDescription": "CMS Horizontal Egress Injection Starvation := IV : Counts injection starvation. This starvation is triggered when the C= MS Transgress buffer cannot send a transaction onto the Horizontal ring for= a long period of time.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9c", - "EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets using the Vertical Anti-Deadlock Slot, broken down by ring typ= e and CMS Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AD - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AD - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AK - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AK - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 0", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 0 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : BL - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : BL - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : IV - Agent 1", - "EventCode": "0x9d", - "EventName": "UNC_M2P_TxR_VERT_BYPASS.IV_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : IV - Agent 1 : Numbe= r of packets bypassing the Vertical Egress, broken down by ring type and CM= S Agent.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0", - "EventCode": "0x9e", - "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 0 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1", - "EventCode": "0x9e", - "EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical ADS Used : AKC - Agent 1 : Numb= er of packets bypassing the Vertical Egress, broken down by ring type and C= MS Agent.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some ex= ample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= D - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AD ring. This is= commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the AK ring. This is= commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= K - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the BL ring. This is= commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL= - Agent 1", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : B= L - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 1 destined for the BL ring. This is= commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV= - Agent 0", - "EventCode": "0x94", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : I= V - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. T= he Egress is used to queue up requests destined for the Vertical Ring on th= e Mesh. : Ring transactions from Agent 0 destined for the IV ring. This is= commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 0", - "EventCode": "0x95", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AD ring. Some e= xample include outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK= C - Agent 1", - "EventCode": "0x95", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Full : A= KC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Full. = The Egress is used to queue up requests destined for the Vertical Ring on t= he Mesh. : Ring transactions from Agent 0 destined for the AK ring. This i= s commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. S= ome example include outbound requests, snoop requests, and snoop responses.= ", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AD - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AD - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AD ring. T= his is commonly used for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. T= his is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AK - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AK - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the BL ring. T= his is commonly used to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : BL - Agent 1", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : BL - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 1 destined for the BL ring. T= his is commonly used for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : IV - Agent 0", - "EventCode": "0x96", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : IV - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Emp= ty. The Egress is used to queue up requests destined for the Vertical Ring= on the Mesh. : Ring transactions from Agent 0 destined for the IV ring. T= his is commonly used for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 0", - "EventCode": "0x97", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 0 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AD ring. = Some example include outbound requests, snoop requests, and snoop responses= .", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty= : AKC - Agent 1", - "EventCode": "0x97", - "EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "Cycles CMS Vertical Egress Queue Is Not Empt= y : AKC - Agent 1 : Number of cycles the Common Mesh Stop Egress was Not Em= pty. The Egress is used to queue up requests destined for the Vertical Rin= g on the Mesh. : Ring transactions from Agent 0 destined for the AK ring. = This is commonly used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AD ring. Some example include ou= tbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AD - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AD ring. This is commonly used f= or outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the AK ring. This is commonly used f= or credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AK - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the BL ring. This is commonly used t= o send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : BL - Agent 1 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 1 destined for the BL ring. This is commonly used f= or transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0", - "EventCode": "0x92", - "EventName": "UNC_M2P_TxR_VERT_INSERTS0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : IV - Agent 0 := Number of allocations into the Common Mesh Stop Egress. The Egress is use= d to queue up requests destined for the Vertical Ring on the Mesh. : Ring t= ransactions from Agent 0 destined for the IV ring. This is commonly used f= or snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0", - "EventCode": "0x93", - "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 0 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AD ring. Some example include o= utbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1", - "EventCode": "0x93", - "EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Allocations : AKC - Agent 1 = : Number of allocations into the Common Mesh Stop Egress. The Egress is us= ed to queue up requests destined for the Vertical Ring on the Mesh. : Ring = transactions from Agent 0 destined for the AK ring. This is commonly used = for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AD - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AK - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 0 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : BL - Agent 1 : C= ounts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : IV", - "EventCode": "0x98", - "EventName": "UNC_M2P_TxR_VERT_NACK0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : IV : Counts numb= er of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0", - "EventCode": "0x99", - "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 0 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1", - "EventCode": "0x99", - "EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress NACKs : AKC - Agent 1 : = Counts number of Egress packets NACK'ed on to the Vertical Ring", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AD ring. Some example inclu= de outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AD - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AD ring. This is commonly u= sed for outbound requests.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the AK ring. This is commonly u= sed for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AK - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the AK ring.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the BL ring. This is commonly u= sed to send data from the cache to various destinations.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : BL - Agent 1 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 1 destined for the BL ring. This is commonly u= sed for transferring writeback data to the cache.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0", - "EventCode": "0x90", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : IV - Agent 0 : O= ccupancy event for the Egress buffers in the Common Mesh Stop The egress i= s used to queue up requests destined for the Vertical Ring on the Mesh. : R= ing transactions from Agent 0 destined for the IV ring. This is commonly u= sed for snoops to the cores.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0", - "EventCode": "0x91", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 0 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AD ring. Some example incl= ude outbound requests, snoop requests, and snoop responses.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1", - "EventCode": "0x91", - "EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vert Egress Occupancy : AKC - Agent 1 : = Occupancy event for the Egress buffers in the Common Mesh Stop The egress = is used to queue up requests destined for the Vertical Ring on the Mesh. : = Ring transactions from Agent 0 destined for the AK ring. This is commonly = used for credit returns and GO responses.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AD= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= D - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x10", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= K - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x20", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 0", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 0 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : BL= - Agent 1", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : B= L - Agent 1 : Counts injection starvation. This starvation is triggered wh= en the CMS Egress cannot send a transaction onto the Vertical ring for a lo= ng period of time.", - "UMask": "0x40", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : IV= ", - "EventCode": "0x9a", - "EventName": "UNC_M2P_TxR_VERT_STARVED0.IV_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : I= V : Counts injection starvation. This starvation is triggered when the CMS= Egress cannot send a transaction onto the Vertical ring for a long period = of time.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG0", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 1", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG1", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 1 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "CMS Vertical Egress Injection Starvation : AK= C - Agent 0", - "EventCode": "0x9b", - "EventName": "UNC_M2P_TxR_VERT_STARVED1.TGC", - "PerPkg": "1", - "PublicDescription": "CMS Vertical Egress Injection Starvation : A= KC - Agent 0 : Counts injection starvation. This starvation is triggered w= hen the CMS Egress cannot send a transaction onto the Vertical ring for a l= ong period of time.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Even", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AD ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top. We really have two rings -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Down and Odd", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AD ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op. We really have two rings -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Even", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AD ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p. We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AD Ring In Use : Up and Odd", - "EventCode": "0xb0", - "EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AD Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AD ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= . We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Even", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical AKC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Down and Odd", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical AKC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Even", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical AKC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AKC Ring In Use : Up and Odd", - "EventCode": "0xb4", - "EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AKC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical AKC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Even", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Even : Co= unts the number of cycles that the Vertical AK ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in -- a clockwise ring and a counter-clockwise= ring. On the left side of the ring, the UP direction is on the clockwise = ring and DN is on the counter-clockwise ring. On the right side of the rin= g, this is reversed. The first half of the CBos are on the left side of th= e ring, and the 2nd half are on the right side of the ring. In other words= (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP = AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Down and Odd", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Down and Odd : Cou= nts the number of cycles that the Vertical AK ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in -- a clockwise ring and a counter-clockwise = ring. On the left side of the ring, the UP direction is on the clockwise r= ing and DN is on the counter-clockwise ring. On the right side of the ring= , this is reversed. The first half of the CBos are on the left side of the= ring, and the 2nd half are on the right side of the ring. In other words = (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP A= D because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Even", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Even : Coun= ts the number of cycles that the Vertical AK ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings in -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical AK Ring In Use : Up and Odd", - "EventCode": "0xb1", - "EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical AK Ring In Use : Up and Odd : Count= s the number of cycles that the Vertical AK ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring stop= .We really have two rings in -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Even", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Even : Co= unts the number of cycles that the Vertical BL ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring = stop.We really have two rings -- a clockwise ring and a counter-clockwise r= ing. On the left side of the ring, the UP direction is on the clockwise ri= ng and DN is on the counter-clockwise ring. On the right side of the ring,= this is reversed. The first half of the CBos are on the left side of the = ring, and the 2nd half are on the right side of the ring. In other words (= for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD= because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Down and Odd", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Down and Odd : Cou= nts the number of cycles that the Vertical BL ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings -- a clockwise ring and a counter-clockwise ri= ng. On the left side of the ring, the UP direction is on the clockwise rin= g and DN is on the counter-clockwise ring. On the right side of the ring, = this is reversed. The first half of the CBos are on the left side of the r= ing, and the 2nd half are on the right side of the ring. In other words (f= or example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD = because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Even", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Even : Coun= ts the number of cycles that the Vertical BL ring is being used at this rin= g stop. This includes when packets are passing by and when packets are bei= ng sunk, but does not include when packets are being sent from the ring st= op.We really have two rings -- a clockwise ring and a counter-clockwise rin= g. On the left side of the ring, the UP direction is on the clockwise ring= and DN is on the counter-clockwise ring. On the right side of the ring, t= his is reversed. The first half of the CBos are on the left side of the ri= ng, and the 2nd half are on the right side of the ring. In other words (fo= r example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD b= ecause they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical BL Ring in Use : Up and Odd", - "EventCode": "0xb2", - "EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical BL Ring in Use : Up and Odd : Count= s the number of cycles that the Vertical BL ring is being used at this ring= stop. This includes when packets are passing by and when packets are bein= g sunk, but does not include when packets are being sent from the ring sto= p.We really have two rings -- a clockwise ring and a counter-clockwise ring= . On the left side of the ring, the UP direction is on the clockwise ring = and DN is on the counter-clockwise ring. On the right side of the ring, th= is is reversed. The first half of the CBos are on the left side of the rin= g, and the 2nd half are on the right side of the ring. In other words (for= example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 UP AD be= cause they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Down", - "EventCode": "0xb3", - "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.DN", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Down : Counts the = number of cycles that the Vertical IV ring is being used at this ring stop.= This includes when packets are passing by and when packets are being sunk= , but does not include when packets are being sent from the ring stop. The= re is only 1 IV ring. Therefore, if one wants to monitor the Even ring, th= ey should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they s= hould select both UP_ODD and DN_ODD.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical IV Ring in Use : Up", - "EventCode": "0xb3", - "EventName": "UNC_M2P_VERT_RING_IV_IN_USE.UP", - "PerPkg": "1", - "PublicDescription": "Vertical IV Ring in Use : Up : Counts the nu= mber of cycles that the Vertical IV ring is being used at this ring stop. = This includes when packets are passing by and when packets are being sunk, = but does not include when packets are being sent from the ring stop. There= is only 1 IV ring. Therefore, if one wants to monitor the Even ring, they= should select both UP_EVEN and DN_EVEN. To monitor the Odd ring, they sho= uld select both UP_ODD and DN_ODD.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Even", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Even : C= ounts the number of cycles that the Vertical TGC ring is being used at this= ring stop. This includes when packets are passing by and when packets are= being sunk, but does not include when packets are being sent from the ring= stop.We really have two rings in JKT -- a clockwise ring and a counter-clo= ckwise ring. On the left side of the ring, the UP direction is on the cloc= kwise ring and DN is on the counter-clockwise ring. On the right side of t= he ring, this is reversed. The first half of the CBos are on the left side= of the ring, and the 2nd half are on the right side of the ring. In other= words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo= 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x4", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Down and Odd", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Down and Odd : Co= unts the number of cycles that the Vertical TGC ring is being used at this = ring stop. This includes when packets are passing by and when packets are = being sunk, but does not include when packets are being sent from the ring = stop.We really have two rings in JKT -- a clockwise ring and a counter-cloc= kwise ring. On the left side of the ring, the UP direction is on the clock= wise ring and DN is on the counter-clockwise ring. On the right side of th= e ring, this is reversed. The first half of the CBos are on the left side = of the ring, and the 2nd half are on the right side of the ring. In other = words (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo = 2 UP AD because they are on opposite sides of the ring.", - "UMask": "0x8", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Even", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_EVEN", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Even : Cou= nts the number of cycles that the Vertical TGC ring is being used at this r= ing stop. This includes when packets are passing by and when packets are b= eing sunk, but does not include when packets are being sent from the ring s= top.We really have two rings in JKT -- a clockwise ring and a counter-clock= wise ring. On the left side of the ring, the UP direction is on the clockw= ise ring and DN is on the counter-clockwise ring. On the right side of the= ring, this is reversed. The first half of the CBos are on the left side o= f the ring, and the 2nd half are on the right side of the ring. In other w= ords (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2= UP AD because they are on opposite sides of the ring.", - "UMask": "0x1", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Vertical TGC Ring In Use : Up and Odd", - "EventCode": "0xb5", - "EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_ODD", - "PerPkg": "1", - "PublicDescription": "Vertical TGC Ring In Use : Up and Odd : Coun= ts the number of cycles that the Vertical TGC ring is being used at this ri= ng stop. This includes when packets are passing by and when packets are be= ing sunk, but does not include when packets are being sent from the ring st= op.We really have two rings in JKT -- a clockwise ring and a counter-clockw= ise ring. On the left side of the ring, the UP direction is on the clockwi= se ring and DN is on the counter-clockwise ring. On the right side of the = ring, this is reversed. The first half of the CBos are on the left side of= the ring, and the 2nd half are on the right side of the ring. In other wo= rds (for example), in a 4c part, Cbo 0 UP AD is NOT the same ring as CBo 2 = UP AD because they are on opposite sides of the ring.", - "UMask": "0x2", - "Unit": "M2PCIe" - }, - { - "BriefDescription": "Clockticks in the UBOX using a dedicated 48-b= it Fixed Counter", - "EventCode": "0xff", - "EventName": "UNC_U_CLOCKTICKS", - "PerPkg": "1", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : Doorbell", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : Interrupt", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.INT_PRIO", - "PerPkg": "1", - "PublicDescription": "Message Received : Interrupt : Interrupts", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : IPI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.IPI_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : IPI : Inter Processor Int= errupts", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : MSI", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.MSI_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : MSI : Message Signaled In= terrupts - interrupts sent by devices (including PCIe via IOxAPIC) (Socket = Mode only)", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Message Received : VLW", - "EventCode": "0x42", - "EventName": "UNC_U_EVENT_MSG.VLW_RCVD", - "PerPkg": "1", - "PublicDescription": "Message Received : VLW : Virtual Logical Wir= e (legacy) message were received from Uncore.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "IDI Lock/SplitLock Cycles", - "EventCode": "0x44", - "EventName": "UNC_U_LOCK_CYCLES", - "PerPkg": "1", - "PublicDescription": "IDI Lock/SplitLock Cycles : Number of times = an IDI Lock/SplitLock sequence was started", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", - "EventCode": "0x4D", - "EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS", - "PerPkg": "1", - "UMask": "0x8", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK", - "PerPkg": "1", - "UMask": "0x20", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC", - "PerPkg": "1", - "UMask": "0x40", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL", - "PerPkg": "1", - "UMask": "0x10", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", - "EventCode": "0x4E", - "EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL", - "PerPkg": "1", - "UMask": "0x80", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", - "EventCode": "0x4F", - "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", - "EventCode": "0x4F", - "EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK", - "EventCode": "0x45", - "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK", - "PerPkg": "1", - "PublicDescription": "Cycles PHOLD Assert to Ack : Assert to ACK := PHOLD cycles.", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY", - "PerPkg": "1", - "UMask": "0x4", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDRAND", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDRAND", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "UBOX" - }, - { - "BriefDescription": "UNC_U_RACU_DRNG.RDSEED", - "EventCode": "0x4C", - "EventName": "UNC_U_RACU_DRNG.RDSEED", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "UBOX" - }, - { - "BriefDescription": "RACU Request", - "EventCode": "0x46", - "EventName": "UNC_U_RACU_REQUESTS", - "PerPkg": "1", - "PublicDescription": "RACU Request : Number outstanding register r= equests within message channel tracker", - "Unit": "UBOX" - } -] --=20 2.40.0.577.gac1e443424-goog From nobody Fri Dec 19 03:46:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE4E7C77B6E for ; Thu, 13 Apr 2023 13:35:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230432AbjDMNfS (ORCPT ); Thu, 13 Apr 2023 09:35:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231627AbjDMNet (ORCPT ); Thu, 13 Apr 2023 09:34:49 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39CA8A5C4 for ; Thu, 13 Apr 2023 06:32:57 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-54c17fb245dso208094907b3.21 for ; Thu, 13 Apr 2023 06:32:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681392776; x=1683984776; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=D/wMb40ntUrrtEKX0pWRjZNO+TlYXtCqLFbV8EoKRtw=; b=meip9PgF8IZZiyBu0FD+9kxzuz+MDvUH1o6CpbJdGOCKvpJkqZ6hazSJCGAZywHUXO cbKAvLshlEY9FLdMtiuDArcXE1BtKENOWZvyGwNnNUkgr7Dwk61YSK182wTOTmV9/+kV kHGoUcCEnZHcVJ+Ej+drWqn5jADYtFWQVmpr5a5KRMEd9YvccXFW3g3pdy9WlL0qa7w6 /Gf5ieDyAkhcsNf7sAfik3l6iIgIF43wZSv5HNsfDN6gIQVIbNmzHiHb0RI1og0Iro0o HLrS6isrgN6o9hsqrwfOoPDFgRNHeIu8DAH9PQXfKTtfcgRyJLcSpeT0o7FHTHkX1dEX LKSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681392776; x=1683984776; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=D/wMb40ntUrrtEKX0pWRjZNO+TlYXtCqLFbV8EoKRtw=; b=eZhUwFa+WXbdH38u0slTQPzh51Cj2Y9EBUleIMvSb4Kdi7GL/0b65xNc7mDwb26t59 HanxL7PLh0TBB+VkSIu3yGQGlQtiwNl0RHeXYuyi8DOa9k3FYUIDxGrb1ucblI4OzseP Ttnj5uYVoNpfOKJBdQoYZtNeWoxtLA6baGmAahJEmNZIignlRIpmgB/dy9QfBGMZ3gVF 2P5HhddhIqAIDT3cSBzWk7qldOBdjf8t9Vw8y7GA56XVVt7+7Fe8OhoQzvVBBvb1ooe5 Ybr8IZlF/A2Y1sTKZQpuv8GA65Dghtism4oRYV0w1jbHox0BePs3vkYxSSZJ5vMmkgRX 9lGw== X-Gm-Message-State: AAQBX9fPGfJGXTzjfn/Rd1cLEvyhkpUhXPGVi7EeWaV8IeBPPrPkc9TZ tDF462ZFZ7oB+AwVuz8HN4+i1cpjMef9 X-Google-Smtp-Source: AKy350Z6mxMLtzGWnCheL4tm7o3Tk9j27ZFOMJO97LE6vtyxY2iB37ARs4wdyNNy/55Qwi8LbH59Zvu3E7Vd X-Received: from irogers.svl.corp.google.com ([2620:15c:2d4:203:c8fe:b894:ec92:d5cd]) (user=irogers job=sendgmr) by 2002:a25:ca44:0:b0:b8e:7771:f424 with SMTP id a65-20020a25ca44000000b00b8e7771f424mr1461457ybg.0.1681392775967; Thu, 13 Apr 2023 06:32:55 -0700 (PDT) Date: Thu, 13 Apr 2023 06:29:49 -0700 In-Reply-To: <20230413132949.3487664-1-irogers@google.com> Message-Id: <20230413132949.3487664-22-irogers@google.com> Mime-Version: 1.0 References: <20230413132949.3487664-1-irogers@google.com> X-Mailer: git-send-email 2.40.0.577.gac1e443424-goog Subject: [PATCH v3 21/21] perf vendor events intel: Fix uncore topics for tigerlake From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Zhengjun Xing , Kan Liang , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Edward Baker , Perry Taylor , Caleb Biggers Cc: Stephane Eranian , Ian Rogers Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move events from 'uncore-other' topic classification to interconnect. Signed-off-by: Ian Rogers --- .../x86/tigerlake/uncore-interconnect.json | 90 +++++++++++++++++++ .../arch/x86/tigerlake/uncore-other.json | 88 ------------------ 2 files changed, 90 insertions(+), 88 deletions(-) create mode 100644 tools/perf/pmu-events/arch/x86/tigerlake/uncore-interco= nnect.json diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-interconnect.j= son b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-interconnect.json new file mode 100644 index 000000000000..eed1b90a2779 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-interconnect.json @@ -0,0 +1,90 @@ +[ + { + "BriefDescription": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "EventCode": "0x84", + "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of any coherent requ= est at memory controller that were issued by any core.", + "EventCode": "0x85", + "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle counts number of coherent reads pe= nding on data return from memory controller that were issued by any core.", + "EventCode": "0x85", + "EventName": "UNC_ARB_DAT_OCCUPANCY.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_REQ_TRK_REQUEST.DRD", + "EventCode": "0x81", + "EventName": "UNC_ARB_DAT_REQUESTS.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_DAT_OCCUPANCY.ALL", + "EventCode": "0x85", + "EventName": "UNC_ARB_IFA_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_T= RK_OCCUPANCY.RD]", + "EventCode": "0x80", + "EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_TRK_REQUESTS.RD]", + "EventCode": "0x81", + "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of all outgoing valid= entries in ReqTrk. Such entry is defined as valid from it's allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_R= EQ_TRK_OCCUPANCY.DRD]", + "EventCode": "0x80", + "EventName": "UNC_ARB_TRK_OCCUPANCY.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + }, + { + "BriefDescription": "UNC_ARB_TRK_REQUESTS.ALL", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.ALL", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "ARB" + }, + { + "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_REQ_TRK_REQUEST.DRD= ]", + "EventCode": "0x81", + "EventName": "UNC_ARB_TRK_REQUESTS.RD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "ARB" + } +] diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json b/t= ools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json index 6e43aaf64e28..c6596ba09195 100644 --- a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json @@ -1,92 +1,4 @@ [ - { - "BriefDescription": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "EventCode": "0x84", - "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of any coherent requ= est at memory controller that were issued by any core.", - "EventCode": "0x85", - "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle counts number of coherent reads pe= nding on data return from memory controller that were issued by any core.", - "EventCode": "0x85", - "EventName": "UNC_ARB_DAT_OCCUPANCY.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_REQ_TRK_REQUEST.DRD", - "EventCode": "0x81", - "EventName": "UNC_ARB_DAT_REQUESTS.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "This event is deprecated. Refer to new event = UNC_ARB_DAT_OCCUPANCY.ALL", - "EventCode": "0x85", - "EventName": "UNC_ARB_IFA_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_T= RK_OCCUPANCY.RD]", - "EventCode": "0x80", - "EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_TRK_REQUESTS.RD]", - "EventCode": "0x81", - "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of all outgoing valid= entries in ReqTrk. Such entry is defined as valid from it's allocation in = ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Each cycle count number of 'valid' coherent D= ata Read entries . Such entry is defined as valid when it is allocated till= deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_R= EQ_TRK_OCCUPANCY.DRD]", - "EventCode": "0x80", - "EventName": "UNC_ARB_TRK_OCCUPANCY.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, - { - "BriefDescription": "UNC_ARB_TRK_REQUESTS.ALL", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.ALL", - "PerPkg": "1", - "UMask": "0x1", - "Unit": "ARB" - }, - { - "BriefDescription": "Number of all coherent Data Read entries. Doe= sn't include prefetches [This event is alias to UNC_ARB_REQ_TRK_REQUEST.DRD= ]", - "EventCode": "0x81", - "EventName": "UNC_ARB_TRK_REQUESTS.RD", - "PerPkg": "1", - "UMask": "0x2", - "Unit": "ARB" - }, { "BriefDescription": "UNC_CLOCK.SOCKET", "EventCode": "0xff", --=20 2.40.0.577.gac1e443424-goog